mirror of
https://github.com/joel16/android_kernel_sony_msm8994_rework.git
synced 2024-12-29 07:44:24 +00:00
[MIPS] Separate platform_device registration for VR41xx GPIO
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Yoichi Yuasa
Ralf Baechle
parent
a74b460518
commit
44173fb2e8
@ -2,4 +2,4 @@
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# Makefile for common code of the NEC VR4100 series.
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#
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obj-y += bcu.o cmu.o icu.o init.o irq.o pmu.o siu.o type.o
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obj-y += bcu.o cmu.o giu.o icu.o init.o irq.o pmu.o siu.o type.o
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122
arch/mips/vr41xx/common/giu.c
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122
arch/mips/vr41xx/common/giu.c
Normal file
@ -0,0 +1,122 @@
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/*
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* NEC VR4100 series GIU platform device.
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*
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* Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/platform_device.h>
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#include <asm/cpu.h>
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#include <asm/vr41xx/giu.h>
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#include <asm/vr41xx/irq.h>
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static struct resource giu_50pins_pullupdown_resource[] __initdata = {
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{
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.start = 0x0b000100,
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.end = 0x0b00011f,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = 0x0b0002e0,
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.end = 0x0b0002e3,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = GIUINT_IRQ,
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.end = GIUINT_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource giu_36pins_resource[] __initdata = {
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{
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.start = 0x0f000140,
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.end = 0x0f00015f,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = GIUINT_IRQ,
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.end = GIUINT_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource giu_48pins_resource[] __initdata = {
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{
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.start = 0x0f000140,
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.end = 0x0f000167,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = GIUINT_IRQ,
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.end = GIUINT_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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};
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static int __init vr41xx_giu_add(void)
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{
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struct platform_device *pdev;
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struct resource *res;
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unsigned int num;
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int retval;
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pdev = platform_device_alloc("GIU", -1);
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if (!pdev)
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return -ENOMEM;
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switch (current_cpu_data.cputype) {
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case CPU_VR4111:
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case CPU_VR4121:
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pdev->id = GPIO_50PINS_PULLUPDOWN;
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res = giu_50pins_pullupdown_resource;
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num = ARRAY_SIZE(giu_50pins_pullupdown_resource);
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break;
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case CPU_VR4122:
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case CPU_VR4131:
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pdev->id = GPIO_36PINS;
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res = giu_36pins_resource;
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num = ARRAY_SIZE(giu_36pins_resource);
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break;
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case CPU_VR4133:
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pdev->id = GPIO_48PINS_EDGE_SELECT;
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res = giu_48pins_resource;
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num = ARRAY_SIZE(giu_48pins_resource);
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break;
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default:
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retval = -ENODEV;
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goto err_free_device;
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}
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retval = platform_device_add_resources(pdev, res, num);
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if (retval)
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goto err_free_device;
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retval = platform_device_add(pdev);
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if (retval)
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goto err_free_device;
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return 0;
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err_free_device:
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platform_device_put(pdev);
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return retval;
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}
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device_initcall(vr41xx_giu_add);
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@ -19,18 +19,17 @@
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/platform_device.h>
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#include <linux/errno.h>
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#include <linux/fs.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include <asm/cpu.h>
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#include <asm/io.h>
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#include <asm/vr41xx/giu.h>
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#include <asm/vr41xx/irq.h>
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@ -44,18 +43,6 @@ static int major; /* default is dynamic major device number */
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module_param(major, int, 0);
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MODULE_PARM_DESC(major, "Major device number");
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#define GIU_TYPE1_START 0x0b000100UL
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#define GIU_TYPE1_SIZE 0x20UL
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#define GIU_TYPE2_START 0x0f000140UL
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#define GIU_TYPE2_SIZE 0x20UL
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#define GIU_TYPE3_START 0x0f000140UL
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#define GIU_TYPE3_SIZE 0x28UL
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#define GIU_PULLUPDOWN_START 0x0b0002e0UL
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#define GIU_PULLUPDOWN_SIZE 0x04UL
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#define GIUIOSELL 0x00
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#define GIUIOSELH 0x02
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#define GIUPIODL 0x04
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@ -89,8 +76,6 @@ MODULE_PARM_DESC(major, "Major device number");
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#define GPIO_HAS_INTERRUPT_EDGE_SELECT 0x0100
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static spinlock_t giu_lock;
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static struct resource *giu_resource1;
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static struct resource *giu_resource2;
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static unsigned long giu_flags;
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static unsigned int giu_nr_pins;
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@ -234,7 +219,7 @@ void vr41xx_set_irq_trigger(unsigned int pin, irq_trigger_t trigger, irq_signal_
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giu_set(GIUINTHTSELL, mask);
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else
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giu_clear(GIUINTHTSELL, mask);
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if (current_cpu_data.cputype == CPU_VR4133) {
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if (giu_flags & GPIO_HAS_INTERRUPT_EDGE_SELECT) {
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switch (trigger) {
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case IRQ_TRIGGER_EDGE_FALLING:
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giu_set(GIUFEDGEINHL, mask);
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@ -269,7 +254,7 @@ void vr41xx_set_irq_trigger(unsigned int pin, irq_trigger_t trigger, irq_signal_
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giu_set(GIUINTHTSELH, mask);
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else
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giu_clear(GIUINTHTSELH, mask);
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if (current_cpu_data.cputype == CPU_VR4133) {
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if (giu_flags & GPIO_HAS_INTERRUPT_EDGE_SELECT) {
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switch (trigger) {
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case IRQ_TRIGGER_EDGE_FALLING:
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giu_set(GIUFEDGEINHH, mask);
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@ -298,7 +283,6 @@ void vr41xx_set_irq_trigger(unsigned int pin, irq_trigger_t trigger, irq_signal_
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giu_write(GIUINTSTATH, mask);
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}
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}
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EXPORT_SYMBOL_GPL(vr41xx_set_irq_trigger);
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void vr41xx_set_irq_level(unsigned int pin, irq_level_t level)
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@ -321,7 +305,6 @@ void vr41xx_set_irq_level(unsigned int pin, irq_level_t level)
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giu_write(GIUINTSTATH, mask);
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}
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}
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EXPORT_SYMBOL_GPL(vr41xx_set_irq_level);
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gpio_data_t vr41xx_gpio_get_pin(unsigned int pin)
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@ -350,7 +333,6 @@ gpio_data_t vr41xx_gpio_get_pin(unsigned int pin)
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return GPIO_DATA_LOW;
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}
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EXPORT_SYMBOL_GPL(vr41xx_gpio_get_pin);
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int vr41xx_gpio_set_pin(unsigned int pin, gpio_data_t data)
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@ -388,7 +370,6 @@ int vr41xx_gpio_set_pin(unsigned int pin, gpio_data_t data)
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return 0;
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}
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EXPORT_SYMBOL_GPL(vr41xx_gpio_set_pin);
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int vr41xx_gpio_set_direction(unsigned int pin, gpio_direction_t dir)
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@ -438,7 +419,6 @@ int vr41xx_gpio_set_direction(unsigned int pin, gpio_direction_t dir)
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return 0;
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}
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EXPORT_SYMBOL_GPL(vr41xx_gpio_set_direction);
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int vr41xx_gpio_pullupdown(unsigned int pin, gpio_pull_t pull)
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@ -477,7 +457,6 @@ int vr41xx_gpio_pullupdown(unsigned int pin, gpio_pull_t pull)
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return 0;
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}
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EXPORT_SYMBOL_GPL(vr41xx_gpio_pullupdown);
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static ssize_t gpio_read(struct file *file, char __user *buf, size_t len,
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@ -596,61 +575,40 @@ static const struct file_operations gpio_fops = {
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static int __devinit giu_probe(struct platform_device *dev)
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{
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unsigned long start, size, flags = 0;
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unsigned int nr_pins = 0, trigger, i, pin;
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struct resource *res1, *res2 = NULL;
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void *base;
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struct resource *res;
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unsigned int trigger, i, pin;
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struct irq_chip *chip;
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int retval;
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int irq, retval;
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switch (current_cpu_data.cputype) {
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case CPU_VR4111:
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case CPU_VR4121:
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start = GIU_TYPE1_START;
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size = GIU_TYPE1_SIZE;
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flags = GPIO_HAS_PULLUPDOWN_IO;
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nr_pins = 50;
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switch (dev->id) {
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case GPIO_50PINS_PULLUPDOWN:
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giu_flags = GPIO_HAS_PULLUPDOWN_IO;
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giu_nr_pins = 50;
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break;
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case CPU_VR4122:
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case CPU_VR4131:
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start = GIU_TYPE2_START;
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size = GIU_TYPE2_SIZE;
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nr_pins = 36;
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case GPIO_36PINS:
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giu_nr_pins = 36;
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break;
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case CPU_VR4133:
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start = GIU_TYPE3_START;
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size = GIU_TYPE3_SIZE;
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flags = GPIO_HAS_INTERRUPT_EDGE_SELECT;
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nr_pins = 48;
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case GPIO_48PINS_EDGE_SELECT:
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giu_flags = GPIO_HAS_INTERRUPT_EDGE_SELECT;
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giu_nr_pins = 48;
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break;
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default:
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printk(KERN_ERR "GIU: unknown ID %d\n", dev->id);
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return -ENODEV;
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}
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res1 = request_mem_region(start, size, "GIU");
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if (res1 == NULL)
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res = platform_get_resource(dev, IORESOURCE_MEM, 0);
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if (!res)
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return -EBUSY;
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base = ioremap(start, size);
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if (base == NULL) {
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release_resource(res1);
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giu_base = ioremap(res->start, res->end - res->start + 1);
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if (!giu_base)
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return -ENOMEM;
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}
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if (flags & GPIO_HAS_PULLUPDOWN_IO) {
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res2 = request_mem_region(GIU_PULLUPDOWN_START, GIU_PULLUPDOWN_SIZE, "GIU");
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if (res2 == NULL) {
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iounmap(base);
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release_resource(res1);
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return -EBUSY;
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}
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}
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retval = register_chrdev(major, "GIU", &gpio_fops);
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if (retval < 0) {
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iounmap(base);
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release_resource(res1);
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release_resource(res2);
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iounmap(giu_base);
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giu_base = NULL;
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return retval;
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}
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@ -660,11 +618,6 @@ static int __devinit giu_probe(struct platform_device *dev)
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}
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spin_lock_init(&giu_lock);
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giu_base = base;
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giu_resource1 = res1;
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giu_resource2 = res2;
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giu_flags = flags;
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giu_nr_pins = nr_pins;
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giu_write(GIUINTENL, 0);
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giu_write(GIUINTENH, 0);
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@ -685,22 +638,23 @@ static int __devinit giu_probe(struct platform_device *dev)
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}
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return cascade_irq(GIUINT_IRQ, giu_get_irq);
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irq = platform_get_irq(dev, 0);
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if (irq < 0 || irq >= NR_IRQS)
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return -EBUSY;
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return cascade_irq(irq, giu_get_irq);
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}
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static int __devexit giu_remove(struct platform_device *dev)
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{
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iounmap(giu_base);
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release_resource(giu_resource1);
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if (giu_flags & GPIO_HAS_PULLUPDOWN_IO)
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release_resource(giu_resource2);
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if (giu_base) {
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iounmap(giu_base);
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giu_base = NULL;
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}
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return 0;
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}
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static struct platform_device *giu_platform_device;
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static struct platform_driver giu_device_driver = {
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.probe = giu_probe,
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.remove = __devexit_p(giu_remove),
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@ -712,30 +666,12 @@ static struct platform_driver giu_device_driver = {
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static int __init vr41xx_giu_init(void)
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{
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int retval;
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giu_platform_device = platform_device_alloc("GIU", -1);
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if (!giu_platform_device)
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return -ENOMEM;
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retval = platform_device_add(giu_platform_device);
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if (retval < 0) {
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platform_device_put(giu_platform_device);
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return retval;
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}
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retval = platform_driver_register(&giu_device_driver);
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if (retval < 0)
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platform_device_unregister(giu_platform_device);
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return retval;
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return platform_driver_register(&giu_device_driver);
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}
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static void __exit vr41xx_giu_exit(void)
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{
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platform_driver_unregister(&giu_device_driver);
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platform_device_unregister(giu_platform_device);
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}
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module_init(vr41xx_giu_init);
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@ -20,6 +20,15 @@
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#ifndef __NEC_VR41XX_GIU_H
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#define __NEC_VR41XX_GIU_H
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/*
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* NEC VR4100 series GIU platform device IDs.
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*/
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enum {
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GPIO_50PINS_PULLUPDOWN,
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GPIO_36PINS,
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GPIO_48PINS_EDGE_SELECT,
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};
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typedef enum {
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IRQ_TRIGGER_LEVEL,
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IRQ_TRIGGER_EDGE,
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