joel16/android_kernel_sony_msm8994_rework
1
0
Fork 0
mirror of https://github.com/joel16/android_kernel_sony_msm8994_rework.git synced 2024-12-04 01:45:18 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

ARM: SoC fixes for 3.10-rc

Browse Source 
Another week, another batch of fixes for arm-soc platforms.
 
 Nothing controversial here, a handful of fixes for regressions and/or
 serious problems across several of the platforms. Things are slowing
 down nicely on fix rates for 3.10.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJRs2w/AAoJEIwa5zzehBx39KsP/2loDpDbxWD4z1YYPXqpXkUt
 /r49WbMBuwxgK8adc1hXUTYQSDECQ9boqKbH/Jyt5edn7lR5JctYeGO7z9tlmQhs
 HrbFK9QVcidK5J6+0DJwwZPQcS03f4KQ/p529tVihmYVoQx8vQKe9buevn9pD5cg
 ud8vlbJ3tPZGC5DJCpJpZd/+GkAlnCRTrUt//rzV2ZkK/PbvTp8lpWqz8f87Audu
 fnpUVJXFmK4Q5PsSwXCK7WfACW6uokFDH52ofj/L3MFMYZXzZFVpUTnTORkx5uOt
 8xokh1YFuYGhG5rSDNEwysUqHuy8eBSyrts8woV+5J3TlNZh/oHcDCW+c0FoP5EB
 5PdTMrLBSDcelQkiaKINWKT5kcQ3FncKrXSTbbPg2PQFvexUal142bLsQAsU6ZPl
 cQBDaCPQu+J8qzGkeHZAhKl+82AwfNKffNgTPDdoe236rHOH9XWv+TPA4cGxLD6n
 vAqon661oQ4byRowMlb9liTWZP0wVrd/ZkakyGiwiCsiZm6qR0tc5tZwzvib4dko
 BDsp2F8dIKxqFSA524SZdcx0P0J3yPcP9EP/XTpYpnmSbBFdYIUZcySMQcNLFOh+
 spkbTnTToL1Kb9HgikXE8BQGx17pqg7RGekpBdWVrnAKeBri5Lyorelxmh0+dlI0
 Bsr89mVwh8AJq/Pi6Vib
 =BUV/
 -----END PGP SIGNATURE-----

Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "Another week, another batch of fixes for arm-soc platforms.

  Nothing controversial here, a handful of fixes for regressions and/or
  serious problems across several of the platforms.  Things are slowing
  down nicely on fix rates for 3.10"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: exynos: add debug_ll_io_init() call in exynos_init_io()
  ARM: EXYNOS: uncompress - print debug messages if DEBUG_LL is defined
  ARM: shmobile: sh73a0: Update CMT clockevent rating to 80
  sh-pfc: r8a7779: Don't group USB OVC and PENC pins
  ARM: mxs: icoll: Fix interrupts gpio bank 0
  ARM: imx: clk-imx6q: AXI clock select index is incorrect
  ARM: bcm2835: override the HW UART periphid
  ARM: mvebu: Fix bug in coherency fabric low level init function
  ARM: Kirkwood: TS219: Fix crash by double PCIe instantiation
  ARM: ux500: Provide supplies for AUX1, AUX2 and AUX3
  ARM: ux500: Only configure wake-up reasons on ux500 based platforms
  ARM: dts: imx: fix clocks for cspi
  ARM i.MX6q: fix for ldb_di_sels
This commit is contained in:
Linus Torvalds 2013-06-08 11:56:22 -07:00
commit 50b4b9c3e8
15 changed files with 84 additions and 49 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boot/dts/bcm2835.dtsi
View File

@ -44,6 +44,7 @@
reg = <0x7e201000 0x1000>;
interrupts = <2 25>;
clock-frequency = <3000000>;
arm,primecell-periphid = <0x00241011>;
};
gpio: gpio {

12
arch/arm/boot/dts/imx25.dtsi
View File

@ -141,8 +141,8 @@
#size-cells = <0>;
compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
reg = <0x43fa4000 0x4000>;
clocks = <&clks 62>;
clock-names = "ipg";
clocks = <&clks 62>, <&clks 62>;
clock-names = "ipg", "per";
interrupts = <14>;
status = "disabled";
};
@ -182,8 +182,8 @@
compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
reg = <0x50004000 0x4000>;
interrupts = <0>;
clocks = <&clks 80>;
clock-names = "ipg";
clocks = <&clks 80>, <&clks 80>;
clock-names = "ipg", "per";
status = "disabled";
};
@ -210,8 +210,8 @@
#size-cells = <0>;
compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
reg = <0x50010000 0x4000>;
clocks = <&clks 79>;
clock-names = "ipg";
clocks = <&clks 79>, <&clks 79>;
clock-names = "ipg", "per";
interrupts = <13>;
status = "disabled";
};

6
arch/arm/boot/dts/imx27.dtsi
View File

@ -131,7 +131,7 @@
compatible = "fsl,imx27-cspi";
reg = <0x1000e000 0x1000>;
interrupts = <16>;
clocks = <&clks 53>, <&clks 0>;
clocks = <&clks 53>, <&clks 53>;
clock-names = "ipg", "per";
status = "disabled";
};
@ -142,7 +142,7 @@
compatible = "fsl,imx27-cspi";
reg = <0x1000f000 0x1000>;
interrupts = <15>;
clocks = <&clks 52>, <&clks 0>;
clocks = <&clks 52>, <&clks 52>;
clock-names = "ipg", "per";
status = "disabled";
};
@ -223,7 +223,7 @@
compatible = "fsl,imx27-cspi";
reg = <0x10017000 0x1000>;
interrupts = <6>;
clocks = <&clks 51>, <&clks 0>;
clocks = <&clks 51>, <&clks 51>;
clock-names = "ipg", "per";
status = "disabled";
};

2
arch/arm/boot/dts/imx51.dtsi
View File

@ -631,7 +631,7 @@
compatible = "fsl,imx51-cspi", "fsl,imx35-cspi";
reg = <0x83fc0000 0x4000>;
interrupts = <38>;
clocks = <&clks 55>, <&clks 0>;
clocks = <&clks 55>, <&clks 55>;
clock-names = "ipg", "per";
status = "disabled";
};

2
arch/arm/boot/dts/imx53.dtsi
View File

@ -714,7 +714,7 @@
compatible = "fsl,imx53-cspi", "fsl,imx35-cspi";
reg = <0x63fc0000 0x4000>;
interrupts = <38>;
clocks = <&clks 55>, <&clks 0>;
clocks = <&clks 55>, <&clks 55>;
clock-names = "ipg", "per";
status = "disabled";
};

2
arch/arm/mach-exynos/common.c
View File

@ -386,6 +386,8 @@ int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
void __init exynos_init_io(struct map_desc *mach_desc, int size)
{
debug_ll_io_init();
#ifdef CONFIG_OF
if (initial_boot_params)
of_scan_flat_dt(exynos_fdt_map_chipid, NULL);

4
arch/arm/mach-imx/clk-imx6q.c
View File

@ -181,14 +181,14 @@ static const char *periph_clk2_sels[] = { "pll3_usb_otg", "osc", "osc", "dummy",
static const char *periph2_clk2_sels[] = { "pll3_usb_otg", "pll2_bus", };
static const char *periph_sels[] = { "periph_pre", "periph_clk2", };
static const char *periph2_sels[] = { "periph2_pre", "periph2_clk2", };
static const char *axi_sels[] = { "periph", "pll2_pfd2_396m", "pll3_pfd1_540m", };
static const char *axi_sels[] = { "periph", "pll2_pfd2_396m", "periph", "pll3_pfd1_540m", };
static const char *audio_sels[] = { "pll4_post_div", "pll3_pfd2_508m", "pll3_pfd3_454m", "pll3_usb_otg", };
static const char *gpu_axi_sels[] = { "axi", "ahb", };
static const char *gpu2d_core_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd0_352m", "pll2_pfd2_396m", };
static const char *gpu3d_core_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd2_396m", };
static const char *gpu3d_shader_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll3_pfd0_720m", };
static const char *ipu_sels[] = { "mmdc_ch0_axi", "pll2_pfd2_396m", "pll3_120m", "pll3_pfd1_540m", };
static const char *ldb_di_sels[] = { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_usb_otg", };
static const char *ldb_di_sels[] = { "pll5_video_div", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_usb_otg", };
static const char *ipu_di_pre_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll5_video_div", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", };
static const char *ipu1_di0_sels[] = { "ipu1_di0_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
static const char *ipu1_di1_sels[] = { "ipu1_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };

10
arch/arm/mach-kirkwood/board-ts219.c
View File

@ -41,13 +41,3 @@ void __init qnap_dt_ts219_init(void)
pm_power_off = qnap_tsx1x_power_off;
}
/* FIXME: Will not work with DT. Maybe use MPP40_GPIO? */
static int __init ts219_pci_init(void)
{
if (machine_is_ts219())
kirkwood_pcie_init(KW_PCIE0);
return 0;
}
subsys_initcall(ts219_pci_init);

16
arch/arm/mach-mvebu/coherency_ll.S
View File

@ -32,15 +32,21 @@ ENTRY(ll_set_cpu_coherent)
/* Add CPU to SMP group - Atomic */
add r3, r0, #ARMADA_XP_CFB_CTL_REG_OFFSET
ldr r2, [r3]
1:
ldrex r2, [r3]
orr r2, r2, r1
str r2, [r3]
strex r0, r2, [r3]
cmp r0, #0
bne 1b
/* Enable coherency on CPU - Atomic */
add r3, r0, #ARMADA_XP_CFB_CFG_REG_OFFSET
ldr r2, [r3]
add r3, r3, #ARMADA_XP_CFB_CFG_REG_OFFSET
1:
ldrex r2, [r3]
orr r2, r2, r1
str r2, [r3]
strex r0, r2, [r3]
cmp r0, #0
bne 1b
dsb

2
arch/arm/mach-shmobile/setup-sh73a0.c
View File

@ -252,7 +252,7 @@ static struct sh_timer_config cmt10_platform_data = {
.name = "CMT10",
.channel_offset = 0x10,
.timer_bit = 0,
.clockevent_rating = 125,
.clockevent_rating = 80,
.clocksource_rating = 125,
};

3
arch/arm/mach-ux500/board-mop500-regulators.c
View File

@ -374,6 +374,7 @@ static struct ab8500_regulator_reg_init ab8500_reg_init[] = {
static struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
/* supplies to the display/camera */
[AB8500_LDO_AUX1] = {
.supply_regulator = "ab8500-ext-supply3",
.constraints = {
.name = "V-DISPLAY",
.min_uV = 2800000,
@ -387,6 +388,7 @@ static struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
},
/* supplies to the on-board eMMC */
[AB8500_LDO_AUX2] = {
.supply_regulator = "ab8500-ext-supply3",
.constraints = {
.name = "V-eMMC1",
.min_uV = 1100000,
@ -402,6 +404,7 @@ static struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
},
/* supply for VAUX3, supplies to SDcard slots */
[AB8500_LDO_AUX3] = {
.supply_regulator = "ab8500-ext-supply3",
.constraints = {
.name = "V-MMC-SD",
.min_uV = 1100000,

4
arch/arm/mach-ux500/cpuidle.c
View File

@ -21,6 +21,7 @@
#include <asm/proc-fns.h>
#include "db8500-regs.h"
#include "id.h"
static atomic_t master = ATOMIC_INIT(0);
static DEFINE_SPINLOCK(master_lock);
@ -114,6 +115,9 @@ static struct cpuidle_driver ux500_idle_driver = {
int __init ux500_idle_init(void)
{
if (!(cpu_is_u8500_family() || cpu_is_ux540_family()))
return -ENODEV;
/* Configure wake up reasons */
prcmu_enable_wakeups(PRCMU_WAKEUP(ARM) | PRCMU_WAKEUP(RTC) |
PRCMU_WAKEUP(ABB));

10
arch/arm/plat-samsung/include/plat/uncompress.h
View File

@ -66,6 +66,9 @@ uart_rd(unsigned int reg)
static void putc(int ch)
{
if (!config_enabled(CONFIG_DEBUG_LL))
return;
if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) {
int level;
@ -118,7 +121,12 @@ static void arch_decomp_error(const char *x)
#ifdef CONFIG_S3C_BOOT_UART_FORCE_FIFO
static inline void arch_enable_uart_fifo(void)
{
u32 fifocon = uart_rd(S3C2410_UFCON);
u32 fifocon;
if (!config_enabled(CONFIG_DEBUG_LL))
return;
fifocon = uart_rd(S3C2410_UFCON);
if (!(fifocon & S3C2410_UFCON_FIFOMODE)) {
fifocon |= S3C2410_UFCON_RESETBOTH;

14
drivers/irqchip/irq-mxs.c
View File

@ -76,16 +76,10 @@ asmlinkage void __exception_irq_entry icoll_handle_irq(struct pt_regs *regs)
{
u32 irqnr;
do {
irqnr = __raw_readl(icoll_base + HW_ICOLL_STAT_OFFSET);
if (irqnr != 0x7f) {
__raw_writel(irqnr, icoll_base + HW_ICOLL_VECTOR);
irqnr = irq_find_mapping(icoll_domain, irqnr);
handle_IRQ(irqnr, regs);
continue;
}
break;
} while (1);
irqnr = __raw_readl(icoll_base + HW_ICOLL_STAT_OFFSET);
__raw_writel(irqnr, icoll_base + HW_ICOLL_VECTOR);
irqnr = irq_find_mapping(icoll_domain, irqnr);
handle_IRQ(irqnr, regs);
}
static int icoll_irq_domain_map(struct irq_domain *d, unsigned int virq,

45
drivers/pinctrl/sh-pfc/pfc-r8a7779.c
View File

@ -2357,27 +2357,48 @@ static const unsigned int sdhi3_wp_mux[] = {
};
/* - USB0 ------------------------------------------------------------------- */
static const unsigned int usb0_pins[] = {
/* OVC */
150, 154,
/* PENC */
154,
};
static const unsigned int usb0_mux[] = {
USB_OVC0_MARK, USB_PENC0_MARK,
USB_PENC0_MARK,
};
static const unsigned int usb0_ovc_pins[] = {
/* USB_OVC */
150
};
static const unsigned int usb0_ovc_mux[] = {
USB_OVC0_MARK,
};
/* - USB1 ------------------------------------------------------------------- */
static const unsigned int usb1_pins[] = {
/* OVC */
152, 155,
/* PENC */
155,
};
static const unsigned int usb1_mux[] = {
USB_OVC1_MARK, USB_PENC1_MARK,
USB_PENC1_MARK,
};
static const unsigned int usb1_ovc_pins[] = {
/* USB_OVC */
152,
};
static const unsigned int usb1_ovc_mux[] = {
USB_OVC1_MARK,
};
/* - USB2 ------------------------------------------------------------------- */
static const unsigned int usb2_pins[] = {
/* OVC, PENC */
125, 156,
/* PENC */
156,
};
static const unsigned int usb2_mux[] = {
USB_OVC2_MARK, USB_PENC2_MARK,
USB_PENC2_MARK,
};
static const unsigned int usb2_ovc_pins[] = {
/* USB_OVC */
125,
};
static const unsigned int usb2_ovc_mux[] = {
USB_OVC2_MARK,
};
static const struct sh_pfc_pin_group pinmux_groups[] = {
@ -2501,8 +2522,11 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(sdhi3_cd),
SH_PFC_PIN_GROUP(sdhi3_wp),
SH_PFC_PIN_GROUP(usb0),
SH_PFC_PIN_GROUP(usb0_ovc),
SH_PFC_PIN_GROUP(usb1),
SH_PFC_PIN_GROUP(usb1_ovc),
SH_PFC_PIN_GROUP(usb2),
SH_PFC_PIN_GROUP(usb2_ovc),
};
static const char * const du0_groups[] = {
@ -2683,14 +2707,17 @@ static const char * const sdhi3_groups[] = {
static const char * const usb0_groups[] = {
"usb0",
"usb0_ovc",
};
static const char * const usb1_groups[] = {
"usb1",
"usb1_ovc",
};
static const char * const usb2_groups[] = {
"usb2",
"usb2_ovc",
};
static const struct sh_pfc_function pinmux_functions[] = {