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[IA64-SGI] add support for TIO huge-window
Altix patch to add TIO "huge-window" address support to sn_dma_flush(). Update copyright in affected files. Signed-off-by: Mark Maule <maule@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
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@ -3,7 +3,7 @@
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved.
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* Copyright (C) 2000-2005 Silicon Graphics, Inc. All rights reserved.
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*/
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#ifndef _ASM_IA64_SN_TIO_H
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@ -26,6 +26,10 @@
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#define TIO_ITTE_VALID_MASK 0x1
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#define TIO_ITTE_VALID_SHIFT 16
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#define TIO_ITTE_WIDGET(itte) \
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(((itte) >> TIO_ITTE_WIDGET_SHIFT) & TIO_ITTE_WIDGET_MASK)
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#define TIO_ITTE_VALID(itte) \
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(((itte) >> TIO_ITTE_VALID_SHIFT) & TIO_ITTE_VALID_MASK)
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#define TIO_ITTE_PUT(nasid, bigwin, widget, addr, valid) \
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REMOTE_HUB_S((nasid), TIO_ITTE(bigwin), \
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@ -3,7 +3,7 @@
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved.
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* Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved.
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*/
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#ifndef _ASM_IA64_SN_XTALK_HUBDEV_H
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#define _ASM_IA64_SN_XTALK_HUBDEV_H
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@ -16,6 +16,9 @@
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#define IIO_ITTE_WIDGET_MASK ((1<<IIO_ITTE_WIDGET_BITS)-1)
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#define IIO_ITTE_WIDGET_SHIFT 8
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#define IIO_ITTE_WIDGET(itte) \
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(((itte) >> IIO_ITTE_WIDGET_SHIFT) & IIO_ITTE_WIDGET_MASK)
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/*
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* Use the top big window as a surrogate for the first small window
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*/
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@ -3,7 +3,7 @@
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001-2004 Silicon Graphics, Inc. All rights reserved.
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* Copyright (C) 2001-2005 Silicon Graphics, Inc. All rights reserved.
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*/
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#include <linux/types.h>
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@ -215,8 +215,8 @@ void sn_dma_flush(uint64_t addr)
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int is_tio;
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int wid_num;
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int i, j;
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int bwin;
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uint64_t flags;
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uint64_t itte;
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struct hubdev_info *hubinfo;
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volatile struct sn_flush_device_list *p;
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struct sn_flush_nasid_entry *flush_nasid_list;
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@ -233,31 +233,36 @@ void sn_dma_flush(uint64_t addr)
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if (!hubinfo) {
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BUG();
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}
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is_tio = (nasid & 1);
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if (is_tio) {
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wid_num = TIO_SWIN_WIDGETNUM(addr);
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bwin = TIO_BWIN_WINDOWNUM(addr);
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} else {
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wid_num = SWIN_WIDGETNUM(addr);
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bwin = BWIN_WINDOWNUM(addr);
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}
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flush_nasid_list = &hubinfo->hdi_flush_nasid_list;
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if (flush_nasid_list->widget_p == NULL)
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return;
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if (bwin > 0) {
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uint64_t itte = flush_nasid_list->iio_itte[bwin];
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if (is_tio) {
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wid_num = (itte >> TIO_ITTE_WIDGET_SHIFT) &
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TIO_ITTE_WIDGET_MASK;
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} else {
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wid_num = (itte >> IIO_ITTE_WIDGET_SHIFT) &
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IIO_ITTE_WIDGET_MASK;
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}
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is_tio = (nasid & 1);
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if (is_tio) {
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int itte_index;
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if (TIO_HWIN(addr))
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itte_index = 0;
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else if (TIO_BWIN_WINDOWNUM(addr))
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itte_index = TIO_BWIN_WINDOWNUM(addr);
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else
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itte_index = -1;
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if (itte_index >= 0) {
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itte = flush_nasid_list->iio_itte[itte_index];
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if (! TIO_ITTE_VALID(itte))
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return;
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wid_num = TIO_ITTE_WIDGET(itte);
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} else
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wid_num = TIO_SWIN_WIDGETNUM(addr);
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} else {
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if (BWIN_WINDOWNUM(addr)) {
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itte = flush_nasid_list->iio_itte[BWIN_WINDOWNUM(addr)];
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wid_num = IIO_ITTE_WIDGET(itte);
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} else
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wid_num = SWIN_WIDGETNUM(addr);
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}
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if (flush_nasid_list->widget_p == NULL)
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return;
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if (flush_nasid_list->widget_p[wid_num] == NULL)
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return;
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p = &flush_nasid_list->widget_p[wid_num][0];
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@ -283,9 +288,15 @@ void sn_dma_flush(uint64_t addr)
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/*
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* For TIOCP use the Device(x) Write Request Buffer Flush Bridge
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* register since it ensures the data has entered the coherence
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* domain, unlike PIC
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* domain, unlike PIC.
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*/
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if (is_tio) {
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/*
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* Note: devices behind TIOCE should never be matched in the
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* above code, and so the following code is PIC/CP centric.
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* If CE ever needs the sn_dma_flush mechanism, we will have
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* to account for that here and in tioce_bus_fixup().
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*/
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uint32_t tio_id = REMOTE_HUB_L(nasid, TIO_NODE_ID);
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uint32_t revnum = XWIDGET_PART_REV_NUM(tio_id);
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@ -3,7 +3,7 @@
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (c) 1992-1999,2001-2004 Silicon Graphics, Inc. All rights reserved.
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* Copyright (c) 1992-1999,2001-2005 Silicon Graphics, Inc. All rights reserved.
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*/
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#ifndef _ASM_IA64_SN_ADDRS_H
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@ -191,7 +191,8 @@
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#define TIO_BWIN_WINDOW_SELECT_MASK 0x7
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#define TIO_BWIN_WINDOWNUM(x) (((x) >> TIO_BWIN_SIZE_BITS) & TIO_BWIN_WINDOW_SELECT_MASK)
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#define TIO_HWIN_SHIFT_BITS 33
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#define TIO_HWIN(x) (NODE_OFFSET(x) >> TIO_HWIN_SHIFT_BITS)
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/*
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* The following definitions pertain to the IO special address
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