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[SERIAL] AMD Alchemy UART: claim memory range

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I've noticed that the 8250/Au1x00 driver (drivers/serial/8250_au1x00.c)
doesn't claim UART memory ranges and uses wrong (KSEG1-based) UART
addresses instead of the physical ones.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Sergei Shtylyov 2006-04-30 11:15:58 +01:00 committed by Russell King
parent 68ac64cd3f
commit 85835f442e
2 changed files with 8 additions and 3 deletions
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6
drivers/serial/8250.c
View File

@ -1906,6 +1906,9 @@ static int serial8250_request_std_resource(struct uart_8250_port *up)
int ret = 0; int ret = 0;
switch (up->port.iotype) { switch (up->port.iotype) {
case UPIO_AU:
size = 0x100000;
/* fall thru */
case UPIO_MEM: case UPIO_MEM:
if (!up->port.mapbase) if (!up->port.mapbase)
break; break;
@ -1938,6 +1941,9 @@ static void serial8250_release_std_resource(struct uart_8250_port *up)
unsigned int size = 8 << up->port.regshift; unsigned int size = 8 << up->port.regshift;
switch (up->port.iotype) { switch (up->port.iotype) {
case UPIO_AU:
size = 0x100000;
/* fall thru */
case UPIO_MEM: case UPIO_MEM:
if (!up->port.mapbase) if (!up->port.mapbase)
break; break;

5
drivers/serial/8250_au1x00.c
View File

@ -30,13 +30,12 @@
{ \ { \
.iobase = _base, \ .iobase = _base, \
.membase = (void __iomem *)_base,\ .membase = (void __iomem *)_base,\
.mapbase = _base, \ .mapbase = CPHYSADDR(_base), \
.irq = _irq, \ .irq = _irq, \
.uartclk = 0, /* filled */ \ .uartclk = 0, /* filled */ \
.regshift = 2, \ .regshift = 2, \
.iotype = UPIO_AU, \ .iotype = UPIO_AU, \
.flags = UPF_SKIP_TEST | \ .flags = UPF_SKIP_TEST \
UPF_IOREMAP, \
} }
static struct plat_serial8250_port au1x00_data[] = { static struct plat_serial8250_port au1x00_data[] = {