mirror of
https://github.com/joel16/android_kernel_sony_msm8994_rework.git
synced 2024-11-30 23:30:48 +00:00
Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM fixes from Russell King: "A small number of fixes for stuff from the last merge window, and in one case (IRQ time accounting) the previous merge window." * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: ARM: 7720/1: ARM v6/v7 cmpxchg64 shouldn't clear upper 32 bits of the old/new value ARM: 7715/1: MCPM: adapt to GIC changes after upstream merge ARM: 7714/1: mmc: mmci: Ensure return value of regulator_enable() is checked ARM: 7712/1: Remove trailing whitespace in arch/arm/Makefile ARM: 7711/1: dove: fix Dove cpu type from V7 to PJ4 ARM: finally enable IRQ time accounting config
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commit
d21572c515
@ -38,6 +38,7 @@ config ARM
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select HAVE_GENERIC_HARDIRQS
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select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
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select HAVE_IDE if PCI || ISA || PCMCIA
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select HAVE_IRQ_TIME_ACCOUNTING
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select HAVE_KERNEL_GZIP
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select HAVE_KERNEL_LZMA
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select HAVE_KERNEL_LZO
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@ -488,7 +489,7 @@ config ARCH_IXP4XX
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config ARCH_DOVE
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bool "Marvell Dove"
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select ARCH_REQUIRE_GPIOLIB
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select CPU_V7
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select CPU_PJ4
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select GENERIC_CLOCKEVENTS
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select MIGHT_HAVE_PCI
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select PINCTRL
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@ -309,7 +309,7 @@ define archhelp
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echo ' Image - Uncompressed kernel image (arch/$(ARCH)/boot/Image)'
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echo '* xipImage - XIP kernel image, if configured (arch/$(ARCH)/boot/xipImage)'
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echo ' uImage - U-Boot wrapped zImage'
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echo ' bootpImage - Combined zImage and initial RAM disk'
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echo ' bootpImage - Combined zImage and initial RAM disk'
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echo ' (supply initrd image via make variable INITRD=<path>)'
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echo '* dtbs - Build device tree blobs for enabled boards'
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echo ' install - Install uncompressed kernel'
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@ -15,8 +15,6 @@
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#include <linux/smp.h>
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#include <linux/spinlock.h>
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#include <linux/irqchip/arm-gic.h>
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#include <asm/mcpm.h>
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#include <asm/smp.h>
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#include <asm/smp_plat.h>
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@ -49,7 +47,6 @@ static int __cpuinit mcpm_boot_secondary(unsigned int cpu, struct task_struct *i
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static void __cpuinit mcpm_secondary_init(unsigned int cpu)
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{
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mcpm_cpu_powered_up();
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gic_secondary_init(0);
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}
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#ifdef CONFIG_HOTPLUG_CPU
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@ -233,15 +233,15 @@ static inline unsigned long __cmpxchg_local(volatile void *ptr,
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((__typeof__(*(ptr)))atomic64_cmpxchg(container_of((ptr), \
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atomic64_t, \
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counter), \
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(unsigned long)(o), \
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(unsigned long)(n)))
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(unsigned long long)(o), \
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(unsigned long long)(n)))
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#define cmpxchg64_local(ptr, o, n) \
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((__typeof__(*(ptr)))local64_cmpxchg(container_of((ptr), \
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local64_t, \
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a), \
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(unsigned long)(o), \
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(unsigned long)(n)))
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(unsigned long long)(o), \
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(unsigned long long)(n)))
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#endif /* __LINUX_ARM_ARCH__ >= 6 */
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@ -1130,6 +1130,7 @@ static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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struct variant_data *variant = host->variant;
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u32 pwr = 0;
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unsigned long flags;
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int ret;
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pm_runtime_get_sync(mmc_dev(mmc));
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@ -1161,8 +1162,12 @@ static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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break;
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case MMC_POWER_ON:
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if (!IS_ERR(mmc->supply.vqmmc) &&
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!regulator_is_enabled(mmc->supply.vqmmc))
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regulator_enable(mmc->supply.vqmmc);
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!regulator_is_enabled(mmc->supply.vqmmc)) {
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ret = regulator_enable(mmc->supply.vqmmc);
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if (ret < 0)
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dev_err(mmc_dev(mmc),
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"failed to enable vqmmc regulator\n");
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}
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pwr |= MCI_PWR_ON;
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break;
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