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https://github.com/joel16/android_kernel_sony_msm8994_rework.git
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[WATCHDOG] add watchdog driver IT8716 IT8726 IT8712J/K
Add it87xx watchdog driver IT8716 IT8718 IT8726 IT8712-J IT8712-K Signed-off-by: Oliver Schuster <olivers137@aol.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
This commit is contained in:
Oliver Schuster
Wim Van Sebroeck
parent
3fa8749e58
commit
e1fee94f34
@ -416,6 +416,18 @@ config IT8712F_WDT
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To compile this driver as a module, choose M here: the
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module will be called it8712f_wdt.
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config IT87_WDT
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tristate "IT87 Watchdog Timer"
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depends on X86 && EXPERIMENTAL
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---help---
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This is the driver for the hardware watchdog on the ITE IT8716,
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IT8718, IT8726, IT8712(Version J,K) Super I/O chips. This watchdog
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simply watches your kernel to make sure it doesn't freeze, and if
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it does, it reboots your computer after a certain amount of time.
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To compile this driver as a module, choose M here: the module will
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be called it87_wdt.
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config HP_WATCHDOG
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tristate "HP Proliant iLO 2 Hardware Watchdog Timer"
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depends on X86
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@ -71,6 +71,7 @@ ifeq ($(CONFIG_ITCO_VENDOR_SUPPORT),y)
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obj-$(CONFIG_ITCO_WDT) += iTCO_vendor_support.o
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endif
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obj-$(CONFIG_IT8712F_WDT) += it8712f_wdt.o
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obj-$(CONFIG_IT87_WDT) += it87_wdt.o
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obj-$(CONFIG_HP_WATCHDOG) += hpwdt.o
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obj-$(CONFIG_SC1200_WDT) += sc1200wdt.o
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obj-$(CONFIG_SCx200_WDT) += scx200_wdt.o
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725
drivers/watchdog/it87_wdt.c
Normal file
725
drivers/watchdog/it87_wdt.c
Normal file
@ -0,0 +1,725 @@
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/*
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* Watchdog Timer Driver
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* for ITE IT87xx Environment Control - Low Pin Count Input / Output
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*
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* (c) Copyright 2007 Oliver Schuster <olivers137@aol.com>
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*
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* Based on softdog.c by Alan Cox,
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* 83977f_wdt.c by Jose Goncalves,
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* it87.c by Chris Gauthron, Jean Delvare
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*
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* Data-sheets: Publicly available at the ITE website
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* http://www.ite.com.tw/
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*
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* Support of the watchdog timers, which are available on
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* IT8716, IT8718, IT8726 and IT8712 (J,K version).
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/fs.h>
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#include <linux/miscdevice.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/watchdog.h>
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#include <linux/notifier.h>
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#include <linux/reboot.h>
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#include <linux/uaccess.h>
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#include <linux/io.h>
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#include <asm/system.h>
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#define WATCHDOG_VERSION "1.12"
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#define WATCHDOG_NAME "IT87 WDT"
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#define PFX WATCHDOG_NAME ": "
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#define DRIVER_VERSION WATCHDOG_NAME " driver, v" WATCHDOG_VERSION "\n"
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#define WD_MAGIC 'V'
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/* Defaults for Module Parameter */
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#define DEFAULT_NOGAMEPORT 0
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#define DEFAULT_EXCLUSIVE 1
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#define DEFAULT_TIMEOUT 60
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#define DEFAULT_TESTMODE 0
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#define DEFAULT_NOWAYOUT WATCHDOG_NOWAYOUT
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/* IO Ports */
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#define REG 0x2e
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#define VAL 0x2f
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/* Logical device Numbers LDN */
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#define GPIO 0x07
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#define GAMEPORT 0x09
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#define CIR 0x0a
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/* Configuration Registers and Functions */
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#define LDNREG 0x07
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#define CHIPID 0x20
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#define CHIPREV 0x22
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#define ACTREG 0x30
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#define BASEREG 0x60
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/* Chip Id numbers */
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#define NO_DEV_ID 0xffff
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#define IT8705_ID 0x8705
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#define IT8712_ID 0x8712
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#define IT8716_ID 0x8716
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#define IT8718_ID 0x8718
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#define IT8726_ID 0x8726 /* the data sheet suggest wrongly 0x8716 */
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/* GPIO Configuration Registers LDN=0x07 */
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#define WDTCTRL 0x71
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#define WDTCFG 0x72
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#define WDTVALLSB 0x73
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#define WDTVALMSB 0x74
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/* GPIO Bits WDTCTRL */
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#define WDT_CIRINT 0x80
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#define WDT_MOUSEINT 0x40
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#define WDT_KYBINT 0x20
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#define WDT_GAMEPORT 0x10 /* not it8718 */
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#define WDT_FORCE 0x02
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#define WDT_ZERO 0x01
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/* GPIO Bits WDTCFG */
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#define WDT_TOV1 0x80
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#define WDT_KRST 0x40
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#define WDT_TOVE 0x20
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#define WDT_PWROK 0x10
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#define WDT_INT_MASK 0x0f
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/* CIR Configuration Register LDN=0x0a */
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#define CIR_ILS 0x70
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/* The default Base address is not always available, we use this */
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#define CIR_BASE 0x0208
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/* CIR Controller */
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#define CIR_DR(b) (b)
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#define CIR_IER(b) (b + 1)
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#define CIR_RCR(b) (b + 2)
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#define CIR_TCR1(b) (b + 3)
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#define CIR_TCR2(b) (b + 4)
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#define CIR_TSR(b) (b + 5)
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#define CIR_RSR(b) (b + 6)
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#define CIR_BDLR(b) (b + 5)
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#define CIR_BDHR(b) (b + 6)
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#define CIR_IIR(b) (b + 7)
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/* Default Base address of Game port */
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#define GP_BASE_DEFAULT 0x0201
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/* wdt_status */
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#define WDTS_TIMER_RUN 0
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#define WDTS_DEV_OPEN 1
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#define WDTS_KEEPALIVE 2
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#define WDTS_LOCKED 3
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#define WDTS_USE_GP 4
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#define WDTS_EXPECTED 5
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static unsigned int base, gpact, ciract;
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static unsigned long wdt_status;
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static DEFINE_SPINLOCK(spinlock);
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static int nogameport = DEFAULT_NOGAMEPORT;
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static int exclusive = DEFAULT_EXCLUSIVE;
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static int timeout = DEFAULT_TIMEOUT;
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static int testmode = DEFAULT_TESTMODE;
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static int nowayout = DEFAULT_NOWAYOUT;
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module_param(nogameport, int, 0);
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MODULE_PARM_DESC(nogameport, "Forbid the activation of game port, default="
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__MODULE_STRING(DEFAULT_NOGAMEPORT));
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module_param(exclusive, int, 0);
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MODULE_PARM_DESC(exclusive, "Watchdog exclusive device open, default="
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__MODULE_STRING(DEFAULT_EXCLUSIVE));
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module_param(timeout, int, 0);
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MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds, default="
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__MODULE_STRING(DEFAULT_TIMEOUT));
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module_param(testmode, int, 0);
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MODULE_PARM_DESC(testmode, "Watchdog test mode (1 = no reboot), default="
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__MODULE_STRING(DEFAULT_TESTMODE));
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module_param(nowayout, int, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started, default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT));
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/* Superio Chip */
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static inline void superio_enter(void)
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{
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outb(0x87, REG);
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outb(0x01, REG);
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outb(0x55, REG);
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outb(0x55, REG);
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}
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static inline void superio_exit(void)
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{
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outb(0x02, REG);
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outb(0x02, VAL);
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}
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static inline void superio_select(int ldn)
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{
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outb(LDNREG, REG);
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outb(ldn, VAL);
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}
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static inline int superio_inb(int reg)
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{
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outb(reg, REG);
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return inb(VAL);
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}
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static inline void superio_outb(int val, int reg)
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{
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outb(reg, REG);
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outb(val, VAL);
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}
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static inline int superio_inw(int reg)
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{
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int val;
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outb(reg++, REG);
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val = inb(VAL) << 8;
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outb(reg, REG);
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val |= inb(VAL);
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return val;
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}
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static inline void superio_outw(int val, int reg)
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{
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outb(reg++, REG);
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outb(val >> 8, VAL);
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outb(reg, REG);
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outb(val, VAL);
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}
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/* watchdog timer handling */
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static void wdt_keepalive(void)
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{
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if (test_bit(WDTS_USE_GP, &wdt_status))
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inb(base);
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else
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/* The timer reloads with around 5 msec delay */
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outb(0x55, CIR_DR(base));
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set_bit(WDTS_KEEPALIVE, &wdt_status);
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}
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static void wdt_start(void)
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{
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unsigned long flags;
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spin_lock_irqsave(&spinlock, flags);
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superio_enter();
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superio_select(GPIO);
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if (test_bit(WDTS_USE_GP, &wdt_status))
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superio_outb(WDT_GAMEPORT, WDTCTRL);
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else
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superio_outb(WDT_CIRINT, WDTCTRL);
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if (!testmode)
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superio_outb(WDT_TOV1 | WDT_KRST | WDT_PWROK, WDTCFG);
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else
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superio_outb(WDT_TOV1, WDTCFG);
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superio_outb(timeout>>8, WDTVALMSB);
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superio_outb(timeout, WDTVALLSB);
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superio_exit();
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spin_unlock_irqrestore(&spinlock, flags);
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}
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static void wdt_stop(void)
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{
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unsigned long flags;
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spin_lock_irqsave(&spinlock, flags);
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superio_enter();
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superio_select(GPIO);
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superio_outb(0x00, WDTCTRL);
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superio_outb(WDT_TOV1, WDTCFG);
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superio_outb(0x00, WDTVALMSB);
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superio_outb(0x00, WDTVALLSB);
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superio_exit();
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spin_unlock_irqrestore(&spinlock, flags);
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}
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/**
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* wdt_set_timeout - set a new timeout value with watchdog ioctl
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* @t: timeout value in seconds
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*
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* The hardware device has a 16 bit watchdog timer, thus the
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* timeout time ranges between 1 and 65535 seconds.
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*
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* Used within WDIOC_SETTIMEOUT watchdog device ioctl.
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*/
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static int wdt_set_timeout(int t)
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{
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unsigned long flags;
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if (t < 1 || t > 65535)
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return -EINVAL;
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timeout = t;
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spin_lock_irqsave(&spinlock, flags);
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if (test_bit(WDTS_TIMER_RUN, &wdt_status)) {
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superio_enter();
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superio_select(GPIO);
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superio_outb(t>>8, WDTVALMSB);
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superio_outb(t, WDTVALLSB);
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superio_exit();
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}
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spin_unlock_irqrestore(&spinlock, flags);
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return 0;
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}
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/**
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* wdt_get_status - determines the status supported by watchdog ioctl
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* @status: status returned to user space
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*
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* The status bit of the device does not allow to distinguish
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* between a regular system reset and a watchdog forced reset.
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* But, in test mode it is useful, so it is supported through
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* WDIOC_GETSTATUS watchdog ioctl. Additionally the driver
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* reports the keepalive signal and the acception of the magic.
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*
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* Used within WDIOC_GETSTATUS watchdog device ioctl.
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*/
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static int wdt_get_status(int *status)
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{
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unsigned long flags;
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*status = 0;
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if (testmode) {
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spin_lock_irqsave(&spinlock, flags);
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superio_enter();
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superio_select(GPIO);
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if (superio_inb(WDTCTRL) & WDT_ZERO) {
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superio_outb(0x00, WDTCTRL);
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clear_bit(WDTS_TIMER_RUN, &wdt_status);
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*status |= WDIOF_CARDRESET;
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}
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superio_exit();
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spin_unlock_irqrestore(&spinlock, flags);
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}
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if (test_and_clear_bit(WDTS_KEEPALIVE, &wdt_status))
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*status |= WDIOF_KEEPALIVEPING;
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if (test_bit(WDTS_EXPECTED, &wdt_status))
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*status |= WDIOF_MAGICCLOSE;
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return 0;
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}
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/* /dev/watchdog handling */
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/**
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* wdt_open - watchdog file_operations .open
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* @inode: inode of the device
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* @file: file handle to the device
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*
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* The watchdog timer starts by opening the device.
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*
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* Used within the file operation of the watchdog device.
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*/
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static int wdt_open(struct inode *inode, struct file *file)
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{
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if (exclusive && test_and_set_bit(WDTS_DEV_OPEN, &wdt_status))
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return -EBUSY;
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if (!test_and_set_bit(WDTS_TIMER_RUN, &wdt_status)) {
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if (nowayout && !test_and_set_bit(WDTS_LOCKED, &wdt_status))
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__module_get(THIS_MODULE);
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wdt_start();
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}
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return nonseekable_open(inode, file);
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}
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/**
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* wdt_release - watchdog file_operations .release
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* @inode: inode of the device
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* @file: file handle to the device
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*
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* Closing the watchdog device either stops the watchdog timer
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* or in the case, that nowayout is set or the magic character
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* wasn't written, a critical warning about an running watchdog
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* timer is given.
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*
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* Used within the file operation of the watchdog device.
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*/
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static int wdt_release(struct inode *inode, struct file *file)
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{
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if (test_bit(WDTS_TIMER_RUN, &wdt_status)) {
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if (test_and_clear_bit(WDTS_EXPECTED, &wdt_status)) {
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wdt_stop();
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clear_bit(WDTS_TIMER_RUN, &wdt_status);
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} else {
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wdt_keepalive();
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printk(KERN_CRIT PFX
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"unexpected close, not stopping watchdog!\n");
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}
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}
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clear_bit(WDTS_DEV_OPEN, &wdt_status);
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return 0;
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}
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/**
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* wdt_write - watchdog file_operations .write
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* @file: file handle to the watchdog
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* @buf: buffer to write
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* @count: count of bytes
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* @ppos: pointer to the position to write. No seeks allowed
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*
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* A write to a watchdog device is defined as a keepalive signal. Any
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* write of data will do, as we don't define content meaning.
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*
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* Used within the file operation of the watchdog device.
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*/
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static ssize_t wdt_write(struct file *file, const char __user *buf,
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size_t count, loff_t *ppos)
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{
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if (count) {
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clear_bit(WDTS_EXPECTED, &wdt_status);
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wdt_keepalive();
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}
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if (!nowayout) {
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size_t ofs;
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/* note: just in case someone wrote the magic character long ago */
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for (ofs = 0; ofs != count; ofs++) {
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char c;
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if (get_user(c, buf + ofs))
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return -EFAULT;
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if (c == WD_MAGIC)
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set_bit(WDTS_EXPECTED, &wdt_status);
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}
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}
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return count;
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}
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static struct watchdog_info ident = {
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.options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
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.firmware_version = 1,
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.identity = WATCHDOG_NAME,
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};
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/**
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* wdt_ioctl - watchdog file_operations .unlocked_ioctl
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* @file: file handle to the device
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* @cmd: watchdog command
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* @arg: argument pointer
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*
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* The watchdog API defines a common set of functions for all watchdogs
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* according to their available features.
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*
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* Used within the file operation of the watchdog device.
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*/
|
||||
|
||||
static long wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
||||
{
|
||||
int rc = 0, status, new_options, new_timeout;
|
||||
union {
|
||||
struct watchdog_info __user *ident;
|
||||
int __user *i;
|
||||
} uarg;
|
||||
|
||||
uarg.i = (int __user *)arg;
|
||||
|
||||
switch (cmd) {
|
||||
case WDIOC_GETSUPPORT:
|
||||
return copy_to_user(uarg.ident,
|
||||
&ident, sizeof(ident)) ? -EFAULT : 0;
|
||||
|
||||
case WDIOC_GETSTATUS:
|
||||
wdt_get_status(&status);
|
||||
return put_user(status, uarg.i);
|
||||
|
||||
case WDIOC_GETBOOTSTATUS:
|
||||
return put_user(0, uarg.i);
|
||||
|
||||
case WDIOC_KEEPALIVE:
|
||||
wdt_keepalive();
|
||||
return 0;
|
||||
|
||||
case WDIOC_SETOPTIONS:
|
||||
if (get_user(new_options, uarg.i))
|
||||
return -EFAULT;
|
||||
|
||||
switch (new_options) {
|
||||
case WDIOS_DISABLECARD:
|
||||
if (test_bit(WDTS_TIMER_RUN, &wdt_status))
|
||||
wdt_stop();
|
||||
clear_bit(WDTS_TIMER_RUN, &wdt_status);
|
||||
return 0;
|
||||
|
||||
case WDIOS_ENABLECARD:
|
||||
if (!test_and_set_bit(WDTS_TIMER_RUN, &wdt_status))
|
||||
wdt_start();
|
||||
return 0;
|
||||
|
||||
default:
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
case WDIOC_SETTIMEOUT:
|
||||
if (get_user(new_timeout, uarg.i))
|
||||
return -EFAULT;
|
||||
rc = wdt_set_timeout(new_timeout);
|
||||
case WDIOC_GETTIMEOUT:
|
||||
if (put_user(timeout, uarg.i))
|
||||
return -EFAULT;
|
||||
return rc;
|
||||
|
||||
default:
|
||||
return -ENOTTY;
|
||||
}
|
||||
}
|
||||
|
||||
static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
|
||||
void *unused)
|
||||
{
|
||||
if (code == SYS_DOWN || code == SYS_HALT)
|
||||
wdt_stop();
|
||||
return NOTIFY_DONE;
|
||||
}
|
||||
|
||||
static const struct file_operations wdt_fops = {
|
||||
.owner = THIS_MODULE,
|
||||
.llseek = no_llseek,
|
||||
.write = wdt_write,
|
||||
.unlocked_ioctl = wdt_ioctl,
|
||||
.open = wdt_open,
|
||||
.release = wdt_release,
|
||||
};
|
||||
|
||||
static struct miscdevice wdt_miscdev = {
|
||||
.minor = WATCHDOG_MINOR,
|
||||
.name = "watchdog",
|
||||
.fops = &wdt_fops,
|
||||
};
|
||||
|
||||
static struct notifier_block wdt_notifier = {
|
||||
.notifier_call = wdt_notify_sys,
|
||||
};
|
||||
|
||||
static int __init it87_wdt_init(void)
|
||||
{
|
||||
int rc = 0;
|
||||
u16 chip_type;
|
||||
u8 chip_rev;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&spinlock, flags);
|
||||
superio_enter();
|
||||
chip_type = superio_inw(CHIPID);
|
||||
chip_rev = superio_inb(CHIPREV) & 0x0f;
|
||||
superio_exit();
|
||||
spin_unlock_irqrestore(&spinlock, flags);
|
||||
|
||||
switch (chip_type) {
|
||||
case IT8716_ID:
|
||||
case IT8718_ID:
|
||||
case IT8726_ID:
|
||||
break;
|
||||
case IT8712_ID:
|
||||
if (chip_rev > 7)
|
||||
break;
|
||||
case IT8705_ID:
|
||||
printk(KERN_ERR PFX
|
||||
"Unsupported Chip found, Chip %04x Revision %02x\n",
|
||||
chip_type, chip_rev);
|
||||
return -ENODEV;
|
||||
case NO_DEV_ID:
|
||||
printk(KERN_ERR PFX "no device\n");
|
||||
return -ENODEV;
|
||||
default:
|
||||
printk(KERN_ERR PFX
|
||||
"Unknown Chip found, Chip %04x Revision %04x\n",
|
||||
chip_type, chip_rev);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&spinlock, flags);
|
||||
superio_enter();
|
||||
|
||||
superio_select(GPIO);
|
||||
superio_outb(WDT_TOV1, WDTCFG);
|
||||
superio_outb(0x00, WDTCTRL);
|
||||
|
||||
/* First try to get Gameport support */
|
||||
if (chip_type != IT8718_ID && !nogameport) {
|
||||
superio_select(GAMEPORT);
|
||||
base = superio_inw(BASEREG);
|
||||
if (!base) {
|
||||
base = GP_BASE_DEFAULT;
|
||||
superio_outw(base, BASEREG);
|
||||
}
|
||||
gpact = superio_inb(ACTREG);
|
||||
superio_outb(0x01, ACTREG);
|
||||
superio_exit();
|
||||
spin_unlock_irqrestore(&spinlock, flags);
|
||||
if (request_region(base, 1, WATCHDOG_NAME))
|
||||
set_bit(WDTS_USE_GP, &wdt_status);
|
||||
else
|
||||
rc = -EIO;
|
||||
} else {
|
||||
superio_exit();
|
||||
spin_unlock_irqrestore(&spinlock, flags);
|
||||
}
|
||||
|
||||
/* If we haven't Gameport support, try to get CIR support */
|
||||
if (!test_bit(WDTS_USE_GP, &wdt_status)) {
|
||||
if (!request_region(CIR_BASE, 8, WATCHDOG_NAME)) {
|
||||
if (rc == -EIO)
|
||||
printk(KERN_ERR PFX
|
||||
"I/O Address 0x%04x and 0x%04x"
|
||||
" already in use\n", base, CIR_BASE);
|
||||
else
|
||||
printk(KERN_ERR PFX
|
||||
"I/O Address 0x%04x already in use\n",
|
||||
CIR_BASE);
|
||||
rc = -EIO;
|
||||
goto err_out;
|
||||
}
|
||||
base = CIR_BASE;
|
||||
spin_lock_irqsave(&spinlock, flags);
|
||||
superio_enter();
|
||||
|
||||
superio_select(CIR);
|
||||
superio_outw(base, BASEREG);
|
||||
superio_outb(0x00, CIR_ILS);
|
||||
ciract = superio_inb(ACTREG);
|
||||
superio_outb(0x01, ACTREG);
|
||||
if (rc == -EIO) {
|
||||
superio_select(GAMEPORT);
|
||||
superio_outb(gpact, ACTREG);
|
||||
}
|
||||
|
||||
superio_exit();
|
||||
spin_unlock_irqrestore(&spinlock, flags);
|
||||
}
|
||||
|
||||
if (timeout < 1 || timeout > 65535) {
|
||||
timeout = DEFAULT_TIMEOUT;
|
||||
printk(KERN_WARNING PFX
|
||||
"Timeout value out of range, use default %d sec\n",
|
||||
DEFAULT_TIMEOUT);
|
||||
}
|
||||
|
||||
rc = register_reboot_notifier(&wdt_notifier);
|
||||
if (rc) {
|
||||
printk(KERN_ERR PFX
|
||||
"Cannot register reboot notifier (err=%d)\n", rc);
|
||||
goto err_out_region;
|
||||
}
|
||||
|
||||
rc = misc_register(&wdt_miscdev);
|
||||
if (rc) {
|
||||
printk(KERN_ERR PFX
|
||||
"Cannot register miscdev on minor=%d (err=%d)\n",
|
||||
wdt_miscdev.minor, rc);
|
||||
goto err_out_reboot;
|
||||
}
|
||||
|
||||
/* Initialize CIR to use it as keepalive source */
|
||||
if (!test_bit(WDTS_USE_GP, &wdt_status)) {
|
||||
outb(0x00, CIR_RCR(base));
|
||||
outb(0xc0, CIR_TCR1(base));
|
||||
outb(0x5c, CIR_TCR2(base));
|
||||
outb(0x10, CIR_IER(base));
|
||||
outb(0x00, CIR_BDHR(base));
|
||||
outb(0x01, CIR_BDLR(base));
|
||||
outb(0x09, CIR_IER(base));
|
||||
}
|
||||
|
||||
printk(KERN_INFO PFX "Chip it%04x revision %d initialized. "
|
||||
"timeout=%d sec (nowayout=%d testmode=%d exclusive=%d "
|
||||
"nogameport=%d)\n", chip_type, chip_rev, timeout,
|
||||
nowayout, testmode, exclusive, nogameport);
|
||||
|
||||
return 0;
|
||||
|
||||
err_out_reboot:
|
||||
unregister_reboot_notifier(&wdt_notifier);
|
||||
err_out_region:
|
||||
release_region(base, test_bit(WDTS_USE_GP, &wdt_status) ? 1 : 8);
|
||||
if (!test_bit(WDTS_USE_GP, &wdt_status)) {
|
||||
spin_lock_irqsave(&spinlock, flags);
|
||||
superio_enter();
|
||||
superio_select(CIR);
|
||||
superio_outb(ciract, ACTREG);
|
||||
superio_exit();
|
||||
spin_unlock_irqrestore(&spinlock, flags);
|
||||
}
|
||||
err_out:
|
||||
if (chip_type != IT8718_ID && !nogameport) {
|
||||
spin_lock_irqsave(&spinlock, flags);
|
||||
superio_enter();
|
||||
superio_select(GAMEPORT);
|
||||
superio_outb(gpact, ACTREG);
|
||||
superio_exit();
|
||||
spin_unlock_irqrestore(&spinlock, flags);
|
||||
}
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
static void __exit it87_wdt_exit(void)
|
||||
{
|
||||
unsigned long flags;
|
||||
int nolock;
|
||||
|
||||
nolock = !spin_trylock_irqsave(&spinlock, flags);
|
||||
superio_enter();
|
||||
superio_select(GPIO);
|
||||
superio_outb(0x00, WDTCTRL);
|
||||
superio_outb(0x00, WDTCFG);
|
||||
superio_outb(0x00, WDTVALMSB);
|
||||
superio_outb(0x00, WDTVALLSB);
|
||||
if (test_bit(WDTS_USE_GP, &wdt_status)) {
|
||||
superio_select(GAMEPORT);
|
||||
superio_outb(gpact, ACTREG);
|
||||
} else {
|
||||
superio_select(CIR);
|
||||
superio_outb(ciract, ACTREG);
|
||||
}
|
||||
superio_exit();
|
||||
if (!nolock)
|
||||
spin_unlock_irqrestore(&spinlock, flags);
|
||||
|
||||
misc_deregister(&wdt_miscdev);
|
||||
unregister_reboot_notifier(&wdt_notifier);
|
||||
release_region(base, test_bit(WDTS_USE_GP, &wdt_status) ? 1 : 8);
|
||||
}
|
||||
|
||||
module_init(it87_wdt_init);
|
||||
module_exit(it87_wdt_exit);
|
||||
|
||||
MODULE_AUTHOR("Oliver Schuster");
|
||||
MODULE_DESCRIPTION("Hardware Watchdog Device Driver for IT87xx EC-LPC I/O");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
|
||||
Loading…
Reference in New Issue
Block a user