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https://github.com/libretro/FBNeo.git
synced 2025-03-03 15:48:30 +00:00
wip
This commit is contained in:
dinkc64
parent
fef32c8395
commit
4963b339bb
@ -913,6 +913,8 @@ void I8039Exit()
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DebugCPU_I8039Initted = 0;
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}
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static int end_run = 0;
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int I8039Run(int cycles)
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{
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#if defined FBA_DEBUG
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@ -925,6 +927,7 @@ int I8039Run(int cycles)
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i8039_ICount_cycles = cycles;
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i8039_ICount = (cycles - R.irq_extra_cycles);
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R.irq_extra_cycles = 0;
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end_run = 0;
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do
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{
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@ -973,7 +976,7 @@ int I8039Run(int cycles)
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i8039_ICount -= count;
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}
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} while (i8039_ICount>0);
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} while (i8039_ICount>0 && !end_run);
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i8039_ICount -= R.irq_extra_cycles;
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R.total_cycles += cycles - i8039_ICount;
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@ -990,6 +993,13 @@ INT32 I8039TotalCycles()
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return (INT32)R.total_cycles + (i8039_ICount_cycles - i8039_ICount);
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}
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INT32 I8039Idle(INT32 cycles)
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{
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R.total_cycles += cycles;
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return cycles;
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}
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void I8039NewFrame()
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{
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i8039_ICount_cycles = 0;
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@ -54,6 +54,7 @@ extern void I8039Open(INT32 nCpu);
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extern void I8039Close();
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extern INT32 I8039GetActive();
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extern INT32 I8039TotalCycles();
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extern INT32 I8039Idle(INT32 cycles);
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extern void I8039NewFrame();
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extern void N7751Init(INT32 nCpu);
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@ -73,7 +74,7 @@ extern void N7751Init(INT32 nCpu);
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#define N7751GetActive I8039GetActive
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#define N7751TotalCycles I8039TotalCycles
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#define N7751NewFrame I8039NewFrame
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#define N7751Idle I8039Idle
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extern void I8035Init(INT32 nCpu);
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#define I8035Run I8039Run
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@ -92,6 +93,7 @@ extern void I8035Init(INT32 nCpu);
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#define I8035GetActive I8039GetActive
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#define I8035TotalCycles I8039TotalCycles
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#define I8035NewFrame I8039NewFrame
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#define I8035Idle I8039Idle
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/*
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* Input a UINT8 from given I/O port
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@ -318,12 +318,15 @@ struct _mcs51_state_t
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UINT8 irq_prio[8]; /* interrupt priority */
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int icount;
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int cycle_start;
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int end_run;
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mcs51_uart uart; /* internal uart */
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/* Internal Ram */
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UINT8 internal_ram[0xff+1]; /* 128 RAM (8031/51) + 128 RAM in second bank (8032/52) */
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UINT8 sfr_ram[0xff]; /* 128 SFR - these are in 0x80 - 0xFF */
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INT32 total_cycles;
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/* DS5002FP */
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struct {
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@ -1973,6 +1976,9 @@ INT32 mcs51Run(int cycles) // divide cycles by 12! -dink
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UINT8 op;
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mcs51_state.icount = cycles;
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mcs51_state.cycle_start = cycles;
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mcs51_state.end_run = 0;
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/* external interrupts may have been set since we last checked */
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mcs51_state.inst_cycles = 0;
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check_irqs();
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@ -2026,14 +2032,35 @@ INT32 mcs51Run(int cycles) // divide cycles by 12! -dink
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if ((mcs51_state.features & FEATURE_CMOS) && GET_IDL)
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return 0;
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} while( mcs51_state.icount > 0 );
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} while( mcs51_state.icount > 0 && !mcs51_state.end_run );
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return cycles - mcs51_state.icount;
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cycles = cycles - mcs51_state.icount;
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mcs51_state.cycle_start = mcs51_state.icount = 0;
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mcs51_state.total_cycles += cycles;
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return cycles;
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}
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INT32 mcs51Idle(INT32 cycles)
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{
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mcs51_state.total_cycles += cycles;
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return cycles;
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}
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INT32 mcs51TotalCycles()
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{
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return mcs51_state.total_cycles + (mcs51_state.cycle_start - mcs51_state.icount);
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}
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void mcs51NewFrame()
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{
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mcs51_state.total_cycles = 0;
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}
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void mcs51RunEnd(void)
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{
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mcs51_state.icount = 0;
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mcs51_state.end_run = 1;
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}
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void mcs51_scan(INT32 nAction)
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@ -88,12 +88,16 @@ struct _ds5002fp_config
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/***************************************************************************
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FUNCTION PROTOTYPES
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***************************************************************************/
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extern void mcs51_init(void); /* Initialize cpu */
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extern void mcs51_reset(void); /* Reset registers to the initial values */
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extern void mcs51_exit(void); /* Shut down CPU core */
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extern void mcs51_init(void); /* Initialize cpu */
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extern void mcs51_reset(void); /* Reset registers to the initial values */
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extern void mcs51_exit(void); /* Shut down CPU core */
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extern INT32 mcs51Run(int cycles); /* /12 ! Execute cycles - returns number of cycles actually run */
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extern void mcs51RunEnd(void); /* stop execution */
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extern void mcs51_set_irq_line(int irqline, int state);
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extern void mcs51RunEnd(void); /* stop execution */
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extern INT32 mcs51TotalCycles();
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extern void mcs51NewFrame();
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extern INT32 mcs51Idle(INT32 cycles);
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extern void mcs51_set_irq_line(int irqline, int state);
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void mcs51_iram_fill(UINT8 *src, UINT32 size);
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void mcs51_iram_get(UINT8 *dst, UINT32 size);
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void mcs51_set_write_handler(void (*pointer)(INT32,UINT8));
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@ -106,6 +110,9 @@ extern void ds5002fp_init(UINT8 mcon, UINT8 rpctl, UINT8 crc); // default: 0, 0,
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#define ds5002fp_exit mcs51_exit
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#define ds5002fpRun mcs51Run
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#define ds5002fpRunEnd mcs51RunEnd
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#define ds5002fpTotalCycles mcs51TotalCycles
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#define ds5002fpNewFrame mcs51NewFrame
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#define ds5002fpIdle mcs51Idle
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#define ds5002fp_set_irq_line mcs51_set_irq_line
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#define ds5002fp_set_write_handler mcs51_set_write_handler
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#define ds5002fp_set_read_handler mcs51_set_read_handler
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@ -148,12 +148,15 @@ typedef struct {
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UINT8 p1;
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UINT8 p2;
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UINT8 p2_hs;
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INT32 total_cycles;
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UINT8 *ram;
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INT32 (*irq_callback)(INT32 irqline);
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} I8X41;
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int i8x41_ICount;
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int i8x41_ICount = 0;
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int i8x41_cycle_start = 0;
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int i8x41_end_run = 0;
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static I8X41 i8x41;
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@ -163,7 +166,7 @@ void i8x41_scan(INT32 nAction)
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struct BurnArea ba;
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memset(&ba, 0, sizeof(ba));
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ba.Data = &i8x41;
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ba.nLen = STRUCT_SIZE_HELPER(I8X41, p2_hs);
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ba.nLen = STRUCT_SIZE_HELPER(I8X41, total_cycles);
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ba.szName = "i8x41 Regs";
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BurnAcb(&ba);
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}
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@ -1428,7 +1431,9 @@ INT32 i8x41_run(INT32 cycles)
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{
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int inst_cycles, T1_level;
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i8x41_cycle_start = cycles;
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i8x41_ICount = cycles;
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i8x41_end_run = 0;
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do
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{
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@ -2064,11 +2069,37 @@ INT32 i8x41_run(INT32 cycles)
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}
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} while( i8x41_ICount > 0 );
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} while( i8x41_ICount > 0 && !i8x41_end_run );
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return cycles - i8x41_ICount;
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cycles = cycles - i8x41_ICount;
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i8x41_ICount = i8x41_cycle_start = 0;
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i8x41.total_cycles += cycles;
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return cycles; //xxxdinkx
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}
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void i8x41RunEnd()
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{
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i8x41_end_run = 1;
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}
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INT32 i8x41TotalCycles()
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{
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return i8x41.total_cycles + (i8x41_cycle_start - i8x41_ICount);
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}
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void i8x41NewFrame()
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{
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i8x41.total_cycles = 0;
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}
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INT32 i8x41Idle(INT32 cycles)
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{
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i8x41.total_cycles += cycles;
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return cycles;
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}
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/****************************************************************************
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* Get all registers in given buffer
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@ -97,6 +97,11 @@ void i8x41_init(int (*irqcallback)(int));
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void i8x41_reset();
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void i8x41_exit();
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INT32 i8x41_run(INT32 cycles);
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void i8x41RunEnd();
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INT32 i8x41TotalCycles();
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void i8x41NewFrame();
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INT32 i8x41Idle(INT32 cycles);
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UINT8 i8x41_get_register(UINT32 reg);
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void i8x41_set_register(UINT32 reg, UINT8 data);
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void i8x41_scan(INT32 nAction);
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@ -394,11 +394,17 @@ INT32 upd96050Scan(INT32 /*nAction*/)
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return 0;
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}
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static INT32 total_cycles = 0;
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static INT32 cycle_start = 0;
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static INT32 end_run = 0;
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INT32 upd96050Run(INT32 cycles)
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{
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UINT32 opcode;
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cycle_start = cycles;
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m_icount = cycles;
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end_run = 0;
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do
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{
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@ -420,7 +426,33 @@ INT32 upd96050Run(INT32 cycles)
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} while (m_icount > 0);
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return cycles - m_icount;
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cycles = cycles - m_icount;
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m_icount = cycle_start = 0;
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total_cycles += cycles;
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return cycles;
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}
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INT32 upd96050Idle(INT32 cycles)
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{
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total_cycles += cycles;
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return cycles;
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}
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void upd96050RunEnd()
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{
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end_run = 1;
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}
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INT32 upd96050TotalCycles()
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{
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return total_cycles + (cycle_start - m_icount);
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}
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void upd96050NewFrame()
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{
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total_cycles = 0;
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}
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UINT8 snesdsp_read(bool mode)
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@ -1,6 +1,11 @@
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void upd96050Init(INT32 type, UINT8 *opcode, UINT8 *data, UINT8 *ram, void (*p0_cb)(INT32), void (*p1_cb)(INT32));
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void upd96050Reset();
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void upd96050Init(INT32 type, UINT8 *opcode, UINT8 *data, UINT8 *ram, void (*p0_cb)(INT32), void (*p1_cb)(INT32));
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void upd96050Reset();
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INT32 upd96050Run(INT32 cycles);
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INT32 upd96050Idle(INT32 cycles);
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void upd96050RunEnd();
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INT32 upd96050TotalCycles();
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void upd96050NewFrame();
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UINT8 snesdsp_read(bool mode);
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void snesdsp_write(bool mode, UINT8 data);
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void snesdsp_write(bool mode, UINT8 data);
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INT32 upd96050Scan(INT32 /*nAction*/);
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@ -2162,6 +2162,13 @@ again:
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return ret;
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}
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INT32 z180_idle(INT32 cyc)
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{
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total_cycles += cyc;
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return cyc;
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}
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void z180_run_end()
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{
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end_run = 1;
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@ -160,6 +160,7 @@ void z180_init(int index, int clock, /*const void *config,*/ int (*irqcallback)(
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void z180_exit();
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void z180_reset(void);
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int z180_execute(int cycles);
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INT32 z180_idle(INT32 cyc);
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void z180_burn(int cycles);
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void z180_set_irq_line(int irqline, int state);
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void z180_write_iolines(UINT32 data);
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@ -24,13 +24,6 @@ static INT32 DebugCPU_Z180Initted = 0;
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#define PORT_RANGE (1 << PORT_ADDRESS_BITS)
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#define PORT_MASK (PORT_RANGE - 1)
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static INT32 core_idle(INT32 cycles)
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{
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Z180BurnCycles(cycles);
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return cycles;
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}
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static void core_set_irq(INT32 cpu, INT32 line, INT32 state)
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{
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INT32 active = Z180GetActive();
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@ -59,7 +52,7 @@ cpu_core_config Z180Config =
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Z180GetActive,
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Z180TotalCycles,
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Z180NewFrame,
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core_idle,
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Z180Idle,
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core_set_irq,
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Z180Run,
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Z180RunEnd,
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@ -238,6 +231,16 @@ void Z180BurnCycles(INT32 cycles)
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z180_burn(cycles);
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}
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INT32 Z180Idle(INT32 cycles)
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{
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#if defined FBA_DEBUG
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if (!DebugCPU_Z180Initted) bprintf(PRINT_ERROR, _T("Z180Idle called without init\n"));
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if (nActiveCPU == -1) bprintf(PRINT_ERROR, _T("Z180Idle called when no CPU open\n"));
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#endif
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return z180_idle(cycles);
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}
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void Z180SetIRQLine(INT32 irqline, INT32 state)
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{
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#if defined FBA_DEBUG
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@ -14,6 +14,7 @@ void Z180Init(UINT32 nCPU);
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void Z180Exit();
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void Z180Reset();
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INT32 Z180Run(INT32 cycles);
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INT32 Z180Idle(INT32 cycles);
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void Z180BurnCycles(INT32 cycles);
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void Z180SetIRQLine(INT32 irqline, INT32 state);
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void Z180Scan(INT32 nAction);
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