diff --git a/Config/Games.xml b/Config/Games.xml
new file mode 100644
index 0000000..61b43e5
--- /dev/null
+++ b/Config/Games.xml
@@ -0,0 +1,2652 @@
+
+
+
+
+ Sega Bass Fishing
+ Japan
+ Sega
+ 1997
+
+
+ Sega Model 3
+ 1.0
+
+
+
+
+
+
+
+
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+
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+
+
+
+
+ Sega Bass Fishing
+ Japan, Deluxe
+ Sega
+ 1997
+
+
+ Sega Model 3
+ 1.0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Get Bass
+ Sega
+ 1997
+
+
+ Sega Model 3
+ 1.0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Daytona USA 2 - Battle on the Edge
+ Revision A
+ Sega
+ 1998
+
+
+ Sega Model 3
+ 2.1
+ DSB2
+
+
+
+
+
+
+ 0x29250e16
+
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+
+
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+
+
+
+
+
+
+
+ Daytona USA 2 - Power Edition
+ Sega
+ 1998
+
+
+ Sega Model 3
+ 2.1
+ DSB2
+
+
+
+
+
+
+ 0x29222CC4
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Dirt Devils
+ Export, Revision A
+ Sega
+ 1998
+
+
+ Sega Model 3
+ 2.1
+ DSB2
+
+
+
+
+
+
+
+ 0x29290f17
+
+
+
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+
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+
+
+
+
+
+
+
+
+
+
+
+
+ Dirt Devils
+ Australia, Revision A
+ Sega
+ 1998
+
+
+ Sega Model 3
+ 2.1
+ DSB2
+
+
+
+
+
+
+
+ 0x29290f17
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Dirt Devils
+ Japan, Revision A
+ Sega
+ 1998
+
+
+ Sega Model 3
+ 2.1
+ DSB2
+
+
+
+
+
+
+
+ 0x29290f17
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Emergency Call Ambulance
+ Export
+ Sega
+ 1999
+
+
+ Sega Model 3
+ 2.1
+
+
+
+
+
+
+ 0x2923aa91
+
+
+
+
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+
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+
+
+
+
+
+
+
+
+
+
+
+ Emergency Call Ambulance
+ US location test?
+ Sega
+ 1999
+
+
+ Sega Model 3
+ 2.1
+
+
+
+
+
+
+ 0x2923aa91
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Emergency Call Ambulance
+ USA
+ Sega
+ 1999
+
+
+ Sega Model 3
+ 2.1
+
+
+
+
+
+
+ 0x2923aa91
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Fighting Vipers 2
+ Japan, Revision A
+ Sega
+ 1998
+
+
+ Sega Model 3
+ 2.0
+
+
+
+
+
+
+ 0x29260e96
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+ Harley-Davidson and L.A. Riders
+ Revision B
+ Sega
+ 1997
+
+
+ Sega Model 3
+ 2.0
+
+
+
+
+
+
+
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+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Harley-Davidson and L.A. Riders
+ Revision A
+ Sega
+ 1997
+
+
+ Sega Model 3
+ 2.0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ L.A. Machineguns: Rage of the Machines
+ Japan
+ Sega
+ 1998
+
+
+ Sega Model 3
+ 2.1
+
+
+
+
+
+ 0x292A2BC5
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Le Mans 24
+ Revision B
+ Sega
+ 1997
+
+
+ Sega Model 3
+ 1.5
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ The Lost World
+ Japan, Revision A
+ Sega
+ 1997
+
+
+ Sega Model 3
+ 1.5
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Magical Truck Adventure
+ Sega
+ Japan
+ 1998
+
+
+ Sega Model 3
+ 2.1
+
+
+
+
+ 0x29266e45
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ The Ocean Hunter
+ Sega
+ 1998
+
+
+ Sega Model 3
+ 2.1
+
+
+
+
+
+ 0x292B6A01
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Scud Race
+ Australia, Twin
+ Sega
+ 1996
+
+
+ Sega Model 3
+ 1.5
+ DSB1
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
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+
+
+
+
+
+
+
+
+
+
+ Scud Race
+ Export, Twin
+ Sega
+ 1996
+
+
+ Sega Model 3
+ 1.5
+ DSB1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Scud Race
+ Japan, Deluxe
+ Sega
+ 1996
+
+
+ Sega Model 3
+ 1.5
+ DSB1
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Scud Race Plus
+ Revision A
+ Sega
+ 1997
+
+
+ Sega Model 3
+ 1.5
+ DSB1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Scud Race Plus
+ Sega
+ 1997
+
+
+ Sega Model 3
+ 1.5
+ DSB1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Ski Champ
+ Japan
+ Sega
+ 1998
+
+
+ Sega Model 3
+ 2.0
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Spikeout Final Edition
+ Sega
+ 1999
+
+
+ Sega Model 3
+ 2.1
+ DSB2
+
+
+
+
+
+ 0x29236fc8
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Spikeout
+ Revision C
+ Sega
+ 1998
+
+
+ Sega Model 3
+ 2.1
+ DSB2
+
+
+
+
+
+ 0x292f2b04
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Sega Rally 2
+ Sega
+ 1998
+
+
+ Sega Model 3
+ 2.0
+ DSB2
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Sega Rally 2
+ Deluxe
+ Sega
+ 1998
+
+
+ Sega Model 3
+ 2.0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Star Wars Trilogy Arcade
+ Revision A
+ Sega, LucasArts
+ 1998
+
+
+ Sega Model 3
+ 2.1
+ DSB2
+
+
+
+
+ 0x31272A01
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Star Wars Trilogy Arcade
+ Sega, LucasArts
+ 1998
+
+
+ Sega Model 3
+ 2.1
+ DSB2
+
+
+
+
+ 0x31272A01
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Virtua Fighter 3
+ Revision D
+ Sega
+ 1996
+
+
+ Sega Model 3
+ 1.0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Virtua Fighter 3
+ Revision A
+ Sega
+ 1996
+
+
+ Sega Model 3
+ 1.0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Virtua Fighter 3
+ Revision C
+ Sega
+ 1996
+
+
+ Sega Model 3
+ 1.0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Virtua Fighter 3 Team Battle
+ Sega
+ 1996
+
+
+ Sega Model 3
+ 1.0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Virtual On 2: Oratorio Tangram
+ Revision B
+ Sega
+ 1998
+
+
+ Sega Model 3
+ 2.0
+
+
+
+
+ 0x292a0e97
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Virtual On 2: Oratorio Tangram
+ Ver 5.4g
+ Sega
+ 1998
+
+
+ Sega Model 3
+ 2.0
+
+
+
+
+ 0x292a0e97
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Virtual On 2: Oratorio Tangram
+ Revision A
+ Sega
+ 1998
+
+
+ Sega Model 3
+ 2.0
+
+
+
+
+ 0x292a0e97
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Virtua Striker 2
+ Step 2.0
+ Sega
+ 1997
+
+
+ Sega Model 3
+ 2.0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Virtua Striker 2
+ Step 1.5
+ Sega
+ 1997
+
+
+ Sega Model 3
+ 1.5
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Virtua Striker 2
+ Step 1.5, older
+ Sega
+ 1997
+
+
+ Sega Model 3
+ 1.5
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Virtua Striker 2 '98
+ Step 2.0
+ Sega
+ 1998
+
+
+ Sega Model 3
+ 2.0
+
+
+
+
+
+
+ 0x29234e96
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+ Virtua Striker 2 '98
+ Step 1.5
+ Sega
+ 1998
+
+
+ Sega Model 3
+ 1.5
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Virtua Striker 2 '99.1
+ Revision B
+ Sega
+ 1999
+
+
+ Sega Model 3
+ 2.1
+
+
+
+
+
+
+ 0x29222ac8
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Virtua Striker 2 '99
+ Sega
+ 1999
+
+
+ Sega Model 3
+ 2.1
+
+
+
+
+
+
+ 0x29222ac8
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Virtua Striker 2 '99
+ Step 1.5
+ Sega
+ 1999
+
+
+ Sega Model 3
+ 1.5
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Virtua Striker 2 '99
+ Revision A
+ Sega
+ 1999
+
+
+ Sega Model 3
+ 2.1
+
+
+
+
+
+
+ 0x29222ac8
+
+
+
+
+
+
+
+
+
+
+
+
+
+ Virtua Striker 2 '99
+ Revision B
+ Sega
+ 1999
+
+
+ Sega Model 3
+ 2.1
+
+
+
+
+
+
+ 0x29222ac8
+
+
+
+
+
+
+
+
+
+
+
\ No newline at end of file
diff --git a/Config/Supermodel.ini b/Config/Supermodel.ini
new file mode 100644
index 0000000..badf77d
--- /dev/null
+++ b/Config/Supermodel.ini
@@ -0,0 +1,237 @@
+;;
+;; Supermodel Configuration File
+;; Default settings for Version 0.3a.
+;;
+
+
+;
+; Quick Overview
+; --------------
+;
+; All settings are case sensitive. Numbers must be integers. Check your
+; spelling carefully because invalid settings are silently ignored. To verify
+; that your settings are being parsed correctly, check the contents of
+; error.log.
+;
+; Global options apply to all games. To create configuration profiles for
+; individual games, place settings under sections with the same name as the
+; corresponding MAME ROM set, like so:
+;
+; ; Scud Race
+; [ scud ]
+;
+; SoundVolume = 50
+; MusicVolume = 200
+; ; ... etc. ...
+;
+; Input mappings are an exceptional case: they are only allowed in the global
+; section. Per-game input mappings are not supported.
+;
+; For a list of all valid settings, please consult README.txt. Only default
+; inputs are assigned here.
+;
+
+
+[ Global ] ; Input settings can only be read from the global section!
+
+; Network board - experimental build for win32 only
+EmulateNet = 0
+port_in = 1970
+port_out = 1971
+addr_out = "127.0.0.1"
+
+; Common
+InputStart1 = "KEY_1,JOY1_BUTTON9"
+InputStart2 = "KEY_2,JOY2_BUTTON9"
+InputCoin1 = "KEY_3,JOY1_BUTTON10"
+InputCoin2 = "KEY_4,JOY2_BUTTON10"
+InputServiceA = "KEY_5"
+InputServiceB = "KEY_7"
+InputTestA = "KEY_6"
+InputTestB = "KEY_8"
+
+; 4-way digital joysticks
+InputJoyUp = "KEY_UP,JOY1_UP"
+InputJoyDown = "KEY_DOWN,JOY1_DOWN"
+InputJoyLeft = "KEY_LEFT,JOY1_LEFT"
+InputJoyRight = "KEY_RIGHT,JOY1_RIGHT"
+InputJoyUp2 = "JOY2_UP"
+InputJoyDown2 = "JOY2_DOWN"
+InputJoyLeft2 = "JOY2_LEFT"
+InputJoyRight2 = "JOY2_RIGHT"
+
+; Fighting game buttons
+InputPunch = "KEY_A,JOY1_BUTTON1"
+InputKick = "KEY_S,JOY1_BUTTON2"
+InputGuard = "KEY_D,JOY1_BUTTON3"
+InputEscape = "KEY_F,JOY1_BUTTON4"
+InputPunch2 = "JOY2_BUTTON1"
+InputKick2 = "JOY2_BUTTON2"
+InputGuard2 = "JOY2_BUTTON3"
+InputEscape2 = "JOY2_BUTTON4"
+
+; Spikeout buttons
+InputShift = "KEY_A,JOY1_BUTTON1"
+InputBeat = "KEY_S,JOY1_BUTTON2"
+InputCharge = "KEY_D,JOY1_BUTTON3"
+InputJump = "KEY_F,JOY1_BUTTON4"
+
+; Virtua Striker buttons
+InputShortPass = "KEY_A,JOY1_BUTTON1"
+InputLongPass = "KEY_S,JOY1_BUTTON2"
+InputShoot = "KEY_D,JOY1_BUTTON3"
+InputShortPass2 = "JOY2_BUTTON1"
+InputLongPass2 = "JOY2_BUTTON2"
+InputShoot2 = "JOY2_BUTTON3"
+
+; Steering wheel
+InputSteeringLeft = "KEY_LEFT" ; digital, turn wheel left
+InputSteeringRight = "KEY_RIGHT" ; digital, turn wheel right
+InputSteering = "JOY1_XAXIS" ; analog, full steering range
+
+; Pedals
+InputAccelerator = "KEY_UP,JOY1_UP"
+InputBrake = "KEY_DOWN,JOY1_DOWN"
+
+; Up/down shifter manual transmission (all racers)
+InputGearShiftUp = "KEY_Y" ; sequential shift up
+InputGearShiftDown = "KEY_H" ; sequential shift down
+
+; 4-Speed manual transmission (Daytona 2, Sega Rally 2, Scud Race)
+InputGearShift1 = "KEY_Q,JOY1_BUTTON5"
+InputGearShift2 = "KEY_W,JOY1_BUTTON6"
+InputGearShift3 = "KEY_E,JOY1_BUTTON7"
+InputGearShift4 = "KEY_R,JOY1_BUTTON8"
+InputGearShiftN = "KEY_T"
+
+; VR4 view change buttons (Daytona 2, Le Mans 24, Scud Race)
+InputVR1 = "KEY_A,JOY1_BUTTON1"
+InputVR2 = "KEY_S,JOY1_BUTTON2"
+InputVR3 = "KEY_D,JOY1_BUTTON3"
+InputVR4 = "KEY_F,JOY1_BUTTON4"
+
+; Single view change button (Dirt Devils, ECA, Harley-Davidson, Sega Rally 2)
+InputViewChange = "KEY_A,JOY1_BUTTON1"
+
+; Handbrake (Dirt Devils, Sega Rally 2)
+InputHandBrake = "KEY_S,JOY1_BUTTON2"
+
+; Harley-Davidson controls
+InputRearBrake = "KEY_S,JOY1_BUTTON2"
+InputMusicSelect = "KEY_D,JOY1_BUTTON3"
+
+; Virtual On macros
+InputTwinJoyTurnLeft = "KEY_Q,JOY1_RXAXIS_NEG"
+InputTwinJoyTurnRight = "KEY_W,JOY1_RXAXIS_POS"
+InputTwinJoyForward = "KEY_UP,JOY1_YAXIS_NEG"
+InputTwinJoyReverse = "KEY_DOWN,JOY1_YAXIS_POS"
+InputTwinJoyStrafeLeft = "KEY_LEFT,JOY1_XAXIS_NEG"
+InputTwinJoyStrafeRight = "KEY_RIGHT,JOY1_XAXIS_POS"
+InputTwinJoyJump = "KEY_E,JOY1_BUTTON1"
+InputTwinJoyCrouch = "KEY_R,JOY1_BUTTON2"
+
+; Virtual On individual joystick mapping
+InputTwinJoyLeft1 = "NONE"
+InputTwinJoyLeft2 = "NONE"
+InputTwinJoyRight1 = "NONE"
+InputTwinJoyRight2 = "NONE"
+InputTwinJoyUp1 = "NONE"
+InputTwinJoyUp2 = "NONE"
+InputTwinJoyDown1 = "NONE"
+InputTwinJoyDown2 = "NONE"
+
+; Virtual On buttons
+InputTwinJoyShot1 = "KEY_A,JOY1_BUTTON5"
+InputTwinJoyShot2 = "KEY_S,JOY1_BUTTON6"
+InputTwinJoyTurbo1 = "KEY_Z,JOY1_BUTTON7"
+InputTwinJoyTurbo2 = "KEY_X,JOY1_BUTTON8"
+
+; Analog joystick (Star Wars Trilogy)
+InputAnalogJoyLeft = "KEY_LEFT" ; digital, move left
+InputAnalogJoyRight = "KEY_RIGHT" ; digital, move right
+InputAnalogJoyUp = "KEY_UP" ; digital, move up
+InputAnalogJoyDown = "KEY_DOWN" ; digital, move down
+InputAnalogJoyX = "JOY_XAXIS,MOUSE_XAXIS" ; analog, full X axis
+InputAnalogJoyY = "JOY_YAXIS,MOUSE_YAXIS" ; analog, full Y axis
+InputAnalogJoyTrigger = "KEY_A,JOY_BUTTON1,MOUSE_LEFT_BUTTON"
+InputAnalogJoyEvent = "KEY_S,JOY_BUTTON2,MOUSE_RIGHT_BUTTON"
+InputAnalogJoyTrigger2 = "KEY_D,JOY_BUTTON2"
+InputAnalogJoyEvent2 = "NONE"
+
+; Light guns (Lost World)
+InputGunLeft = "KEY_LEFT" ; digital, move gun left
+InputGunRight = "KEY_RIGHT" ; digital, move gun right
+InputGunUp = "KEY_UP" ; digital, move gun up
+InputGunDown = "KEY_DOWN" ; digital, move gun down
+InputGunX = "MOUSE_XAXIS,JOY1_XAXIS" ; analog, full X axis
+InputGunY = "MOUSE_YAXIS,JOY1_YAXIS" ; analog, full Y axis
+InputTrigger = "KEY_A,JOY1_BUTTON1,MOUSE_LEFT_BUTTON"
+InputOffscreen = "KEY_S,JOY1_BUTTON2,MOUSE_RIGHT_BUTTON" ; point off-screen
+InputAutoTrigger = 0 ; automatic reload when off-screen
+InputGunLeft2 = "NONE"
+InputGunRight2 = "NONE"
+InputGunUp2 = "NONE"
+InputGunDown2 = "NONE"
+InputGunX2 = "JOY2_XAXIS"
+InputGunY2 = "JOY2_YAXIS"
+InputTrigger2 = "JOY2_BUTTON1"
+InputOffscreen2 = "JOY2_BUTTON2"
+InputAutoTrigger2 = 0
+
+; Analog guns (Ocean Hunter, LA Machineguns)
+InputAnalogGunLeft = "KEY_LEFT" ; digital, move gun left
+InputAnalogGunRight = "KEY_RIGHT" ; digital, move gun right
+InputAnalogGunUp = "KEY_UP" ; digital, move gun up
+InputAnalogGunDown = "KEY_DOWN" ; digital, move gun down
+InputAnalogGunX = "MOUSE_XAXIS,JOY1_XAXIS" ; analog, full X axis
+InputAnalogGunY = "MOUSE_YAXIS,JOY1_YAXIS" ; analog, full Y axis
+InputAnalogTriggerLeft = "KEY_A,JOY1_BUTTON1,MOUSE_LEFT_BUTTON"
+InputAnalogTriggerRight = "KEY_S,JOY1_BUTTON2,MOUSE_RIGHT_BUTTON"
+InputAnalogGunLeft2 = "NONE"
+InputAnalogGunRight2 = "NONE"
+InputAnalogGunUp2 = "NONE"
+InputAnalogGunDown2 = "NONE"
+InputAnalogGunX2 = "NONE"
+InputAnalogGunY2 = "NONE"
+InputAnalogTriggerLeft2 = "NONE"
+InputAnalogTriggerRight2 = "NONE"
+
+; Ski Champ controls
+InputSkiLeft = "KEY_LEFT"
+InputSkiRight = "KEY_RIGHT"
+InputSkiUp = "KEY_UP"
+InputSkiDown = "KEY_DOWN"
+InputSkiX = "JOY1_XAXIS"
+InputSkiY = "JOY1_YAXIS"
+InputSkiPollLeft = "KEY_A,JOY1_BUTTON1"
+InputSkiPollRight = "KEY_S,JOY1_BUTTON2"
+InputSkiSelect1 = "KEY_Q,JOY1_BUTTON3"
+InputSkiSelect2 = "KEY_W,JOY1_BUTTON4"
+InputSkiSelect3 = "KEY_E,JOY1_BUTTON5"
+
+; Magical Truck Adventure controls
+InputMagicalLeverUp1 = "KEY_UP"
+InputMagicalLeverDown1 = "KEY_DOWN"
+InputMagicalLeverUp2 = "NONE"
+InputMagicalLeverDown2 = "NONE"
+InputMagicalLever1 = "JOY1_YAXIS"
+InputMagicalLever2 = "JOY2_YAXIS"
+InputMagicalPedal1 = "KEY_A,JOY1_BUTTON1"
+InputMagicalPedal2 = "KEY_S,JOY2_BUTTON1"
+
+; Sega Bass Fishing / Get Bass controls
+InputFishingRodLeft = "KEY_LEFT"
+InputFishingRodRight = "KEY_RIGHT"
+InputFishingRodUp = "KEY_UP"
+InputFishingRodDown = "KEY_DOWN"
+InputFishingStickLeft = "KEY_A"
+InputFishingStickRight = "KEY_D"
+InputFishingStickUp = "KEY_W"
+InputFishingStickDown = "KEY_S"
+InputFishingRodX = "JOY1_XAXIS"
+InputFishingRodY = "JOY1_YAXIS"
+InputFishingStickX = "JOY1_RXAXIS"
+InputFishingStickY = "JOY1_RYAXIS"
+InputFishingReel = "KEY_SPACE,JOY1_ZAXIS_POS"
+InputFishingCast = "KEY_Z,JOY1_BUTTON1"
+InputFishingSelect = "KEY_X,JOY1_BUTTON2"
diff --git a/Docs/LICENSE.txt b/Docs/LICENSE.txt
new file mode 100644
index 0000000..5cba08b
--- /dev/null
+++ b/Docs/LICENSE.txt
@@ -0,0 +1,699 @@
+
+
+ #### ### ###
+ ## ## ## ##
+ ### ## ## ## ### #### ## ### ## ## #### ## #### ##
+ ### ## ## ## ## ## ## ### ## ####### ## ## ##### ## ## ##
+ ### ## ## ## ## ###### ## ## ####### ## ## ## ## ###### ##
+ ## ## ## ## ##### ## ## ## # ## ## ## ## ## ## ##
+ #### ### ## ## #### #### ## ## #### ### ## #### ####
+ ####
+
+ A Sega Model 3 Arcade Emulator.
+ Copyright 2011 Bart Trzynadlowski, Nik Henson
+
+
+ LICENSE AGREEMENT FOR SUPERMODEL VERSION 0.2A
+
+
+Supermodel is distributed as free software under the terms of the GNU General
+Public License, included below. See README.txt for additional documentation.
+The source code may be obtained from the official Supermodel web site:
+
+ http://www.Supermodel3.com
+
+
+ GNU GENERAL PUBLIC LICENSE
+ Version 3, 29 June 2007
+
+ Copyright (C) 2007 Free Software Foundation, Inc.
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+ Preamble
+
+ The GNU General Public License is a free, copyleft license for
+software and other kinds of works.
+
+ The licenses for most software and other practical works are designed
+to take away your freedom to share and change the works. By contrast,
+the GNU General Public License is intended to guarantee your freedom to
+share and change all versions of a program--to make sure it remains free
+software for all its users. We, the Free Software Foundation, use the
+GNU General Public License for most of our software; it applies also to
+any other work released this way by its authors. You can apply it to
+your programs, too.
+
+ When we speak of free software, we are referring to freedom, not
+price. Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+them if you wish), that you receive source code or can get it if you
+want it, that you can change the software or use pieces of it in new
+free programs, and that you know you can do these things.
+
+ To protect your rights, we need to prevent others from denying you
+these rights or asking you to surrender the rights. Therefore, you have
+certain responsibilities if you distribute copies of the software, or if
+you modify it: responsibilities to respect the freedom of others.
+
+ For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must pass on to the recipients the same
+freedoms that you received. You must make sure that they, too, receive
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+
+ Developers that use the GNU GPL protect your rights with two steps:
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+giving you legal permission to copy, distribute and/or modify it.
+
+ For the developers' and authors' protection, the GPL clearly explains
+that there is no warranty for this free software. For both users' and
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+changed, so that their problems will not be attributed erroneously to
+authors of previous versions.
+
+ Some devices are designed to deny users access to install or run
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+ Finally, every program is threatened constantly by software patents.
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+ The precise terms and conditions for copying, distribution and
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+ TERMS AND CONDITIONS
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diff --git a/Docs/README.txt b/Docs/README.txt
new file mode 100644
index 0000000..9c83841
--- /dev/null
+++ b/Docs/README.txt
@@ -0,0 +1,1947 @@
+
+
+ #### ### ###
+ ## ## ## ##
+ ### ## ## ## ### #### ## ### ## ## #### ## #### ##
+ ### ## ## ## ## ## ## ### ## ####### ## ## ##### ## ## ##
+ ### ## ## ## ## ###### ## ## ####### ## ## ## ## ###### ##
+ ## ## ## ## ##### ## ## ## # ## ## ## ## ## ## ##
+ #### ### ## ## #### #### ## ## #### ### ## #### ####
+ ####
+
+ A Sega Model 3 Arcade Emulator.
+ Copyright 2011 Bart Trzynadlowski, Nik Henson
+
+
+ USER MANUAL FOR SUPERMODEL VERSION 0.2A
+
+
+================
+ Introduction
+================
+
+Supermodel emulates the Sega Model 3 arcade platform. It uses OpenGL 2.1 and
+SDL, and can run on Windows, Linux, and Mac OS X. In order to use it, you must
+legally possess ROM images of Model 3 games. Learning to operate Supermodel
+will come with a steep learning curve for most people. Before seeking out
+help, please read this user manual carefully.
+
+Supermodel is distributed as free software under the terms of the GNU General
+Public License, included in LICENSE.txt. Additional copyright information for
+software included within Supermodel is located at the bottom of this file.
+
+The source code may be obtained from the official Supermodel web site:
+
+ http://www.Supermodel3.com
+
+
+==============
+ Disclaimer
+==============
+
+This is an early public release of Supermodel. It is very much preliminary,
+alpha version software (hence the 'a' in the version number). Development
+began in January of 2011 and has focused on reverse engineering aspects of the
+Model 3 that are still unknown. Consequently, many important features, such as
+a proper user interface, are not yet implemented and game compatibility is
+still low.
+
+
+=====================
+ Table of Contents
+=====================
+
+ --- Introduction
+ --- Disclaimer
+ --- Table of Conents
+ 1. Revision History
+ 2. Installing Supermodel
+ 3. Running Supermodel
+ 4. Game Compatibility
+ 5. Video Settings
+ 6. Audio Settings
+ 7. Controls
+ 8. Force Feedback
+ 9. Save States and NVRAM
+ 10. Game-Specific Comments and Tips
+ 11. The Configuration File
+ 12. Index of Command Line Options
+ 13. Index of Configuration File Settings
+ 14. Compiling the Source Code
+ 15. Contact Information
+ 16. Acknowledgments
+
+
+=======================
+ 1. Revision History
+=======================
+
+ Version 0.2a (September 24, 2011)
+ - New, fully customizable input system. Supports any combination of
+ keyboards, mice, and analog and digital controllers. [Nik Henson]
+ - Texture offsets. Fixes models in 'Fighting Vipers 2', 'Virtual On',
+ cars in the 'Scud Race' and 'Daytona USA 2' selection screens, etc.
+ - Fixed a 2D palette bug that would cause black pixels to occasionally
+ turn transparent.
+ - Added all remaining ROM sets. [krom]
+ - Got some new games to boot: 'Spikeout', 'Ski Champ', 'Sega Bass
+ Fishing', 'Dirt Devils', etc.
+ - Sound support. Special thanks to ElSemi for contributing his SCSP
+ emulator and Karl Stenerud for allowing us to use his 68K emulator.
+ - Multi-threading support. Sound and drive board emulation are off-
+ loaded to separate threads, substantially enhancing performance.
+ [Nik Henson]
+ - Z80 emulation based on code by Frank D. Cringle and YAZE-AG by
+ Andreas Gerlich.
+ - Digital Sound Board (MPEG music) emulation courtesy of R. Belmont and
+ the MPEG decoder library by Tomislav Uzelac.
+ - Improved ROM loader. It should no longer be as easily confused by
+ combined ROM sets as long as unused files are removed.
+ - Configuration file now supports more settings and allows game-
+ specific customization.
+ - Added light gun crosshairs ('The Lost World'), enabled by default in
+ full screen mode and selectable by pressing Alt-I.
+ - Drive board and force feedback emulation for 'Scud Race', 'Daytona
+ USA 2', and 'Sega Rally 2'. [Nik Henson]
+ - Viewable display area properly clipped. Ghost artifacts no longer
+ appear in border regions when the resolution exceeds the display
+ area.
+ - Changed gear shifting: added a dedicated neutral gear and sequential
+ shifting.
+ - Console-based debugger (not enabled by default, must be
+ enabled during compile-time). [Nik Henson]
+ - Source code and Makefile cleanup.
+
+ Version 0.1.2a (April 3, 2011)
+ - Included missing GLEW files.
+
+ Version 0.1.1a (April 2, 2011)
+ - Minor source code update.
+ - Set Render3D to NULL in the CReal3D constructor. Fixes crashes that
+ occur on some builds. [Nik Henson]
+ - Cleaned up UNIX Makefile and added OS X Makefile. [R. Belmont]
+ - Small changes to ppc_ops.cpp for C++0x compliance. [R. Belmont]
+ - Included glew.h into the source tree. [R. Belmont]
+ - Changed WIN32 definition to SUPERMODEL_WIN32.
+
+ Version 0.1a (April 1, 2011)
+ - Initial public alpha release.
+
+
+============================
+ 2. Installing Supermodel
+============================
+
+To install Supermodel on Windows, extract the ZIP archive containing the
+Supermodel executable to a folder of your choice. The following files and
+directories should be created:
+
+ Name Description
+ ---- -----------
+ Supermodel.exe Supermodel program. Run this.
+ SDL.dll The SDL library. Use the bundled DLL file.
+ README.txt This text file.
+ LICENSE.txt Supermodel license and terms of use.
+ Config/ Directory where the configuration file is stored.
+ Config/Supermodel.ini Configuration file containing default input
+ settings.
+ NVRAM/ Directory where NVRAM contents will be saved.
+ Saves/ Directory where save states will be saved.
+
+Supermodel requires OpenGL 2.1 and a substantial amount of both video and
+system memory. A very fast CPU and GPU are needed to achieve playable frame
+rates.
+
+As of this version, Linux and Mac OS X binaries are not provided. Users must
+compile their own.
+
+
+=========================
+ 3. Running Supermodel
+=========================
+
+For now, Supermodel does not include a proper user interface. It is operated
+entirely from the command line. Run 'supermodel' without any command line
+arguments for an explanation of supported options.
+
+Supermodel uses MAME-compatible ROM sets. It loads from ZIP archives based on
+file checksums and automatically detects games; therefore, file names are not
+important. Only one ZIP file can be specified on the command line. For
+example:
+
+ supermodel scud.zip -fullscreen
+
+This will load 'scud.zip' (Scud Race) and run it in full screen mode.
+
+Initially, inputs are assigned according to the settings in 'Supermodel.ini',
+located in the 'Config' subdirectory.
+
+Note that there is no user interface and all messages are printed to the
+command prompt. In full screen mode, they will not be visible.
+
+
+=========================
+ 4. Game Compatibility
+=========================
+
+Supermodel recognizes all known Model 3 ROM sets but not all of them are
+playable. Below is a compatibility matrix. The most obvious problem with each
+ROM set is reported.
+
+ ROM Set Title Playable? Comments
++-----------+-----------------------------------------+-----+-----------------+
+| bass | Sega Bass Fishing | No | No controls. |
++-----------+-----------------------------------------+-----+-----------------+
+| daytona2 | Daytona USA 2 Battle on the Edge | Yes | Minor graphics |
+| | | | problems. |
++-----------+-----------------------------------------+-----+-----------------+
+| dayto2pe | Daytona USA 2 Power Edition | Yes | Minor graphics |
+| | | | problems. |
++-----------+-----------------------------------------+-----+-----------------+
+| dirtdvls | Dirt Devils | Yes | Severe graphics |
+| | | | problems. |
++-----------+-----------------------------------------+-----+-----------------+
+| dirtdvlsa | Dirt Devils (Alternate) | Yes | Severe graphics |
+| | | | problems. |
++-----------+-----------------------------------------+-----+-----------------+
+| eca | Emergency Call Ambulance | No | Severe graphics |
+| | | | problems. |
++-----------+-----------------------------------------+-----+-----------------+
+| ecax | Emergency Call Ambulance (Export) | No | Severe graphics |
+| | | | problems. |
++-----------+-----------------------------------------+-----+-----------------+
+| fvipers2 | Fighting Vipers 2 | Yes | Slow. |
++-----------+-----------------------------------------+-----+-----------------+
+| getbass | Get Bass | No | Does not boot. |
++-----------+-----------------------------------------+-----+-----------------+
+| harley | Harley Davidson & L.A. Riders | No | Severe graphics |
+| | | | problems. |
++-----------+-----------------------------------------+-----+-----------------+
+| harleyb | Harley Davidson & L.A. Riders (Rev. B) | No | Severe graphics |
+| | | | problems. |
++-----------+-----------------------------------------+-----+-----------------+
+| lamachin | L.A. Machineguns | No | Severe graphics |
+| | | | problems. |
++-----------+-----------------------------------------+-----+-----------------+
+| lemans24 | Le Mans 24 | Yes | Some texture |
+| | | | problems. |
++-----------+-----------------------------------------+-----+-----------------+
+| lostwsga | The Lost World | Yes | Some texture |
+| | | | problems. |
++-----------+-----------------------------------------+-----+-----------------+
+| magtruck | Magical Truck Adventure | No | Does not boot. |
++-----------+-----------------------------------------+-----+-----------------+
+| oceanhun | The Ocean Hunter | No | Severe graphics |
+| | | | problems. |
++-----------+-----------------------------------------+-----+-----------------+
+| scud | Scud Race (Australia) | Yes | Minor shading |
+| | | | problems. |
++-----------+-----------------------------------------+-----+-----------------+
+| scuda | Scud Race (Export) | Yes | Minor shading |
+| | | | problems. |
++-----------+-----------------------------------------+-----+-----------------+
+| scudj | Scud Race (Japan) | Yes | Mis-colored 2D |
+| | | | graphics. |
++-----------+-----------------------------------------+-----+-----------------+
+| scudp | Scud Race Plus | Yes | Minor shading |
+| | | | problems. |
++-----------+-----------------------------------------+-----+-----------------+
+| skichamp | Ski Champ | No | Severe graphics |
+| | | | problems. |
++-----------+-----------------------------------------+-----+-----------------+
+| spikeofe | Spikeout Final Edition | Yes | Some texture |
+| | | | problems. |
++-----------+-----------------------------------------+-----+-----------------+
+| spikeout | Spikeout | Yes | Some texture |
+| | | | problems. |
++-----------+-----------------------------------------+-----+-----------------+
+| srally2 | Sega Rally 2 | Yes | Major graphics |
+| | | | problems. |
++-----------+-----------------------------------------+-----+-----------------+
+| srally2x | Sega Rally 2 DX | No | Does not boot. |
++-----------+-----------------------------------------+-----+-----------------+
+| swtrilgy | Star Wars Trilogy (Rev. A) | Yes | Some graphics |
+| | | | problems. |
++-----------+-----------------------------------------+-----+-----------------+
+| swtrilgya | Star Wars Trilogy | No | Does not boot. |
++-----------+-----------------------------------------+-----+-----------------+
+| vf3 | Virtua Fighter 3 | Yes | Major graphics |
+| | | | problems. |
++-----------+-----------------------------------------+-----+-----------------+
+| vf3a | Virtua Fighter 3 (Rev. A) | Yes | Major graphics |
+| | | | problems. |
++-----------+-----------------------------------------+-----+-----------------+
+| vf3tb | Virtua Fighter 3 Team Battle | No | Cannot coin up. |
++-----------+-----------------------------------------+-----+-----------------+
+| von2 | Virtual On Oratorio Tangram | Yes | Encrypted 2D |
+| | | | graphics. |
++-----------+-----------------------------------------+-----+-----------------+
+| von254g | Virtual On Oratorio Tangram (Ver. 5.4g) | Yes | Encrypted 2D |
+| | | | graphics. |
++-----------+-----------------------------------------+-----+-----------------+
+| vs2 | Virtua Striker 2 (Step 2.0) | Yes | Slow. |
++-----------+-----------------------------------------+-----+-----------------+
+| vs215 | Virtua Striker 2 (Step 1.5) | Yes | Slow. |
++-----------+-----------------------------------------+-----+-----------------+
+| vs298 | Virtua Striker 2 '98 (Step 2.0) | Yes | Slow. |
++-----------+-----------------------------------------+-----+-----------------+
+| vs29815 | Virtua Striker 2 '98 (Step 1.5) | Yes | Slow. |
++-----------+-----------------------------------------+-----+-----------------+
+| vs299 | Virtua Striker 2 '99 | No | PowerPC error. |
++-----------+-----------------------------------------+-----+-----------------+
+| vs299a | Virtua Striker 2 '99 (Rev. A) | No | PowerPC error. |
++-----------+-----------------------------------------+-----+-----------------+
+| vs299b | Virtua Striker 2 '99 (Rev. B) | No | PowerPC error. |
++-----------+-----------------------------------------+-----+-----------------+
+| vs2v991 | Virtua Striker 2 '99.1 | No | PowerPC error. |
++-----------+-----------------------------------------+-----+-----------------+
+
+Most ROM sets suffering from severe graphical problems are categorized as non-
+playable when in fact many are partially playable. Controls may not be fully
+functional, however, and none have been tested thoroughly.
+
+
+=====================
+ 5. Video Settings
+=====================
+
+Supermodel may be run in either windowed (default) or full screen mode. It
+automatically adjusts the display area to retain the aspect ratio of the Model
+3's native (and Supermodel's default) resolution, 496x384. Currently, this
+cannot be overriden. Changing video modes at run-time is not yet supported.
+
+By default, Supermodel limits the frame rate to 60 frames per second. This has
+no impact on performance except when the frame rate exceeds 60 FPS on fast
+systems. Frame rate limiting can be disabled with the '-no-throttle' option.
+Some video drivers may continue to lock to the refresh rate.
+
+To change the resolution, use the '-res' command line option. For full screen
+mode, use '-fullscreen'. For example, to set a full screen 1920x1080 mode,
+try:
+
+ supermodel game.zip -res=1920,1080 -fullscreen
+
+Video settings may also be specified globally or on a per-game basis in the
+configuration file, described elsewhere in this manual.
+
+
+=====================
+ 6. Audio Settings
+=====================
+
+All Model 3 games have a sound board that is used for sound effects and, in
+some games, background music. A few games use additional Digital Sound Boards
+(DSB) for MPEG music. 'Music' in Supermodel refers exclusively to MPEG music
+produced by the DSB and 'sound' refers to both the sound effects and background
+music produced by the regular sound board.
+
+Model 3 sound and MPEG music are generated separately and then mixed by an
+amplifier. The relative signal levels are not known, so Supermodel simply
+outputs all audio at full volume. This causes the MPEG music to be too quiet
+in some games ('Scud Race', 'Daytona USA 2') and too loud in others ('Star Wars
+Trilogy'). The '-sound-volume' and '-music-volume' options can be used to
+change the volume. As arguments, they take a volume level in percent ranging
+from 0 (muted) to 200% (maximum, doubled amplitude). For example:
+
+ supermodel game.zip -sound-volume=50 -music-volume=170
+
+This command line cuts the sound volume in half and increases the music volume
+by 70%.
+
+The F9 and F10 keys can be used to adjust music volume during run-time, while
+F11 and F12 control sound volume.
+
+Clipping and distortion will occur if the combined sound and music volume
+levels become too high.
+
+To disable sound and music board emulation altogether, use the '-no-sound' and
+'-no-dsb' options. These will not merely mute the corresponding audio channels
+but will prevent the audio co-processors from being emulated altogether and
+may slightly improve performance, especially on single-core systems. Save
+states generated with these settings may not be able to properly restore audio
+when loaded after emulation is re-enabled.
+
+Audio settings may also be specified globally or on a per-game basis in the
+configuration file, described elsewhere in this document.
+
+Please keep in mind that MPEG music emulation is preliminary and the decoder is
+buggy. Periodic squeaks and pops occur on many music tracks. The Sega Custom
+Sound Processor (SCSP) emulator, used for sound emulation, is also still quite
+buggy. Sound glitches are known to occur now and then, and many sounds and
+tunes do not sound quite correct yet.
+
+
+===============
+ 7. Controls
+===============
+
+Game controls are fully configurable and can be mapped to keyboards, mice, and
+game controllers. Emulator functions, on the other hand, cannot be changed and
+are listed below.
+
+ Function Key Assignment
+ -------- --------------
+ Exit Escape
+ Pause Alt-P
+ Reset Alt-R
+ Clear NVRAM Alt-N
+ Crosshairs (for light gun games) Alt-I
+ Toggle 60 Hz Frame Limiting Alt-T
+ Save State F5
+ Load State F7
+ Change Save Slot F6
+ Decrease Music Volume F9
+ Increase Music Volume F10
+ Decrease Sound Volume F11
+ Increase Sound Volume F12
+
+
+Learning and Configuring Game Controls
+--------------------------------------
+
+Settings for game controls are stored in 'Supermodel.ini'. To learn the
+current configuration, use the '-print-inputs' command line option.
+
+ supermodel -print-inputs
+
+If you delete 'Supermodel.ini', all inputs will become unmapped and will have
+to be reconfigured!
+
+To reconfigure the inputs, use the '-config-inputs' option. A blank window
+will open up and instructions will be printed to the command prompt. Read them
+carefully! Pressing the Escape key exits without saving changes. Pressing 'q'
+will save changes to 'Supermodel.ini'. You can choose which input to configure
+using the Up and Down arrow keys. Clearing an input means it will be unusable.
+
+If the configuration dialog is not responding to your key presses or mouse and
+joystick movements, make sure that the blank pop-up window rather than the
+command prompt is selected. This may seem counter-intuitive but inputs are
+captured by the graphical window while messages are printed to the command
+prompt.
+
+
+Calibrating Controls
+--------------------
+
+Some controls, in particular the accelerator and brake pedals of steering
+wheels, may need calibrating before they will function properly with
+Supermodel.
+
+In order to calibrate a control, press 'b' when configuring the inputs and
+follow the on-screen instructions carefully.
+
+NOTE: After calibration, you must remap the control again or it will not
+function properly!
+
+Several input-related settings are stored in the configuration file. Refer to
+the section discussing the configuration file for more details.
+
+
+XBox 360 Controllers
+--------------------
+
+For full XBox 360 controller support, the XInput system must be used on Windows
+('-input-system=xinput'). Otherwise, the left and right trigger buttons cannot
+be mapped individually and force feedback will not work. Please read the
+section titled 'Input Systems', further below.
+
+Mac OS X users can use Colin Munro's XBox 360 controller driver:
+http://tattiebogle.net/index.php/ProjectRoot/Xbox360Controller/OsxDriver
+
+
+Analog Controls
+---------------
+
+Analog controls, such as steering wheels, pedals, and the light gun axes, can
+be mapped to analog controllers, such as joysticks, wheels, and mice, if
+available. Under digital control, the analog value will increment or decrement
+until it reaches its maximum/minimum values. The rate of change can only be
+set manually in the configuration file. These options are described elsewhere
+in this document.
+
+Most analog inputs, such as the steering wheel, require two settings to be
+controlled digitally. For example, the steering wheel can be turned left and
+right by setting 'Steer Left' and 'Steer Right', or it can be mapped to a
+single analog control ('Full Steering').
+
+
+Shifting Gears
+--------------
+
+Racing game gears can be mapped to individual buttons, including one for the
+neutral position, or can be shifted sequentially. Games which only provide two
+gears name them 'Up' and 'Down'. These should not be confused with 'Shift Up'
+and 'Shift Down', the sequential shift commands.
+
+
+Virtual On Twin Joysticks
+-------------------------
+
+'Virtual On Oratorio Tangram' features a twin joystick control scheme similar
+to a tracked vehicle (e.g. a tank). Movement is accomplished by pushing both
+joysticks in the same direction. Pushing and pulling in opposite directions
+will turn the robot, while pulling the joysticks apart sideways or pushing them
+inwards are for jumping and falling back down to the ground, respectively.
+
+Supermodel supports mapping the individual joysticks but also provides 'macro'
+controls by default. These allow all the necessary twin joystick commands to
+be replicated with individual controls. The mapping is below:
+
+ Macro Control Twin Joystick Equivalent
+ ------------- ------------------------
+ Turn Left Left joystick down, right joystick up.
+ Turn Right Left joystick up, right joystick down.
+ Forward Both joysticks up.
+ Reverse Both joysticks down.
+ Strafe Left Both joysticks left.
+ Strafe Right Both joysticks right.
+ Jump Left joystick left, right joystick right.
+ Crouch Left joystick right, right joystick left.
+
+
+Light Guns
+----------
+
+Light gun axes can be mapped to mice, analog controls, or even digital buttons.
+To simulate pointing off-screen (required in order to reload), a 'point off-
+screen' input is provided which, for as long as it is pressed, will aim the gun
+off-screen. To reload, hold down this button and then, while holding it, press
+the trigger. For easier reloading, the 'InputAutoTrigger' setting can be
+enabled in the configuration file (described elsewhere in this manual).
+
+Crosshairs will be visible in full screen mode and can also be enabled in
+windowed modes. Use Alt-I to cycle through different crosshair options (enable
+for a single player, both, or none).
+
+For multiple mouse support, allowing two mice or PC light guns to be mapped,
+Raw Input must be used. This is supported only on Windows and is described
+below.
+
+
+Input Systems
+-------------
+
+Supermodel supports multiple input APIs to provide the best possible
+compatibility for different input devices and configuration schemes. On
+Windows, the default is DirectInput. On all other platforms, SDL is the only
+option available.
+
+Windows users can select between four different input systems:
+
+ - DirectInput. Selected with '-input-system=dinput'. This is the default.
+ It provides the best support for PC game controllers and, when emulating
+ force feedback, allows all effects (if the controller supports them).
+ - XInput. Selected with '-input-system=xinput'. This must be used with
+ XBox 360 controllers, otherwise some buttons will not function properly
+ and force feedback will not work.
+ - Raw Input. Selected with '-input-system=rawinput'. This is intended for
+ use with multiple mice and keyboards but is not recommended otherwise.
+ - SDL. Selected with '-input-system=sdl'. The standard, cross-platform
+ input system intended for non-Windows builds. It is accessible on
+ Windows but does not provide full support for all devices.
+
+When switching input systems with '-input-system', you must also configure your
+inputs using the same option. For example, when running Supermodel with XInput
+('supermodel game.zip -input-system=xinput'), you must also configure with
+XInput ('supermodel -config-inputs -input-system=xinput'). Many settings are
+not compatible between input systems.
+
+A common mistake is to configure inputs using one system and then launch
+Supermodel with another.
+
+
+Troubleshooting
+---------------
+
+Common input-related problems are discussed below.
+
+
+ Problem:
+ No response while configuring inputs.
+
+ Solution:
+ Make sure the main window is top window, especially with the SDL input
+ system.
+
+ ---------
+
+ Problem:
+ An attached controller is not recognized at all.
+
+ Solution:
+ - On the input configuration screen, press 'I' to see information about
+ the input system and check that the required controller is in the
+ list.
+ - If it is not in the list, check that it is plugged in and visible in
+ the operating system. If a controller is plugged in while Supermodel
+ is running, Supermodel will need to be restarted in order for it to
+ recognize the new controller.
+ - On Windows, if after checking the above points the controller is
+ still not in the list, try running Supermodel with the SDL input
+ system by specifying '-input-system=sdl' on the command line.
+
+ ---------
+
+ Problem:
+ Unable to select a particular joysick axis when configuring a mapping.
+
+ Solution:
+ This may mean that the joystick axis needs calibrating. This can be
+ done by pressing 'b' on the configuration screen and following the
+ instructions.
+
+ ---------
+
+ Problem:
+ Steering wheel pedals are not being recognized.
+
+ Solution:
+ For some steering wheels where the pedals have been configured in a
+ 'split axis' mode (ie. not sharing a combined axis), the values that
+ the pedals send are inverted. This means that without configuration,
+ Supermodel will be unable to recognize them. To fix this, they should
+ be calibrated on the calibration screen in the same way as above.
+
+ ---------
+
+ Problem:
+ A control isn't working despite having been calibrated.
+
+ Solution:
+ After calibration, while still in the configuration dialog, you must
+ remap the control again for the new settings to take effect.
+
+ ---------
+
+ Problem:
+ XBox 360 controller trigger buttons cannot be triggered simultaneously
+ or no rumble effects.
+
+ Solution:
+ On Windows, make sure that you specify '-input-system=xinput'.
+
+
+=====================
+ 8. Force Feedback
+=====================
+
+Force feedback is presently supported in 'Scud Race' (including 'Scud Race
+Plus'), 'Daytona USA 2' (both editions), and 'Sega Rally 2' on Windows only. To
+enable it, use the '-force-feedback' option.
+
+Drive board ROMs are required. They first appear in the MAME 0.143u6 ROM
+catalog and at the time of this writing, have not yet widely proliferated.
+
+ Game Drive Board ROM File Size Checksum (CRC32)
+ ---- -------------------- ---- ----------------
+ Daytona USA 2 epr-20985.bin 64 KB B139481D
+ Scud Race epr-19338a.bin 64 KB C9FAC464
+ Sega Rally 2 epr-20512.bin 64 KB CF64350D
+
+The sizes and checksums must match those listed above. The file names may be
+different but will almost certainly contain the same identifying numbers.
+Ensure that the appropriate drive board ROM files are present in the
+corresponding games' ZIP archives, otherwise Supermodel will silently proceed
+without force feedback.
+
+Force feedback will only work with the DirectInput (the default on Windows) and
+XInput input systems. XInput is intended only for XBox 360 controllers, which
+do not support force feedback through DirectInput.
+
+
+Tuning Force Feedback
+---------------------
+
+Force feedback can be enabled and tuned in the configuration file. Setting
+'ForceFeedback' to 1 enables it:
+
+ ForceFeedback = 1
+
+There are four DirectInput effects: constant force, self centering, friction,
+and vibration. The strength of each can be tuned with the following settings:
+
+ DirectInputConstForceMax = 100
+ DirectInputSelfCenterMax = 100
+ DirectInputFrictionMax = 100
+ DirectInputVibrateMax = 100
+
+They are given as percentages and represent the maximum strength for each
+effect. A setting of 0 disables them entirely. Values above 100% are
+accepted but may clip or distort the effect. By default, they are set to 100%,
+as shown above.
+
+XInput devices only support vibration feedback via the left and right motors.
+Because the characteristics of the motors are different, the effects will feel
+somewhat asymmetric. The constant force effect is simulated with vibrations.
+The relevant settings are:
+
+ XInputConstForceThreshold = 30
+ XInputConstForceMax = 100
+ XInputVibrateMax = 100
+
+The constant force threshold specifies how strong a constant force command must
+be before it is sent to the controller as a vibration effect (whose strength is
+determined by XInputConstForceMax). The default values are shown above and
+will require calibration by the user on a game-by-game basis to achieve the
+best feel.
+
+
+============================
+ 9. Save States and NVRAM
+============================
+
+Save states are saved and restored by pressing F5 and F7, respectively. Up to
+10 different save slots can be selected with F6. All files are written to the
+Saves/ directory, which must exist beforehand. If you extracted the Supermodel
+ZIP file correctly, it will have been created automatically.
+
+If a Model 3 co-processor (ie. sound board, DSB, drive board) is disabled when
+a save state is taken, it will not resume normal operation when the state is
+loaded, even if Supermodel is running with the co-processor re-enabled. The
+drive board (and consequently, force feedback effects) is explicitly disabled
+for the remainder of the session if a save state with an inactive drive board
+is loaded. Audio co-processors are not, and therefore audio playback may
+eventually resume after the audio boards have booted themselves up.
+
+Non-volatile memory (NVRAM) consists of battery-backed backup RAM and an EEPROM
+chip. The former is used for high score data and statistics whereas the latter
+stores machine settings (often accessed using the Test buttons). NVRAM is
+automatically saved each time Supermodel exits and is loaded at start-up. It
+can be cleared by deleting the NVRAM files or pressing Alt-N.
+
+
+=======================================
+ 10. Game-Specific Comments and Tips
+=======================================
+
+
+Daytona USA 2 and Daytona USA 2 Power Edition
+---------------------------------------------
+
+To bypass the network board error, enter the Test Menu by pressing the Test
+button. Navigate to 'Game Assignments' using the Service button and select it
+with Test. Change 'Link ID' from 'Master' to 'Single'.
+
+In 'Daytona USA 2', the region menu can be accessed by entering the Test Menu,
+holding down the Start button, and pressing: VR4, VR4, VR2, VR3, VR1, VR3, VR2.
+Changing the region to USA changes game text to English.
+
+By default, the 'Power Edition' ROM set features remixed music lyrics by
+Takenobu Mitsuyoshi. These can be changed back to the Dennis St. James version
+in the Test Menu, under 'Game Assignments'.
+
+
+Le Mans 24
+----------
+
+The region can be changed by entering the test menu (press the Test button) and
+pressing: Start, Start, Service, Service, Start, Test.
+
+
+Star Wars Trilogy
+-----------------
+
+Inserting coins and starting a game before any 3D graphics have been displayed
+in attract mode will result in a PowerPC crash before the stage loads. This is
+caused by an unknown emulation bug. Simply wait until the Darth Vader sequence
+appears before attempting to start a game.
+
+If 'Star Wars Trilogy' is booting directly into the stage select screen, it is
+probably because you exited Supermodel with credits still in the machine.
+Clear the NVRAM (Alt-N) and reset the game (Alt-R).
+
+
+Sega Rally 2
+------------
+
+As with 'Star Wars Trilogy', you may experience problems if you attempt to
+start a game before any 3D graphics are displayed (for example, during the Sega
+logo).
+
+The region can be changed by entering the test menu (press the Test button) and
+then pressing the Service button four times for short durations, twice for long
+durations, twice for short durations, and once again for a long duration.
+
+
+Spikeout and Spikeout Final Edition
+-----------------------------------
+
+These games can be played all the way through but may lock up during the
+attract mode. There are periodic texture glitches due to Supermodel's
+inadequate texture caching system and possibly also due to a texture offset
+bug.
+
+
+The Lost World
+--------------
+
+To reload, the light gun must be pointed off-screen by pressing (and holding)
+the 'off-screen' button and, simultaneously, pressing the trigger to shoot.
+This behavior can be changed with the 'InputAutoTrigger' setting in the
+configuration file.
+
+The region can be changed by entering the test menu (press the Test button) and
+pressing: Start, Start, Service, Start, Service, Test. Use the player 1 Start
+button.
+
+
+Virtua Fighter 3
+----------------
+
+The game is playable but there are numerous graphical glitches, particularly
+during transition scenes.
+
+
+Virtua Striker 2 '98 (Step 1.5 and 2.0 versions)
+------------------------------------------------
+
+The Virtua Striker games all run very slowly for an unknown reason.
+
+The region can be changed by entering the test menu (press the Test button)
+and, in the 'Game Assignments' menu, performing the following sequence:
+
+ 1. Press the Service button once for about 5 seconds.
+ 2. Press the Service button three times shortly.
+ 3. Press the Service button again one time for about 5 seconds.
+
+
+==============================
+ 11. The Configuration File
+==============================
+
+Supermodel reads configuration settings from 'Supermodel.ini' located in the
+'Config' subdirectory. If Supermodel was installed properly, a default file
+should have been created. When starting up, Supermodel parses settings in the
+following order:
+
+ 1. Global settings are read from 'Supermodel.ini'. These include input
+ mappings and apply to all games.
+ 2. If the ROM set was loaded correctly, game-specific settings are read
+ from 'Supermodel.ini', overriding settings from step 1.
+ 3. Command line options are applied, overriding settings from the previous
+ steps.
+
+In other words, command line options have the highest precedence, followed by
+game-specific settings, and lastly, global settings.
+
+An index of all allowed settings is provided further below in this document.
+
+NOTE: Type carefully! Supermodel will not report syntax errors nor detect
+typos. Carefully read the discussion of the file syntax below. To verify that
+your intended settings are taking effect, check the 'error.log' file that is
+produced by Supermodel during each run.
+
+
+File Structure and Syntax
+-------------------------
+
+The configuration file is a list of settings grouped by sections. All setting
+names and their arguments are case sensitive. They take the form:
+
+ Name = Argument
+
+Only one setting per line is allowed. Only two types of arguments are allowed:
+integers and strings. The choice of which to use is determined by the setting.
+Integers can be negative. Strings can contain any characters and are enclosed
+by double quotes. Examples:
+
+ IntegerSetting1 = 0
+ IntegerSetting2 = 65536
+ IntegerSetting3 = -32768
+ StringSetting1 = "This is a string."
+ StringSetting2 = "123"
+ StringSetting3 = "1+1, abc, these are all valid characters!"
+
+Many settings are simply boolean variables expecting an integer value of either
+0 (disabled) or 1 (enabled). Some settings require values and others take
+strings for file names or input mappings.
+
+Section names appear in between square brackets on their own lines.
+
+ [ SectionName ]
+
+Settings that appear at the beginning of the file without a preceeding section
+are automatically assigned to 'Global'.
+
+Comments begin with a semicolon and extend until the end of the line.
+
+ ; This is a comment.
+
+
+Global and Game-Specific Sections
+---------------------------------
+
+Sections determine whether settings are applied globally, to all games, or to
+specific games. Game-specific settings will override global settings and can
+be used to tune Supermodel on a game-by-game basis. Global settings must be
+placed in the 'Global' section and game-specific settings in sections named
+after the ROM sets. ROM sets must be typed in lower case and use the MAME
+(http://www.mamedev.org) naming convention. They can be obtained by running
+'supermodel -print-games'.
+
+Input mappings are special. They are only read from the 'Global' section!
+
+In the example below, custom configurations are created for 'Scud Race' and
+'The Lost World'. All other games will use the global settings.
+
+ [ Global ]
+
+ ; Run full screen at 1024x768
+ XResolution = 1024
+ YResolution = 768
+ FullScreen = 1
+
+ ; Scud Race
+ [ scud ]
+
+ ; Run at 1080p
+ XResolution = 1920
+ YResolution = 1080
+
+ ; Music is too quiet by default
+ SoundVolume = 50
+ MusicVolume = 200
+
+ ; The Lost World
+ [ lostwsga ]
+
+ PowerPCFrequency = 25 ; run PowerPC at 25 MHz
+
+In this example, only 'Scud Race' will run at 1920x1080. All other games will
+use 1024x768. 'Scud Race' will also have altered volume settings. 'The Lost
+World' will be run with a lower PowerPC frequency but all other games will use
+the default.
+
+
+Input Mappings
+--------------
+
+Input mappings are specified with strings that have their own internal syntax.
+They may only be specified in the 'Global' section and are ignored elsewhere.
+
+A mapping may be specified in one of the following three ways:
+
+ KEY_XXX For a key XXX on a keyboard (eg. KEY_A, KEY_SPACE, KEY_ALT).
+
+ MOUSE_XXX For a mouse axis (X or Y), wheel, or button (1-5) (eg.
+ MOUSE_XAXIS, MOUSE_WHEEL_UP, MOUSE_BUTTON3).
+
+ JOY1_XXX For a joystick axis (X, Y, Z, RX, RY, RZ), POV controller
+ JOY2_XXX (1-4), or button (1-12) (e.g. JOY1_XAXIS, JOY3_POV2_UP,
+ ... JOY2_BUTTON4).
+
+Joysticks, including game pads and steering wheels, are numbered from 1 on up.
+Their ordering is system dependent and if controllers are swapped between
+invocations of Supermodel, then the ordering may change. If the number is
+omitted then the mapping applies to all joysticks, eg. JOY_BUTTON1 means button
+1 on any attached joystick.
+
+In addition to the above, when using the Raw Input system on Windows (command
+line option '-input-system=rawinput') it is possible to refer to a particular
+mouse or keyboard by including its number in the mapping, eg. KEY2_A or
+MOUSE3_XAXIS. This allows the independent mapping of dual mice or dual light
+guns (which present themselves as mice to Supermodel) for 'The Lost World'.
+
+Mappings may be combined with a plus '+' or a comma ',' and negated with an
+exclamation mark '!'. The plus signifies that both mappings must be active to
+trigger the input and the comma means that just one needs to be active. The
+exclamation mark means that a mapping must not be active.
+
+Of the above the comma is the most useful. It allows the mapping of several
+different control methods to a single input. For example, both a keyboard and
+a joystick could be mapped to the same input. When combining mappings in this
+way, the ordering is important as mappings earlier in the list will take
+precedence over later ones (see example 3 below).
+
+When an axis is mapped to a digital input, its direction must be qualified with
+a _POS or _NEG after the axis name. For example, JOY1_XAXIS_NEG indicates that
+joystick 1 must be pushed left (negative direction) in order to activate the
+input. Additionally, the following shortcuts are provided for some common
+joystick axis directions:
+
+ JOY1_LEFT is the same as JOY1_XAXIS_NEG
+ JOY1_RIGHT is the same as JOY1_XAXIS_POS
+ JOY1_UP is the same as JOY1_YAXIS_NEG
+ JOY1_DOWN is the same as JOY1_YAXIS_POS
+
+Another axis manipulator is _INV. This inverts an axis when it is mapped to an
+analog input. JOY1_YAXIS_INV could be used for example to invert the y-axis
+of joystick 1 in Star Wars Trilogy so that it acts like a plane's yoke.
+
+Examples:
+
+ 1. InputLeft = "KEY_LEFT,JOY1_LEFT"
+
+ Digital input InputLeft will be triggered whenever the left arrow key
+ is pressed or joystick 1 is pushed left.
+
+ 2. InputStart1 = "KEY_ALT+KEY_S"
+
+ Both Alt and S must be pressed at the same time in order to trigger the
+ digital input InputStart1 (player 1 Start button).
+
+ 3. InputSteering = "JOY1_XAXIS,MOUSE_XAXIS"
+
+ Analog steering can be controlled with either the joystick or by moving
+ the mouse. Due to the ordering used, the joystick will take preference
+ and so the mouse can only control the steering when the joystick is
+ released.
+
+The complete list of input mappings can be found in the settings index below or
+by generating a configuration file using '-config-inputs'.
+
+
+Controller Settings
+-------------------
+
+Several settings are available to fine tune the way Supermodel handles
+controllers.
+
+
+Keyboard Settings:
+
+The rate at which analog controls' values increase or decrease when controlled
+by a key can be set with the InputyKeySensitivity option. It takes a value in
+the range 1-100, with 100 being the most sensitive (fastest response) and 1
+being the least sensitive (slowest response). The default value is 25.
+
+The speed with which analog controls return to their rest or 'off' values after
+a key has been released is configured with InputKeyDecaySpeed. This takes a
+value in the range 1-200 and is expressed as a percentage of the attack speed.
+The default setting is 50, which means that analog controls take twice as long
+to return to their off values as they do to reach their maximum and minimum
+values.
+
+
+Mouse Settings:
+
+For a mouse it is possible to specify a rectangular area in the center of
+Supermodel's display within which the mouse is considered to be inactive. The
+width and height of this zone is set with the options 'InputMouseXDeadZone' and
+'InputMouseYDeadZone'. They are expressed as a percentage 0-99 of the width
+and height of the display. The default value is 0 which disables this option.
+
+
+Joystick Options:
+
+Each joystick axis has a set of parameters that can be configured and these are
+given below. The joystick number and axis name (X, Y, Z, RX, RY, or RZ) must
+be substituted in for '**' like so: InputJoy1XDeadZone. If the joystick number
+is omitted, then the option becomes the default for all joysticks, eg.
+InputJoyYSaturation.
+
+InputJoy**Deadzone: The dead zone of a joystick axis is the size of the zone
+around its central or 'off' position within which the axis is considered to be
+inactive. It is important to specify this since joysticks rarely return to
+their perfect center when released. The dead zone is expressed as a percentage
+0-99 of the total range of the axis and the default value is 2%.
+
+InputJoy**Saturation: The saturation of a joystick axis is the point at which
+the axis is considered to be at its most extreme position. It can be thought
+of as a measure of the sensivity of the axis. Like the dead zone, it is
+expressed as a percentage of the axis range but its value may be larger than
+100, up to a maximum of 200. A value of 50 means that the joystick only needs
+to be moved halfway in order for Supermodel to see it as fully extended.
+Conversely a value of 200 means that when the joystick is at its extreme
+position Supermodel will see it as only halfway. The default sensitivity is
+100%, which corresponds to a 1-to-1 mapping. For playing driving games with a
+game pad, it is sometimes a good idea to use a value larger than 100% so that
+the steering feels less sensitive on a thumbstick.
+
+InputJoy**MinVal, InputJoy**OffVal, InputJoy**MaxVal: Normally a joystick axis
+will send values to Supermodel that fall within the range -32768 to +32767,
+with 0 representing the central or 'off' position. However, in some cases an
+axis may behave differently. This has been observed with certain steering
+wheels that have their pedals configured in a 'split axis' mode. The pedals
+invert their range so that they send -32768 when released and +32767 when fully
+depressed. In order for Supermodel to be able to handle such cases the
+minimum, off, and maximum values of the axis can be specified with these three
+options. The default values are MinVal -32768, OffVal 0, and MaxVal 32767 but
+with the pedal example just given, they would need to be set to MinVal 32767,
+OffVal 32767, and MaxVal -32768.
+
+In most cases it will be unecessary to alter the DeadZone, MinVal, OffVal, and
+MaxVal options by hand as calibrating a joystick axis from within the input
+configuration screens of Supermodel will set them automatically. Only the
+sensitivity option is not configured in this way.
+
+
+Additional Options:
+
+InputAutoTrigger, InputAutoTrigger2: When playing light gun games such as 'The
+Lost World', the gun must be pointed off-screen and then fired in order to
+reload. With a mouse and the default mappings, this requires clicking both the
+right and left mouse buttons. In order to be able to reload the gun with just
+a single click of the right mouse button, enable these options for players 1
+and 2 by setting them to 1. By default they are disabled (value 0).
+
+Enabling these options is also recommended when playing with PC light guns as
+these often map the action "point off screen and press trigger" to a single
+right mouse button click. Supermodel has been tested successfully with
+UltiMarc's AimTrak light-guns. In order to use dual PC light-guns for two
+player games, the Raw Input system must be selected with the command line
+option '-input-system=rawinput' and the input mappings configured for each gun.
+
+
+=====================================
+ 12. Index of Command Line Options
+=====================================
+
+All valid command line settings are listed here, ordered by category. Defaults
+are given under the assumption that they have not been changed in the
+configuration file.
+
+Square brackets ('[' and ']') indicate optional parameters. Angled brackets
+('<' and '>') indicate mandatory parameters. Do not type the brackets. No
+spaces may appear inside of an option. For example, 'supermodel game.zip
+-ppc-frequency=25' is correct but 'supermodel game.zip -ppc-frequency = 25' is
+not. All options are case sensitive.
+
+
+ Option: -?
+ -h
+
+ Description: Prints a message with an overview of the command line
+ options and how to run Supermodel.
+
+ ----------------
+
+ Option: -print-games
+
+ Description: Lists all supported ROM sets. Not all supported ROM sets
+ are playable yet.
+
+ ----------------
+
+ Option: -no-threads
+
+ Description: Disables multi-threading. When enabled (the default), the
+ PowerPC, graphics rendering, and user interface are run in
+ one thread, sound emulation in a second thread, and the
+ drive board in a third. It is enabled by default. On
+ single-core systems, multi-threading adds overhead and
+ slows Supermodel down but can make audio sound a bit
+ smoother.
+
+ ----------------
+
+ Option: -ppc-frequency=
+
+ Description: Sets the PowerPC frequency in MHz. The default is 50.
+ Higher frequencies will allow games to do more processing
+ per frame, making them run faster in 'virtual' time, but
+ may slow down Supermodel on weaker computers. Supermodel's
+ performance can frequently be improved by lowering the
+ PowerPC frequency (25 MHz works in many games). In some
+ games, this will cause timing problems and jerky
+ performance. The optimum frequency will vary from game to
+ game and system to system. Valid values for are 1 to
+ 1000.
+
+ ----------------
+
+ Option: -fullscreen
+
+ Description: Runs in full screen mode. The default is to run in a
+ window.
+
+ ----------------
+
+ Option: -no-throttle
+
+ Description: Disables 60 FPS throttling. The Model 3 runs at a 60 Hz
+ refresh rate, which Supermodel enforces if this option is
+ omitted. Unthrottled operation may not work on some
+ systems because graphics drivers may lock the refresh rate
+ on their own.
+
+ ----------------
+
+ Option: -print-gl-info
+
+ Description: Prints OpenGL driver information and quits.
+
+ ----------------
+
+ Option: -res=,
+
+ Description: Resolution of the display in pixels, with being width
+ and being height. The default is 496x384, the Model
+ 3's native resolution.
+
+ ----------------
+
+ Option: -show-fps
+
+ Description: Shows the frame rate in the window title bar.
+
+ ----------------
+
+ Option: -frag-shader=
+ -vert-shader=
+
+ Description: Allows external fragment and vertex shaders to be used for
+ 3D rendering. is the file path. Files should be
+ ASCII text files containing GLSL source code. The file
+ extension is not important. By default, Supermodel's
+ internal shader programs are used. These options are
+ intended for future extensibility and for use by
+ developers.
+
+ ----------------
+
+ Option: -flip-stereo
+
+ Description: Swaps the left and right audio channels.
+
+ ----------------
+
+ Option: -no-dsb
+
+ Description: Disables Digital Sound Board (MPEG music) emulation. See
+ the section on audio settings for more information.
+
+ ----------------
+
+ Option: -no-sound
+
+ Description: Disables sound board (sound effects) emulation. See the
+ section on audio settings for more information.
+
+ ----------------
+
+ Option: -music-volume=
+ -sound-volume=
+
+ Description: Specifies the volume of MPEG music produced by the Digital
+ Sound Board and the audio produced by the sound board in
+ percent. The default is 100, which is full volume, and the
+ valid range of is 0 (muted) to 200. See the section on
+ audio settings for more information.
+
+ ----------------
+
+ Option: -config-inputs
+
+ Description: Launches the interacive input configuration utility in the
+ command prompt window. Allows controls to be remapped.
+ See the section on controls for more information.
+
+ ----------------
+
+ Option: -force-feedback
+
+ Description: Enables force feedback. Force feedback is only supported
+ in a few games (see the section on force feedback for more
+ details). Available only on Windows.
+
+ ----------------
+
+ Option: -input-system=
+
+ Description: Sets the input system. This is only available on Windows,
+ where the default is 'dinput' (DirectInput). SDL is used
+ for all other platforms. Valid choices for are:
+
+ dinput DirectInput.
+ xinput XInput
+ rawinput Raw Input.
+ sdl SDL.
+
+ See the section on input systems for more details.
+
+ ----------------
+
+ Option: -print-inputs
+
+ Description: Prints the current input configuration.
+
+
+============================================
+ 13. Index of Configuration File Settings
+============================================
+
+All valid configuration file settings are listed here, ordered by category.
+Please read the section describing the configuration file for more information.
+
+All settings are case sensitive.
+
+
+ Name: MultiThreaded
+
+ Argument: Integer.
+
+ Description: If set to 1, enables multi-threading; if set to 0, runs all
+ emulation in a single thread. Read the description of the
+ '-no-threads' command line option for more information.
+
+ ----------------
+
+ Name: PowerPCFrequency
+
+ Argument: Integer.
+
+ Description: The PowerPC frequency in MHz. The default is 50.
+ Equivalent to the '-ppc-frequency' command line option.
+
+ ----------------
+
+ Name: FullScreen
+
+ Argument: Integer.
+
+ Description: If set to 1, runs in full screen mode; if set to 0, runs in
+ a window. Disabled by default. Equivalent to the
+ '-fullscreen' command line option.
+
+ ----------------
+
+ Name: ShowFrameRate
+
+ Argument: Integer.
+
+ Description: Shows the frame rate in the window title bar when set to 1.
+ If set to 0, the frame rate is not computed. Disabled by
+ default. Equivalent to the '-show-fps' command line
+ option.
+
+ ----------------
+
+ Name: Throttle
+
+ Argument: Integer.
+
+ Description: Controls 60 FPS throttling. It is enabled by setting to 1
+ and disabled by setting to 0. For more information, read
+ the description of the '-no-throttle' command line option.
+
+ ----------------
+
+ Name: XResolution
+ YResolution
+
+ Argument: Integer.
+
+ Description: Resolution of the display in pixels. The default is
+ 496x384, the Model 3's native resolution. Equivalent to
+ the '-res' command line option.
+
+ ----------------
+
+ Name: FragmentShader
+ VertexShader
+
+ Argument: String.
+
+ Description: Path to the external fragment or vertex shader file to use
+ for 3D rendering. By default, these are not set and the
+ internal default shaders are used. These are equivalent to
+ the '-frag-shader' and '-vert-shader' command line options.
+
+ ----------------
+
+ Name: EmulateDSB
+
+ Argument: Integer.
+
+ Description: Emulates the Digital Sound Board if set to 1, disables it
+ if set to 0. See the section on audio settings for more
+ information. A setting of 0 is equivalent to the
+ '-no-dsb' command line option.
+
+ ----------------
+
+ Name: EmulateSound
+
+ Argument: Integer.
+
+ Description: Emulates the sound board and its two Sega Custom Sound
+ Processors if set to 1, disables it if set to 0. See the
+ section on audio settings for more information. A setting
+ of 0 is equivalent to the '-no-sound' command line option.
+
+ ----------------
+
+ Name: FlipStereo
+
+ Argument: Integer.
+
+ Description: Swaps the left and right stereo channels if set to 1. If
+ set to 0, outputs the channels normally. Disabled by
+ default. A setting of 1 is equivalent to using the
+ '-flip-stereo' command line option.
+
+ ----------------
+
+ Name: MusicVolume
+ SoundVolume
+
+ Argument: Integer.
+
+ Description: Specifies the volume of MPEG music produced by the Digital
+ Sound Board and the audio produced by the sound board in
+ percent. The default is 100, which is full volume, and the
+ valid range is 0 (muted) to 200%. See the section on audio
+ settings for more information. The equivalent command line
+ options are '-music-volume' and '-sound-volume'.
+
+ ----------------
+
+ Name: ForceFeedback
+
+ Argument: Integer.
+
+ Description: If set to 1, enables force feedback emulation; if set to 0,
+ disables it (the default behavior). Equivalent to the
+ '-force-feedback' command line option. Available only on
+ Windows.
+
+ ----------------
+
+ Name: DirectInputConstForceMax
+ DirectInputFrictionMax
+ DirectInputSelfCenterMax
+ DirectInputVibrateMax
+
+ Argument: Integer value.
+
+ Description: Sets strength of the four DirectInput force feedback
+ effects in percent. Default is 100, indicating full
+ strength. Values exceeding 100% will distort the effects.
+ Available only on Windows.
+
+ ----------------
+
+ Name: XInputConstForceMax
+ XInputVibrateMax
+
+ Argument: Integer value.
+
+ Description: Sets strength of XInput force feedback effects in percent.
+ Default is 100, indicating full strength. Values exceeding
+ 100% will distort the effects. The constant force effect
+ is simulated using vibration. Available only on Windows.
+
+ ----------------
+
+ Name: XInputConstForceThreshold
+
+ Argument: Integer value.
+
+ Description: Minimum strength above which a Model 3 constant force
+ command will be simulated on an XInput device.
+ XInputConstForceMax determines the vibration strength for
+ this effect. The default value is 30. Available only on
+ Windows.
+
+ ----------------
+
+ Names: InputStart1
+ InputStart2
+ InputCoin1
+ InputCoin2
+ InputServiceA
+ InputServiceB
+ InputTestA
+ InputTestB
+
+ Argument: String.
+
+ Description: Mappings for common inputs: player 1 and 2 Start buttons,
+ both coin slots, and both Service and Test buttons. Can
+ only be set in the 'Global' section.
+
+ ----------------
+
+ Names: InputJoyDown
+ InputJoyDown2
+ InputJoyLeft
+ InputJoyLeft2
+ InputJoyRight
+ InputJoyRight2
+ InputJoyUp
+ InputJoyUp2
+
+ Argument: String.
+
+ Description: Mappings for 4-way digital joysticks (players 1 and 2).
+ These controls appear in 'Virtua Fighter 3', 'Fighting
+ Vipers 2', 'Spikeout', etc. Can only be set in the
+ 'Global' section.
+
+ ----------------
+
+ Names: InputEscape
+ InputEscape2
+ InputGuard
+ InputGuard2
+ InputKick
+ InputKick2
+ InputPunch
+ InputPunch2
+
+ Argument: String.
+
+ Description: Mappings for fighting game buttons (players 1 and 2). Can
+ only be set in the 'Global' section.
+
+ ----------------
+
+ Names: InputBeat
+ InputCharge
+ InputJump
+ InputShift
+
+ Argument: String.
+
+ Description: Mappings for 'Spikeout' and 'Spikeout Final Edition'
+ buttons. Can only be set in the 'Global' section.
+
+ ----------------
+
+ Name: InputLongPass
+ InputLongPass2
+ InputShortPass
+ InputShortPass2
+ InputShoot
+ InputShoot2
+
+ Argument: String.
+
+ Description: Mappings for the 'Virtua Striker 2' series of games
+ (players 1 and 2). Can only be set in the 'Global'
+ section.
+
+ ----------------
+
+ Name: InputSteering
+
+ Argument: String.
+
+ Description: Mapping for the analog steering wheel axis, used in all
+ driving games. Can only be set in the 'Global' section.
+
+ ----------------
+
+ Name: InputSteeringLeft
+ InputSteeringRight
+
+ Argument: String.
+
+ Description: Mappings for digital control of the steering wheel,
+ intended for users who do not have an analog controller.
+ Can only be set in the 'Global' section.
+
+ ----------------
+
+ Name: InputBrake
+ InputAccelerator
+
+ Argument: String.
+
+ Description: Mappings for brake and accelerator pedals used in driving
+ games. These are analog axes but can also be mapped to
+ digital inputs if needed. Can only be set in the 'Global'
+ section.
+
+ ----------------
+
+ Name: InputGearShift1
+ InputGearShift2
+ InputGearShift3
+ InputGearShift4
+ InputGearShiftN
+
+ Argument: String.
+
+ Description: Mappings for the gear box used in driving games. In games
+ with only two gears (e.g. 'Le Mans 24'), InputGearShift1
+ maps to 'Up' and InputGearShift2 to 'Down'. A neutral
+ position can also be selected. Can only be set in the
+ 'Global' section.
+
+ ----------------
+
+ Name: InputGearShiftDown
+ InputGearShiftUp
+
+ Argument: String.
+
+ Description: Mappings for sequential shifting. These allow gears to be
+ selected sequentially: N, 1, 2, 3, 4. Can only be set in
+ the 'Global' section.
+
+ ----------------
+
+ Name: InputVR1
+ InputVR2
+ InputVR3
+ InputVR4
+
+ Argument: String.
+
+ Description: Mappings for the 'VR' (color-coded view select) buttons in
+ racing games (e.g. 'Scud Race', 'Daytona USA 2', etc.) Can
+ only be set in the 'Global' section.
+
+ ----------------
+
+ Name: InputViewChange
+
+ Argument: String.
+
+ Description: Mapping for the view change button used in 'Sega Rally 2',
+ 'Dirt Devils', and 'Emergency Car Ambulance'. Can only be
+ set in the 'Global' section.
+
+ ----------------
+
+ Name: InputHandBrake
+
+ Argument: String.
+
+ Description: Mapping for the hand brake button used in 'Sega Rally 2'.
+ Can only be set in the 'Global' section.
+
+ ----------------
+
+ Name: InputTwinJoyCrouch
+ InputTwinJoyForward
+ InputTwinJoyJump
+ InputTwinJoyReverse
+ InputTwinJoyStrafeLeft
+ InputTwinJoyStrafeRight
+ InputTwinJoyTurnLeft
+ InputTwinJoyTurnRight
+
+ Argument: String.
+
+ Description: Mappings for 'macro' commands for 'Virtual On Oratorio
+ Tangram'. These allow movements to be mapped to single
+ digital inputs and do not require the use of two joysticks.
+ Can only be set in the 'Global' section.
+
+ ----------------
+
+ Name: InputTwinJoyDown1
+ InputTwinJoyDown2
+ InputTwinJoyLeft1
+ InputTwinJoyLeft2
+ InputTwinJoyRight1
+ InputTwinJoyRight2
+ InputTwinJoyUp1
+ InputTwinJoyUp2
+
+ Argument: String.
+
+ Description: Mappings for the individual joysticks used by 'Virtual On
+ Oratorio Tangram'. The left stick is stick #1 and the
+ right stick is #2. Can only be set in the 'Global'
+ section.
+
+ ----------------
+
+ Name: InputTwinJoyShot1
+ InputTwinJoyShot2
+ InputTwinJoyTurbo1
+ InputTwinJoyTurbo2
+
+ Argument: String.
+
+ Description: Mappings for the shot (trigger) and turbo buttons located
+ on the left (1) and right (2) joysticks in 'Virtual On
+ Oratorio Tangram'. Can only be set in the 'Global'
+ section.
+
+ ----------------
+
+ Name: InputAnalogJoyDown
+ InputAnalogJoyLeft
+ InputAnalogJoyRight
+ InputAnalogJoyUp
+
+ Argument: String.
+
+ Description: Mappings for digital control of the analog joystick used in
+ 'Star Wars Trilogy'. Two inputs are provided for the two
+ directions available on each axis. Can only be set in the
+ 'Global' section.
+
+ ----------------
+
+ Name: InputAnalogJoyX
+ InputAnalogJoyY
+
+ Argument: String.
+
+ Description: Mappings for X and Y axes of the analog joystick in 'Star
+ Wars Trilogy'. Can only be set in the 'Global' section.
+
+ ----------------
+
+ Name: InputAnalogJoyTrigger
+ InputAnalogJoyEvent
+
+ Argument: String.
+
+ Description: Mappings for the trigger and Event button in 'Star Wars
+ Trilogy'. Can only be set in the 'Global' section.
+
+ ----------------
+
+ Name: InputGunDown
+ InputGunDown2
+ InputGunLeft
+ InputGunLeft2
+ InputGunRight
+ InputGunRight2
+ InputGunUp
+ InputGunUp2
+
+ Argument: String.
+
+ Description: Mappings for digital control of the light guns in 'The Lost
+ World'. Inputs for motion in each direction are provided.
+ Can only be set in the 'Global' section.
+
+ ----------------
+
+ Name: InputGunX
+ InputGunX2
+ InputGunY
+ InputGunY2
+
+ Argument: String.
+
+ Description: Mappings for both analog axes of the light guns in 'The
+ Lost World'. Can only be set in the 'Global' section.
+
+ ----------------
+
+ Name: InputOffscreen
+ InputOffscreen2
+ InputTrigger
+ InputTrigger2
+
+ Argument: String.
+
+ Description: Mappings for the light gun triggers and off-screen
+ controls in 'The Lost World'. The off-screen button aims
+ the light gun off-screen while it is pressed, which makes
+ re-loading possible. Can only be set in the 'Global'
+ section.
+
+ ----------------
+
+ Name: InputAutoTrigger
+ InputAutoTrigger2
+
+ Argument: Integer.
+
+ Description: When set to 1, the off-screen button will also
+ automatically reload (no need to pull the trigger). Can
+ only be set in the 'Global' section.
+
+ ----------------
+
+ Name: InputKeySensitivity
+
+ Argument: Integer.
+
+ Description: The rate at which analog control values increase/decrease
+ when controlled by a key. Valid range is 1-100, with 1
+ being the least sensitive (slowest response). The default
+ is 25. Can only be set in the 'Global' section.
+
+ ----------------
+
+ Name: InputKeyDecaySpeed
+
+ Argument: Integer.
+
+ Description: The rate at which analog control values return to their
+ rest or 'off' position after a key has been released. The
+ value is expressed as a percentage of the attack speed,
+ ranging from 1-200. The default is 50, meaning analog
+ controls take twice as long to return to their rest state
+ as they do to reach their minimum/maximum values. Can only
+ be set in the 'Global' section.
+
+ ----------------
+
+ Name: InputMouseXDeadZone
+ InputMouseYDeadZone
+
+ Argument: Integer.
+
+ Description: Specifies a rectangular region in the center of the display
+ within which the mouse is considered inactive. Expressed
+ as percentages, from 0-99, of the width and height of the
+ display. The default values are 0, which disable this
+ option. Can only be set in the 'Global' section.
+
+ ----------------
+
+ Name: InputJoy**DeadZone
+
+ Argument: Integer.
+
+ Description: '**' must be the joystick number and axis (eg. '1X', '2RZ',
+ etc.). If the joystick number is omitted, the setting will
+ apply to all joysticks. Specifies the dead zone as a
+ percentage, 0-99, of the total range of the axis. Within
+ the dead zone, the joystick is inactive. This is useful
+ for joysticks that are 'noisy' when at rest. Can only be
+ set in the 'Global' section.
+
+ ----------------
+
+ Name: InputJoy**Saturation
+
+ Argument: Integer.
+
+ Description: '**' must be the joystick number and axis (eg. '1X', '2RZ',
+ etc.). If the joystick number is omitted, the setting will
+ apply to all joysticks. Specifies the saturation, the
+ position at which the joystick is interpreted as being in
+ its most extreme position, as a percentage of the total
+ range of the axis, from 0-200. Values exceeding 100% mean
+ the axis will not use its full range. A value of 200 means
+ that the range will be halved (fully pressed will only
+ register as 50%). The default is 100, a 1-to-1 mapping.
+ Can only be set in the 'Global' section.
+
+ ----------------
+
+ Name: InputJoy**MinVal
+ InputJoy**MaxVal
+ InputJoy**OffVal
+
+ Argument: Integer.
+
+ Description: '**' must be the joystick number and axis (eg. '1X', '2RZ',
+ etc.). If the joystick number is omitted, the setting will
+ apply to all joysticks. Specifies the maximum, minimum, or
+ offset value of an axis. The range is -32768 to 32768. By
+ default, MinVal is -32768, OffVal is 0, and MaxVal is
+ 32767. Can only be set in the 'Global' section.
+
+
+=================================
+ 14. Compiling the Source Code
+=================================
+
+First, ensure that OpenGL, SDL (http://www.libsdl.org), and zlib
+(http://zlib.net) are installed. GLEW (http://glew.sourceforge.net) is
+included in the source tree and does not need to be installed separately.
+
+Next, extract the Supermodel source code and copy the appropriate Makefile
+from the Makefiles/ directory to the base directory (that is, the one above
+Src/ and Makefiles/). Makefiles for 32-bit Windows (Microsoft Visual C++
+2008), Linux/UNIX (GCC), and Mac OS X (GCC) are provided, all requiring GNU
+Make. For Windows developers, MinGW (http://www.mingw.org) provides GNU Make.
+Alternatively, you can write a Makefile compatible with Microsoft Nmake and
+submit it for inclusion in the next release. ;) Consult the Visual Studio
+documentation to learn how to configure the Microsoft compiler for command line
+operation.
+
+Edit SDL_LIBPATH and SDL_INCLUDEPATH to reflect the location of the SDL
+development library and header files. This should only be necessary for
+Windows. The UNIX and Mac OS X Makefiles should be able to automatically
+locate SDL if it was installed properly.
+
+On Windows, Supermodel is compiled with the multi-threaded, static version of
+the run-time library (/MT option). However, the SDL and zlib development
+libraries, and the SDL run-time DLL, are distributed for use with the dynamic
+run-time (/MD option). They must all be recompiled using /MT to work with
+Supermodel. Alternatively, Supermodel's Makefile can be edited to use the /MD
+option.
+
+When everything is ready, rename the appropriate Makefile to 'Makefile' and run
+'make'. If all goes well it should produce a Supermodel binary.
+
+
+===========================
+ 15. Contact Information
+===========================
+
+The official Supermodel web site is:
+
+ http://www.Supermodel3.com
+
+Questions? Comments? Contributions? Your feedback is welcome! A discussion
+forum is available at the web site and the primary author, Bart Trzynadlowski,
+can be reached by email at:
+
+ supermodel.emu@gmail.com
+
+We ask that you remain mindful of the following courtesies:
+
+ - Do NOT ask about ROMs.
+ - Do NOT request features.
+ - Do NOT ask about release dates of future versions.
+
+
+=======================
+ 16. Acknowledgments
+=======================
+
+Numerous people contributed their precious time and energy to this project.
+Without them, Supermodel would not have been possible. In no particular order,
+we would like to thank:
+
+ - Ville Linde, original Supermodel team member and MAMEDev extraordinaire
+ - Stefano Teso, original Supermodel team member
+ - ElSemi, for all sorts of technical information and insight
+ - R. Belmont, for DSB code and modified Amp library from his music player,
+ M1, and the Mac OS X port
+ - Naibo Zhang, for his work on Model 3 graphics
+ - krom, for adding in the remaining ROM sets
+ - Andrew Lewis (a.k.a. Andy Geezer), for dumping the drive board ROMs and
+ providing region codes
+ - The Guru, for his efforts in dumping Model 3 ROM sets
+ - Abelardo Vidal Martos, for providing extremely useful video recordings of
+ actual Model 3 games
+ - Andrew Gardner, for fruitful discussion
+ - Chad Reker, Alex Corrigan, pcvideogamer, and Groni, for being especially
+ thorough play-testers
+ - Charles MacDonald, for his helpful description of the System 24 tile
+ generator
+
+Supermodel includes code from the following projects:
+
+ - zlib: http://zlib.net
+ - minizip: http://www.winimage.com/zLibDll/minizip.html
+ - YAZE-AG: http://www.mathematik.uni-ulm.de/users/ag/yaze/
+ - Amp by Tomislav Uzalec
+ - The OpenGL Extension Wrangler Library (GLEW):
+ http://glew.sourceforge.net
+
+The OpenGL Extension Wrangler Library
+Copyright (C) 2002-2008, Milan Ikits
+Copyright (C) 2002-2008, Marcelo E. Magallon
+Copyright (C) 2002, Lev Povalahev
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+* The name of the author may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/Libraries/DIR.txt b/Libraries/DIR.txt
new file mode 100644
index 0000000..2374ea9
--- /dev/null
+++ b/Libraries/DIR.txt
@@ -0,0 +1 @@
+Source code for Third-party libraries needs to be placed in here.
diff --git a/Makefile b/Makefile
new file mode 100644
index 0000000..1aabf03
--- /dev/null
+++ b/Makefile
@@ -0,0 +1,662 @@
+DEBUG=0
+PSS_STYLE=1
+EXTERNAL_ZLIB=0
+HAVE_GRIFFIN=1
+STATIC_LINKING=0
+ENDIANNESS_DEFINES=
+
+SPACE :=
+SPACE := $(SPACE) $(SPACE)
+BACKSLASH :=
+BACKSLASH := \$(BACKSLASH)
+filter_out1 = $(filter-out $(firstword $1),$1)
+filter_out2 = $(call filter_out1,$(call filter_out1,$1))
+unixpath = $(subst \,/,$1)
+unixcygpath = /$(subst :,,$(call unixpath,$1))
+
+ifeq ($(platform),)
+ platform = unix
+ ifeq ($(shell uname -a),)
+ platform = win
+ else ifneq ($(findstring MINGW,$(shell uname -a)),)
+ platform = win
+ else ifneq ($(findstring Darwin,$(shell uname -a)),)
+ platform = osx
+ arch = intel
+ ifeq ($(shell uname -p),powerpc)
+ arch = ppc
+ endif
+ else ifneq ($(findstring win,$(shell uname -a)),)
+ platform = win
+ endif
+endif
+
+# system platform
+system_platform = unix
+ifeq ($(shell uname -a),)
+ EXE_EXT = .exe
+ system_platform = win
+else ifneq ($(findstring Darwin,$(shell uname -a)),)
+ system_platform = osx
+ arch = intel
+ ifeq ($(shell uname -p),powerpc)
+ arch = ppc
+ endif
+else ifneq ($(findstring MINGW,$(shell uname -a)),)
+ system_platform = win
+endif
+
+# Replace 'sample' with the name of the core
+TARGET_NAME := sample
+GIT_VERSION := " $(shell git rev-parse --short HEAD || echo unknown)"
+ifneq ($(GIT_VERSION)," unknown")
+ CFLAGS += -DGIT_VERSION=\"$(GIT_VERSION)\"
+ CXXFLAGS += -DGIT_VERSION=\"$(GIT_VERSION)\"
+endif
+
+ifneq (,$(findstring msvc,$(platform)))
+LIBM :=
+else
+LIBM := -lm
+endif
+LIBS :=
+
+CORE_DIR := .
+
+# Unix
+ifeq ($(platform), unix)
+ TARGET := $(TARGET_NAME)_libretro.so
+ fpic := -fPIC
+ifneq ($(findstring SunOS,$(shell uname -a)),)
+ CC = gcc
+ SHARED := -shared -z defs
+else
+ SHARED := -shared -Wl,--version-script=$(CORE_DIR)/link.T -Wl,-no-undefined
+endif
+
+else ifeq ($(platform), linux-portable)
+ TARGET := $(TARGET_NAME)_libretro.so
+ fpic := -fPIC -nostdlib
+ SHARED := -shared -Wl,--version-script=$(CORE_DIR)/link.T
+ LIBM :=
+# OS X
+else ifeq ($(platform), osx)
+ TARGET := $(TARGET_NAME)_libretro.dylib
+ fpic := -fPIC
+ SHARED := -dynamiclib
+ ifeq ($(arch),ppc)
+ ENDIANNESS_DEFINES += -DMSB_FIRST
+ endif
+ OSXVER = `sw_vers -productVersion | cut -d. -f 2`
+ OSX_LT_MAVERICKS = `(( $(OSXVER) <= 9)) && echo "YES"`
+ fpic += -mmacosx-version-min=10.1
+ ifndef ($(NOUNIVERSAL))
+ CFLAGS += $(ARCHFLAGS)
+ CXXFLAGS += $(ARCHFLAGS)
+ LDFLAGS += $(ARCHFLAGS)
+ endif
+
+# iOS
+else ifneq (,$(findstring ios,$(platform)))
+
+ TARGET := $(TARGET_NAME)_libretro_ios.dylib
+ fpic := -fPIC
+ SHARED := -dynamiclib
+ ifeq ($(IOSSDK),)
+ IOSSDK := $(shell xcodebuild -version -sdk iphoneos Path)
+ endif
+ ifeq ($(platform),ios-arm64)
+ CC = cc -arch arm64 -isysroot $(IOSSDK)
+ else
+ CC = cc -arch armv7 -isysroot $(IOSSDK)
+ endif
+ CFLAGS += -DIOS
+ CXXFLAGS += -DIOS
+ifeq ($(platform),$(filter $(platform),ios9 ios-arm64))
+ CC += -miphoneos-version-min=8.0
+ CFLAGS += -miphoneos-version-min=8.0
+ CXXFLAGS += -miphoneos-version-min=8.0
+else
+ CC += -miphoneos-version-min=5.0
+ CFLAGS += -miphoneos-version-min=5.0
+ CXXFLAGS += -miphoneos-version-min=5.0
+endif
+
+# Theos iOS
+else ifeq ($(platform), theos_ios)
+ DEPLOYMENT_IOSVERSION = 5.0
+ TARGET = iphone:latest:$(DEPLOYMENT_IOSVERSION)
+ ARCHS = armv7 armv7s
+ TARGET_IPHONEOS_DEPLOYMENT_VERSION=$(DEPLOYMENT_IOSVERSION)
+ THEOS_BUILD_DIR := objs
+ include $(THEOS)/makefiles/common.mk
+ LIBRARY_NAME = $(TARGET_NAME)_libretro_ios
+
+# QNX
+else ifeq ($(platform), qnx)
+ TARGET := $(TARGET_NAME)_libretro_qnx.so
+ fpic := -fPIC
+ SHARED := -shared -Wl,--version-script=$(CORE_DIR)/link.T -Wl,-no-undefined
+ CC = qcc -Vgcc_ntoarmv7le
+ AR = qcc -Vgcc_ntoarmv7le
+ PLATFORM_DEFINES := -D__BLACKBERRY_QNX__ -marm -mcpu=cortex-a9 -mfpu=neon -mfloat-abi=softfp
+
+# PS3
+else ifeq ($(platform), ps3)
+ TARGET := $(TARGET_NAME)_libretro_$(platform).a
+ CC = $(CELL_SDK)/host-win32/ppu/bin/ppu-lv2-gcc.exe
+ AR = $(CELL_SDK)/host-win32/ppu/bin/ppu-lv2-ar.exe
+ PLATFORM_DEFINES := -D__CELLOS_LV2
+ ENDIANNESS_DEFINES += -DMSB_FIRST
+ STATIC_LINKING=1
+ EXTERNAL_ZLIB=1
+
+# sncps3
+else ifeq ($(platform), sncps3)
+ TARGET := $(TARGET_NAME)_libretro_ps3.a
+ CC = $(CELL_SDK)/host-win32/sn/bin/ps3ppusnc.exe
+ AR = $(CELL_SDK)/host-win32/sn/bin/ps3snarl.exe
+ PLATFORM_DEFINES := -D__CELLOS_LV2
+ ENDIANNESS_DEFINES += -DMSB_FIRST
+ STATIC_LINKING=1
+ EXTERNAL_ZLIB=1
+
+# PSP
+else ifeq ($(platform), psp1)
+ TARGET := $(TARGET_NAME)_libretro_$(platform).a
+ CC = psp-gcc$(EXE_EXT)
+ AR = psp-ar$(EXE_EXT)
+ PLATFORM_DEFINES := -DPSP -G0
+ PLATFORM_DEFINES += -march=allegrex -mfp32 -mgp32 -mlong32 -mabi=eabi
+ PLATFORM_DEFINES += -fomit-frame-pointer -fstrict-aliasing
+ PLATFORM_DEFINES += -falign-functions=32 -falign-loops -falign-labels -falign-jumps
+ STATIC_LINKING=1
+ EXTERNAL_ZLIB=1
+
+# Vita
+else ifeq ($(platform), vita)
+ TARGET := $(TARGET_NAME)_libretro_$(platform).a
+ CC = arm-vita-eabi-gcc$(EXE_EXT)
+ AR = arm-vita-eabi-ar$(EXE_EXT)
+ PLATFORM_DEFINES := -DVITA
+ STATIC_LINKING=1
+ EXTERNAL_ZLIB=1
+
+# DOS
+else ifeq ($(platform), dos)
+ TARGET := $(TARGET_NAME)_libretro_$(platform).a
+ CC = i686-pc-msdosdjgpp-gcc
+ AR = i686-pc-msdosdjgpp-ar
+ CFLAGS += -march=i386
+ CXXFLAGS += -march=i386
+ STATIC_LINKING=1
+ EXTERNAL_ZLIB=1
+
+# CTR(3DS)
+else ifeq ($(platform), ctr)
+ TARGET := $(TARGET_NAME)_libretro_$(platform).a
+ CC = $(DEVKITARM)/bin/arm-none-eabi-gcc$(EXE_EXT)
+ AR = $(DEVKITARM)/bin/arm-none-eabi-ar$(EXE_EXT)
+ PLATFORM_DEFINES := -DARM11 -D_3DS
+ CFLAGS += -march=armv6k -mtune=mpcore -mfloat-abi=hard
+ CFLAGS += -Wall -mword-relocations
+ CFLAGS += -fomit-frame-pointer -fstrict-aliasing -ffast-math
+ CXXFLAGS += -march=armv6k -mtune=mpcore -mfloat-abi=hard
+ CXXFLAGS += -Wall -mword-relocations
+ CXXFLAGS += -fomit-frame-pointer -fstrict-aliasing -ffast-math
+ STATIC_LINKING=1
+ EXTERNAL_ZLIB=1
+
+# Raspberry Pi 1
+else ifeq ($(platform), rpi1)
+ TARGET := $(TARGET_NAME)_libretro.so
+ fpic := -fPIC
+ SHARED := -shared -Wl,--version-script=$(CORE_DIR)/link.T -Wl,-no-undefined
+ CFLAGS += -DARM11
+ CFLAGS += -marm -march=armv6j -mfpu=vfp -mfloat-abi=hard -funsafe-math-optimizations
+ CFLAGS += -fomit-frame-pointer -fstrict-aliasing -ffast-math
+ CXXFLAGS += -DARM11
+ CXXFLAGS += -marm -march=armv6j -mfpu=vfp -mfloat-abi=hard -funsafe-math-optimizations
+ CXXFLAGS += -fomit-frame-pointer -fstrict-aliasing -ffast-math
+
+# Raspberry Pi 2
+else ifeq ($(platform), rpi2)
+ TARGET := $(TARGET_NAME)_libretro.so
+ fpic := -fPIC
+ SHARED := -shared -Wl,--version-script=$(CORE_DIR)/link.T -Wl,-no-undefined
+ CFLAGS += -DARM
+ CFLAGS += -marm -mcpu=cortex-a7 -mfpu=neon-vfpv4 -mfloat-abi=hard -funsafe-math-optimizations
+ CFLAGS += -fomit-frame-pointer -fstrict-aliasing -ffast-math
+ CXXFLAGS += -DARM
+ CXXFLAGS += -marm -mcpu=cortex-a7 -mfpu=neon-vfpv4 -mfloat-abi=hard -funsafe-math-optimizations
+ CXXFLAGS += -fomit-frame-pointer -fstrict-aliasing -ffast-math
+
+# Lightweight PS3 Homebrew SDK
+else ifeq ($(platform), psl1ght)
+ TARGET := $(TARGET_NAME)_libretro_$(platform).a
+ CC = $(PS3DEV)/ppu/bin/ppu-gcc$(EXE_EXT)
+ AR = $(PS3DEV)/ppu/bin/ppu-ar$(EXE_EXT)
+ PLATFORM_DEFINES := -D__CELLOS_LV2
+ ENDIANNESS_DEFINES += -DMSB_FIRST
+ STATIC_LINKING=1
+ EXTERNAL_ZLIB=1
+
+# Xbox 360
+else ifeq ($(platform), xenon)
+ TARGET := $(TARGET_NAME)_libretro_xenon360.a
+ CC = xenon-gcc$(EXE_EXT)
+ AR = xenon-ar$(EXE_EXT)
+ PLATFORM_DEFINES := -D__LIBXENON__
+ ENDIANNESS_DEFINES += -DMSB_FIRST
+ STATIC_LINKING=1
+ EXTERNAL_ZLIB=1
+
+# Nintendo Game Cube
+else ifeq ($(platform), ngc)
+ TARGET := $(TARGET_NAME)_libretro_$(platform).a
+ CC = $(DEVKITPPC)/bin/powerpc-eabi-gcc$(EXE_EXT)
+ AR = $(DEVKITPPC)/bin/powerpc-eabi-ar$(EXE_EXT)
+ PLATFORM_DEFINES := -DGEKKO -DHW_DOL -mrvl -mcpu=750 -meabi -mhard-float
+ PLATFORM_DEFINES += -U__INT32_TYPE__ -U __UINT32_TYPE__ -D__INT32_TYPE__=int
+ ENDIANNESS_DEFINES += -DMSB_FIRST
+ STATIC_LINKING=1
+ EXTERNAL_ZLIB=1
+
+# Nintendo Wii
+else ifeq ($(platform), wii)
+ TARGET := $(TARGET_NAME)_libretro_$(platform).a
+ CC = $(DEVKITPPC)/bin/powerpc-eabi-gcc$(EXE_EXT)
+ AR = $(DEVKITPPC)/bin/powerpc-eabi-ar$(EXE_EXT)
+ PLATFORM_DEFINES := -DGEKKO -DHW_RVL -mrvl -mcpu=750 -meabi -mhard-float
+ PLATFORM_DEFINES += -U__INT32_TYPE__ -U __UINT32_TYPE__ -D__INT32_TYPE__=int
+ ENDIANNESS_DEFINES += -DMSB_FIRST
+ STATIC_LINKING=1
+ EXTERNAL_ZLIB=1
+
+# Nintendo WiiU
+else ifeq ($(platform), wiiu)
+ TARGET := $(TARGET_NAME)_libretro_$(platform).a
+ CC = $(DEVKITPPC)/bin/powerpc-eabi-gcc$(EXE_EXT)
+ AR = $(DEVKITPPC)/bin/powerpc-eabi-ar$(EXE_EXT)
+ PLATFORM_DEFINES := -DGEKKO -DHW_RVL -mwup -mcpu=750 -meabi -mhard-float
+ PLATFORM_DEFINES += -U__INT32_TYPE__ -U __UINT32_TYPE__ -D__INT32_TYPE__=int
+ ENDIANNESS_DEFINES += -DMSB_FIRST
+ STATIC_LINKING=1
+ EXTERNAL_ZLIB=1
+
+# Nintendo Switch (libtransistor)
+else ifeq ($(platform), switch)
+ EXT=a
+ TARGET := $(TARGET_NAME)_libretro_$(platform).$(EXT)
+ include $(LIBTRANSISTOR_HOME)/libtransistor.mk
+ STATIC_LINKING=1
+ EXTERNAL_ZLIB=1
+
+
+# ARM
+else ifneq (,$(findstring armv,$(platform)))
+ TARGET := $(TARGET_NAME)_libretro.so
+ SHARED := -shared -Wl,--version-script=$(CORE_DIR)/link.T -Wl,-no-undefined
+ fpic := -fPIC
+ ifneq (,$(findstring cortexa5,$(platform)))
+ PLATFORM_DEFINES += -marm -mcpu=cortex-a5
+ else ifneq (,$(findstring cortexa8,$(platform)))
+ PLATFORM_DEFINES += -marm -mcpu=cortex-a8
+ else ifneq (,$(findstring cortexa9,$(platform)))
+ PLATFORM_DEFINES += -marm -mcpu=cortex-a9
+ else ifneq (,$(findstring cortexa15a7,$(platform)))
+ PLATFORM_DEFINES += -marm -mcpu=cortex-a15.cortex-a7
+ else
+ PLATFORM_DEFINES += -marm
+ endif
+ ifneq (,$(findstring softfloat,$(platform)))
+ PLATFORM_DEFINES += -mfloat-abi=softfp
+ else ifneq (,$(findstring hardfloat,$(platform)))
+ PLATFORM_DEFINES += -mfloat-abi=hard
+ endif
+ PLATFORM_DEFINES += -DARM
+
+# emscripten
+else ifeq ($(platform), emscripten)
+ TARGET := $(TARGET_NAME)_libretro_$(platform).bc
+ STATIC_LINKING=1
+ EXTERNAL_ZLIB=1
+
+# GCW0
+else ifeq ($(platform), gcw0)
+ TARGET := $(TARGET_NAME)_libretro.so
+ CC = /opt/gcw0-toolchain/usr/bin/mipsel-linux-gcc
+ CXX = /opt/gcw0-toolchain/usr/bin/mipsel-linux-g++
+ AR = /opt/gcw0-toolchain/usr/bin/mipsel-linux-ar
+ fpic := -fPIC
+ SHARED := -shared -Wl,--version-script=$(CORE_DIR)/link.T -Wl,-no-undefined
+ PLATFORM_DEFINES += -ffast-math -march=mips32 -mtune=mips32r2 -mhard-float
+ EXTERNAL_ZLIB = 1
+
+# Windows MSVC 2017 all architectures
+else ifneq (,$(findstring windows_msvc2017,$(platform)))
+
+ PlatformSuffix = $(subst windows_msvc2017_,,$(platform))
+ ifneq (,$(findstring desktop,$(PlatformSuffix)))
+ WinPartition = desktop
+ MSVC2017CompileFlags = -DWINAPI_FAMILY=WINAPI_FAMILY_DESKTOP_APP -FS
+ LDFLAGS += -MANIFEST -LTCG:incremental -NXCOMPAT -DYNAMICBASE -DEBUG -OPT:REF -INCREMENTAL:NO -SUBSYSTEM:WINDOWS -MANIFESTUAC:"level='asInvoker' uiAccess='false'" -OPT:ICF -ERRORREPORT:PROMPT -NOLOGO -TLBID:1
+ LIBS += kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib
+ else ifneq (,$(findstring uwp,$(PlatformSuffix)))
+ WinPartition = uwp
+ MSVC2017CompileFlags = -DWINAPI_FAMILY=WINAPI_FAMILY_APP -DWINDLL -D_UNICODE -DUNICODE -DWRL_NO_DEFAULT_LIB -FS
+ LDFLAGS += -APPCONTAINER -NXCOMPAT -DYNAMICBASE -MANIFEST:NO -LTCG -OPT:REF -SUBSYSTEM:CONSOLE -MANIFESTUAC:NO -OPT:ICF -ERRORREPORT:PROMPT -NOLOGO -TLBID:1 -DEBUG:FULL -WINMD:NO
+ LIBS += WindowsApp.lib
+ endif
+
+ CFLAGS += $(MSVC2017CompileFlags)
+ CXXFLAGS += $(MSVC2017CompileFlags)
+
+ TargetArchMoniker = $(subst $(WinPartition)_,,$(PlatformSuffix))
+
+ CC = cl.exe
+ CXX = cl.exe
+ LD = link.exe
+
+ reg_query = $(call filter_out2,$(subst $2,,$(shell reg query "$2" -v "$1" 2>nul)))
+ fix_path = $(subst $(SPACE),\ ,$(subst \,/,$1))
+
+ ProgramFiles86w := $(shell cmd /c "echo %PROGRAMFILES(x86)%")
+ ProgramFiles86 := $(shell cygpath "$(ProgramFiles86w)")
+
+ WindowsSdkDir ?= $(call reg_query,InstallationFolder,HKEY_LOCAL_MACHINE\SOFTWARE\Wow6432Node\Microsoft\Microsoft SDKs\Windows\v10.0)
+ WindowsSdkDir ?= $(call reg_query,InstallationFolder,HKEY_CURRENT_USER\SOFTWARE\Wow6432Node\Microsoft\Microsoft SDKs\Windows\v10.0)
+ WindowsSdkDir ?= $(call reg_query,InstallationFolder,HKEY_LOCAL_MACHINE\SOFTWARE\Microsoft\Microsoft SDKs\Windows\v10.0)
+ WindowsSdkDir ?= $(call reg_query,InstallationFolder,HKEY_CURRENT_USER\SOFTWARE\Microsoft\Microsoft SDKs\Windows\v10.0)
+ WindowsSdkDir := $(WindowsSdkDir)
+
+ WindowsSDKVersion ?= $(firstword $(foreach folder,$(subst $(subst \,/,$(WindowsSdkDir)Include/),,$(wildcard $(call fix_path,$(WindowsSdkDir)Include\*))),$(if $(wildcard $(call fix_path,$(WindowsSdkDir)Include/$(folder)/um/Windows.h)),$(folder),)))$(BACKSLASH)
+ WindowsSDKVersion := $(WindowsSDKVersion)
+
+ VsInstallBuildTools = $(ProgramFiles86)/Microsoft Visual Studio/2017/BuildTools
+ VsInstallEnterprise = $(ProgramFiles86)/Microsoft Visual Studio/2017/Enterprise
+ VsInstallProfessional = $(ProgramFiles86)/Microsoft Visual Studio/2017/Professional
+ VsInstallCommunity = $(ProgramFiles86)/Microsoft Visual Studio/2017/Community
+
+ VsInstallRoot ?= $(shell if [ -d "$(VsInstallBuildTools)" ]; then echo "$(VsInstallBuildTools)"; fi)
+ ifeq ($(VsInstallRoot), )
+ VsInstallRoot = $(shell if [ -d "$(VsInstallEnterprise)" ]; then echo "$(VsInstallEnterprise)"; fi)
+ endif
+ ifeq ($(VsInstallRoot), )
+ VsInstallRoot = $(shell if [ -d "$(VsInstallProfessional)" ]; then echo "$(VsInstallProfessional)"; fi)
+ endif
+ ifeq ($(VsInstallRoot), )
+ VsInstallRoot = $(shell if [ -d "$(VsInstallCommunity)" ]; then echo "$(VsInstallCommunity)"; fi)
+ endif
+ VsInstallRoot := $(VsInstallRoot)
+
+ VcCompilerToolsVer := $(shell cat "$(VsInstallRoot)/VC/Auxiliary/Build/Microsoft.VCToolsVersion.default.txt" | grep -o '[0-9\.]*')
+ VcCompilerToolsDir := $(VsInstallRoot)/VC/Tools/MSVC/$(VcCompilerToolsVer)
+
+ WindowsSDKSharedIncludeDir := $(shell cygpath -w "$(WindowsSdkDir)\Include\$(WindowsSDKVersion)\shared")
+ WindowsSDKUCRTIncludeDir := $(shell cygpath -w "$(WindowsSdkDir)\Include\$(WindowsSDKVersion)\ucrt")
+ WindowsSDKUMIncludeDir := $(shell cygpath -w "$(WindowsSdkDir)\Include\$(WindowsSDKVersion)\um")
+ WindowsSDKUCRTLibDir := $(shell cygpath -w "$(WindowsSdkDir)\Lib\$(WindowsSDKVersion)\ucrt\$(TargetArchMoniker)")
+ WindowsSDKUMLibDir := $(shell cygpath -w "$(WindowsSdkDir)\Lib\$(WindowsSDKVersion)\um\$(TargetArchMoniker)")
+
+ # For some reason the HostX86 compiler doesn't like compiling for x64
+ # ("no such file" opening a shared library), and vice-versa.
+ # Work around it for now by using the strictly x86 compiler for x86, and x64 for x64.
+ # NOTE: What about ARM?
+ ifneq (,$(findstring x64,$(TargetArchMoniker)))
+ VCCompilerToolsBinDir := $(VcCompilerToolsDir)\bin\HostX64
+ else
+ VCCompilerToolsBinDir := $(VcCompilerToolsDir)\bin\HostX86
+ endif
+
+ PATH := $(shell IFS=$$'\n'; cygpath "$(VCCompilerToolsBinDir)/$(TargetArchMoniker)"):$(PATH)
+ PATH := $(PATH):$(shell IFS=$$'\n'; cygpath "$(VsInstallRoot)/Common7/IDE")
+ INCLUDE := $(shell IFS=$$'\n'; cygpath -w "$(VcCompilerToolsDir)/include")
+ LIB := $(shell IFS=$$'\n'; cygpath -w "$(VcCompilerToolsDir)/lib/$(TargetArchMoniker)")
+
+ export INCLUDE := $(INCLUDE);$(WindowsSDKSharedIncludeDir);$(WindowsSDKUCRTIncludeDir);$(WindowsSDKUMIncludeDir)
+ export LIB := $(LIB);$(WindowsSDKUCRTLibDir);$(WindowsSDKUMLibDir)
+ TARGET := $(TARGET_NAME)_libretro.dll
+ PSS_STYLE :=2
+ LDFLAGS += -DLL
+
+# Windows MSVC 2010 x64
+else ifeq ($(platform), windows_msvc2010_x64)
+ CC = cl.exe
+ CXX = cl.exe
+
+PATH := $(shell IFS=$$'\n'; cygpath "$(VS100COMNTOOLS)../../VC/bin/amd64"):$(PATH)
+PATH := $(PATH):$(shell IFS=$$'\n'; cygpath "$(VS100COMNTOOLS)../IDE")
+INCLUDE := $(shell IFS=$$'\n'; cygpath "$(VS100COMNTOOLS)../../VC/include")
+LIB := $(shell IFS=$$'\n'; cygpath "$(VS100COMNTOOLS)../../VC/lib/amd64")
+BIN := $(shell IFS=$$'\n'; cygpath "$(VS100COMNTOOLS)../../VC/bin")
+
+WindowsSdkDir := $(shell reg query "HKLM\SOFTWARE\Microsoft\Microsoft SDKs\Windows\v7.0A" -v "InstallationFolder" | grep -o '[A-Z]:\\.*')lib/x64
+WindowsSdkDir ?= $(shell reg query "HKLM\SOFTWARE\Microsoft\Microsoft SDKs\Windows\v7.1A" -v "InstallationFolder" | grep -o '[A-Z]:\\.*')lib/x64
+
+export INCLUDE := $(INCLUDE)
+export LIB := $(LIB);$(WindowsSdkDir)
+TARGET := $(TARGET_NAME)_libretro.dll
+PSS_STYLE :=2
+LDFLAGS += -DLL
+
+# Windows MSVC 2010 x86
+else ifeq ($(platform), windows_msvc2010_x86)
+ CC = cl.exe
+ CXX = cl.exe
+
+PATH := $(shell IFS=$$'\n'; cygpath "$(VS100COMNTOOLS)../../VC/bin"):$(PATH)
+PATH := $(PATH):$(shell IFS=$$'\n'; cygpath "$(VS100COMNTOOLS)../IDE")
+INCLUDE := $(shell IFS=$$'\n'; cygpath "$(VS100COMNTOOLS)../../VC/include")
+LIB := $(shell IFS=$$'\n'; cygpath -w "$(VS100COMNTOOLS)../../VC/lib")
+BIN := $(shell IFS=$$'\n'; cygpath "$(VS100COMNTOOLS)../../VC/bin")
+
+WindowsSdkDir := $(shell reg query "HKLM\SOFTWARE\Microsoft\Microsoft SDKs\Windows\v7.0A" -v "InstallationFolder" | grep -o '[A-Z]:\\.*')lib
+WindowsSdkDir ?= $(shell reg query "HKLM\SOFTWARE\Microsoft\Microsoft SDKs\Windows\v7.1A" -v "InstallationFolder" | grep -o '[A-Z]:\\.*')lib
+
+export INCLUDE := $(INCLUDE)
+export LIB := $(LIB);$(WindowsSdkDir)
+TARGET := $(TARGET_NAME)_libretro.dll
+PSS_STYLE :=2
+LDFLAGS += -DLL
+
+# Windows MSVC 2003 Xbox 1
+else ifeq ($(platform), xbox1_msvc2003)
+TARGET := $(TARGET_NAME)_libretro_xdk1.lib
+CC = CL.exe
+CXX = CL.exe
+LD = lib.exe
+
+export INCLUDE := $(XDK)\xbox\include
+export LIB := $(XDK)\xbox\lib
+PATH := $(call unixcygpath,$(XDK)/xbox/bin/vc71):$(PATH)
+
+PSS_STYLE :=2
+CFLAGS += -D_XBOX -D_XBOX1
+CXXFLAGS += -D_XBOX -D_XBOX1
+STATIC_LINKING=1
+
+# Windows MSVC 2010 Xbox 360
+else ifeq ($(platform), xbox360_msvc2010)
+TARGET := $(TARGET_NAME)_libretro_xdk360.lib
+CC = cl.exe
+CXX = cl.exe
+LD = lib.exe
+
+export INCLUDE := $(XEDK)/include/xbox
+export LIB := $(XEDK)/lib/xbox
+PATH := $(call unixcygpath,$(XEDK)/bin/win32):$(PATH)
+
+PSS_STYLE :=2
+CFLAGS += -D_XBOX -D_XBOX360
+CXXFLAGS += -D_XBOX -D_XBOX360
+ENDIANNESS_DEFINES += -DMSB_FIRST
+STATIC_LINKING=1
+
+# Windows MSVC 2005 x86
+else ifeq ($(platform), windows_msvc2005_x86)
+ CC = cl.exe
+ CXX = cl.exe
+
+PATH := $(shell IFS=$$'\n'; cygpath "$(VS80COMNTOOLS)../../VC/bin"):$(PATH)
+PATH := $(PATH):$(shell IFS=$$'\n'; cygpath "$(VS80COMNTOOLS)../IDE")
+INCLUDE := $(shell IFS=$$'\n'; cygpath "$(VS80COMNTOOLS)../../VC/include")
+LIB := $(shell IFS=$$'\n'; cygpath -w "$(VS80COMNTOOLS)../../VC/lib")
+BIN := $(shell IFS=$$'\n'; cygpath "$(VS80COMNTOOLS)../../VC/bin")
+
+WindowsSdkDir := $(INETSDK)
+
+export INCLUDE := $(INCLUDE);$(INETSDK)/Include;src/drivers/libretro/msvc/msvc-2005
+export LIB := $(LIB);$(WindowsSdkDir);$(INETSDK)/Lib
+TARGET := $(TARGET_NAME)_libretro.dll
+PSS_STYLE :=2
+LDFLAGS += -DLL
+CFLAGS += -D_CRT_SECURE_NO_DEPRECATE
+
+# Windows MSVC 2003 x86
+else ifeq ($(platform), windows_msvc2003_x86)
+ CC = cl.exe
+ CXX = cl.exe
+
+PATH := $(shell IFS=$$'\n'; cygpath "$(VS71COMNTOOLS)../../Vc7/bin"):$(PATH)
+PATH := $(PATH):$(shell IFS=$$'\n'; cygpath "$(VS71COMNTOOLS)../IDE")
+INCLUDE := $(shell IFS=$$'\n'; cygpath "$(VS71COMNTOOLS)../../Vc7/include")
+LIB := $(shell IFS=$$'\n'; cygpath -w "$(VS71COMNTOOLS)../../Vc7/lib")
+BIN := $(shell IFS=$$'\n'; cygpath "$(VS71COMNTOOLS)../../Vc7/bin")
+
+WindowsSdkDir := $(INETSDK)
+
+export INCLUDE := $(INCLUDE);$(INETSDK)/Include;src/drivers/libretro/msvc/msvc-2005
+export LIB := $(LIB);$(WindowsSdkDir);$(INETSDK)/Lib
+TARGET := $(TARGET_NAME)_libretro.dll
+PSS_STYLE :=2
+LDFLAGS += -DLL
+CFLAGS += -D_CRT_SECURE_NO_DEPRECATE
+
+# Windows
+else
+ TARGET := $(TARGET_NAME)_libretro.dll
+ CC = gcc
+ SHARED := -shared -static-libgcc -static-libstdc++ -s -Wl,--version-script=$(CORE_DIR)/link.T
+ PSS_STYLE :=2
+endif
+
+ifeq ($(DEBUG), 1)
+ ifneq (,$(findstring msvc,$(platform)))
+ ifeq ($(STATIC_LINKING),1)
+ CFLAGS += -MTd
+ CXXFLAGS += -MTd
+ else
+ CFLAGS += -MDd
+ CXXFLAGS += -MDd
+ endif
+
+ CFLAGS += -Od -Zi -DDEBUG -D_DEBUG
+ CXXFLAGS += -Od -Zi -DDEBUG -D_DEBUG
+ else
+ CFLAGS += -O0 -g -DDEBUG
+ CXXFLAGS += -O0 -g -DDEBUG
+ endif
+else
+ ifneq (,$(findstring msvc,$(platform)))
+ ifeq ($(STATIC_LINKING),1)
+ CFLAGS += -MT
+ CXXFLAGS += -MT
+ else
+ CFLAGS += -MD
+ CXXFLAGS += -MD
+ endif
+
+ CFLAGS += -O2 -DNDEBUG
+ CXXFLAGS += -O2 -DNDEBUG
+ else
+ CFLAGS += -O2 -DNDEBUG
+ CXXFLAGS += -O2 -DNDEBUG
+ endif
+endif
+
+ifeq ($(EXTERNAL_ZLIB), 1)
+ CFLAGS += -DHAVE_EXTERNAL_ZLIB
+ CXXFLAGS += -DHAVE_EXTERNAL_ZLIB
+endif
+
+include Makefile.common
+
+OBJECTS := $(SOURCES_C:.c=.o) $(SOURCES_CXX:.cpp=.o)
+
+DEFINES := $(COREDEFINES) $(PLATFORM_DEFINES)
+
+ifeq ($(STATIC_LINKING),1)
+ DEFINES += -DSTATIC_LINKING
+endif
+
+ifeq ($(platform), sncps3)
+WARNING_DEFINES =
+else ifneq (,$(findstring msvc,$(platform)))
+WARNING_DEFINES =
+LIBM :=
+else
+WARNING_DEFINES = -Wno-write-strings
+endif
+
+CFLAGS += $(COREDEFINES) $(fpic) $(WARNING_DEFINES) $(DEFINES) $(ENDIANNESS_DEFINES)
+CXXFLAGS += $(COREDEFINES) $(fpic) $(WARNING_DEFINES) $(DEFINES) $(ENDIANNESS_DEFINES)
+LDFLAGS += $(LIBM)
+
+ifeq ($(platform), psp1)
+ INCFLAGS += -I$(shell psp-config --pspsdk-path)/include
+endif
+
+
+ifneq (,$(findstring msvc,$(platform)))
+ OBJOUT = -Fo
+ LINKOUT = -out:
+ifeq ($(STATIC_LINKING),1)
+ LD ?= lib.exe
+ STATIC_LINKING=0
+else
+ LD = link.exe
+endif
+else
+ OBJOUT = -o
+ LINKOUT = -o
+ LD = $(CXX)
+endif
+
+ifeq ($(platform), theos_ios)
+COMMON_FLAGS := -DIOS $(COMMON_DEFINES) $(INCFLAGS) -I$(THEOS_INCLUDE_PATH) -Wno-error
+$(LIBRARY_NAME)_CFLAGS += $(COMMON_FLAGS) $(CFLAGS)
+$(LIBRARY_NAME)_CXXFLAGS += $(COMMON_FLAGS) $(CXXFLAGS)
+${LIBRARY_NAME}_FILES = $(SOURCES_C)
+include $(THEOS_MAKE_PATH)/library.mk
+else
+all: $(TARGET)
+$(TARGET): $(OBJECTS)
+ifeq ($(STATIC_LINKING),1)
+ifneq (,$(findstring msvc,$(platform)))
+ $(LD) $(LINKOUT)$@ $(OBJECTS)
+else
+ $(AR) rcs $@ $(OBJECTS)
+endif
+else
+ $(LD) $(LINKOUT)$@ $(SHARED) $(OBJECTS) $(LDFLAGS) $(LIBS)
+endif
+
+%.o: %.cpp
+ $(CXX) -c $(OBJOUT)$@ $< $(CXXFLAGS) $(INCFLAGS)
+
+%.o: %.c
+ $(CC) -c $(OBJOUT)$@ $< $(CFLAGS) $(INCFLAGS)
+
+clean-objs:
+ rm -f $(OBJECTS)
+
+clean:
+ rm -f $(OBJECTS)
+ rm -f $(TARGET)
+
+.PHONY: clean clean-objs
+endif
+
+print-%:
+ @echo '$*=$($*)'
diff --git a/Makefiles/Makefile.OSX b/Makefiles/Makefile.OSX
new file mode 100644
index 0000000..e229bd8
--- /dev/null
+++ b/Makefiles/Makefile.OSX
@@ -0,0 +1,73 @@
+##
+## Supermodel
+## A Sega Model 3 Arcade Emulator.
+## Copyright 2011-2017 Bart Trzynadlowski, Nik Henson, Ian Curtis
+##
+## This file is part of Supermodel.
+##
+## Supermodel is free software: you can redistribute it and/or modify it under
+## the terms of the GNU General Public License as published by the Free
+## Software Foundation, either version 3 of the License, or (at your option)
+## any later version.
+##
+## Supermodel is distributed in the hope that it will be useful, but WITHOUT
+## ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+## more details.
+##
+## You should have received a copy of the GNU General Public License along
+## with Supermodel. If not, see .
+##
+
+#
+# Makefile.OSX
+#
+# Makefile for Mac OS X systems using gcc.
+#
+
+
+###############################################################################
+# Build Options
+###############################################################################
+
+DELETE = rm -d -r -f
+
+
+###############################################################################
+# Platform Configuration
+#
+# Edit library and include paths as needed.
+###############################################################################
+
+#
+# Toolchain
+#
+CC = gcc
+CXX = g++
+LD = gcc
+
+#
+# SDL
+#
+
+SDL_CFLAGS =
+SDL_LIBS = -framework SDL -framework AGL -framework OpenGL -framework GLUT -framework Cocoa
+
+#
+# OSX-specific
+#
+
+PLATFORM_CFLAGS = $(SDL_CFLAGS) -DSUPERMODEL_OSX -DUSE_FILE32API -F/Library/Frameworks/
+PLATFORM_LDFLAGS = $(SDL_LIBS) -lz -lm -lstdc++ -F/Library/Frameworks/
+
+
+###############################################################################
+# Core Makefile
+###############################################################################
+
+include Makefiles/Makefile.inc
+
+clean:
+ $(SILENT)echo Cleaning up \"$(BIN_DIR)\" and \"$(OBJ_DIR)\"...
+ $(SILENT)$(DELETE) $(BIN_DIR)
+ $(SILENT)$(DELETE) $(OBJ_DIR)
diff --git a/Makefiles/Makefile.UNIX b/Makefiles/Makefile.UNIX
new file mode 100644
index 0000000..9b3af4d
--- /dev/null
+++ b/Makefiles/Makefile.UNIX
@@ -0,0 +1,73 @@
+##
+## Supermodel
+## A Sega Model 3 Arcade Emulator.
+## Copyright 2011-2017 Bart Trzynadlowski, Nik Henson, Ian Curtis
+##
+## This file is part of Supermodel.
+##
+## Supermodel is free software: you can redistribute it and/or modify it under
+## the terms of the GNU General Public License as published by the Free
+## Software Foundation, either version 3 of the License, or (at your option)
+## any later version.
+##
+## Supermodel is distributed in the hope that it will be useful, but WITHOUT
+## ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+## more details.
+##
+## You should have received a copy of the GNU General Public License along
+## with Supermodel. If not, see .
+##
+
+#
+# Makefile.UNIX
+#
+# Makefile for UNIX/Linux systems.
+#
+
+
+###############################################################################
+# Build Options
+###############################################################################
+
+DELETE = rm -d -r -f
+
+
+###############################################################################
+# Platform Configuration
+#
+# Edit library and include paths as needed.
+###############################################################################
+
+#
+# Toolchain
+#
+CC = gcc
+CXX = g++
+LD = gcc
+
+#
+# SDL
+#
+
+SDL_CFLAGS = `sdl-config --cflags`
+SDL_LIBS = `sdl-config --libs`
+
+#
+# UNIX-specific
+#
+
+PLATFORM_CFLAGS = $(SDL_CFLAGS)
+PLATFORM_LDFLAGS = $(SDL_LIBS) -lGL -lGLU -lz -lm -lstdc++
+
+
+###############################################################################
+# Core Makefile
+###############################################################################
+
+include Makefiles/Makefile.inc
+
+clean:
+ $(SILENT)echo Cleaning up \"$(BIN_DIR)\" and \"$(OBJ_DIR)\"...
+ $(SILENT)$(DELETE) $(BIN_DIR)
+ $(SILENT)$(DELETE) $(OBJ_DIR)
diff --git a/Makefiles/Makefile.Win32 b/Makefiles/Makefile.Win32
new file mode 100644
index 0000000..87f5c8f
--- /dev/null
+++ b/Makefiles/Makefile.Win32
@@ -0,0 +1,111 @@
+##
+## Supermodel
+## A Sega Model 3 Arcade Emulator.
+## Copyright 2011-2017 Bart Trzynadlowski, Nik Henson, Ian Curtis
+##
+## This file is part of Supermodel.
+##
+## Supermodel is free software: you can redistribute it and/or modify it under
+## the terms of the GNU General Public License as published by the Free
+## Software Foundation, either version 3 of the License, or (at your option)
+## any later version.
+##
+## Supermodel is distributed in the hope that it will be useful, but WITHOUT
+## ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+## more details.
+##
+## You should have received a copy of the GNU General Public License along
+## with Supermodel. If not, see .
+##
+
+#
+# Makefile.Win32
+#
+# Makefile for Windows systems using gcc and the standard Command Prompt.
+#
+# Set variables in the "Configuration" section as required by your system
+# configuration.
+#
+
+
+###############################################################################
+# Configuration
+#
+# Edit as necessary. Some users may need to edit the "Platform Configuration"
+# section as well, namely SDL_LIBS and PLATFORM_LIBS.
+###############################################################################
+
+#
+# Bitness of build ('32' or '64')
+#
+BITS = 64
+
+#
+# Path to SDL
+#
+SDL_INCLUDE_DIR = c:/tdm-gcc-64/include/SDL
+SDL_LIB_DIR = c:/tdm-gcc-64/lib
+
+#
+# Toolchain
+#
+
+CC = gcc
+CXX = g++
+LD = g++
+
+
+###############################################################################
+# Platform Configuration
+###############################################################################
+
+# Safety check: can be only '32' or '64' otherwise defaults to '64'
+ifneq ($(filter $(strip $(BITS)),32 64),$(strip $(BITS)))
+ override BITS = 64
+endif
+
+#
+# Use Bash or Windows Prompt shell commands?
+#
+DELETE = rm -d -r -f
+ifeq ($(strip $(MSYSTEM)),)
+ DELETE = rmdir /s /q
+endif
+
+#
+# SDL
+#
+#
+# (At least for SDL) The linked libs order is fundamental for a successful compiling!
+# https://stackoverflow.com/questions/24596596/sdl-doesnt-compile-in-native-enviroment
+# http://www.cplusplus.com/forum/beginner/110753/
+#
+SDL_LIBS = -lmingw32 -static-libgcc -static-libstdc++ -lSDLmain -lSDL -lm -luser32 -lgdi32 -lwinmm -ldxguid
+SDL_CFLAGS = -D_GNU_SOURCE=1 -Dmain=SDL_main
+
+#
+# MinGW/Windows-specific
+#
+
+PLATFORM_INCLUDE_DIR = $(SDL_INCLUDE_DIR)
+PLATFORM_LIB_DIR = $(SDL_LIB_DIR)
+PLATFORM_LIBS = -ldinput8 -lglu32 -lole32 -loleaut32 -lopengl32 -lwbemuuid -lws2_32 -lz
+PLATFORM_CFLAGS = $(SDL_CFLAGS) -DSUPERMODEL_WIN32 $(addprefix -I,$(sort $(PLATFORM_INCLUDE_DIR)))
+PLATFORM_LDFLAGS = -static -L$(sort $(PLATFORM_LIB_DIR)) $(SDL_LIBS) $(PLATFORM_LIBS)
+
+
+###############################################################################
+# Core Makefile
+###############################################################################
+
+PLATFORM_SRC_FILES = \
+ Src/OSD/Windows/DirectInputSystem.cpp \
+ Src/OSD/Windows/WinOutputs.cpp
+
+include Makefiles/Makefile.inc
+
+clean:
+ $(SILENT)echo Cleaning up $(BIN_DIR) and $(OBJ_DIR)...
+ $(SILENT)$(DELETE) $(BIN_DIR)
+ $(SILENT)$(DELETE) $(OBJ_DIR)
diff --git a/Makefiles/Makefile.inc b/Makefiles/Makefile.inc
new file mode 100644
index 0000000..4f7e844
--- /dev/null
+++ b/Makefiles/Makefile.inc
@@ -0,0 +1,351 @@
+##
+## Supermodel
+## A Sega Model 3 Arcade Emulator.
+## Copyright 2011-2017 Bart Trzynadlowski, Nik Henson, Ian Curtis
+##
+## This file is part of Supermodel.
+##
+## Supermodel is free software: you can redistribute it and/or modify it under
+## the terms of the GNU General Public License as published by the Free
+## Software Foundation, either version 3 of the License, or (at your option)
+## any later version.
+##
+## Supermodel is distributed in the hope that it will be useful, but WITHOUT
+## ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+## more details.
+##
+## You should have received a copy of the GNU General Public License along
+## with Supermodel. If not, see .
+##
+
+#
+# Makefile.inc
+#
+# Core GNU Makefile, included by all (platform-specific) top-level Makefiles.
+#
+
+
+###############################################################################
+# Build Options
+###############################################################################
+
+#
+# Verbose progression
+#
+VERBOSE =
+ifneq ($(filter $(strip $(VERBOSE)),0 1),$(strip $(VERBOSE)))
+ override VERBOSE =
+endif
+SILENT = @
+ifeq ($(strip $(VERBOSE)),1)
+ SILENT =
+endif
+
+#
+# Enable render state analyser for the legacy 3D engine (will slow down emulation!)
+#
+DEBUG =
+ifneq ($(filter $(strip $(DEBUG)),0 1),$(strip $(DEBUG)))
+ override DEBUG =
+endif
+
+#
+# Enable support for Model3 Net Board emulation
+#
+NET_BOARD =
+ifneq ($(filter $(strip $(NET_BOARD)),0 1),$(strip $(NET_BOARD)))
+ override NET_BOARD =
+endif
+
+#
+# Enable Bart's new (experimental) Real3D frame timing
+#
+NEW_FRAME_TIMING =
+ifneq ($(filter $(strip $(NEW_FRAME_TIMING)),0 1),$(strip $(NEW_FRAME_TIMING)))
+ override NEW_FRAME_TIMING =
+endif
+
+#
+# Include console-based debugger in emulator ('yes' or 'no')
+#
+ENABLE_DEBUGGER =
+ifneq ($(filter $(strip $(ENABLE_DEBUGGER)),0 1),$(strip $(ENABLE_DEBUGGER)))
+ override ENABLE_DEBUGGER =
+endif
+
+
+###############################################################################
+# Source Files
+###############################################################################
+
+SRC_FILES = \
+ Src/CPU/PowerPC/PPCDisasm.cpp \
+ Src/BlockFile.cpp \
+ Src/Pkgs/unzip.cpp \
+ Src/Pkgs/ioapi.cpp \
+ Src/Model3/93C46.cpp \
+ Src/Util/BitRegister.cpp \
+ Src/JTAG.cpp \
+ Src/Graphics/Legacy3D/Error.cpp \
+ Src/Pkgs/glew.cpp \
+ Src/Graphics/Shader.cpp \
+ Src/Model3/Real3D.cpp \
+ Src/Graphics/Legacy3D/Legacy3D.cpp \
+ Src/Graphics/Legacy3D/Models.cpp \
+ Src/Graphics/Legacy3D/TextureRefs.cpp \
+ Src/Graphics/New3D/New3D.cpp \
+ Src/Graphics/New3D/Mat4.cpp \
+ Src/Graphics/New3D/Model.cpp \
+ Src/Graphics/New3D/PolyHeader.cpp \
+ Src/Graphics/New3D/Texture.cpp \
+ Src/Graphics/New3D/TextureSheet.cpp \
+ Src/Graphics/New3D/VBO.cpp \
+ Src/Graphics/New3D/Vec.cpp \
+ Src/Graphics/New3D/R3DShader.cpp \
+ Src/Graphics/New3D/R3DFloat.cpp \
+ Src/Graphics/New3D/R3DScrollFog.cpp \
+ Src/Graphics/Render2D.cpp \
+ Src/Model3/TileGen.cpp \
+ Src/Model3/Model3.cpp \
+ Src/CPU/PowerPC/ppc.cpp \
+ Src/Model3/SoundBoard.cpp \
+ Src/Sound/SCSP.cpp \
+ Src/Sound/SCSPDSP.cpp \
+ Src/CPU/68K/68K.cpp \
+ $(OBJ_DIR)/m68kcpu.c \
+ $(OBJ_DIR)/m68kopnz.c \
+ $(OBJ_DIR)/m68kopdm.c \
+ $(OBJ_DIR)/m68kopac.c \
+ $(OBJ_DIR)/m68kops.c \
+ Src/Model3/DSB.cpp \
+ Src/CPU/Z80/Z80.cpp \
+ Src/Model3/IRQ.cpp \
+ Src/Model3/53C810.cpp \
+ Src/Model3/PCI.cpp \
+ Src/Model3/RTC72421.cpp \
+ Src/Model3/DriveBoard.cpp \
+ Src/Model3/MPC10x.cpp \
+ Src/Inputs/Input.cpp \
+ Src/Inputs/Inputs.cpp \
+ Src/Inputs/InputSource.cpp \
+ Src/Inputs/InputSystem.cpp \
+ Src/Inputs/InputTypes.cpp \
+ Src/Inputs/MultiInputSource.cpp \
+ Src/OSD/SDL/SDLInputSystem.cpp \
+ Src/OSD/Outputs.cpp \
+ Src/Sound/MPEG/amp_audio.cpp \
+ Src/Sound/MPEG/dump.cpp \
+ Src/Sound/MPEG/getbits.cpp \
+ Src/Sound/MPEG/getdata.cpp \
+ Src/Sound/MPEG/huffman.cpp \
+ Src/Sound/MPEG/layer2.cpp \
+ Src/Sound/MPEG/layer3.cpp \
+ Src/Sound/MPEG/misc2.cpp \
+ Src/Sound/MPEG/position.cpp \
+ Src/Sound/MPEG/transform.cpp \
+ Src/Sound/MPEG/util.cpp \
+ Src/Model3/Crypto.cpp \
+ Src/OSD/Logger.cpp \
+ Src/Util/Format.cpp \
+ Src/Util/NewConfig.cpp \
+ Src/Util/ByteSwap.cpp \
+ Src/Util/ConfigBuilders.cpp \
+ Src/GameLoader.cpp \
+ Src/Pkgs/tinyxml2.cpp \
+ Src/ROMSet.cpp \
+ $(PLATFORM_SRC_FILES)
+
+ifeq ($(strip $(NET_BOARD)),1)
+ SRC_FILES += \
+ Src/Network/UDPReceive.cpp \
+ Src/Network/UDPSend.cpp \
+ Src/Network/WinSockWrap.cpp \
+ Src/Network/NetBoard.cpp
+endif
+
+ifeq ($(strip $(ENABLE_DEBUGGER)),1)
+ SRC_FILES += \
+ Src/Debugger/Debugger.cpp \
+ Src/Debugger/ConsoleDebugger.cpp \
+ Src/Debugger/SupermodelDebugger.cpp \
+ Src/Debugger/CPUDebug.cpp \
+ Src/Debugger/AddressTable.cpp \
+ Src/Debugger/Breakpoint.cpp \
+ Src/Debugger/CodeAnalyser.cpp \
+ Src/Debugger/Exception.cpp \
+ Src/Debugger/Interrupt.cpp \
+ Src/Debugger/DebuggerIO.cpp \
+ Src/Debugger/Label.cpp \
+ Src/Debugger/Register.cpp \
+ Src/Debugger/Watch.cpp \
+ Src/Debugger/CPU/PPCDebug.cpp \
+ Src/Debugger/CPU/68KDebug.cpp \
+ Src/Debugger/CPU/Musashi68KDebug.cpp \
+ Src/Debugger/CPU/Z80Debug.cpp
+endif
+
+#
+# Sorted-path compile order
+#
+OBJ_FILES = $(foreach file,$(SRC_FILES),$(OBJ_DIR)/$(basename $(notdir $(file))).o)
+
+#
+# Deduce include directories from the source file list. The sort function
+# removes duplicates and is used to construct a set.
+#
+INCLUDE_DIRS = $(sort $(foreach file,$(SRC_FILES),$(dir $(file))))
+
+
+###############################################################################
+# Output Locations
+###############################################################################
+
+OBJ_DIR = obj$(strip $(BITS))
+BIN_DIR = bin$(strip $(BITS))
+
+OUTFILE = supermodel
+
+
+###############################################################################
+# Compiler Flags
+###############################################################################
+
+ARCH = -march=native -mfpmath=sse
+BUILD_CFLAGS =
+OPT = -O3
+WARN = -Wall
+CSTD = -std=iso9899:2011
+CXXSTD = -std=c++11
+
+COMMON_CFLAGS = -c $(ARCH) $(OPT) $(WARN) $(addprefix -I,$(sort $(INCLUDE_DIRS))) -DGLEW_STATIC
+
+CFLAGS = $(COMMON_CFLAGS) $(CSTD)
+CXXFLAGS = $(PLATFORM_CFLAGS) $(COMMON_CFLAGS) $(BUILD_CFLAGS) $(CXXSTD)
+LDFLAGS = -o $(BIN_DIR)/$(OUTFILE) $(PLATFORM_LDFLAGS) -s
+
+# If render state analyser is enabled, need to define DEBUG
+ifeq ($(strip $(DEBUG)),1)
+ BUILD_CFLAGS += -DDEBUG
+endif
+
+# If Net Board support is enabled, need to define NET_BOARD
+ifeq ($(strip $(NET_BOARD)),1)
+ BUILD_CFLAGS += -DNET_BOARD
+endif
+
+# If Bart's new frame timing is enabled, need to define NEW_FRAME_TIMING
+ifeq ($(strip $(NEW_FRAME_TIMING)),1)
+ BUILD_CFLAGS += -DNEW_FRAME_TIMING
+endif
+
+# If built-in debugger enabled, need to define SUPERMODEL_DEBUGGER
+ifeq ($(strip $(ENABLE_DEBUGGER)),1)
+ BUILD_CFLAGS += -DSUPERMODEL_DEBUGGER
+endif
+
+
+###############################################################################
+# Targets
+###############################################################################
+
+#
+# Default target: build Supermodel binary. Must be specified *before* the auto-
+# generated dependencies because otherwise, make gets confused for some reason
+# and thinks the default target is just one of the object files.
+#
+all: $(BIN_DIR)/$(OUTFILE)
+
+$(BIN_DIR)/$(OUTFILE): $(BIN_DIR) $(OBJ_DIR) $(OBJ_FILES)
+ $(info --------------------------------------------------------------------------------)
+ $(info Linking Supermodel : $(BIN_DIR)/$(OUTFILE))
+ $(SILENT)$(LD) $(OBJ_FILES) $(LDFLAGS)
+ $(info --------------------------------------------------------------------------------)
+
+$(BIN_DIR):
+ $(info Creating directory : $(BIN_DIR))
+ $(SILENT)mkdir $(BIN_DIR)
+
+$(OBJ_DIR):
+ $(info Creating directory : $(OBJ_DIR))
+ $(SILENT)mkdir $(OBJ_DIR)
+
+
+###############################################################################
+# Rules
+###############################################################################
+
+#
+# Create list of auto-generated dependency files (which contain rules that make
+# understands) and include them all.
+#
+AUTODEPS := $(patsubst %.o,%.d,$(OBJ_FILES))
+-include $(AUTODEPS)
+
+#
+# VPATH is the search path for files. This trick allows a single %.cpp rule to
+# be matched against files in sub-directories of Src/.
+#
+VPATH = $(INCLUDE_DIRS)
+
+#
+# Compilation rules that both auto-generate the dependency files and compile
+# the source code. This technique is described in the reply by user "rr-" at:
+# https://stackoverflow.com/questions/8025766/makefile-auto-dependency-generation
+#
+$(OBJ_DIR)/%.o: %.cpp
+ $(info Generating dependencies: $< -> $(OBJ_DIR)/$(*F).d)
+ $(SILENT)$(CXX) -MM -MP -MT $(OBJ_DIR)/$(*F).o -MT $(OBJ_DIR)/$(*F).d $(CXXFLAGS) $< > $(OBJ_DIR)/$(*F).d
+ $(info Compiling : $< -> $@)
+ $(SILENT)$(CXX) $(CXXFLAGS) $< -o $@
+
+$(OBJ_DIR)/%.o: %.c
+ $(info Generating dependencies: $< -> $(OBJ_DIR)/$(*F).d)
+ $(SILENT)$(CC) -MM -MP -MT $(OBJ_DIR)/$(*F).o -MT $(OBJ_DIR)/$(*F).d $(CFLAGS) $< > $(OBJ_DIR)/$(*F).d
+ $(info Compiling : $< -> $@)
+ $(SILENT)$(CC) $(CFLAGS) $< -o $@
+
+
+#
+# Musashi 68K emulator
+#
+# All generated source files are emitted to the object directory. For MSVC,
+# INLINE must be redefined as "static __inline", which is the syntax in C mode.
+#
+# The .exe suffix is absolutely required for native Windows non-MSYS builds!
+#
+
+MUSASHI_OUTFILE = $(OBJ_DIR)/m68kmake.exe # do not remove the .exe suffix!
+MUSASHI_CFLAGS = -ISrc/CPU/68K/Musashi -I$(OBJ_DIR) -DINLINE="static inline" -Wno-unused-variable
+MUSASHI_LDFLAGS = -o $(MUSASHI_OUTFILE) $(OBJ_DIR)/m68kmake.o -s
+
+$(MUSASHI_OUTFILE): Src/CPU/68K/Musashi/m68kmake.c Src/CPU/68K/Musashi/m68k_in.c
+ $(info --------------------------------------------------------------------------------)
+ $(info Compiling : $< -> $(OBJ_DIR)/m68kmake.o)
+ $(SILENT)$(CC) $< $(CFLAGS) -o $(OBJ_DIR)/m68kmake.o
+ $(info Linking : $(MUSASHI_OUTFILE))
+ $(SILENT)$(LD) $(MUSASHI_LDFLAGS)
+
+$(OBJ_DIR)/m68kops.h $(OBJ_DIR)/m68kops.c $(OBJ_DIR)/m68kopac.c $(OBJ_DIR)/m68kopdm.c $(OBJ_DIR)/m68kopnz.c: $(MUSASHI_OUTFILE) Src/CPU/68K/Musashi/m68k_in.c Src/CPU/68K/Musashi/m68k.h Src/CPU/68K/Musashi/m68kconf.h
+ $(info Generating 68K emulator: $@)
+ @$(MUSASHI_OUTFILE) $(OBJ_DIR) Src/CPU/68K/Musashi/m68k_in.c
+
+$(OBJ_DIR)/m68kcpu.o: Src/CPU/68K/Musashi/m68kcpu.c $(OBJ_DIR)/m68kops.h Src/CPU/68K/Musashi/m68k.h Src/CPU/68K/Musashi/m68kconf.h
+ $(info Compiling : $< -> $@)
+ @$(CC) $< $(CFLAGS) $(MUSASHI_CFLAGS) -o $(OBJ_DIR)/m68kcpu.o
+
+$(OBJ_DIR)/m68kops.o: $(OBJ_DIR)/m68kops.c $(OBJ_DIR)/m68kops.h Src/CPU/68K/Musashi/m68k.h Src/CPU/68K/Musashi/m68kconf.h $(MUSASHI_OUTFILE)
+ $(info Compiling : $< -> $@)
+ @$(CC) $< $(CFLAGS) $(MUSASHI_CFLAGS) -o $@
+
+$(OBJ_DIR)/m68kopac.o: $(OBJ_DIR)/m68kopac.c $(OBJ_DIR)/m68kops.h Src/CPU/68K/Musashi/m68k.h Src/CPU/68K/Musashi/m68kconf.h $(MUSASHI_OUTFILE)
+ $(info Compiling : $< -> $@)
+ @$(CC) $< $(CFLAGS) $(MUSASHI_CFLAGS) -o $@
+
+$(OBJ_DIR)/m68kopdm.o: $(OBJ_DIR)/m68kopdm.c $(OBJ_DIR)/m68kops.h Src/CPU/68K/Musashi/m68k.h Src/CPU/68K/Musashi/m68kconf.h $(MUSASHI_OUTFILE)
+ $(info Compiling : $< -> $@)
+ @$(CC) $< $(CFLAGS) $(MUSASHI_CFLAGS) -o $@
+
+$(OBJ_DIR)/m68kopnz.o: $(OBJ_DIR)/m68kopnz.c $(OBJ_DIR)/m68kops.h Src/CPU/68K/Musashi/m68k.h Src/CPU/68K/Musashi/m68kconf.h $(MUSASHI_OUTFILE)
+ $(info Compiling : $< -> $@)
+ @$(CC) $< $(CFLAGS) $(MUSASHI_CFLAGS) -o $@
diff --git a/Src/BlockFile.cpp b/Src/BlockFile.cpp
new file mode 100644
index 0000000..023828a
--- /dev/null
+++ b/Src/BlockFile.cpp
@@ -0,0 +1,278 @@
+/**
+ ** Supermodel
+ ** A Sega Model 3 Arcade Emulator.
+ ** Copyright 2011 Bart Trzynadlowski, Nik Henson
+ **
+ ** This file is part of Supermodel.
+ **
+ ** Supermodel is free software: you can redistribute it and/or modify it under
+ ** the terms of the GNU General Public License as published by the Free
+ ** Software Foundation, either version 3 of the License, or (at your option)
+ ** any later version.
+ **
+ ** Supermodel is distributed in the hope that it will be useful, but WITHOUT
+ ** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ ** FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ ** more details.
+ **
+ ** You should have received a copy of the GNU General Public License along
+ ** with Supermodel. If not, see .
+ **/
+
+/*
+ * BlockFile.cpp
+ *
+ * Block format container file management. Implementation of the CBlockFile
+ * class.
+ */
+
+#include
+#include
+#include
+#include "Supermodel.h"
+
+
+/******************************************************************************
+ Output Functions
+******************************************************************************/
+
+void CBlockFile::ReadString(std::string *str, uint32_t length)
+{
+ if (NULL == fp)
+ return;
+ str->clear();
+ //TODO: use fstream to get rid of this ugly hack
+ bool keep_loading = true;
+ for (size_t i = 0; i < length; i++)
+ {
+ char c;
+ fread(&c, sizeof(char), 1, fp);
+ if (keep_loading)
+ {
+ if (!c)
+ keep_loading = false;
+ else
+ *str += c;
+ }
+ }
+}
+
+unsigned CBlockFile::ReadBytes(void *data, uint32_t numBytes)
+{
+ if (NULL == fp)
+ return 0;
+ return fread(data, sizeof(uint8_t), numBytes, fp);
+}
+
+unsigned CBlockFile::ReadDWord(uint32_t *data)
+{
+ if (NULL == fp)
+ return 0;
+ fread(data, sizeof(uint32_t), 1, fp);
+ return 4;
+}
+
+void CBlockFile::UpdateBlockSize(void)
+{
+ long int curPos;
+ unsigned newBlockSize;
+
+ if (NULL == fp)
+ return;
+ curPos = ftell(fp); // save current file position
+ fseek(fp, blockStartPos, SEEK_SET);
+ newBlockSize = curPos - blockStartPos;
+ fwrite(&newBlockSize, sizeof(uint32_t), 1, fp);
+ fseek(fp, curPos, SEEK_SET); // go back
+}
+
+void CBlockFile::WriteByte(uint8_t data)
+{
+ if (NULL == fp)
+ return;
+ fwrite(&data, sizeof(uint8_t), 1, fp);
+ UpdateBlockSize();
+}
+
+void CBlockFile::WriteDWord(uint32_t data)
+{
+ if (NULL == fp)
+ return;
+ fwrite(&data, sizeof(uint32_t), 1, fp);
+ UpdateBlockSize();
+}
+
+void CBlockFile::WriteBytes(const void *data, uint32_t numBytes)
+{
+ if (NULL == fp)
+ return;
+ fwrite(data, sizeof(uint8_t), numBytes, fp);
+ UpdateBlockSize();
+}
+
+void CBlockFile::WriteBlockHeader(const std::string &name, const std::string &comment)
+{
+ if (NULL == fp)
+ return;
+
+ // Record current block starting position
+ blockStartPos = ftell(fp);
+
+ // Write the total block length field
+ WriteDWord(0); // will be automatically updated as we write the file
+
+ // Write name and comment lengths
+ WriteDWord(name.size() + 1);
+ WriteDWord(comment.size() + 1);
+ Write(name);
+ Write(comment);
+
+ // Record the start of the current data section
+ dataStartPos = ftell(fp);
+}
+
+
+/******************************************************************************
+ Block Format Container File Implementation
+
+ Files are just a consecutive array of blocks that must be searched.
+
+ Block Format
+ ------------
+ blockLength (uint32_t) Total length of block in bytes.
+ nameLength (uint32_t) Length of name field including terminating 0 (up to
+ 1025).
+ commentLength (uint32_t) Same as above, but for comment string.
+ name ... Name string (null-terminated, up to 1025 bytes).
+ comment ... Comment string (same as above).
+ data ... Raw data (blockLength - total header size).
+******************************************************************************/
+
+unsigned CBlockFile::Read(void *data, uint32_t numBytes)
+{
+ if (mode == 'r')
+ return ReadBytes(data, numBytes);
+ return 0;
+}
+
+unsigned CBlockFile::Read(bool *value)
+{
+ uint8_t byte;
+ unsigned numBytes = Read(&byte, sizeof(byte));
+ if (numBytes > 0)
+ *value = byte != 0;
+ return numBytes;
+}
+
+void CBlockFile::Write(const void *data, uint32_t numBytes)
+{
+ if (mode == 'w')
+ WriteBytes(data, numBytes);
+}
+
+void CBlockFile::Write(bool value)
+{
+ uint8_t byte = value ? 1 : 0;
+ Write(&byte, sizeof(byte));
+}
+
+void CBlockFile::Write(const std::string &str)
+{
+ if (mode == 'w')
+ WriteBytes(str.c_str(), str.length() + 1);
+}
+
+void CBlockFile::NewBlock(const std::string &name, const std::string &comment)
+{
+ if (mode == 'w')
+ WriteBlockHeader(name, comment);
+}
+
+bool CBlockFile::FindBlock(const std::string &name)
+{
+ if (mode != 'r')
+ return FAIL;
+
+ fseek(fp, 0, SEEK_SET);
+
+ long int curPos = 0;
+ while (curPos < fileSize)
+ {
+ blockStartPos = curPos;
+
+ // Read header
+ uint32_t block_length;
+ uint32_t name_length;
+ uint32_t comment_length;
+ curPos += ReadDWord(&block_length);
+ curPos += ReadDWord(&name_length);
+ curPos += ReadDWord(&comment_length);
+ std::string block_name;
+ ReadString(&block_name, name_length);
+
+ // Is this the block we want?
+ if (block_name == name)
+ {
+ fseek(fp, blockStartPos + 12 + name_length + comment_length, SEEK_SET); // move to beginning of data
+ dataStartPos = ftell(fp);
+ return OKAY;
+ }
+
+ // Move to next block
+ fseek(fp, blockStartPos + block_length, SEEK_SET);
+ curPos = blockStartPos + block_length;
+ if (block_length == 0) // this would never advance
+ break;
+ }
+
+ return FAIL;
+}
+
+bool CBlockFile::Create(const std::string &file, const std::string &headerName, const std::string &comment)
+{
+ fp = fopen(file.c_str(), "wb");
+ if (NULL == fp)
+ return FAIL;
+ mode = 'w';
+ WriteBlockHeader(headerName, comment);
+ return OKAY;
+}
+
+bool CBlockFile::Load(const std::string &file)
+{
+ fp = fopen(file.c_str(), "rb");
+ if (NULL == fp)
+ return FAIL;
+ mode = 'r';
+
+ // TODO: is this a valid block file?
+
+ // Get the file size
+ fseek(fp, 0, SEEK_END);
+ fileSize = ftell(fp);
+ fseek(fp, 0, SEEK_SET);
+
+ return OKAY;
+}
+
+void CBlockFile::Close(void)
+{
+ if (fp != NULL)
+ fclose(fp);
+ fp = NULL;
+ mode = 0;
+}
+
+CBlockFile::CBlockFile(void)
+{
+ fp = NULL;
+ mode = 0; // neither reading nor writing (do nothing)
+}
+
+CBlockFile::~CBlockFile(void)
+{
+ if (fp != NULL) // in case user forgot
+ fclose(fp);
+ fp = NULL;
+ mode = 0;
+}
diff --git a/Src/BlockFile.h b/Src/BlockFile.h
new file mode 100644
index 0000000..f3f7da6
--- /dev/null
+++ b/Src/BlockFile.h
@@ -0,0 +1,206 @@
+/**
+ ** Supermodel
+ ** A Sega Model 3 Arcade Emulator.
+ ** Copyright 2011 Bart Trzynadlowski, Nik Henson
+ **
+ ** This file is part of Supermodel.
+ **
+ ** Supermodel is free software: you can redistribute it and/or modify it under
+ ** the terms of the GNU General Public License as published by the Free
+ ** Software Foundation, either version 3 of the License, or (at your option)
+ ** any later version.
+ **
+ ** Supermodel is distributed in the hope that it will be useful, but WITHOUT
+ ** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ ** FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ ** more details.
+ **
+ ** You should have received a copy of the GNU General Public License along
+ ** with Supermodel. If not, see .
+ **/
+
+/*
+ * BlockFile.h
+ *
+ * Header file for block format container file management.
+ */
+
+#ifndef INCLUDED_BLOCKFILE_H
+#define INCLUDED_BLOCKFILE_H
+
+#include
+#include
+
+/*
+ * CBlockFile:
+ *
+ * Block format container file. The file format is a series of consecutive,
+ * variable-length blocks referenced by unique name strings.
+ *
+ * All strings (comments and names) will be truncated to 1024 bytes, not
+ * including the null terminator.
+ *
+ * Members do not generate any output messages.
+ */
+class CBlockFile
+{
+public:
+ /*
+ * Read(data, numBytes):
+ *
+ * Reads data from the current file position.
+ *
+ * Parameters:
+ * data Buffer to read to.
+ * numBytes Number of bytes to read.
+ *
+ * Returns:
+ * Number of bytes read. If not the same as numBytes, an error
+ * occurred.
+ */
+ unsigned Read(void *data, uint32_t numBytes);
+
+ /*
+ * Read(value):
+ *
+ * Reads a bool value from the current file position.
+ *
+ * Parameters:
+ * value Bool to read to.
+ *
+ * Returns:
+ * Number of bytes read. If not 1, an error occurred.
+ */
+ unsigned Read(bool *value);
+
+ /*
+ * FindBlock(name):
+ *
+ * Scans the file for a block with the given name string. When it is found,
+ * the file pointer is set to the beginning of the data region.
+ *
+ * Parameters:
+ * name Name of block to locate.
+ *
+ * Returns:
+ * OKAY if found, FAIL if unable to locate.
+ */
+ bool FindBlock(const std::string &name);
+
+ /*
+ * Write(value):
+ *
+ * Outputs a bool value at the current file pointer position as a byte with
+ * value either 0 or 1. Updates the block header appropriately.
+ *
+ * Parameters:
+ * value A boolean value to write.
+ */
+ void Write(bool value);
+
+ /*
+ * Write(data, numBytes):
+ *
+ * Outputs data at the current file pointer position. Updates the block
+ * header appropriately.
+ *
+ * Parameters:
+ * data Data to write.
+ * numBytes Number of bytes to write.
+ */
+ void Write(const void *data, uint32_t numBytes);
+
+ /*
+ * Write(str):
+ *
+ * Outputs string (including null terminator) at the current file pointer
+ * position. Updates the block header appropriately.
+ *
+ * Parameters:
+ * str String to write.
+ */
+ void Write(const std::string &str);
+
+ /*
+ * NewBlock(name, comment):
+ *
+ * Begins a new block. Writes the block header and sets the file pointer to
+ * the beginning of its data area.
+ *
+ * Parameters:
+ * name Block name. Must be unique and not NULL.
+ * comment Comment string to embed in the block header.
+ */
+ void NewBlock(const std::string &title, const std::string &comment);
+
+ /*
+ * Create(file, headerName, comment):
+ *
+ * Opens a block file for writing and creates the header block. This
+ * function must be called before attempting to write data. Otherwise, all
+ * write commands will be silently ignored. Read commands will be ignored
+ * and will always return 0's.
+ *
+ * Parameters:
+ * file File path.
+ * headerName Block name for header. Must be unique and not NULL.
+ * comment Comment string that will be embedded into file header.
+ *
+ * Returns:
+ * OKAY if successfully opened, otherwise FAIL.
+ */
+ bool Create(const std::string &file, const std::string &headerName, const std::string &comment);
+
+ /*
+ * Load(file):
+ *
+ * Open a block file file for reading.
+ *
+ * Parameters:
+ * file File path.
+ *
+ * Returns:
+ * OKAY if successfully opened and confirmed to be a valid Supermodel
+ * block file, otherwise FAIL. If the file could not be opened, all
+ * subsequent operations will be silently ignored (reads will return
+ * 0's). Write commands will be ignored.
+ */
+ bool Load(const std::string &file);
+
+ /*
+ * Close(void):
+ *
+ * Closes the file.
+ */
+ void Close(void);
+
+ /*
+ * CBlockFile(void):
+ * ~CBlockFile(void):
+ *
+ * Constructor and destructor.
+ */
+ CBlockFile(void);
+ ~CBlockFile(void);
+
+private:
+ // Helper functions
+ void ReadString(std::string *str, uint32_t length);
+ unsigned ReadBytes(void *data, uint32_t numBytes);
+ unsigned ReadDWord(uint32_t *data);
+ void UpdateBlockSize(void);
+ void WriteByte(uint8_t data);
+ void WriteDWord(uint32_t data);
+ void WriteBytes(const void *data, uint32_t numBytes);
+ void WriteBlockHeader(const std::string &name, const std::string &comment);
+
+ // File state data
+ FILE *fp;
+ int mode; // 'r' for read, 'w' for write
+ long int fileSize; // size of file in bytes
+ long int blockStartPos; // points to beginning of current block (or file) header
+ long int dataStartPos; // points to beginning of current block's data section
+};
+
+
+#endif // INCLUDED_BLOCKFILE_H
diff --git a/Src/BlockFile.o b/Src/BlockFile.o
new file mode 100644
index 0000000..04e44dc
Binary files /dev/null and b/Src/BlockFile.o differ
diff --git a/Src/CPU/68K/68K.cpp b/Src/CPU/68K/68K.cpp
new file mode 100644
index 0000000..9d50982
--- /dev/null
+++ b/Src/CPU/68K/68K.cpp
@@ -0,0 +1,449 @@
+/**
+ ** Supermodel
+ ** A Sega Model 3 Arcade Emulator.
+ ** Copyright 2011 Bart Trzynadlowski, Nik Henson
+ **
+ ** This file is part of Supermodel.
+ **
+ ** Supermodel is free software: you can redistribute it and/or modify it under
+ ** the terms of the GNU General Public License as published by the Free
+ ** Software Foundation, either version 3 of the License, or (at your option)
+ ** any later version.
+ **
+ ** Supermodel is distributed in the hope that it will be useful, but WITHOUT
+ ** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ ** FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ ** more details.
+ **
+ ** You should have received a copy of the GNU General Public License along
+ ** with Supermodel. If not, see .
+ **/
+
+/*
+ * 68K.cpp
+ *
+ * 68K CPU interface. This is presently just a wrapper for the Musashi 68K core
+ * and therefore, only a single CPU is supported. In the future, we may want to
+ * add in another 68K core (eg., Turbo68K, A68K, or a recompiler).
+ *
+ * To-Do List
+ * ----------
+ * - Registers may not completely describe the 68K state. Musashi also has
+ * additional CPU state information in the context that its MAME interface
+ * accesses (interrupts pending, halted status, etc.)
+ */
+
+#include "Supermodel.h"
+#include "Musashi/m68k.h" // Musashi 68K core
+
+
+/******************************************************************************
+ Internal Context
+
+ An active context must be mapped before calling M68K interface functions. Only
+ the bus and IRQ handlers are copied here; the CPU context is passed directly
+ to Musashi.
+******************************************************************************/
+
+// Bus
+static IBus *s_Bus = NULL;
+
+#ifdef SUPERMODEL_DEBUGGER
+// Debugger
+static Debugger::CMusashi68KDebug *s_Debug = NULL;
+#endif
+
+// IRQ callback
+static int (*IRQAck)(int nIRQ) = NULL;
+
+// Cycles remaining in timeslice
+static int s_lastCycles;
+
+
+/******************************************************************************
+ 68K Interface
+******************************************************************************/
+
+// CPU state
+
+UINT32 M68KGetARegister(int n)
+{
+ m68k_register_t r;
+
+ switch (n)
+ {
+ case 0: r = M68K_REG_A0; break;
+ case 1: r = M68K_REG_A1; break;
+ case 2: r = M68K_REG_A2; break;
+ case 3: r = M68K_REG_A3; break;
+ case 4: r = M68K_REG_A4; break;
+ case 5: r = M68K_REG_A5; break;
+ case 6: r = M68K_REG_A6; break;
+ case 7: r = M68K_REG_A7; break;
+ default: r = M68K_REG_A7; break;
+ }
+
+ return m68k_get_reg(NULL, r);
+}
+
+UINT32 M68KGetDRegister(int n)
+{
+ m68k_register_t r;
+
+ switch (n)
+ {
+ case 0: r = M68K_REG_D0; break;
+ case 1: r = M68K_REG_D1; break;
+ case 2: r = M68K_REG_D2; break;
+ case 3: r = M68K_REG_D3; break;
+ case 4: r = M68K_REG_D4; break;
+ case 5: r = M68K_REG_D5; break;
+ case 6: r = M68K_REG_D6; break;
+ case 7: r = M68K_REG_D7; break;
+ default: r = M68K_REG_D7; break;
+ }
+
+ return m68k_get_reg(NULL, r);
+}
+
+UINT32 M68KGetPC(void)
+{
+ return m68k_get_reg(NULL, M68K_REG_PC);
+}
+
+void M68KSaveState(CBlockFile *StateFile, const char *name)
+{
+ StateFile->NewBlock(name, __FILE__);
+
+ /*
+ * Rather than writing the context directly, the get/set register
+ * functions are used, ensuring that all context members are packed/
+ * unpacked correctly.
+ *
+ * Note: Some of these are undoubtedly 68010 or 68020 registers and not
+ * really necessary. But if the layout is changed now, the save state
+ * version has to be changed, so don't do it!
+ */
+
+ UINT32 data[34];
+ m68ki_cpu_core Ctx;
+
+ m68k_get_context(&Ctx);
+
+ data[0] = Ctx.int_level;
+ data[1] = Ctx.int_cycles;
+ data[2] = Ctx.stopped;
+ data[3] = m68k_get_reg(NULL, M68K_REG_D0);
+ data[4] = m68k_get_reg(NULL, M68K_REG_D1);
+ data[5] = m68k_get_reg(NULL, M68K_REG_D2);
+ data[6] = m68k_get_reg(NULL, M68K_REG_D3);
+ data[7] = m68k_get_reg(NULL, M68K_REG_D4);
+ data[8] = m68k_get_reg(NULL, M68K_REG_D5);
+ data[9] = m68k_get_reg(NULL, M68K_REG_D6);
+ data[10] = m68k_get_reg(NULL, M68K_REG_D7);
+ data[11] = m68k_get_reg(NULL, M68K_REG_A0);
+ data[12] = m68k_get_reg(NULL, M68K_REG_A1);
+ data[13] = m68k_get_reg(NULL, M68K_REG_A2);
+ data[14] = m68k_get_reg(NULL, M68K_REG_A3);
+ data[15] = m68k_get_reg(NULL, M68K_REG_A4);
+ data[16] = m68k_get_reg(NULL, M68K_REG_A5);
+ data[17] = m68k_get_reg(NULL, M68K_REG_A6);
+ data[18] = m68k_get_reg(NULL, M68K_REG_A7);
+ data[19] = m68k_get_reg(NULL, M68K_REG_PC);
+ data[20] = m68k_get_reg(NULL, M68K_REG_SR);
+ data[21] = m68k_get_reg(NULL, M68K_REG_SP);
+ data[22] = m68k_get_reg(NULL, M68K_REG_USP);
+ data[23] = m68k_get_reg(NULL, M68K_REG_ISP);
+ data[24] = m68k_get_reg(NULL, M68K_REG_MSP);
+ data[25] = m68k_get_reg(NULL, M68K_REG_SFC);
+ data[26] = m68k_get_reg(NULL, M68K_REG_DFC);
+ data[27] = m68k_get_reg(NULL, M68K_REG_VBR);
+ data[28] = m68k_get_reg(NULL, M68K_REG_CACR);
+ data[29] = m68k_get_reg(NULL, M68K_REG_CAAR);
+ data[30] = m68k_get_reg(NULL, M68K_REG_PREF_ADDR);
+ data[31] = m68k_get_reg(NULL, M68K_REG_PREF_DATA);
+ data[32] = m68k_get_reg(NULL, M68K_REG_PPC);
+ data[33] = m68k_get_reg(NULL, M68K_REG_IR);
+
+ StateFile->Write(data, sizeof(data));
+}
+
+void M68KLoadState(CBlockFile *StateFile, const char *name)
+{
+ if (OKAY != StateFile->FindBlock(name))
+ {
+ ErrorLog("Unable to load 68K state. Save state file is corrupt.");
+ return;
+ }
+
+ UINT32 data[34];
+ m68ki_cpu_core Ctx;
+
+ StateFile->Read(data, sizeof(data));
+
+ // These must be set first, to ensure another contexts' IRQs aren't active when PC is changed
+ m68k_get_context(&Ctx);
+ Ctx.int_level = data[0];
+ Ctx.int_cycles = data[1];
+ Ctx.stopped = data[2];
+ m68k_set_context(&Ctx); // write them back to context
+ m68k_set_reg(M68K_REG_D0, data[3]);
+ m68k_set_reg(M68K_REG_D1, data[4]);
+ m68k_set_reg(M68K_REG_D2, data[5]);
+ m68k_set_reg(M68K_REG_D3, data[6]);
+ m68k_set_reg(M68K_REG_D4, data[7]);
+ m68k_set_reg(M68K_REG_D5, data[8]);
+ m68k_set_reg(M68K_REG_D6, data[9]);
+ m68k_set_reg(M68K_REG_D7, data[10]);
+ m68k_set_reg(M68K_REG_A0, data[11]);
+ m68k_set_reg(M68K_REG_A1, data[12]);
+ m68k_set_reg(M68K_REG_A2, data[13]);
+ m68k_set_reg(M68K_REG_A3, data[14]);
+ m68k_set_reg(M68K_REG_A4, data[15]);
+ m68k_set_reg(M68K_REG_A5, data[16]);
+ m68k_set_reg(M68K_REG_A6, data[17]);
+ m68k_set_reg(M68K_REG_A7, data[18]);
+ m68k_set_reg(M68K_REG_PC, data[19]);
+ m68k_set_reg(M68K_REG_SR, data[20]);
+ m68k_set_reg(M68K_REG_SP, data[21]);
+ m68k_set_reg(M68K_REG_USP, data[22]);
+ m68k_set_reg(M68K_REG_ISP, data[23]);
+ m68k_set_reg(M68K_REG_MSP, data[24]);
+ m68k_set_reg(M68K_REG_SFC, data[25]);
+ m68k_set_reg(M68K_REG_DFC, data[26]);
+ m68k_set_reg(M68K_REG_VBR, data[27]);
+ m68k_set_reg(M68K_REG_CACR, data[28]);
+ m68k_set_reg(M68K_REG_CAAR, data[29]);
+ m68k_set_reg(M68K_REG_PREF_ADDR, data[30]);
+ m68k_set_reg(M68K_REG_PREF_DATA, data[31]);
+ m68k_set_reg(M68K_REG_PPC, data[32]);
+ m68k_set_reg(M68K_REG_IR, data[33]);
+}
+
+// Emulation functions
+
+void M68KSetIRQ(int irqLevel)
+{
+ m68k_set_irq(irqLevel);
+}
+
+int M68KRun(int numCycles)
+{
+#ifdef SUPERMODEL_DEBUGGER
+ if (s_Debug != NULL)
+ {
+ s_Debug->CPUActive();
+ s_lastCycles += numCycles;
+ }
+#endif // SUPERMODEL_DEBUGGER
+ int doneCycles = m68k_execute(numCycles);
+#ifdef SUPERMODEL_DEBUGGER
+ if (s_Debug != NULL)
+ {
+ s_Debug->CPUInactive();
+ s_lastCycles -= m68k_cycles_remaining();
+ }
+#endif // SUPERMODEL_DEBUGGER
+ return doneCycles;
+}
+
+void M68KReset(void)
+{
+ m68k_pulse_reset();
+#ifdef SUPERMODEL_DEBUGGER
+ s_lastCycles = 0;
+#endif
+ DebugLog("68K reset\n");
+}
+
+// Callback setup
+
+void M68KSetIRQCallback(int (*F)(int nIRQ))
+{
+ IRQAck = F;
+}
+
+void M68KAttachBus(IBus *BusPtr)
+{
+ s_Bus = BusPtr;
+ DebugLog("Attached bus to 68K\n");
+}
+
+// Context switching
+
+void M68KGetContext(M68KCtx *Dest)
+{
+ Dest->IRQAck = IRQAck;
+ Dest->Bus = s_Bus;
+#ifdef SUPERMODEL_DEBUGGER
+ Dest->Debug = s_Debug;
+#endif // SUPERMODEL_DEBUGGER
+ m68k_get_context(&(Dest->musashiCtx));
+}
+
+void M68KSetContext(M68KCtx *Src)
+{
+ IRQAck = Src->IRQAck;
+ s_Bus = Src->Bus;
+#ifdef SUPERMODEL_DEBUGGER
+ s_Debug = Src->Debug;
+#endif // SUPERMODEL_DEBUGGER
+ m68k_set_context(&(Src->musashiCtx));
+}
+
+// One-time initialization
+
+bool M68KInit(void)
+{
+ m68k_init();
+ m68k_set_cpu_type(M68K_CPU_TYPE_68000);
+ m68k_set_int_ack_callback(M68KIRQCallback);
+ s_Bus = NULL;
+#ifdef SUPERMODEL_DEBUGGER
+ s_Debug = NULL;
+#endif // SUPERMODEL_DEBUGGER
+ DebugLog("Initialized 68K\n");
+ return OKAY;
+}
+
+#ifdef SUPERMODEL_DEBUGGER
+UINT32 M68KGetRegister(M68KCtx *Src, unsigned reg)
+{
+ switch (reg)
+ {
+ case DBG68K_REG_PC: return m68k_get_reg(&(Src->musashiCtx), M68K_REG_PC);
+ case DBG68K_REG_SR: return m68k_get_reg(&(Src->musashiCtx), M68K_REG_SR);
+ case DBG68K_REG_SP: return m68k_get_reg(&(Src->musashiCtx), M68K_REG_SP);
+ case DBG68K_REG_D0: return m68k_get_reg(&(Src->musashiCtx), M68K_REG_D0);
+ case DBG68K_REG_D1: return m68k_get_reg(&(Src->musashiCtx), M68K_REG_D1);
+ case DBG68K_REG_D2: return m68k_get_reg(&(Src->musashiCtx), M68K_REG_D2);
+ case DBG68K_REG_D3: return m68k_get_reg(&(Src->musashiCtx), M68K_REG_D3);
+ case DBG68K_REG_D4: return m68k_get_reg(&(Src->musashiCtx), M68K_REG_D4);
+ case DBG68K_REG_D5: return m68k_get_reg(&(Src->musashiCtx), M68K_REG_D5);
+ case DBG68K_REG_D6: return m68k_get_reg(&(Src->musashiCtx), M68K_REG_D6);
+ case DBG68K_REG_D7: return m68k_get_reg(&(Src->musashiCtx), M68K_REG_D7);
+ case DBG68K_REG_A0: return m68k_get_reg(&(Src->musashiCtx), M68K_REG_A0);
+ case DBG68K_REG_A1: return m68k_get_reg(&(Src->musashiCtx), M68K_REG_A1);
+ case DBG68K_REG_A2: return m68k_get_reg(&(Src->musashiCtx), M68K_REG_A2);
+ case DBG68K_REG_A3: return m68k_get_reg(&(Src->musashiCtx), M68K_REG_A3);
+ case DBG68K_REG_A4: return m68k_get_reg(&(Src->musashiCtx), M68K_REG_A4);
+ case DBG68K_REG_A5: return m68k_get_reg(&(Src->musashiCtx), M68K_REG_A5);
+ case DBG68K_REG_A6: return m68k_get_reg(&(Src->musashiCtx), M68K_REG_A6);
+ case DBG68K_REG_A7: return m68k_get_reg(&(Src->musashiCtx), M68K_REG_A7);
+ default: return 0;
+ }
+}
+
+UINT32 M68KSetRegister(M68KCtx *Src, unsigned reg, UINT32 val)
+{
+ switch (reg)
+ {
+ case DBG68K_REG_PC: m68k_set_reg(M68K_REG_PC, val); return true;
+ case DBG68K_REG_SR: m68k_set_reg(M68K_REG_SR, val); return true;
+ case DBG68K_REG_SP: m68k_set_reg(M68K_REG_SP, val); return true;
+ case DBG68K_REG_D0: m68k_set_reg(M68K_REG_D0, val); return true;
+ case DBG68K_REG_D1: m68k_set_reg(M68K_REG_D1, val); return true;
+ case DBG68K_REG_D2: m68k_set_reg(M68K_REG_D2, val); return true;
+ case DBG68K_REG_D3: m68k_set_reg(M68K_REG_D3, val); return true;
+ case DBG68K_REG_D4: m68k_set_reg(M68K_REG_D4, val); return true;
+ case DBG68K_REG_D5: m68k_set_reg(M68K_REG_D5, val); return true;
+ case DBG68K_REG_D6: m68k_set_reg(M68K_REG_D6, val); return true;
+ case DBG68K_REG_D7: m68k_set_reg(M68K_REG_D7, val); return true;
+ case DBG68K_REG_A0: m68k_set_reg(M68K_REG_A0, val); return true;
+ case DBG68K_REG_A1: m68k_set_reg(M68K_REG_A1, val); return true;
+ case DBG68K_REG_A2: m68k_set_reg(M68K_REG_A2, val); return true;
+ case DBG68K_REG_A3: m68k_set_reg(M68K_REG_A3, val); return true;
+ case DBG68K_REG_A4: m68k_set_reg(M68K_REG_A4, val); return true;
+ case DBG68K_REG_A5: m68k_set_reg(M68K_REG_A5, val); return true;
+ case DBG68K_REG_A6: m68k_set_reg(M68K_REG_A6, val); return true;
+ case DBG68K_REG_A7: m68k_set_reg(M68K_REG_A7, val); return true;
+ default: return false;
+ }
+}
+#endif // SUPERMODEL_DEBUGGER
+
+/******************************************************************************
+ Musashi 68K Handlers
+
+ Musashi/m68kconf.h has been configured to call these directly.
+******************************************************************************/
+
+extern "C" {
+
+#ifdef SUPERMODEL_DEBUGGER
+void M68KDebugCallback()
+{
+ if (s_Debug != NULL)
+ {
+ UINT32 pc = m68k_get_reg(NULL, M68K_REG_PC);
+ UINT32 opcode = s_Bus->Read16(pc);
+ s_Debug->CPUExecute(pc, opcode, s_lastCycles - m68k_cycles_remaining());
+ s_lastCycles = m68k_cycles_remaining();
+ }
+}
+#endif // SUPERMODEL_DEBUGGER
+
+int M68KIRQCallback(int nIRQ)
+{
+#ifdef SUPERMODEL_DEBUGGER
+ if (s_Debug != NULL)
+ {
+ s_Debug->CPUException(25);
+ s_Debug->CPUInterrupt(nIRQ - 1);
+ }
+#endif // SUPERMODEL_DEBUGGER
+ if (NULL == IRQAck) // no handler, use default behavior
+ {
+ m68k_set_irq(0); // clear line
+ return M68K_IRQ_AUTOVECTOR;
+ }
+ else
+ return IRQAck(nIRQ);
+}
+
+unsigned int FASTCALL M68KFetch8(unsigned int a)
+{
+ return s_Bus->Read8(a);
+}
+
+unsigned int FASTCALL M68KFetch16(unsigned int a)
+{
+ return s_Bus->Read16(a);
+}
+
+unsigned int FASTCALL M68KFetch32(unsigned int a)
+{
+ return s_Bus->Read32(a);
+}
+
+unsigned int FASTCALL M68KRead8(unsigned int a)
+{
+ return s_Bus->Read8(a);
+}
+
+unsigned int FASTCALL M68KRead16(unsigned int a)
+{
+ return s_Bus->Read16(a);
+}
+
+unsigned int FASTCALL M68KRead32(unsigned int a)
+{
+ return s_Bus->Read32(a);
+}
+
+void FASTCALL M68KWrite8(unsigned int a, unsigned int d)
+{
+ s_Bus->Write8(a, d);
+}
+
+void FASTCALL M68KWrite16(unsigned int a, unsigned int d)
+{
+ s_Bus->Write16(a, d);
+}
+
+void FASTCALL M68KWrite32(unsigned int a, unsigned int d)
+{
+ s_Bus->Write32(a, d);
+}
+
+} // extern "C"
diff --git a/Src/CPU/68K/68K.h b/Src/CPU/68K/68K.h
new file mode 100644
index 0000000..99b267b
--- /dev/null
+++ b/Src/CPU/68K/68K.h
@@ -0,0 +1,392 @@
+/**
+ ** Supermodel
+ ** A Sega Model 3 Arcade Emulator.
+ ** Copyright 2011 Bart Trzynadlowski, Nik Henson
+ **
+ ** This file is part of Supermodel.
+ **
+ ** Supermodel is free software: you can redistribute it and/or modify it under
+ ** the terms of the GNU General Public License as published by the Free
+ ** Software Foundation, either version 3 of the License, or (at your option)
+ ** any later version.
+ **
+ ** Supermodel is distributed in the hope that it will be useful, but WITHOUT
+ ** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ ** FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ ** more details.
+ **
+ ** You should have received a copy of the GNU General Public License along
+ ** with Supermodel. If not, see .
+ **/
+
+/*
+ * 68K.h
+ *
+ * Header file for 68K CPU interface. Caution: 68K emulator is not thread-safe.
+ *
+ * TO-DO List:
+ * -----------
+ * - Optimize things, perhaps by using FASTCALL
+ */
+
+#ifndef INCLUDED_68K_H
+#define INCLUDED_68K_H
+
+#include
+#include "Types.h"
+#include "Musashi/m68k.h"
+#include "Musashi/m68kctx.h"
+#include "CPU/Bus.h"
+
+// This doesn't work for now (needs to be added to the prototypes in m68k.h for m68k_read_memory*)
+//#ifndef FASTCALL
+ #undef FASTCALL
+ #define FASTCALL
+//#endif
+
+#ifdef SUPERMODEL_DEBUGGER
+namespace Debugger {
+ class CMusashi68KDebug;
+}
+#endif // SUPERMODEL_DEBUGGER
+
+/******************************************************************************
+ Definitions
+******************************************************************************/
+
+// IRQ callback special return values
+#define M68K_IRQ_AUTOVECTOR M68K_INT_ACK_AUTOVECTOR // signals an autovectored interrupt
+#define M68K_IRQ_SPURIOUS M68K_INT_ACK_SPURIOUS // signals a spurious interrupt
+
+
+/******************************************************************************
+ CPU Context
+******************************************************************************/
+
+/*
+ * M68KCtx:
+ *
+ * Complete state of a single 68K. Do NOT manipulate these directly. Set the
+ * context and then use the M68K* functions below to attach a bus and IRQ
+ * callback to the active context.
+ */
+typedef struct SM68KCtx
+{
+public:
+ m68ki_cpu_core musashiCtx; // CPU context
+ IBus *Bus; // memory handlers
+ int (*IRQAck)(int); // IRQ acknowledge callback
+#ifdef SUPERMODEL_DEBUGGER
+ Debugger::CMusashi68KDebug *Debug; // holds debugger (if attached)
+#endif // SUPERMODEL_DEBUGGER
+
+ SM68KCtx(void)
+ {
+ Bus = NULL;
+ IRQAck = NULL;
+ memset(&musashiCtx, 0, sizeof(musashiCtx)); // very important! garbage in context at reset can cause very strange bugs
+#ifdef SUPERMODEL_DEBUGGER
+ Debug = NULL;
+#endif // SUPERMODEL_DEBUGGER
+ }
+
+ ~SM68KCtx(void)
+ {
+ Bus = NULL;
+ IRQAck = NULL;
+ }
+} M68KCtx;;
+
+
+/******************************************************************************
+ 68K Interface
+
+ Unless otherwise noted, all functions operate on the active context.
+******************************************************************************/
+
+/*
+ * M68KGetARegister(n):
+ *
+ * Parameters:
+ * n Register number (0-7).
+ *
+ * Returns:
+ * Register An.
+ */
+extern UINT32 M68KGetARegister(int n);
+
+/*
+ * M68KSetARegister(n, v):
+ *
+ * Parameters:
+ * n Register number (0-7).
+ * v Value to set register An to.
+ */
+extern void M68KSetARegister(int n, UINT32 v);
+
+/*
+ * M68KGetDRegister(n):
+ *
+ * Parameters:
+ * n Register number (0-7).
+ *
+ * Returns:
+ * Register Dn.
+ */
+extern UINT32 M68KGetDRegister(int n);
+
+/*
+ * M68KGetDRegister(n, v):
+ *
+ * Parameters:
+ * n Register number (0-7).
+ * v Value to set register Dn to.
+ */
+extern void M68KSetDRegister(int n, UINT32 v);
+
+/*
+ * M68KGetPC():
+ *
+ * Returns:
+ * Current program counter.
+ */
+extern UINT32 M68KGetPC(void);
+
+/*
+ * M68KSaveState(StateFile, name):
+ *
+ * Saves the CPU state to the block file.
+ *
+ * Parameters:
+ * StateFile Block file.
+ * name Name of block to create (e.g. "Main 68K"), to facilitate
+ * multiple 68K states in the same file.
+ */
+extern void M68KSaveState(CBlockFile *StateFile, const char *name);
+
+/*
+ * M68KLoadState(StateFile, name):
+ *
+ * Loads the CPU state.
+ *
+ * Parameters:
+ * StateFile Block file.
+ * name Name of block to load.
+ */
+extern void M68KLoadState(CBlockFile *StateFile, const char *name);
+
+/*
+ * M68KSetIRQ(irqLevel):
+ *
+ * Sets the interrupt level (IPL2-IPL0 pins).
+ *
+ * Parameters:
+ * irqLevel The interrupt level (1-7) or 0 to clear the interrupt.
+ */
+extern void M68KSetIRQ(int irqLevel);
+
+/*
+ * M68KRun(numCycles):
+ *
+ * Runs the 68K.
+ *
+ * Parameters:
+ * numCycles Number of cycles to run.
+ *
+ * Returns:
+ * Number of cycles executed.
+ */
+extern int M68KRun(int numCycles);
+
+/*
+ * M68KReset():
+ *
+ * Resets the 68K.
+ */
+extern void M68KReset(void);
+
+/*
+ * M68KSetIRQCallback(F):
+ *
+ * Installs an interrupt acknowledge callback for the currently active CPU. The
+ * default behavior is to always assume autovectored interrupts.
+ *
+ * Parameters:
+ * F Callback function.
+ */
+extern void M68KSetIRQCallback(int (*F)(int));
+
+/*
+ * M68KAttachBus(IBus *BusPtr):
+ *
+ * Attaches a bus object to the 68K, which will be used to perform all address
+ * space accesses. The 8, 16, and 32-bit read and write handlers are used.
+ * This must be set up before any 68K-related emulation functions are invoked
+ * or the program will crash!
+ *
+ * Parameters:
+ * BusPtr Pointer to bus object to use for all address space accesses.
+ */
+extern void M68KAttachBus(IBus *BusPtr);
+
+/*
+ * M68KInit():
+ *
+ * Initializes the 68K emulator. Must be called once per program session prior
+ * to any 68K emulation functions. A context must be mapped before calling
+ * this.
+ *
+ * Returns:
+ * Always returns OKAY.
+ */
+extern bool M68KInit(void);
+
+/*
+ * M68KGetContext(M68KCtx *Dest):
+ *
+ * Copies the internal (active) 68K context back to the destination.
+ *
+ * Parameters:
+ * Dest Location to which to copy 68K context.
+ */
+extern void M68KGetContext(M68KCtx *Dest);
+
+/*
+ * M68KSetContext(M68KCtx *Src):
+ *
+ * Sets the specified 68K context by copying it to the internal context.
+ *
+ * Parameters:
+ * Src Location from which to copy 68K context.
+ */
+extern void M68KSetContext(M68KCtx *Src);
+
+#ifdef SUPERMODEL_DEBUGGER
+#define DBG68K_REG_PC 0
+#define DBG68K_REG_SR 1
+#define DBG68K_REG_SP 2
+#define DBG68K_REG_D0 3
+#define DBG68K_REG_D1 4
+#define DBG68K_REG_D2 5
+#define DBG68K_REG_D3 6
+#define DBG68K_REG_D4 7
+#define DBG68K_REG_D5 8
+#define DBG68K_REG_D6 9
+#define DBG68K_REG_D7 10
+#define DBG68K_REG_A0 11
+#define DBG68K_REG_A1 12
+#define DBG68K_REG_A2 13
+#define DBG68K_REG_A3 14
+#define DBG68K_REG_A4 15
+#define DBG68K_REG_A5 16
+#define DBG68K_REG_A6 17
+#define DBG68K_REG_A7 18
+
+/*
+ * M68KGetRegister(ctx, reg):
+ *
+ * Parameters:
+ * ctx Musashi 68K context.
+ * reg Register (use DBG68K_REG_* macros).
+ *
+ * Returns:
+ * Register value.
+ */
+UINT32 M68KGetRegister(SM68KCtx *ctx, unsigned reg);
+
+/*
+ * M68KSetRegister(ctx, reg, value):
+ *
+ * Parameters:
+ * ctx Musashi 68K context.
+ * reg Register (use DBG68K_REG_* macros).
+ * value Vale to write.
+ *
+ * Returns:
+ * True if successful, false if register does not exist.
+ */
+UINT32 M68KSetRegister(SM68KCtx *ctx, unsigned reg, UINT32 val);
+#endif // SUPERMODEL_DEBUGGER
+
+/******************************************************************************
+ 68K Handlers
+
+ Intended for use directly by the 68K core.
+******************************************************************************/
+
+
+extern "C" {
+
+#ifdef SUPERMODEL_DEBUGGER
+extern void M68KDebugCallback();
+#endif // SUPERMODEL_DEBUGGER
+
+/*
+ * M68KIRQCallback(nIRQ):
+ *
+ * Interrupt acknowledge callback. Called when an interrupt is being serviced.
+ * Actually implemented by calling a user-supplied callback.
+ *
+ * Parameters:
+ * nIRQ IRQ level (1-7).
+ *
+ * Returns:
+ * The interrupt vector to use, M68K_IRQ_AUTOVECTOR, or
+ * M68K_IRQ_SPURIOUS. If no callback has been installed, the default
+ * callback is used and always returns M68K_IRQ_AUTOVECTOR.
+ */
+extern int M68KIRQCallback(int nIRQ);
+
+/*
+ * M68KFetch8(a):
+ * M68KFetch16(a):
+ * M68KFetch32(a):
+ *
+ * Read data from the program address space.
+ *
+ * Parameters:
+ * a Address to read from.
+ *
+ * Returns:
+ * The 8, 16, or 32-bit value read.
+ */
+unsigned int FASTCALL M68KFetch8(unsigned int a);
+unsigned int FASTCALL M68KFetch16(unsigned int a);
+unsigned int FASTCALL M68KFetch32(unsigned int a);
+
+/*
+ * M68KRead8(a):
+ * M68KRead16(a):
+ * M68KRead32(a):
+ *
+ * Read data from the data address space.
+ *
+ * Parameters:
+ * a Address to read from.
+ *
+ * Returns:
+ * The 8, 16, or 32-bit value read.
+ */
+unsigned int FASTCALL M68KRead8(unsigned int a);
+unsigned int FASTCALL M68KRead16(unsigned int a);
+unsigned int FASTCALL M68KRead32(unsigned int a);
+
+/*
+ * M68KWrite8(a, d):
+ * M68KWrite16(a, d):
+ * M68KWrite32(a, d):
+ *
+ * Writes to the data address space.
+ *
+ * Parameters:
+ * a Address to write to.
+ * d Data to write.
+ */
+void FASTCALL M68KWrite8(unsigned int a, unsigned int d);
+void FASTCALL M68KWrite16(unsigned int a, unsigned int d);
+void FASTCALL M68KWrite32(unsigned int a, unsigned int d);
+
+} // extern "C"
+
+
+#endif // INCLUDED_68K_H
\ No newline at end of file
diff --git a/Src/CPU/68K/68K.o b/Src/CPU/68K/68K.o
new file mode 100644
index 0000000..e546f87
Binary files /dev/null and b/Src/CPU/68K/68K.o differ
diff --git a/Src/CPU/68K/Musashi/generated/m68kopac.c b/Src/CPU/68K/Musashi/generated/m68kopac.c
new file mode 100644
index 0000000..02eee02
--- /dev/null
+++ b/Src/CPU/68K/Musashi/generated/m68kopac.c
@@ -0,0 +1,12062 @@
+#include "m68kcpu.h"
+
+/* ======================================================================== */
+/* ========================= INSTRUCTION HANDLERS ========================= */
+/* ======================================================================== */
+
+
+void m68k_op_1010(void)
+{
+ m68ki_exception_1010();
+}
+
+
+void m68k_op_1111(void)
+{
+ m68ki_exception_1111();
+}
+
+
+void m68k_op_abcd_8_rr(void)
+{
+ uint* r_dst = &DX;
+ uint src = DY;
+ uint dst = *r_dst;
+ uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
+
+ FLAG_V = ~res; /* Undefined V behavior */
+
+ if(res > 9)
+ res += 6;
+ res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
+ FLAG_X = FLAG_C = (res > 0x99) << 8;
+ if(FLAG_C)
+ res -= 0xa0;
+
+ FLAG_V &= res; /* Undefined V behavior part II */
+ FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+}
+
+
+void m68k_op_abcd_8_mm_ax7(void)
+{
+ uint src = OPER_AY_PD_8();
+ uint ea = EA_A7_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
+
+ FLAG_V = ~res; /* Undefined V behavior */
+
+ if(res > 9)
+ res += 6;
+ res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
+ FLAG_X = FLAG_C = (res > 0x99) << 8;
+ if(FLAG_C)
+ res -= 0xa0;
+
+ FLAG_V &= res; /* Undefined V behavior part II */
+ FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_abcd_8_mm_ay7(void)
+{
+ uint src = OPER_A7_PD_8();
+ uint ea = EA_AX_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
+
+ FLAG_V = ~res; /* Undefined V behavior */
+
+ if(res > 9)
+ res += 6;
+ res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
+ FLAG_X = FLAG_C = (res > 0x99) << 8;
+ if(FLAG_C)
+ res -= 0xa0;
+
+ FLAG_V &= res; /* Undefined V behavior part II */
+ FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_abcd_8_mm_axy7(void)
+{
+ uint src = OPER_A7_PD_8();
+ uint ea = EA_A7_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
+
+ FLAG_V = ~res; /* Undefined V behavior */
+
+ if(res > 9)
+ res += 6;
+ res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
+ FLAG_X = FLAG_C = (res > 0x99) << 8;
+ if(FLAG_C)
+ res -= 0xa0;
+
+ FLAG_V &= res; /* Undefined V behavior part II */
+ FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_abcd_8_mm(void)
+{
+ uint src = OPER_AY_PD_8();
+ uint ea = EA_AX_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
+
+ FLAG_V = ~res; /* Undefined V behavior */
+
+ if(res > 9)
+ res += 6;
+ res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
+ FLAG_X = FLAG_C = (res > 0x99) << 8;
+ if(FLAG_C)
+ res -= 0xa0;
+
+ FLAG_V &= res; /* Undefined V behavior part II */
+ FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_add_8_er_d(void)
+{
+ uint* r_dst = &DX;
+ uint src = MASK_OUT_ABOVE_8(DY);
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_8_er_ai(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_AI_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_8_er_pi(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_PI_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_8_er_pi7(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_A7_PI_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_8_er_pd(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_PD_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_8_er_pd7(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_A7_PD_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_8_er_di(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_DI_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_8_er_ix(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_IX_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_8_er_aw(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AW_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_8_er_al(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AL_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_8_er_pcdi(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_PCDI_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_8_er_pcix(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_PCIX_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_8_er_i(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_I_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_16_er_d(void)
+{
+ uint* r_dst = &DX;
+ uint src = MASK_OUT_ABOVE_16(DY);
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_16_er_a(void)
+{
+ uint* r_dst = &DX;
+ uint src = MASK_OUT_ABOVE_16(AY);
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_16_er_ai(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_AI_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_16_er_pi(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_PI_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_16_er_pd(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_PD_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_16_er_di(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_DI_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_16_er_ix(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_IX_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_16_er_aw(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AW_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_16_er_al(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AL_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_16_er_pcdi(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_PCDI_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_16_er_pcix(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_PCIX_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_16_er_i(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_I_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_add_32_er_d(void)
+{
+ uint* r_dst = &DX;
+ uint src = DY;
+ uint dst = *r_dst;
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_add_32_er_a(void)
+{
+ uint* r_dst = &DX;
+ uint src = AY;
+ uint dst = *r_dst;
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_add_32_er_ai(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_AI_32();
+ uint dst = *r_dst;
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_add_32_er_pi(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_PI_32();
+ uint dst = *r_dst;
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_add_32_er_pd(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_PD_32();
+ uint dst = *r_dst;
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_add_32_er_di(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_DI_32();
+ uint dst = *r_dst;
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_add_32_er_ix(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_IX_32();
+ uint dst = *r_dst;
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_add_32_er_aw(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AW_32();
+ uint dst = *r_dst;
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_add_32_er_al(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AL_32();
+ uint dst = *r_dst;
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_add_32_er_pcdi(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_PCDI_32();
+ uint dst = *r_dst;
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_add_32_er_pcix(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_PCIX_32();
+ uint dst = *r_dst;
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_add_32_er_i(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_I_32();
+ uint dst = *r_dst;
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_add_8_re_ai(void)
+{
+ uint ea = EA_AY_AI_8();
+ uint src = MASK_OUT_ABOVE_8(DX);
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_add_8_re_pi(void)
+{
+ uint ea = EA_AY_PI_8();
+ uint src = MASK_OUT_ABOVE_8(DX);
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_add_8_re_pi7(void)
+{
+ uint ea = EA_A7_PI_8();
+ uint src = MASK_OUT_ABOVE_8(DX);
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_add_8_re_pd(void)
+{
+ uint ea = EA_AY_PD_8();
+ uint src = MASK_OUT_ABOVE_8(DX);
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_add_8_re_pd7(void)
+{
+ uint ea = EA_A7_PD_8();
+ uint src = MASK_OUT_ABOVE_8(DX);
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_add_8_re_di(void)
+{
+ uint ea = EA_AY_DI_8();
+ uint src = MASK_OUT_ABOVE_8(DX);
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_add_8_re_ix(void)
+{
+ uint ea = EA_AY_IX_8();
+ uint src = MASK_OUT_ABOVE_8(DX);
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_add_8_re_aw(void)
+{
+ uint ea = EA_AW_8();
+ uint src = MASK_OUT_ABOVE_8(DX);
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_add_8_re_al(void)
+{
+ uint ea = EA_AL_8();
+ uint src = MASK_OUT_ABOVE_8(DX);
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_add_16_re_ai(void)
+{
+ uint ea = EA_AY_AI_16();
+ uint src = MASK_OUT_ABOVE_16(DX);
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_add_16_re_pi(void)
+{
+ uint ea = EA_AY_PI_16();
+ uint src = MASK_OUT_ABOVE_16(DX);
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_add_16_re_pd(void)
+{
+ uint ea = EA_AY_PD_16();
+ uint src = MASK_OUT_ABOVE_16(DX);
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_add_16_re_di(void)
+{
+ uint ea = EA_AY_DI_16();
+ uint src = MASK_OUT_ABOVE_16(DX);
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_add_16_re_ix(void)
+{
+ uint ea = EA_AY_IX_16();
+ uint src = MASK_OUT_ABOVE_16(DX);
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_add_16_re_aw(void)
+{
+ uint ea = EA_AW_16();
+ uint src = MASK_OUT_ABOVE_16(DX);
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_add_16_re_al(void)
+{
+ uint ea = EA_AL_16();
+ uint src = MASK_OUT_ABOVE_16(DX);
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_add_32_re_ai(void)
+{
+ uint ea = EA_AY_AI_32();
+ uint src = DX;
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_add_32_re_pi(void)
+{
+ uint ea = EA_AY_PI_32();
+ uint src = DX;
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_add_32_re_pd(void)
+{
+ uint ea = EA_AY_PD_32();
+ uint src = DX;
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_add_32_re_di(void)
+{
+ uint ea = EA_AY_DI_32();
+ uint src = DX;
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_add_32_re_ix(void)
+{
+ uint ea = EA_AY_IX_32();
+ uint src = DX;
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_add_32_re_aw(void)
+{
+ uint ea = EA_AW_32();
+ uint src = DX;
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_add_32_re_al(void)
+{
+ uint ea = EA_AL_32();
+ uint src = DX;
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_adda_16_d(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(DY));
+}
+
+
+void m68k_op_adda_16_a(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(AY));
+}
+
+
+void m68k_op_adda_16_ai(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_AY_AI_16()));
+}
+
+
+void m68k_op_adda_16_pi(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_AY_PI_16()));
+}
+
+
+void m68k_op_adda_16_pd(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_AY_PD_16()));
+}
+
+
+void m68k_op_adda_16_di(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_AY_DI_16()));
+}
+
+
+void m68k_op_adda_16_ix(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_AY_IX_16()));
+}
+
+
+void m68k_op_adda_16_aw(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_AW_16()));
+}
+
+
+void m68k_op_adda_16_al(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_AL_16()));
+}
+
+
+void m68k_op_adda_16_pcdi(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_PCDI_16()));
+}
+
+
+void m68k_op_adda_16_pcix(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_PCIX_16()));
+}
+
+
+void m68k_op_adda_16_i(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_I_16()));
+}
+
+
+void m68k_op_adda_32_d(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + DY);
+}
+
+
+void m68k_op_adda_32_a(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + AY);
+}
+
+
+void m68k_op_adda_32_ai(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_AY_AI_32());
+}
+
+
+void m68k_op_adda_32_pi(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_AY_PI_32());
+}
+
+
+void m68k_op_adda_32_pd(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_AY_PD_32());
+}
+
+
+void m68k_op_adda_32_di(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_AY_DI_32());
+}
+
+
+void m68k_op_adda_32_ix(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_AY_IX_32());
+}
+
+
+void m68k_op_adda_32_aw(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_AW_32());
+}
+
+
+void m68k_op_adda_32_al(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_AL_32());
+}
+
+
+void m68k_op_adda_32_pcdi(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_PCDI_32());
+}
+
+
+void m68k_op_adda_32_pcix(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_PCIX_32());
+}
+
+
+void m68k_op_adda_32_i(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_I_32());
+}
+
+
+void m68k_op_addi_8_d(void)
+{
+ uint* r_dst = &DY;
+ uint src = OPER_I_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_addi_8_ai(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_AI_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_addi_8_pi(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_PI_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_addi_8_pi7(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_A7_PI_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_addi_8_pd(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_addi_8_pd7(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_A7_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_addi_8_di(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_DI_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_addi_8_ix(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_IX_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_addi_8_aw(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AW_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_addi_8_al(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AL_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_addi_16_d(void)
+{
+ uint* r_dst = &DY;
+ uint src = OPER_I_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_addi_16_ai(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_AI_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_addi_16_pi(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_PI_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_addi_16_pd(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_PD_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_addi_16_di(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_DI_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_addi_16_ix(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_IX_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_addi_16_aw(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AW_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_addi_16_al(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AL_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_addi_32_d(void)
+{
+ uint* r_dst = &DY;
+ uint src = OPER_I_32();
+ uint dst = *r_dst;
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_addi_32_ai(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_AI_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_addi_32_pi(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_PI_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_addi_32_pd(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_PD_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_addi_32_di(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_DI_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_addi_32_ix(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_IX_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_addi_32_aw(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AW_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_addi_32_al(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AL_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_addq_8_d(void)
+{
+ uint* r_dst = &DY;
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_addq_8_ai(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_AI_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_addq_8_pi(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_PI_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_addq_8_pi7(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_A7_PI_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_addq_8_pd(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_addq_8_pd7(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_A7_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_addq_8_di(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_DI_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_addq_8_ix(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_IX_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_addq_8_aw(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AW_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_addq_8_al(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AL_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_addq_16_d(void)
+{
+ uint* r_dst = &DY;
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_addq_16_a(void)
+{
+ uint* r_dst = &AY;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + (((REG_IR >> 9) - 1) & 7) + 1);
+}
+
+
+void m68k_op_addq_16_ai(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_AI_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_addq_16_pi(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_PI_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_addq_16_pd(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_PD_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_addq_16_di(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_DI_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_addq_16_ix(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_IX_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_addq_16_aw(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AW_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_addq_16_al(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AL_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_addq_32_d(void)
+{
+ uint* r_dst = &DY;
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint dst = *r_dst;
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_addq_32_a(void)
+{
+ uint* r_dst = &AY;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + (((REG_IR >> 9) - 1) & 7) + 1);
+}
+
+
+void m68k_op_addq_32_ai(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_AI_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_addq_32_pi(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_PI_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_addq_32_pd(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_PD_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_addq_32_di(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_DI_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_addq_32_ix(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_IX_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_addq_32_aw(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AW_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_addq_32_al(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AL_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_addx_8_rr(void)
+{
+ uint* r_dst = &DX;
+ uint src = MASK_OUT_ABOVE_8(DY);
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src + dst + XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+}
+
+
+void m68k_op_addx_16_rr(void)
+{
+ uint* r_dst = &DX;
+ uint src = MASK_OUT_ABOVE_16(DY);
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src + dst + XFLAG_AS_1();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+
+ res = MASK_OUT_ABOVE_16(res);
+ FLAG_Z |= res;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+}
+
+
+void m68k_op_addx_32_rr(void)
+{
+ uint* r_dst = &DX;
+ uint src = DY;
+ uint dst = *r_dst;
+ uint res = src + dst + XFLAG_AS_1();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+
+ res = MASK_OUT_ABOVE_32(res);
+ FLAG_Z |= res;
+
+ *r_dst = res;
+}
+
+
+void m68k_op_addx_8_mm_ax7(void)
+{
+ uint src = OPER_AY_PD_8();
+ uint ea = EA_A7_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst + XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_addx_8_mm_ay7(void)
+{
+ uint src = OPER_A7_PD_8();
+ uint ea = EA_AX_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst + XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_addx_8_mm_axy7(void)
+{
+ uint src = OPER_A7_PD_8();
+ uint ea = EA_A7_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst + XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_addx_8_mm(void)
+{
+ uint src = OPER_AY_PD_8();
+ uint ea = EA_AX_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst + XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_addx_16_mm(void)
+{
+ uint src = OPER_AY_PD_16();
+ uint ea = EA_AX_PD_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst + XFLAG_AS_1();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+
+ res = MASK_OUT_ABOVE_16(res);
+ FLAG_Z |= res;
+
+ m68ki_write_16(ea, res);
+}
+
+
+void m68k_op_addx_32_mm(void)
+{
+ uint src = OPER_AY_PD_32();
+ uint ea = EA_AX_PD_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst + XFLAG_AS_1();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+
+ res = MASK_OUT_ABOVE_32(res);
+ FLAG_Z |= res;
+
+ m68ki_write_32(ea, res);
+}
+
+
+void m68k_op_and_8_er_d(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_8(DX &= (DY | 0xffffff00));
+
+ FLAG_N = NFLAG_8(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_8_er_ai(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AY_AI_8() | 0xffffff00));
+
+ FLAG_N = NFLAG_8(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_8_er_pi(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AY_PI_8() | 0xffffff00));
+
+ FLAG_N = NFLAG_8(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_8_er_pi7(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_A7_PI_8() | 0xffffff00));
+
+ FLAG_N = NFLAG_8(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_8_er_pd(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AY_PD_8() | 0xffffff00));
+
+ FLAG_N = NFLAG_8(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_8_er_pd7(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_A7_PD_8() | 0xffffff00));
+
+ FLAG_N = NFLAG_8(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_8_er_di(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AY_DI_8() | 0xffffff00));
+
+ FLAG_N = NFLAG_8(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_8_er_ix(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AY_IX_8() | 0xffffff00));
+
+ FLAG_N = NFLAG_8(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_8_er_aw(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AW_8() | 0xffffff00));
+
+ FLAG_N = NFLAG_8(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_8_er_al(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AL_8() | 0xffffff00));
+
+ FLAG_N = NFLAG_8(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_8_er_pcdi(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_PCDI_8() | 0xffffff00));
+
+ FLAG_N = NFLAG_8(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_8_er_pcix(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_PCIX_8() | 0xffffff00));
+
+ FLAG_N = NFLAG_8(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_8_er_i(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_I_8() | 0xffffff00));
+
+ FLAG_N = NFLAG_8(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_16_er_d(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_16(DX &= (DY | 0xffff0000));
+
+ FLAG_N = NFLAG_16(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_16_er_ai(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AY_AI_16() | 0xffff0000));
+
+ FLAG_N = NFLAG_16(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_16_er_pi(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AY_PI_16() | 0xffff0000));
+
+ FLAG_N = NFLAG_16(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_16_er_pd(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AY_PD_16() | 0xffff0000));
+
+ FLAG_N = NFLAG_16(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_16_er_di(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AY_DI_16() | 0xffff0000));
+
+ FLAG_N = NFLAG_16(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_16_er_ix(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AY_IX_16() | 0xffff0000));
+
+ FLAG_N = NFLAG_16(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_16_er_aw(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AW_16() | 0xffff0000));
+
+ FLAG_N = NFLAG_16(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_16_er_al(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AL_16() | 0xffff0000));
+
+ FLAG_N = NFLAG_16(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_16_er_pcdi(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_PCDI_16() | 0xffff0000));
+
+ FLAG_N = NFLAG_16(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_16_er_pcix(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_PCIX_16() | 0xffff0000));
+
+ FLAG_N = NFLAG_16(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_16_er_i(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_I_16() | 0xffff0000));
+
+ FLAG_N = NFLAG_16(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_32_er_d(void)
+{
+ FLAG_Z = DX &= DY;
+
+ FLAG_N = NFLAG_32(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_32_er_ai(void)
+{
+ FLAG_Z = DX &= OPER_AY_AI_32();
+
+ FLAG_N = NFLAG_32(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_32_er_pi(void)
+{
+ FLAG_Z = DX &= OPER_AY_PI_32();
+
+ FLAG_N = NFLAG_32(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_32_er_pd(void)
+{
+ FLAG_Z = DX &= OPER_AY_PD_32();
+
+ FLAG_N = NFLAG_32(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_32_er_di(void)
+{
+ FLAG_Z = DX &= OPER_AY_DI_32();
+
+ FLAG_N = NFLAG_32(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_32_er_ix(void)
+{
+ FLAG_Z = DX &= OPER_AY_IX_32();
+
+ FLAG_N = NFLAG_32(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_32_er_aw(void)
+{
+ FLAG_Z = DX &= OPER_AW_32();
+
+ FLAG_N = NFLAG_32(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_32_er_al(void)
+{
+ FLAG_Z = DX &= OPER_AL_32();
+
+ FLAG_N = NFLAG_32(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_32_er_pcdi(void)
+{
+ FLAG_Z = DX &= OPER_PCDI_32();
+
+ FLAG_N = NFLAG_32(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_32_er_pcix(void)
+{
+ FLAG_Z = DX &= OPER_PCIX_32();
+
+ FLAG_N = NFLAG_32(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_32_er_i(void)
+{
+ FLAG_Z = DX &= OPER_I_32();
+
+ FLAG_N = NFLAG_32(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_and_8_re_ai(void)
+{
+ uint ea = EA_AY_AI_8();
+ uint res = DX & m68ki_read_8(ea);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_and_8_re_pi(void)
+{
+ uint ea = EA_AY_PI_8();
+ uint res = DX & m68ki_read_8(ea);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_and_8_re_pi7(void)
+{
+ uint ea = EA_A7_PI_8();
+ uint res = DX & m68ki_read_8(ea);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_and_8_re_pd(void)
+{
+ uint ea = EA_AY_PD_8();
+ uint res = DX & m68ki_read_8(ea);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_and_8_re_pd7(void)
+{
+ uint ea = EA_A7_PD_8();
+ uint res = DX & m68ki_read_8(ea);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_and_8_re_di(void)
+{
+ uint ea = EA_AY_DI_8();
+ uint res = DX & m68ki_read_8(ea);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_and_8_re_ix(void)
+{
+ uint ea = EA_AY_IX_8();
+ uint res = DX & m68ki_read_8(ea);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_and_8_re_aw(void)
+{
+ uint ea = EA_AW_8();
+ uint res = DX & m68ki_read_8(ea);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_and_8_re_al(void)
+{
+ uint ea = EA_AL_8();
+ uint res = DX & m68ki_read_8(ea);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_and_16_re_ai(void)
+{
+ uint ea = EA_AY_AI_16();
+ uint res = DX & m68ki_read_16(ea);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_and_16_re_pi(void)
+{
+ uint ea = EA_AY_PI_16();
+ uint res = DX & m68ki_read_16(ea);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_and_16_re_pd(void)
+{
+ uint ea = EA_AY_PD_16();
+ uint res = DX & m68ki_read_16(ea);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_and_16_re_di(void)
+{
+ uint ea = EA_AY_DI_16();
+ uint res = DX & m68ki_read_16(ea);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_and_16_re_ix(void)
+{
+ uint ea = EA_AY_IX_16();
+ uint res = DX & m68ki_read_16(ea);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_and_16_re_aw(void)
+{
+ uint ea = EA_AW_16();
+ uint res = DX & m68ki_read_16(ea);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_and_16_re_al(void)
+{
+ uint ea = EA_AL_16();
+ uint res = DX & m68ki_read_16(ea);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_and_32_re_ai(void)
+{
+ uint ea = EA_AY_AI_32();
+ uint res = DX & m68ki_read_32(ea);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_32(ea, res);
+}
+
+
+void m68k_op_and_32_re_pi(void)
+{
+ uint ea = EA_AY_PI_32();
+ uint res = DX & m68ki_read_32(ea);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_32(ea, res);
+}
+
+
+void m68k_op_and_32_re_pd(void)
+{
+ uint ea = EA_AY_PD_32();
+ uint res = DX & m68ki_read_32(ea);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_32(ea, res);
+}
+
+
+void m68k_op_and_32_re_di(void)
+{
+ uint ea = EA_AY_DI_32();
+ uint res = DX & m68ki_read_32(ea);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_32(ea, res);
+}
+
+
+void m68k_op_and_32_re_ix(void)
+{
+ uint ea = EA_AY_IX_32();
+ uint res = DX & m68ki_read_32(ea);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_32(ea, res);
+}
+
+
+void m68k_op_and_32_re_aw(void)
+{
+ uint ea = EA_AW_32();
+ uint res = DX & m68ki_read_32(ea);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_32(ea, res);
+}
+
+
+void m68k_op_and_32_re_al(void)
+{
+ uint ea = EA_AL_32();
+ uint res = DX & m68ki_read_32(ea);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_32(ea, res);
+}
+
+
+void m68k_op_andi_8_d(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_8(DY &= (OPER_I_8() | 0xffffff00));
+
+ FLAG_N = NFLAG_8(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_andi_8_ai(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_AI_8();
+ uint res = src & m68ki_read_8(ea);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_andi_8_pi(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_PI_8();
+ uint res = src & m68ki_read_8(ea);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_andi_8_pi7(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_A7_PI_8();
+ uint res = src & m68ki_read_8(ea);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_andi_8_pd(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_PD_8();
+ uint res = src & m68ki_read_8(ea);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_andi_8_pd7(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_A7_PD_8();
+ uint res = src & m68ki_read_8(ea);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_andi_8_di(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_DI_8();
+ uint res = src & m68ki_read_8(ea);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_andi_8_ix(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_IX_8();
+ uint res = src & m68ki_read_8(ea);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_andi_8_aw(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AW_8();
+ uint res = src & m68ki_read_8(ea);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_andi_8_al(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AL_8();
+ uint res = src & m68ki_read_8(ea);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_andi_16_d(void)
+{
+ FLAG_Z = MASK_OUT_ABOVE_16(DY &= (OPER_I_16() | 0xffff0000));
+
+ FLAG_N = NFLAG_16(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_andi_16_ai(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_AI_16();
+ uint res = src & m68ki_read_16(ea);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_16(ea, res);
+}
+
+
+void m68k_op_andi_16_pi(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_PI_16();
+ uint res = src & m68ki_read_16(ea);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_16(ea, res);
+}
+
+
+void m68k_op_andi_16_pd(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_PD_16();
+ uint res = src & m68ki_read_16(ea);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_16(ea, res);
+}
+
+
+void m68k_op_andi_16_di(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_DI_16();
+ uint res = src & m68ki_read_16(ea);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_16(ea, res);
+}
+
+
+void m68k_op_andi_16_ix(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_IX_16();
+ uint res = src & m68ki_read_16(ea);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_16(ea, res);
+}
+
+
+void m68k_op_andi_16_aw(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AW_16();
+ uint res = src & m68ki_read_16(ea);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_16(ea, res);
+}
+
+
+void m68k_op_andi_16_al(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AL_16();
+ uint res = src & m68ki_read_16(ea);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_16(ea, res);
+}
+
+
+void m68k_op_andi_32_d(void)
+{
+ FLAG_Z = DY &= (OPER_I_32());
+
+ FLAG_N = NFLAG_32(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_andi_32_ai(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_AI_32();
+ uint res = src & m68ki_read_32(ea);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_32(ea, res);
+}
+
+
+void m68k_op_andi_32_pi(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_PI_32();
+ uint res = src & m68ki_read_32(ea);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_32(ea, res);
+}
+
+
+void m68k_op_andi_32_pd(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_PD_32();
+ uint res = src & m68ki_read_32(ea);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_32(ea, res);
+}
+
+
+void m68k_op_andi_32_di(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_DI_32();
+ uint res = src & m68ki_read_32(ea);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_32(ea, res);
+}
+
+
+void m68k_op_andi_32_ix(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_IX_32();
+ uint res = src & m68ki_read_32(ea);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_32(ea, res);
+}
+
+
+void m68k_op_andi_32_aw(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AW_32();
+ uint res = src & m68ki_read_32(ea);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_32(ea, res);
+}
+
+
+void m68k_op_andi_32_al(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AL_32();
+ uint res = src & m68ki_read_32(ea);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_32(ea, res);
+}
+
+
+void m68k_op_andi_16_toc(void)
+{
+ m68ki_set_ccr(m68ki_get_ccr() & OPER_I_16());
+}
+
+
+void m68k_op_andi_16_tos(void)
+{
+ if(FLAG_S)
+ {
+ uint src = OPER_I_16();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_set_sr(m68ki_get_sr() & src);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_asr_8_s(void)
+{
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src >> shift;
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src >> shift;
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 9) - 1) & 7) + 1;
+ uint src = *r_dst;
+ uint res = src >> shift;
+
+ if(shift != 0)
+ USE_CYCLES(shift<> shift;
+
+ if(shift != 0)
+ {
+ USE_CYCLES(shift<> shift;
+
+ if(shift != 0)
+ {
+ USE_CYCLES(shift<> (shift - 1))<<8;
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ if(GET_MSB_16(src))
+ {
+ *r_dst |= 0xffff;
+ FLAG_C = CFLAG_SET;
+ FLAG_X = XFLAG_SET;
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ *r_dst &= 0xffff0000;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_X = XFLAG_CLEAR;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_16(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_asr_32_r(void)
+{
+ uint* r_dst = &DY;
+ uint shift = DX & 0x3f;
+ uint src = *r_dst;
+ uint res = src >> shift;
+
+ if(shift != 0)
+ {
+ USE_CYCLES(shift<> (shift - 1))<<8;
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ if(GET_MSB_32(src))
+ {
+ *r_dst = 0xffffffff;
+ FLAG_C = CFLAG_SET;
+ FLAG_X = XFLAG_SET;
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ *r_dst = 0;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_X = XFLAG_CLEAR;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_32(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_asr_16_ai(void)
+{
+ uint ea = EA_AY_AI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = src >> 1;
+
+ if(GET_MSB_16(src))
+ res |= 0x8000;
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = FLAG_X = src << 8;
+}
+
+
+void m68k_op_asr_16_pi(void)
+{
+ uint ea = EA_AY_PI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = src >> 1;
+
+ if(GET_MSB_16(src))
+ res |= 0x8000;
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = FLAG_X = src << 8;
+}
+
+
+void m68k_op_asr_16_pd(void)
+{
+ uint ea = EA_AY_PD_16();
+ uint src = m68ki_read_16(ea);
+ uint res = src >> 1;
+
+ if(GET_MSB_16(src))
+ res |= 0x8000;
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = FLAG_X = src << 8;
+}
+
+
+void m68k_op_asr_16_di(void)
+{
+ uint ea = EA_AY_DI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = src >> 1;
+
+ if(GET_MSB_16(src))
+ res |= 0x8000;
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = FLAG_X = src << 8;
+}
+
+
+void m68k_op_asr_16_ix(void)
+{
+ uint ea = EA_AY_IX_16();
+ uint src = m68ki_read_16(ea);
+ uint res = src >> 1;
+
+ if(GET_MSB_16(src))
+ res |= 0x8000;
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = FLAG_X = src << 8;
+}
+
+
+void m68k_op_asr_16_aw(void)
+{
+ uint ea = EA_AW_16();
+ uint src = m68ki_read_16(ea);
+ uint res = src >> 1;
+
+ if(GET_MSB_16(src))
+ res |= 0x8000;
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = FLAG_X = src << 8;
+}
+
+
+void m68k_op_asr_16_al(void)
+{
+ uint ea = EA_AL_16();
+ uint src = m68ki_read_16(ea);
+ uint res = src >> 1;
+
+ if(GET_MSB_16(src))
+ res |= 0x8000;
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = FLAG_X = src << 8;
+}
+
+
+void m68k_op_asl_8_s(void)
+{
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = MASK_OUT_ABOVE_8(src << shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = MASK_OUT_ABOVE_16(src << shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> (8-shift);
+ src &= m68ki_shift_16_table[shift + 1];
+ FLAG_V = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7;
+}
+
+
+void m68k_op_asl_32_s(void)
+{
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint src = *r_dst;
+ uint res = MASK_OUT_ABOVE_32(src << shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> (24-shift);
+ src &= m68ki_shift_32_table[shift + 1];
+ FLAG_V = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7;
+}
+
+
+void m68k_op_asl_8_r(void)
+{
+ uint* r_dst = &DY;
+ uint shift = DX & 0x3f;
+ uint src = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = MASK_OUT_ABOVE_8(src << shift);
+
+ if(shift != 0)
+ {
+ USE_CYCLES(shift<> 8;
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ src &= m68ki_shift_16_table[shift + 1];
+ FLAG_V = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7;
+ return;
+ }
+
+ *r_dst &= 0xffff0000;
+ FLAG_X = FLAG_C = ((shift == 16 ? src & 1 : 0))<<8;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+ FLAG_V = (!(src == 0))<<7;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_16(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_asl_32_r(void)
+{
+ uint* r_dst = &DY;
+ uint shift = DX & 0x3f;
+ uint src = *r_dst;
+ uint res = MASK_OUT_ABOVE_32(src << shift);
+
+ if(shift != 0)
+ {
+ USE_CYCLES(shift<> (32 - shift)) << 8;
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ src &= m68ki_shift_32_table[shift + 1];
+ FLAG_V = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7;
+ return;
+ }
+
+ *r_dst = 0;
+ FLAG_X = FLAG_C = ((shift == 32 ? src & 1 : 0))<<8;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+ FLAG_V = (!(src == 0))<<7;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_32(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_asl_16_ai(void)
+{
+ uint ea = EA_AY_AI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(src << 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_X = FLAG_C = src >> 7;
+ src &= 0xc000;
+ FLAG_V = (!(src == 0 || src == 0xc000))<<7;
+}
+
+
+void m68k_op_asl_16_pi(void)
+{
+ uint ea = EA_AY_PI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(src << 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_X = FLAG_C = src >> 7;
+ src &= 0xc000;
+ FLAG_V = (!(src == 0 || src == 0xc000))<<7;
+}
+
+
+void m68k_op_asl_16_pd(void)
+{
+ uint ea = EA_AY_PD_16();
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(src << 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_X = FLAG_C = src >> 7;
+ src &= 0xc000;
+ FLAG_V = (!(src == 0 || src == 0xc000))<<7;
+}
+
+
+void m68k_op_asl_16_di(void)
+{
+ uint ea = EA_AY_DI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(src << 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_X = FLAG_C = src >> 7;
+ src &= 0xc000;
+ FLAG_V = (!(src == 0 || src == 0xc000))<<7;
+}
+
+
+void m68k_op_asl_16_ix(void)
+{
+ uint ea = EA_AY_IX_16();
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(src << 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_X = FLAG_C = src >> 7;
+ src &= 0xc000;
+ FLAG_V = (!(src == 0 || src == 0xc000))<<7;
+}
+
+
+void m68k_op_asl_16_aw(void)
+{
+ uint ea = EA_AW_16();
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(src << 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_X = FLAG_C = src >> 7;
+ src &= 0xc000;
+ FLAG_V = (!(src == 0 || src == 0xc000))<<7;
+}
+
+
+void m68k_op_asl_16_al(void)
+{
+ uint ea = EA_AL_16();
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(src << 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_X = FLAG_C = src >> 7;
+ src &= 0xc000;
+ FLAG_V = (!(src == 0 || src == 0xc000))<<7;
+}
+
+
+void m68k_op_bhi_8(void)
+{
+ if(COND_HI())
+ {
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
+ return;
+ }
+ USE_CYCLES(CYC_BCC_NOTAKE_B);
+}
+
+
+void m68k_op_bls_8(void)
+{
+ if(COND_LS())
+ {
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
+ return;
+ }
+ USE_CYCLES(CYC_BCC_NOTAKE_B);
+}
+
+
+void m68k_op_bcc_8(void)
+{
+ if(COND_CC())
+ {
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
+ return;
+ }
+ USE_CYCLES(CYC_BCC_NOTAKE_B);
+}
+
+
+void m68k_op_bcs_8(void)
+{
+ if(COND_CS())
+ {
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
+ return;
+ }
+ USE_CYCLES(CYC_BCC_NOTAKE_B);
+}
+
+
+void m68k_op_bne_8(void)
+{
+ if(COND_NE())
+ {
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
+ return;
+ }
+ USE_CYCLES(CYC_BCC_NOTAKE_B);
+}
+
+
+void m68k_op_beq_8(void)
+{
+ if(COND_EQ())
+ {
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
+ return;
+ }
+ USE_CYCLES(CYC_BCC_NOTAKE_B);
+}
+
+
+void m68k_op_bvc_8(void)
+{
+ if(COND_VC())
+ {
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
+ return;
+ }
+ USE_CYCLES(CYC_BCC_NOTAKE_B);
+}
+
+
+void m68k_op_bvs_8(void)
+{
+ if(COND_VS())
+ {
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
+ return;
+ }
+ USE_CYCLES(CYC_BCC_NOTAKE_B);
+}
+
+
+void m68k_op_bpl_8(void)
+{
+ if(COND_PL())
+ {
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
+ return;
+ }
+ USE_CYCLES(CYC_BCC_NOTAKE_B);
+}
+
+
+void m68k_op_bmi_8(void)
+{
+ if(COND_MI())
+ {
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
+ return;
+ }
+ USE_CYCLES(CYC_BCC_NOTAKE_B);
+}
+
+
+void m68k_op_bge_8(void)
+{
+ if(COND_GE())
+ {
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
+ return;
+ }
+ USE_CYCLES(CYC_BCC_NOTAKE_B);
+}
+
+
+void m68k_op_blt_8(void)
+{
+ if(COND_LT())
+ {
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
+ return;
+ }
+ USE_CYCLES(CYC_BCC_NOTAKE_B);
+}
+
+
+void m68k_op_bgt_8(void)
+{
+ if(COND_GT())
+ {
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
+ return;
+ }
+ USE_CYCLES(CYC_BCC_NOTAKE_B);
+}
+
+
+void m68k_op_ble_8(void)
+{
+ if(COND_LE())
+ {
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
+ return;
+ }
+ USE_CYCLES(CYC_BCC_NOTAKE_B);
+}
+
+
+void m68k_op_bhi_16(void)
+{
+ if(COND_HI())
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_BCC_NOTAKE_W);
+}
+
+
+void m68k_op_bls_16(void)
+{
+ if(COND_LS())
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_BCC_NOTAKE_W);
+}
+
+
+void m68k_op_bcc_16(void)
+{
+ if(COND_CC())
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_BCC_NOTAKE_W);
+}
+
+
+void m68k_op_bcs_16(void)
+{
+ if(COND_CS())
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_BCC_NOTAKE_W);
+}
+
+
+void m68k_op_bne_16(void)
+{
+ if(COND_NE())
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_BCC_NOTAKE_W);
+}
+
+
+void m68k_op_beq_16(void)
+{
+ if(COND_EQ())
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_BCC_NOTAKE_W);
+}
+
+
+void m68k_op_bvc_16(void)
+{
+ if(COND_VC())
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_BCC_NOTAKE_W);
+}
+
+
+void m68k_op_bvs_16(void)
+{
+ if(COND_VS())
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_BCC_NOTAKE_W);
+}
+
+
+void m68k_op_bpl_16(void)
+{
+ if(COND_PL())
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_BCC_NOTAKE_W);
+}
+
+
+void m68k_op_bmi_16(void)
+{
+ if(COND_MI())
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_BCC_NOTAKE_W);
+}
+
+
+void m68k_op_bge_16(void)
+{
+ if(COND_GE())
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_BCC_NOTAKE_W);
+}
+
+
+void m68k_op_blt_16(void)
+{
+ if(COND_LT())
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_BCC_NOTAKE_W);
+}
+
+
+void m68k_op_bgt_16(void)
+{
+ if(COND_GT())
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_BCC_NOTAKE_W);
+}
+
+
+void m68k_op_ble_16(void)
+{
+ if(COND_LE())
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_BCC_NOTAKE_W);
+}
+
+
+void m68k_op_bhi_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_HI())
+ {
+ uint offset = OPER_I_32();
+ REG_PC -= 4;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_32(offset);
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bls_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_LS())
+ {
+ uint offset = OPER_I_32();
+ REG_PC -= 4;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_32(offset);
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bcc_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_CC())
+ {
+ uint offset = OPER_I_32();
+ REG_PC -= 4;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_32(offset);
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bcs_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_CS())
+ {
+ uint offset = OPER_I_32();
+ REG_PC -= 4;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_32(offset);
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bne_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_NE())
+ {
+ uint offset = OPER_I_32();
+ REG_PC -= 4;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_32(offset);
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_beq_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_EQ())
+ {
+ uint offset = OPER_I_32();
+ REG_PC -= 4;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_32(offset);
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bvc_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_VC())
+ {
+ uint offset = OPER_I_32();
+ REG_PC -= 4;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_32(offset);
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bvs_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_VS())
+ {
+ uint offset = OPER_I_32();
+ REG_PC -= 4;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_32(offset);
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bpl_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_PL())
+ {
+ uint offset = OPER_I_32();
+ REG_PC -= 4;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_32(offset);
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bmi_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_MI())
+ {
+ uint offset = OPER_I_32();
+ REG_PC -= 4;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_32(offset);
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bge_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_GE())
+ {
+ uint offset = OPER_I_32();
+ REG_PC -= 4;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_32(offset);
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_blt_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_LT())
+ {
+ uint offset = OPER_I_32();
+ REG_PC -= 4;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_32(offset);
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bgt_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_GT())
+ {
+ uint offset = OPER_I_32();
+ REG_PC -= 4;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_32(offset);
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_ble_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_LE())
+ {
+ uint offset = OPER_I_32();
+ REG_PC -= 4;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_32(offset);
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bchg_32_r_d(void)
+{
+ uint* r_dst = &DY;
+ uint mask = 1 << (DX & 0x1f);
+
+ FLAG_Z = *r_dst & mask;
+ *r_dst ^= mask;
+}
+
+
+void m68k_op_bchg_8_r_ai(void)
+{
+ uint ea = EA_AY_AI_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src ^ mask);
+}
+
+
+void m68k_op_bchg_8_r_pi(void)
+{
+ uint ea = EA_AY_PI_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src ^ mask);
+}
+
+
+void m68k_op_bchg_8_r_pi7(void)
+{
+ uint ea = EA_A7_PI_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src ^ mask);
+}
+
+
+void m68k_op_bchg_8_r_pd(void)
+{
+ uint ea = EA_AY_PD_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src ^ mask);
+}
+
+
+void m68k_op_bchg_8_r_pd7(void)
+{
+ uint ea = EA_A7_PD_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src ^ mask);
+}
+
+
+void m68k_op_bchg_8_r_di(void)
+{
+ uint ea = EA_AY_DI_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src ^ mask);
+}
+
+
+void m68k_op_bchg_8_r_ix(void)
+{
+ uint ea = EA_AY_IX_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src ^ mask);
+}
+
+
+void m68k_op_bchg_8_r_aw(void)
+{
+ uint ea = EA_AW_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src ^ mask);
+}
+
+
+void m68k_op_bchg_8_r_al(void)
+{
+ uint ea = EA_AL_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src ^ mask);
+}
+
+
+void m68k_op_bchg_32_s_d(void)
+{
+ uint* r_dst = &DY;
+ uint mask = 1 << (OPER_I_8() & 0x1f);
+
+ FLAG_Z = *r_dst & mask;
+ *r_dst ^= mask;
+}
+
+
+void m68k_op_bchg_8_s_ai(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_AY_AI_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src ^ mask);
+}
+
+
+void m68k_op_bchg_8_s_pi(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_AY_PI_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src ^ mask);
+}
+
+
+void m68k_op_bchg_8_s_pi7(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_A7_PI_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src ^ mask);
+}
+
+
+void m68k_op_bchg_8_s_pd(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_AY_PD_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src ^ mask);
+}
+
+
+void m68k_op_bchg_8_s_pd7(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_A7_PD_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src ^ mask);
+}
+
+
+void m68k_op_bchg_8_s_di(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_AY_DI_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src ^ mask);
+}
+
+
+void m68k_op_bchg_8_s_ix(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_AY_IX_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src ^ mask);
+}
+
+
+void m68k_op_bchg_8_s_aw(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_AW_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src ^ mask);
+}
+
+
+void m68k_op_bchg_8_s_al(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_AL_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src ^ mask);
+}
+
+
+void m68k_op_bclr_32_r_d(void)
+{
+ uint* r_dst = &DY;
+ uint mask = 1 << (DX & 0x1f);
+
+ FLAG_Z = *r_dst & mask;
+ *r_dst &= ~mask;
+}
+
+
+void m68k_op_bclr_8_r_ai(void)
+{
+ uint ea = EA_AY_AI_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src & ~mask);
+}
+
+
+void m68k_op_bclr_8_r_pi(void)
+{
+ uint ea = EA_AY_PI_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src & ~mask);
+}
+
+
+void m68k_op_bclr_8_r_pi7(void)
+{
+ uint ea = EA_A7_PI_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src & ~mask);
+}
+
+
+void m68k_op_bclr_8_r_pd(void)
+{
+ uint ea = EA_AY_PD_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src & ~mask);
+}
+
+
+void m68k_op_bclr_8_r_pd7(void)
+{
+ uint ea = EA_A7_PD_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src & ~mask);
+}
+
+
+void m68k_op_bclr_8_r_di(void)
+{
+ uint ea = EA_AY_DI_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src & ~mask);
+}
+
+
+void m68k_op_bclr_8_r_ix(void)
+{
+ uint ea = EA_AY_IX_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src & ~mask);
+}
+
+
+void m68k_op_bclr_8_r_aw(void)
+{
+ uint ea = EA_AW_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src & ~mask);
+}
+
+
+void m68k_op_bclr_8_r_al(void)
+{
+ uint ea = EA_AL_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src & ~mask);
+}
+
+
+void m68k_op_bclr_32_s_d(void)
+{
+ uint* r_dst = &DY;
+ uint mask = 1 << (OPER_I_8() & 0x1f);
+
+ FLAG_Z = *r_dst & mask;
+ *r_dst &= ~mask;
+}
+
+
+void m68k_op_bclr_8_s_ai(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_AY_AI_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src & ~mask);
+}
+
+
+void m68k_op_bclr_8_s_pi(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_AY_PI_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src & ~mask);
+}
+
+
+void m68k_op_bclr_8_s_pi7(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_A7_PI_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src & ~mask);
+}
+
+
+void m68k_op_bclr_8_s_pd(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_AY_PD_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src & ~mask);
+}
+
+
+void m68k_op_bclr_8_s_pd7(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_A7_PD_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src & ~mask);
+}
+
+
+void m68k_op_bclr_8_s_di(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_AY_DI_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src & ~mask);
+}
+
+
+void m68k_op_bclr_8_s_ix(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_AY_IX_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src & ~mask);
+}
+
+
+void m68k_op_bclr_8_s_aw(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_AW_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src & ~mask);
+}
+
+
+void m68k_op_bclr_8_s_al(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_AL_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src & ~mask);
+}
+
+
+void m68k_op_bfchg_32_d(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint offset = (word2>>6)&31;
+ uint width = word2;
+ uint* data = &DY;
+ uint64 mask;
+
+
+ if(BIT_B(word2))
+ offset = REG_D[offset&7];
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ offset &= 31;
+ width = ((width-1) & 31) + 1;
+
+ mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask = ROR_32(mask, offset);
+
+ FLAG_N = NFLAG_32(*data<>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AY_AI_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = NFLAG_32(data_long << offset);
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, data_long ^ mask_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, data_byte ^ mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfchg_32_di(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AY_DI_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = NFLAG_32(data_long << offset);
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, data_long ^ mask_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, data_byte ^ mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfchg_32_ix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AY_IX_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = NFLAG_32(data_long << offset);
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, data_long ^ mask_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, data_byte ^ mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfchg_32_aw(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AW_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = NFLAG_32(data_long << offset);
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, data_long ^ mask_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, data_byte ^ mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfchg_32_al(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AL_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = NFLAG_32(data_long << offset);
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, data_long ^ mask_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, data_byte ^ mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfclr_32_d(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint offset = (word2>>6)&31;
+ uint width = word2;
+ uint* data = &DY;
+ uint64 mask;
+
+
+ if(BIT_B(word2))
+ offset = REG_D[offset&7];
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+
+ offset &= 31;
+ width = ((width-1) & 31) + 1;
+
+
+ mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask = ROR_32(mask, offset);
+
+ FLAG_N = NFLAG_32(*data<>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AY_AI_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = NFLAG_32(data_long << offset);
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, data_long & ~mask_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, data_byte & ~mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfclr_32_di(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AY_DI_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = NFLAG_32(data_long << offset);
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, data_long & ~mask_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, data_byte & ~mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfclr_32_ix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AY_IX_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = NFLAG_32(data_long << offset);
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, data_long & ~mask_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, data_byte & ~mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfclr_32_aw(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AW_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = NFLAG_32(data_long << offset);
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, data_long & ~mask_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, data_byte & ~mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfclr_32_al(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AL_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = NFLAG_32(data_long << offset);
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, data_long & ~mask_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, data_byte & ~mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfexts_32_d(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint offset = (word2>>6)&31;
+ uint width = word2;
+ uint64 data = DY;
+
+
+ if(BIT_B(word2))
+ offset = REG_D[offset&7];
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ offset &= 31;
+ width = ((width-1) & 31) + 1;
+
+ data = ROL_32(data, offset);
+ FLAG_N = NFLAG_32(data);
+ data = MAKE_INT_32(data) >> (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ REG_D[(word2>>12)&7] = data;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfexts_32_ai(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint data;
+ uint ea = EA_AY_AI_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data = MAKE_INT_32(data) >> (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ REG_D[(word2 >> 12) & 7] = data;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfexts_32_di(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint data;
+ uint ea = EA_AY_DI_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data = MAKE_INT_32(data) >> (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ REG_D[(word2 >> 12) & 7] = data;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfexts_32_ix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint data;
+ uint ea = EA_AY_IX_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data = MAKE_INT_32(data) >> (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ REG_D[(word2 >> 12) & 7] = data;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfexts_32_aw(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint data;
+ uint ea = EA_AW_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data = MAKE_INT_32(data) >> (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ REG_D[(word2 >> 12) & 7] = data;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfexts_32_al(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint data;
+ uint ea = EA_AL_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data = MAKE_INT_32(data) >> (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ REG_D[(word2 >> 12) & 7] = data;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfexts_32_pcdi(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint data;
+ uint ea = EA_PCDI_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data = MAKE_INT_32(data) >> (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ REG_D[(word2 >> 12) & 7] = data;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfexts_32_pcix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint data;
+ uint ea = EA_PCIX_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data = MAKE_INT_32(data) >> (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ REG_D[(word2 >> 12) & 7] = data;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfextu_32_d(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint offset = (word2>>6)&31;
+ uint width = word2;
+ uint64 data = DY;
+
+
+ if(BIT_B(word2))
+ offset = REG_D[offset&7];
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ offset &= 31;
+ width = ((width-1) & 31) + 1;
+
+ data = ROL_32(data, offset);
+ FLAG_N = NFLAG_32(data);
+ data >>= 32 - width;
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ REG_D[(word2>>12)&7] = data;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfextu_32_ai(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint data;
+ uint ea = EA_AY_AI_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data >>= (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ REG_D[(word2 >> 12) & 7] = data;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfextu_32_di(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint data;
+ uint ea = EA_AY_DI_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data >>= (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ REG_D[(word2 >> 12) & 7] = data;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfextu_32_ix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint data;
+ uint ea = EA_AY_IX_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data >>= (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ REG_D[(word2 >> 12) & 7] = data;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfextu_32_aw(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint data;
+ uint ea = EA_AW_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data >>= (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ REG_D[(word2 >> 12) & 7] = data;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfextu_32_al(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint data;
+ uint ea = EA_AL_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data >>= (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ REG_D[(word2 >> 12) & 7] = data;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfextu_32_pcdi(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint data;
+ uint ea = EA_PCDI_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data >>= (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ REG_D[(word2 >> 12) & 7] = data;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfextu_32_pcix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint data;
+ uint ea = EA_PCIX_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data >>= (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ REG_D[(word2 >> 12) & 7] = data;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfffo_32_d(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint offset = (word2>>6)&31;
+ uint width = word2;
+ uint64 data = DY;
+ uint bit;
+
+
+ if(BIT_B(word2))
+ offset = REG_D[offset&7];
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ offset &= 31;
+ width = ((width-1) & 31) + 1;
+
+ data = ROL_32(data, offset);
+ FLAG_N = NFLAG_32(data);
+ data >>= 32 - width;
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)
+ offset++;
+
+ REG_D[(word2>>12)&7] = offset;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfffo_32_ai(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ sint local_offset;
+ uint width = word2;
+ uint data;
+ uint bit;
+ uint ea = EA_AY_AI_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ local_offset = offset % 8;
+ if(local_offset < 0)
+ {
+ local_offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << local_offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data >>= (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)
+ offset++;
+
+ REG_D[(word2>>12)&7] = offset;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfffo_32_di(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ sint local_offset;
+ uint width = word2;
+ uint data;
+ uint bit;
+ uint ea = EA_AY_DI_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ local_offset = offset % 8;
+ if(local_offset < 0)
+ {
+ local_offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << local_offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data >>= (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)
+ offset++;
+
+ REG_D[(word2>>12)&7] = offset;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfffo_32_ix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ sint local_offset;
+ uint width = word2;
+ uint data;
+ uint bit;
+ uint ea = EA_AY_IX_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ local_offset = offset % 8;
+ if(local_offset < 0)
+ {
+ local_offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << local_offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data >>= (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)
+ offset++;
+
+ REG_D[(word2>>12)&7] = offset;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfffo_32_aw(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ sint local_offset;
+ uint width = word2;
+ uint data;
+ uint bit;
+ uint ea = EA_AW_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ local_offset = offset % 8;
+ if(local_offset < 0)
+ {
+ local_offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << local_offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data >>= (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)
+ offset++;
+
+ REG_D[(word2>>12)&7] = offset;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfffo_32_al(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ sint local_offset;
+ uint width = word2;
+ uint data;
+ uint bit;
+ uint ea = EA_AL_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ local_offset = offset % 8;
+ if(local_offset < 0)
+ {
+ local_offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << local_offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data >>= (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)
+ offset++;
+
+ REG_D[(word2>>12)&7] = offset;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfffo_32_pcdi(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ sint local_offset;
+ uint width = word2;
+ uint data;
+ uint bit;
+ uint ea = EA_PCDI_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ local_offset = offset % 8;
+ if(local_offset < 0)
+ {
+ local_offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << local_offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data >>= (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)
+ offset++;
+
+ REG_D[(word2>>12)&7] = offset;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfffo_32_pcix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ sint local_offset;
+ uint width = word2;
+ uint data;
+ uint bit;
+ uint ea = EA_PCIX_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ local_offset = offset % 8;
+ if(local_offset < 0)
+ {
+ local_offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << local_offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data >>= (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)
+ offset++;
+
+ REG_D[(word2>>12)&7] = offset;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfins_32_d(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint offset = (word2>>6)&31;
+ uint width = word2;
+ uint* data = &DY;
+ uint64 mask;
+ uint64 insert = REG_D[(word2>>12)&7];
+
+
+ if(BIT_B(word2))
+ offset = REG_D[offset&7];
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+
+ offset &= 31;
+ width = ((width-1) & 31) + 1;
+
+
+ mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask = ROR_32(mask, offset);
+
+ insert = MASK_OUT_ABOVE_32(insert << (32 - width));
+ FLAG_N = NFLAG_32(insert);
+ FLAG_Z = insert;
+ insert = ROR_32(insert, offset);
+
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ *data &= ~mask;
+ *data |= insert;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfins_32_ai(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint insert_base = REG_D[(word2>>12)&7];
+ uint insert_long;
+ uint insert_byte;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AY_AI_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ insert_base = MASK_OUT_ABOVE_32(insert_base << (32 - width));
+ FLAG_N = NFLAG_32(insert_base);
+ FLAG_Z = insert_base;
+ insert_long = insert_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, (data_long & ~mask_long) | insert_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ insert_byte = MASK_OUT_ABOVE_8(insert_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, (data_byte & ~mask_byte) | insert_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfins_32_di(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint insert_base = REG_D[(word2>>12)&7];
+ uint insert_long;
+ uint insert_byte;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AY_DI_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ insert_base = MASK_OUT_ABOVE_32(insert_base << (32 - width));
+ FLAG_N = NFLAG_32(insert_base);
+ FLAG_Z = insert_base;
+ insert_long = insert_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, (data_long & ~mask_long) | insert_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ insert_byte = MASK_OUT_ABOVE_8(insert_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, (data_byte & ~mask_byte) | insert_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfins_32_ix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint insert_base = REG_D[(word2>>12)&7];
+ uint insert_long;
+ uint insert_byte;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AY_IX_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ insert_base = MASK_OUT_ABOVE_32(insert_base << (32 - width));
+ FLAG_N = NFLAG_32(insert_base);
+ FLAG_Z = insert_base;
+ insert_long = insert_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, (data_long & ~mask_long) | insert_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ insert_byte = MASK_OUT_ABOVE_8(insert_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, (data_byte & ~mask_byte) | insert_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfins_32_aw(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint insert_base = REG_D[(word2>>12)&7];
+ uint insert_long;
+ uint insert_byte;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AW_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ insert_base = MASK_OUT_ABOVE_32(insert_base << (32 - width));
+ FLAG_N = NFLAG_32(insert_base);
+ FLAG_Z = insert_base;
+ insert_long = insert_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, (data_long & ~mask_long) | insert_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ insert_byte = MASK_OUT_ABOVE_8(insert_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, (data_byte & ~mask_byte) | insert_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfins_32_al(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint insert_base = REG_D[(word2>>12)&7];
+ uint insert_long;
+ uint insert_byte;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AL_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ insert_base = MASK_OUT_ABOVE_32(insert_base << (32 - width));
+ FLAG_N = NFLAG_32(insert_base);
+ FLAG_Z = insert_base;
+ insert_long = insert_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, (data_long & ~mask_long) | insert_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ insert_byte = MASK_OUT_ABOVE_8(insert_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, (data_byte & ~mask_byte) | insert_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfset_32_d(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint offset = (word2>>6)&31;
+ uint width = word2;
+ uint* data = &DY;
+ uint64 mask;
+
+
+ if(BIT_B(word2))
+ offset = REG_D[offset&7];
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+
+ offset &= 31;
+ width = ((width-1) & 31) + 1;
+
+
+ mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask = ROR_32(mask, offset);
+
+ FLAG_N = NFLAG_32(*data<>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AY_AI_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = NFLAG_32(data_long << offset);
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, data_long | mask_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, data_byte | mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfset_32_di(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AY_DI_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = NFLAG_32(data_long << offset);
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, data_long | mask_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, data_byte | mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfset_32_ix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AY_IX_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = NFLAG_32(data_long << offset);
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, data_long | mask_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, data_byte | mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfset_32_aw(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AW_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = NFLAG_32(data_long << offset);
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, data_long | mask_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, data_byte | mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bfset_32_al(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AL_8();
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = NFLAG_32(data_long << offset);
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, data_long | mask_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, data_byte | mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bftst_32_d(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint offset = (word2>>6)&31;
+ uint width = word2;
+ uint* data = &DY;
+ uint64 mask;
+
+
+ if(BIT_B(word2))
+ offset = REG_D[offset&7];
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+
+ offset &= 31;
+ width = ((width-1) & 31) + 1;
+
+
+ mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask = ROR_32(mask, offset);
+
+ FLAG_N = NFLAG_32(*data<>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AY_AI_8();
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = ((data_long & (0x80000000 >> offset))<>24;
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bftst_32_di(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AY_DI_8();
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = ((data_long & (0x80000000 >> offset))<>24;
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bftst_32_ix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AY_IX_8();
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = ((data_long & (0x80000000 >> offset))<>24;
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bftst_32_aw(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AW_8();
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = ((data_long & (0x80000000 >> offset))<>24;
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bftst_32_al(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_AL_8();
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = ((data_long & (0x80000000 >> offset))<>24;
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bftst_32_pcdi(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_PCDI_8();
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = ((data_long & (0x80000000 >> offset))<>24;
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bftst_32_pcix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = EA_PCIX_8();
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = ((data_long & (0x80000000 >> offset))<>24;
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bkpt(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ m68ki_bkpt_ack(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE) ? REG_IR & 7 : 0); /* auto-disable (see m68kcpu.h) */
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bra_8(void)
+{
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
+ if(REG_PC == REG_PPC)
+ USE_ALL_CYCLES();
+}
+
+
+void m68k_op_bra_16(void)
+{
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ if(REG_PC == REG_PPC)
+ USE_ALL_CYCLES();
+}
+
+
+void m68k_op_bra_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint offset = OPER_I_32();
+ REG_PC -= 4;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_32(offset);
+ if(REG_PC == REG_PPC)
+ USE_ALL_CYCLES();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_bset_32_r_d(void)
+{
+ uint* r_dst = &DY;
+ uint mask = 1 << (DX & 0x1f);
+
+ FLAG_Z = *r_dst & mask;
+ *r_dst |= mask;
+}
+
+
+void m68k_op_bset_8_r_ai(void)
+{
+ uint ea = EA_AY_AI_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src | mask);
+}
+
+
+void m68k_op_bset_8_r_pi(void)
+{
+ uint ea = EA_AY_PI_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src | mask);
+}
+
+
+void m68k_op_bset_8_r_pi7(void)
+{
+ uint ea = EA_A7_PI_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src | mask);
+}
+
+
+void m68k_op_bset_8_r_pd(void)
+{
+ uint ea = EA_AY_PD_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src | mask);
+}
+
+
+void m68k_op_bset_8_r_pd7(void)
+{
+ uint ea = EA_A7_PD_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src | mask);
+}
+
+
+void m68k_op_bset_8_r_di(void)
+{
+ uint ea = EA_AY_DI_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src | mask);
+}
+
+
+void m68k_op_bset_8_r_ix(void)
+{
+ uint ea = EA_AY_IX_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src | mask);
+}
+
+
+void m68k_op_bset_8_r_aw(void)
+{
+ uint ea = EA_AW_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src | mask);
+}
+
+
+void m68k_op_bset_8_r_al(void)
+{
+ uint ea = EA_AL_8();
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src | mask);
+}
+
+
+void m68k_op_bset_32_s_d(void)
+{
+ uint* r_dst = &DY;
+ uint mask = 1 << (OPER_I_8() & 0x1f);
+
+ FLAG_Z = *r_dst & mask;
+ *r_dst |= mask;
+}
+
+
+void m68k_op_bset_8_s_ai(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_AY_AI_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src | mask);
+}
+
+
+void m68k_op_bset_8_s_pi(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_AY_PI_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src | mask);
+}
+
+
+void m68k_op_bset_8_s_pi7(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_A7_PI_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src | mask);
+}
+
+
+void m68k_op_bset_8_s_pd(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_AY_PD_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src | mask);
+}
+
+
+void m68k_op_bset_8_s_pd7(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_A7_PD_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src | mask);
+}
+
+
+void m68k_op_bset_8_s_di(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_AY_DI_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src | mask);
+}
+
+
+void m68k_op_bset_8_s_ix(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_AY_IX_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src | mask);
+}
+
+
+void m68k_op_bset_8_s_aw(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_AW_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src | mask);
+}
+
+
+void m68k_op_bset_8_s_al(void)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = EA_AL_8();
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src | mask);
+}
+
+
+void m68k_op_bsr_8(void)
+{
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_push_32(REG_PC);
+ m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
+}
+
+
+void m68k_op_bsr_16(void)
+{
+ uint offset = OPER_I_16();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_push_32(REG_PC);
+ REG_PC -= 2;
+ m68ki_branch_16(offset);
+}
+
+
+void m68k_op_bsr_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint offset = OPER_I_32();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_push_32(REG_PC);
+ REG_PC -= 4;
+ m68ki_branch_32(offset);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_btst_32_r_d(void)
+{
+ FLAG_Z = DY & (1 << (DX & 0x1f));
+}
+
+
+void m68k_op_btst_8_r_ai(void)
+{
+ FLAG_Z = OPER_AY_AI_8() & (1 << (DX & 7));
+}
+
+
+void m68k_op_btst_8_r_pi(void)
+{
+ FLAG_Z = OPER_AY_PI_8() & (1 << (DX & 7));
+}
+
+
+void m68k_op_btst_8_r_pi7(void)
+{
+ FLAG_Z = OPER_A7_PI_8() & (1 << (DX & 7));
+}
+
+
+void m68k_op_btst_8_r_pd(void)
+{
+ FLAG_Z = OPER_AY_PD_8() & (1 << (DX & 7));
+}
+
+
+void m68k_op_btst_8_r_pd7(void)
+{
+ FLAG_Z = OPER_A7_PD_8() & (1 << (DX & 7));
+}
+
+
+void m68k_op_btst_8_r_di(void)
+{
+ FLAG_Z = OPER_AY_DI_8() & (1 << (DX & 7));
+}
+
+
+void m68k_op_btst_8_r_ix(void)
+{
+ FLAG_Z = OPER_AY_IX_8() & (1 << (DX & 7));
+}
+
+
+void m68k_op_btst_8_r_aw(void)
+{
+ FLAG_Z = OPER_AW_8() & (1 << (DX & 7));
+}
+
+
+void m68k_op_btst_8_r_al(void)
+{
+ FLAG_Z = OPER_AL_8() & (1 << (DX & 7));
+}
+
+
+void m68k_op_btst_8_r_pcdi(void)
+{
+ FLAG_Z = OPER_PCDI_8() & (1 << (DX & 7));
+}
+
+
+void m68k_op_btst_8_r_pcix(void)
+{
+ FLAG_Z = OPER_PCIX_8() & (1 << (DX & 7));
+}
+
+
+void m68k_op_btst_8_r_i(void)
+{
+ FLAG_Z = OPER_I_8() & (1 << (DX & 7));
+}
+
+
+void m68k_op_btst_32_s_d(void)
+{
+ FLAG_Z = DY & (1 << (OPER_I_8() & 0x1f));
+}
+
+
+void m68k_op_btst_8_s_ai(void)
+{
+ uint bit = OPER_I_8() & 7;
+
+ FLAG_Z = OPER_AY_AI_8() & (1 << bit);
+}
+
+
+void m68k_op_btst_8_s_pi(void)
+{
+ uint bit = OPER_I_8() & 7;
+
+ FLAG_Z = OPER_AY_PI_8() & (1 << bit);
+}
+
+
+void m68k_op_btst_8_s_pi7(void)
+{
+ uint bit = OPER_I_8() & 7;
+
+ FLAG_Z = OPER_A7_PI_8() & (1 << bit);
+}
+
+
+void m68k_op_btst_8_s_pd(void)
+{
+ uint bit = OPER_I_8() & 7;
+
+ FLAG_Z = OPER_AY_PD_8() & (1 << bit);
+}
+
+
+void m68k_op_btst_8_s_pd7(void)
+{
+ uint bit = OPER_I_8() & 7;
+
+ FLAG_Z = OPER_A7_PD_8() & (1 << bit);
+}
+
+
+void m68k_op_btst_8_s_di(void)
+{
+ uint bit = OPER_I_8() & 7;
+
+ FLAG_Z = OPER_AY_DI_8() & (1 << bit);
+}
+
+
+void m68k_op_btst_8_s_ix(void)
+{
+ uint bit = OPER_I_8() & 7;
+
+ FLAG_Z = OPER_AY_IX_8() & (1 << bit);
+}
+
+
+void m68k_op_btst_8_s_aw(void)
+{
+ uint bit = OPER_I_8() & 7;
+
+ FLAG_Z = OPER_AW_8() & (1 << bit);
+}
+
+
+void m68k_op_btst_8_s_al(void)
+{
+ uint bit = OPER_I_8() & 7;
+
+ FLAG_Z = OPER_AL_8() & (1 << bit);
+}
+
+
+void m68k_op_btst_8_s_pcdi(void)
+{
+ uint bit = OPER_I_8() & 7;
+
+ FLAG_Z = OPER_PCDI_8() & (1 << bit);
+}
+
+
+void m68k_op_btst_8_s_pcix(void)
+{
+ uint bit = OPER_I_8() & 7;
+
+ FLAG_Z = OPER_PCIX_8() & (1 << bit);
+}
+
+
+void m68k_op_callm_32_ai(void)
+{
+ /* note: watch out for pcrelative modes */
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ {
+ uint ea = EA_AY_AI_32();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ REG_PC += 2;
+(void)ea; /* just to avoid an 'unused variable' warning */
+ M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
+ m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_callm_32_di(void)
+{
+ /* note: watch out for pcrelative modes */
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ {
+ uint ea = EA_AY_DI_32();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ REG_PC += 2;
+(void)ea; /* just to avoid an 'unused variable' warning */
+ M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
+ m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_callm_32_ix(void)
+{
+ /* note: watch out for pcrelative modes */
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ {
+ uint ea = EA_AY_IX_32();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ REG_PC += 2;
+(void)ea; /* just to avoid an 'unused variable' warning */
+ M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
+ m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_callm_32_aw(void)
+{
+ /* note: watch out for pcrelative modes */
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ {
+ uint ea = EA_AW_32();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ REG_PC += 2;
+(void)ea; /* just to avoid an 'unused variable' warning */
+ M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
+ m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_callm_32_al(void)
+{
+ /* note: watch out for pcrelative modes */
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ {
+ uint ea = EA_AL_32();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ REG_PC += 2;
+(void)ea; /* just to avoid an 'unused variable' warning */
+ M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
+ m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_callm_32_pcdi(void)
+{
+ /* note: watch out for pcrelative modes */
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ {
+ uint ea = EA_PCDI_32();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ REG_PC += 2;
+(void)ea; /* just to avoid an 'unused variable' warning */
+ M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
+ m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_callm_32_pcix(void)
+{
+ /* note: watch out for pcrelative modes */
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ {
+ uint ea = EA_PCIX_32();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ REG_PC += 2;
+(void)ea; /* just to avoid an 'unused variable' warning */
+ M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
+ m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas_8_ai(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_AI_8();
+ uint dest = m68ki_read_8(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - MASK_OUT_ABOVE_8(*compare);
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(*compare, dest, res);
+ FLAG_C = CFLAG_8(res);
+
+ if(COND_NE())
+ *compare = MASK_OUT_BELOW_8(*compare) | dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7]));
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas_8_pi(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_PI_8();
+ uint dest = m68ki_read_8(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - MASK_OUT_ABOVE_8(*compare);
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(*compare, dest, res);
+ FLAG_C = CFLAG_8(res);
+
+ if(COND_NE())
+ *compare = MASK_OUT_BELOW_8(*compare) | dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7]));
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas_8_pi7(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_A7_PI_8();
+ uint dest = m68ki_read_8(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - MASK_OUT_ABOVE_8(*compare);
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(*compare, dest, res);
+ FLAG_C = CFLAG_8(res);
+
+ if(COND_NE())
+ *compare = MASK_OUT_BELOW_8(*compare) | dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7]));
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas_8_pd(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_PD_8();
+ uint dest = m68ki_read_8(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - MASK_OUT_ABOVE_8(*compare);
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(*compare, dest, res);
+ FLAG_C = CFLAG_8(res);
+
+ if(COND_NE())
+ *compare = MASK_OUT_BELOW_8(*compare) | dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7]));
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas_8_pd7(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_A7_PD_8();
+ uint dest = m68ki_read_8(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - MASK_OUT_ABOVE_8(*compare);
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(*compare, dest, res);
+ FLAG_C = CFLAG_8(res);
+
+ if(COND_NE())
+ *compare = MASK_OUT_BELOW_8(*compare) | dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7]));
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas_8_di(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_DI_8();
+ uint dest = m68ki_read_8(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - MASK_OUT_ABOVE_8(*compare);
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(*compare, dest, res);
+ FLAG_C = CFLAG_8(res);
+
+ if(COND_NE())
+ *compare = MASK_OUT_BELOW_8(*compare) | dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7]));
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas_8_ix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_IX_8();
+ uint dest = m68ki_read_8(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - MASK_OUT_ABOVE_8(*compare);
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(*compare, dest, res);
+ FLAG_C = CFLAG_8(res);
+
+ if(COND_NE())
+ *compare = MASK_OUT_BELOW_8(*compare) | dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7]));
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas_8_aw(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AW_8();
+ uint dest = m68ki_read_8(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - MASK_OUT_ABOVE_8(*compare);
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(*compare, dest, res);
+ FLAG_C = CFLAG_8(res);
+
+ if(COND_NE())
+ *compare = MASK_OUT_BELOW_8(*compare) | dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7]));
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas_8_al(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AL_8();
+ uint dest = m68ki_read_8(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - MASK_OUT_ABOVE_8(*compare);
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(*compare, dest, res);
+ FLAG_C = CFLAG_8(res);
+
+ if(COND_NE())
+ *compare = MASK_OUT_BELOW_8(*compare) | dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7]));
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas_16_ai(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_AI_16();
+ uint dest = m68ki_read_16(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - MASK_OUT_ABOVE_16(*compare);
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(*compare, dest, res);
+ FLAG_C = CFLAG_16(res);
+
+ if(COND_NE())
+ *compare = MASK_OUT_BELOW_16(*compare) | dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7]));
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas_16_pi(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_PI_16();
+ uint dest = m68ki_read_16(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - MASK_OUT_ABOVE_16(*compare);
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(*compare, dest, res);
+ FLAG_C = CFLAG_16(res);
+
+ if(COND_NE())
+ *compare = MASK_OUT_BELOW_16(*compare) | dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7]));
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas_16_pd(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_PD_16();
+ uint dest = m68ki_read_16(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - MASK_OUT_ABOVE_16(*compare);
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(*compare, dest, res);
+ FLAG_C = CFLAG_16(res);
+
+ if(COND_NE())
+ *compare = MASK_OUT_BELOW_16(*compare) | dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7]));
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas_16_di(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_DI_16();
+ uint dest = m68ki_read_16(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - MASK_OUT_ABOVE_16(*compare);
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(*compare, dest, res);
+ FLAG_C = CFLAG_16(res);
+
+ if(COND_NE())
+ *compare = MASK_OUT_BELOW_16(*compare) | dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7]));
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas_16_ix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_IX_16();
+ uint dest = m68ki_read_16(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - MASK_OUT_ABOVE_16(*compare);
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(*compare, dest, res);
+ FLAG_C = CFLAG_16(res);
+
+ if(COND_NE())
+ *compare = MASK_OUT_BELOW_16(*compare) | dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7]));
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas_16_aw(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AW_16();
+ uint dest = m68ki_read_16(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - MASK_OUT_ABOVE_16(*compare);
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(*compare, dest, res);
+ FLAG_C = CFLAG_16(res);
+
+ if(COND_NE())
+ *compare = MASK_OUT_BELOW_16(*compare) | dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7]));
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas_16_al(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AL_16();
+ uint dest = m68ki_read_16(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - MASK_OUT_ABOVE_16(*compare);
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(*compare, dest, res);
+ FLAG_C = CFLAG_16(res);
+
+ if(COND_NE())
+ *compare = MASK_OUT_BELOW_16(*compare) | dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7]));
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas_32_ai(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_AI_32();
+ uint dest = m68ki_read_32(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - *compare;
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(*compare, dest, res);
+ FLAG_C = CFLAG_SUB_32(*compare, dest, res);
+
+ if(COND_NE())
+ *compare = dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas_32_pi(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_PI_32();
+ uint dest = m68ki_read_32(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - *compare;
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(*compare, dest, res);
+ FLAG_C = CFLAG_SUB_32(*compare, dest, res);
+
+ if(COND_NE())
+ *compare = dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas_32_pd(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_PD_32();
+ uint dest = m68ki_read_32(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - *compare;
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(*compare, dest, res);
+ FLAG_C = CFLAG_SUB_32(*compare, dest, res);
+
+ if(COND_NE())
+ *compare = dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas_32_di(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_DI_32();
+ uint dest = m68ki_read_32(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - *compare;
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(*compare, dest, res);
+ FLAG_C = CFLAG_SUB_32(*compare, dest, res);
+
+ if(COND_NE())
+ *compare = dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas_32_ix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_IX_32();
+ uint dest = m68ki_read_32(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - *compare;
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(*compare, dest, res);
+ FLAG_C = CFLAG_SUB_32(*compare, dest, res);
+
+ if(COND_NE())
+ *compare = dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas_32_aw(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AW_32();
+ uint dest = m68ki_read_32(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - *compare;
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(*compare, dest, res);
+ FLAG_C = CFLAG_SUB_32(*compare, dest, res);
+
+ if(COND_NE())
+ *compare = dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas_32_al(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AL_32();
+ uint dest = m68ki_read_32(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - *compare;
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(*compare, dest, res);
+ FLAG_C = CFLAG_SUB_32(*compare, dest, res);
+
+ if(COND_NE())
+ *compare = dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas2_16(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_32();
+ uint* compare1 = ®_D[(word2 >> 16) & 7];
+ uint ea1 = REG_DA[(word2 >> 28) & 15];
+ uint dest1 = m68ki_read_16(ea1);
+ uint res1 = dest1 - MASK_OUT_ABOVE_16(*compare1);
+ uint* compare2 = ®_D[word2 & 7];
+ uint ea2 = REG_DA[(word2 >> 12) & 15];
+ uint dest2 = m68ki_read_16(ea2);
+ uint res2;
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_16(res1);
+ FLAG_Z = MASK_OUT_ABOVE_16(res1);
+ FLAG_V = VFLAG_SUB_16(*compare1, dest1, res1);
+ FLAG_C = CFLAG_16(res1);
+
+ if(COND_EQ())
+ {
+ res2 = dest2 - MASK_OUT_ABOVE_16(*compare2);
+
+ FLAG_N = NFLAG_16(res2);
+ FLAG_Z = MASK_OUT_ABOVE_16(res2);
+ FLAG_V = VFLAG_SUB_16(*compare2, dest2, res2);
+ FLAG_C = CFLAG_16(res2);
+
+ if(COND_EQ())
+ {
+ USE_CYCLES(3);
+ m68ki_write_16(ea1, REG_D[(word2 >> 22) & 7]);
+ m68ki_write_16(ea2, REG_D[(word2 >> 6) & 7]);
+ return;
+ }
+ }
+ *compare1 = BIT_1F(word2) ? MAKE_INT_16(dest1) : MASK_OUT_BELOW_16(*compare1) | dest1;
+ *compare2 = BIT_F(word2) ? MAKE_INT_16(dest2) : MASK_OUT_BELOW_16(*compare2) | dest2;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cas2_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_32();
+ uint* compare1 = ®_D[(word2 >> 16) & 7];
+ uint ea1 = REG_DA[(word2 >> 28) & 15];
+ uint dest1 = m68ki_read_32(ea1);
+ uint res1 = dest1 - *compare1;
+ uint* compare2 = ®_D[word2 & 7];
+ uint ea2 = REG_DA[(word2 >> 12) & 15];
+ uint dest2 = m68ki_read_32(ea2);
+ uint res2;
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_32(res1);
+ FLAG_Z = MASK_OUT_ABOVE_32(res1);
+ FLAG_V = VFLAG_SUB_32(*compare1, dest1, res1);
+ FLAG_C = CFLAG_SUB_32(*compare1, dest1, res1);
+
+ if(COND_EQ())
+ {
+ res2 = dest2 - *compare2;
+
+ FLAG_N = NFLAG_32(res2);
+ FLAG_Z = MASK_OUT_ABOVE_32(res2);
+ FLAG_V = VFLAG_SUB_32(*compare2, dest2, res2);
+ FLAG_C = CFLAG_SUB_32(*compare2, dest2, res2);
+
+ if(COND_EQ())
+ {
+ USE_CYCLES(3);
+ m68ki_write_32(ea1, REG_D[(word2 >> 22) & 7]);
+ m68ki_write_32(ea2, REG_D[(word2 >> 6) & 7]);
+ return;
+ }
+ }
+ *compare1 = dest1;
+ *compare2 = dest2;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk_16_d(void)
+{
+ sint src = MAKE_INT_16(DX);
+ sint bound = MAKE_INT_16(DY);
+
+ FLAG_Z = ZFLAG_16(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+}
+
+
+void m68k_op_chk_16_ai(void)
+{
+ sint src = MAKE_INT_16(DX);
+ sint bound = MAKE_INT_16(OPER_AY_AI_16());
+
+ FLAG_Z = ZFLAG_16(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+}
+
+
+void m68k_op_chk_16_pi(void)
+{
+ sint src = MAKE_INT_16(DX);
+ sint bound = MAKE_INT_16(OPER_AY_PI_16());
+
+ FLAG_Z = ZFLAG_16(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+}
+
+
+void m68k_op_chk_16_pd(void)
+{
+ sint src = MAKE_INT_16(DX);
+ sint bound = MAKE_INT_16(OPER_AY_PD_16());
+
+ FLAG_Z = ZFLAG_16(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+}
+
+
+void m68k_op_chk_16_di(void)
+{
+ sint src = MAKE_INT_16(DX);
+ sint bound = MAKE_INT_16(OPER_AY_DI_16());
+
+ FLAG_Z = ZFLAG_16(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+}
+
+
+void m68k_op_chk_16_ix(void)
+{
+ sint src = MAKE_INT_16(DX);
+ sint bound = MAKE_INT_16(OPER_AY_IX_16());
+
+ FLAG_Z = ZFLAG_16(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+}
+
+
+void m68k_op_chk_16_aw(void)
+{
+ sint src = MAKE_INT_16(DX);
+ sint bound = MAKE_INT_16(OPER_AW_16());
+
+ FLAG_Z = ZFLAG_16(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+}
+
+
+void m68k_op_chk_16_al(void)
+{
+ sint src = MAKE_INT_16(DX);
+ sint bound = MAKE_INT_16(OPER_AL_16());
+
+ FLAG_Z = ZFLAG_16(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+}
+
+
+void m68k_op_chk_16_pcdi(void)
+{
+ sint src = MAKE_INT_16(DX);
+ sint bound = MAKE_INT_16(OPER_PCDI_16());
+
+ FLAG_Z = ZFLAG_16(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+}
+
+
+void m68k_op_chk_16_pcix(void)
+{
+ sint src = MAKE_INT_16(DX);
+ sint bound = MAKE_INT_16(OPER_PCIX_16());
+
+ FLAG_Z = ZFLAG_16(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+}
+
+
+void m68k_op_chk_16_i(void)
+{
+ sint src = MAKE_INT_16(DX);
+ sint bound = MAKE_INT_16(OPER_I_16());
+
+ FLAG_Z = ZFLAG_16(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+}
+
+
+void m68k_op_chk_32_d(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ sint src = MAKE_INT_32(DX);
+ sint bound = MAKE_INT_32(DY);
+
+ FLAG_Z = ZFLAG_32(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk_32_ai(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ sint src = MAKE_INT_32(DX);
+ sint bound = MAKE_INT_32(OPER_AY_AI_32());
+
+ FLAG_Z = ZFLAG_32(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk_32_pi(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ sint src = MAKE_INT_32(DX);
+ sint bound = MAKE_INT_32(OPER_AY_PI_32());
+
+ FLAG_Z = ZFLAG_32(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk_32_pd(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ sint src = MAKE_INT_32(DX);
+ sint bound = MAKE_INT_32(OPER_AY_PD_32());
+
+ FLAG_Z = ZFLAG_32(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk_32_di(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ sint src = MAKE_INT_32(DX);
+ sint bound = MAKE_INT_32(OPER_AY_DI_32());
+
+ FLAG_Z = ZFLAG_32(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk_32_ix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ sint src = MAKE_INT_32(DX);
+ sint bound = MAKE_INT_32(OPER_AY_IX_32());
+
+ FLAG_Z = ZFLAG_32(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk_32_aw(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ sint src = MAKE_INT_32(DX);
+ sint bound = MAKE_INT_32(OPER_AW_32());
+
+ FLAG_Z = ZFLAG_32(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk_32_al(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ sint src = MAKE_INT_32(DX);
+ sint bound = MAKE_INT_32(OPER_AL_32());
+
+ FLAG_Z = ZFLAG_32(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk_32_pcdi(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ sint src = MAKE_INT_32(DX);
+ sint bound = MAKE_INT_32(OPER_PCDI_32());
+
+ FLAG_Z = ZFLAG_32(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk_32_pcix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ sint src = MAKE_INT_32(DX);
+ sint bound = MAKE_INT_32(OPER_PCIX_32());
+
+ FLAG_Z = ZFLAG_32(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk_32_i(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ sint src = MAKE_INT_32(DX);
+ sint bound = MAKE_INT_32(OPER_I_32());
+
+ FLAG_Z = ZFLAG_32(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk2cmp2_8_pcdi(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15]&0xff;
+ uint ea = EA_PCDI_8();
+ uint lower_bound = m68ki_read_pcrel_8(ea);
+ uint upper_bound = m68ki_read_pcrel_8(ea + 1);
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);
+ else
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ FLAG_C = upper_bound - compare;
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk2cmp2_8_pcix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15]&0xff;
+ uint ea = EA_PCIX_8();
+ uint lower_bound = m68ki_read_pcrel_8(ea);
+ uint upper_bound = m68ki_read_pcrel_8(ea + 1);
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);
+ else
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ FLAG_C = upper_bound - compare;
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk2cmp2_8_ai(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15]&0xff;
+ uint ea = EA_AY_AI_8();
+ uint lower_bound = m68ki_read_8(ea);
+ uint upper_bound = m68ki_read_8(ea + 1);
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);
+ else
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ FLAG_C = upper_bound - compare;
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk2cmp2_8_di(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15]&0xff;
+ uint ea = EA_AY_DI_8();
+ uint lower_bound = m68ki_read_8(ea);
+ uint upper_bound = m68ki_read_8(ea + 1);
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);
+ else
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ FLAG_C = upper_bound - compare;
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk2cmp2_8_ix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15]&0xff;
+ uint ea = EA_AY_IX_8();
+ uint lower_bound = m68ki_read_8(ea);
+ uint upper_bound = m68ki_read_8(ea + 1);
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);
+ else
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ FLAG_C = upper_bound - compare;
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk2cmp2_8_aw(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15]&0xff;
+ uint ea = EA_AW_8();
+ uint lower_bound = m68ki_read_8(ea);
+ uint upper_bound = m68ki_read_8(ea + 1);
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);
+ else
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ FLAG_C = upper_bound - compare;
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk2cmp2_8_al(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15]&0xff;
+ uint ea = EA_AL_8();
+ uint lower_bound = m68ki_read_8(ea);
+ uint upper_bound = m68ki_read_8(ea + 1);
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);
+ else
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ FLAG_C = upper_bound - compare;
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk2cmp2_16_pcdi(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15]&0xffff;
+ uint ea = EA_PCDI_16();
+ uint lower_bound = m68ki_read_pcrel_16(ea);
+ uint upper_bound = m68ki_read_pcrel_16(ea + 2);
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);
+ else
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ FLAG_C = CFLAG_16(FLAG_C);
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);
+ else
+ FLAG_C = upper_bound - compare;
+ FLAG_C = CFLAG_16(FLAG_C);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk2cmp2_16_pcix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15]&0xffff;
+ uint ea = EA_PCIX_16();
+ uint lower_bound = m68ki_read_pcrel_16(ea);
+ uint upper_bound = m68ki_read_pcrel_16(ea + 2);
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);
+ else
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ FLAG_C = CFLAG_16(FLAG_C);
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);
+ else
+ FLAG_C = upper_bound - compare;
+ FLAG_C = CFLAG_16(FLAG_C);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk2cmp2_16_ai(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15]&0xffff;
+ uint ea = EA_AY_AI_16();
+ uint lower_bound = m68ki_read_16(ea);
+ uint upper_bound = m68ki_read_16(ea + 2);
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);
+ else
+ FLAG_C = compare - lower_bound;
+
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ FLAG_C = CFLAG_16(FLAG_C);
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);
+ else
+ FLAG_C = upper_bound - compare;
+
+ FLAG_C = CFLAG_16(FLAG_C);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk2cmp2_16_di(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15]&0xffff;
+ uint ea = EA_AY_DI_16();
+ uint lower_bound = m68ki_read_16(ea);
+ uint upper_bound = m68ki_read_16(ea + 2);
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);
+ else
+ FLAG_C = compare - lower_bound;
+
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ FLAG_C = CFLAG_16(FLAG_C);
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);
+ else
+ FLAG_C = upper_bound - compare;
+
+ FLAG_C = CFLAG_16(FLAG_C);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk2cmp2_16_ix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15]&0xffff;
+ uint ea = EA_AY_IX_16();
+ uint lower_bound = m68ki_read_16(ea);
+ uint upper_bound = m68ki_read_16(ea + 2);
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);
+ else
+ FLAG_C = compare - lower_bound;
+
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ FLAG_C = CFLAG_16(FLAG_C);
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);
+ else
+ FLAG_C = upper_bound - compare;
+
+ FLAG_C = CFLAG_16(FLAG_C);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk2cmp2_16_aw(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15]&0xffff;
+ uint ea = EA_AW_16();
+ uint lower_bound = m68ki_read_16(ea);
+ uint upper_bound = m68ki_read_16(ea + 2);
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);
+ else
+ FLAG_C = compare - lower_bound;
+
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ FLAG_C = CFLAG_16(FLAG_C);
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);
+ else
+ FLAG_C = upper_bound - compare;
+
+ FLAG_C = CFLAG_16(FLAG_C);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk2cmp2_16_al(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15]&0xffff;
+ uint ea = EA_AL_16();
+ uint lower_bound = m68ki_read_16(ea);
+ uint upper_bound = m68ki_read_16(ea + 2);
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);
+ else
+ FLAG_C = compare - lower_bound;
+
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ FLAG_C = CFLAG_16(FLAG_C);
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);
+ else
+ FLAG_C = upper_bound - compare;
+
+ FLAG_C = CFLAG_16(FLAG_C);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk2cmp2_32_pcdi(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15];
+ uint ea = EA_PCDI_32();
+ uint lower_bound = m68ki_read_pcrel_32(ea);
+ uint upper_bound = m68ki_read_pcrel_32(ea + 4);
+
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C);
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ FLAG_C = upper_bound - compare;
+ FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk2cmp2_32_pcix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15];
+ uint ea = EA_PCIX_32();
+ uint lower_bound = m68ki_read_pcrel_32(ea);
+ uint upper_bound = m68ki_read_pcrel_32(ea + 4);
+
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C);
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ FLAG_C = upper_bound - compare;
+ FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk2cmp2_32_ai(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15];
+ uint ea = EA_AY_AI_32();
+ uint lower_bound = m68ki_read_32(ea);
+ uint upper_bound = m68ki_read_32(ea + 4);
+
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C);
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ FLAG_C = upper_bound - compare;
+ FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk2cmp2_32_di(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15];
+ uint ea = EA_AY_DI_32();
+ uint lower_bound = m68ki_read_32(ea);
+ uint upper_bound = m68ki_read_32(ea + 4);
+
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C);
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ FLAG_C = upper_bound - compare;
+ FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk2cmp2_32_ix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15];
+ uint ea = EA_AY_IX_32();
+ uint lower_bound = m68ki_read_32(ea);
+ uint upper_bound = m68ki_read_32(ea + 4);
+
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C);
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ FLAG_C = upper_bound - compare;
+ FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk2cmp2_32_aw(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15];
+ uint ea = EA_AW_32();
+ uint lower_bound = m68ki_read_32(ea);
+ uint upper_bound = m68ki_read_32(ea + 4);
+
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C);
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ FLAG_C = upper_bound - compare;
+ FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_chk2cmp2_32_al(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15];
+ uint ea = EA_AL_32();
+ uint lower_bound = m68ki_read_32(ea);
+ uint upper_bound = m68ki_read_32(ea + 4);
+
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C);
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ FLAG_C = upper_bound - compare;
+ FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_clr_8_d(void)
+{
+ DY &= 0xffffff00;
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_8_ai(void)
+{
+ m68ki_write_8(EA_AY_AI_8(), 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_8_pi(void)
+{
+ m68ki_write_8(EA_AY_PI_8(), 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_8_pi7(void)
+{
+ m68ki_write_8(EA_A7_PI_8(), 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_8_pd(void)
+{
+ m68ki_write_8(EA_AY_PD_8(), 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_8_pd7(void)
+{
+ m68ki_write_8(EA_A7_PD_8(), 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_8_di(void)
+{
+ m68ki_write_8(EA_AY_DI_8(), 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_8_ix(void)
+{
+ m68ki_write_8(EA_AY_IX_8(), 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_8_aw(void)
+{
+ m68ki_write_8(EA_AW_8(), 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_8_al(void)
+{
+ m68ki_write_8(EA_AL_8(), 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_16_d(void)
+{
+ DY &= 0xffff0000;
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_16_ai(void)
+{
+ m68ki_write_16(EA_AY_AI_16(), 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_16_pi(void)
+{
+ m68ki_write_16(EA_AY_PI_16(), 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_16_pd(void)
+{
+ m68ki_write_16(EA_AY_PD_16(), 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_16_di(void)
+{
+ m68ki_write_16(EA_AY_DI_16(), 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_16_ix(void)
+{
+ m68ki_write_16(EA_AY_IX_16(), 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_16_aw(void)
+{
+ m68ki_write_16(EA_AW_16(), 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_16_al(void)
+{
+ m68ki_write_16(EA_AL_16(), 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_32_d(void)
+{
+ DY = 0;
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_32_ai(void)
+{
+ m68ki_write_32(EA_AY_AI_32(), 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_32_pi(void)
+{
+ m68ki_write_32(EA_AY_PI_32(), 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_32_pd(void)
+{
+ m68ki_write_32(EA_AY_PD_32(), 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_32_di(void)
+{
+ m68ki_write_32(EA_AY_DI_32(), 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_32_ix(void)
+{
+ m68ki_write_32(EA_AY_IX_32(), 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_32_aw(void)
+{
+ m68ki_write_32(EA_AW_32(), 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_clr_32_al(void)
+{
+ m68ki_write_32(EA_AL_32(), 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+void m68k_op_cmp_8_d(void)
+{
+ uint src = MASK_OUT_ABOVE_8(DY);
+ uint dst = MASK_OUT_ABOVE_8(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmp_8_ai(void)
+{
+ uint src = OPER_AY_AI_8();
+ uint dst = MASK_OUT_ABOVE_8(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmp_8_pi(void)
+{
+ uint src = OPER_AY_PI_8();
+ uint dst = MASK_OUT_ABOVE_8(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmp_8_pi7(void)
+{
+ uint src = OPER_A7_PI_8();
+ uint dst = MASK_OUT_ABOVE_8(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmp_8_pd(void)
+{
+ uint src = OPER_AY_PD_8();
+ uint dst = MASK_OUT_ABOVE_8(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmp_8_pd7(void)
+{
+ uint src = OPER_A7_PD_8();
+ uint dst = MASK_OUT_ABOVE_8(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmp_8_di(void)
+{
+ uint src = OPER_AY_DI_8();
+ uint dst = MASK_OUT_ABOVE_8(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmp_8_ix(void)
+{
+ uint src = OPER_AY_IX_8();
+ uint dst = MASK_OUT_ABOVE_8(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmp_8_aw(void)
+{
+ uint src = OPER_AW_8();
+ uint dst = MASK_OUT_ABOVE_8(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmp_8_al(void)
+{
+ uint src = OPER_AL_8();
+ uint dst = MASK_OUT_ABOVE_8(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmp_8_pcdi(void)
+{
+ uint src = OPER_PCDI_8();
+ uint dst = MASK_OUT_ABOVE_8(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmp_8_pcix(void)
+{
+ uint src = OPER_PCIX_8();
+ uint dst = MASK_OUT_ABOVE_8(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmp_8_i(void)
+{
+ uint src = OPER_I_8();
+ uint dst = MASK_OUT_ABOVE_8(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmp_16_d(void)
+{
+ uint src = MASK_OUT_ABOVE_16(DY);
+ uint dst = MASK_OUT_ABOVE_16(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+void m68k_op_cmp_16_a(void)
+{
+ uint src = MASK_OUT_ABOVE_16(AY);
+ uint dst = MASK_OUT_ABOVE_16(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+void m68k_op_cmp_16_ai(void)
+{
+ uint src = OPER_AY_AI_16();
+ uint dst = MASK_OUT_ABOVE_16(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+void m68k_op_cmp_16_pi(void)
+{
+ uint src = OPER_AY_PI_16();
+ uint dst = MASK_OUT_ABOVE_16(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+void m68k_op_cmp_16_pd(void)
+{
+ uint src = OPER_AY_PD_16();
+ uint dst = MASK_OUT_ABOVE_16(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+void m68k_op_cmp_16_di(void)
+{
+ uint src = OPER_AY_DI_16();
+ uint dst = MASK_OUT_ABOVE_16(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+void m68k_op_cmp_16_ix(void)
+{
+ uint src = OPER_AY_IX_16();
+ uint dst = MASK_OUT_ABOVE_16(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+void m68k_op_cmp_16_aw(void)
+{
+ uint src = OPER_AW_16();
+ uint dst = MASK_OUT_ABOVE_16(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+void m68k_op_cmp_16_al(void)
+{
+ uint src = OPER_AL_16();
+ uint dst = MASK_OUT_ABOVE_16(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+void m68k_op_cmp_16_pcdi(void)
+{
+ uint src = OPER_PCDI_16();
+ uint dst = MASK_OUT_ABOVE_16(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+void m68k_op_cmp_16_pcix(void)
+{
+ uint src = OPER_PCIX_16();
+ uint dst = MASK_OUT_ABOVE_16(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+void m68k_op_cmp_16_i(void)
+{
+ uint src = OPER_I_16();
+ uint dst = MASK_OUT_ABOVE_16(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+void m68k_op_cmp_32_d(void)
+{
+ uint src = DY;
+ uint dst = DX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmp_32_a(void)
+{
+ uint src = AY;
+ uint dst = DX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmp_32_ai(void)
+{
+ uint src = OPER_AY_AI_32();
+ uint dst = DX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmp_32_pi(void)
+{
+ uint src = OPER_AY_PI_32();
+ uint dst = DX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmp_32_pd(void)
+{
+ uint src = OPER_AY_PD_32();
+ uint dst = DX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmp_32_di(void)
+{
+ uint src = OPER_AY_DI_32();
+ uint dst = DX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmp_32_ix(void)
+{
+ uint src = OPER_AY_IX_32();
+ uint dst = DX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmp_32_aw(void)
+{
+ uint src = OPER_AW_32();
+ uint dst = DX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmp_32_al(void)
+{
+ uint src = OPER_AL_32();
+ uint dst = DX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmp_32_pcdi(void)
+{
+ uint src = OPER_PCDI_32();
+ uint dst = DX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmp_32_pcix(void)
+{
+ uint src = OPER_PCIX_32();
+ uint dst = DX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmp_32_i(void)
+{
+ uint src = OPER_I_32();
+ uint dst = DX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_16_d(void)
+{
+ uint src = MAKE_INT_16(DY);
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_16_a(void)
+{
+ uint src = MAKE_INT_16(AY);
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_16_ai(void)
+{
+ uint src = MAKE_INT_16(OPER_AY_AI_16());
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_16_pi(void)
+{
+ uint src = MAKE_INT_16(OPER_AY_PI_16());
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_16_pd(void)
+{
+ uint src = MAKE_INT_16(OPER_AY_PD_16());
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_16_di(void)
+{
+ uint src = MAKE_INT_16(OPER_AY_DI_16());
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_16_ix(void)
+{
+ uint src = MAKE_INT_16(OPER_AY_IX_16());
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_16_aw(void)
+{
+ uint src = MAKE_INT_16(OPER_AW_16());
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_16_al(void)
+{
+ uint src = MAKE_INT_16(OPER_AL_16());
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_16_pcdi(void)
+{
+ uint src = MAKE_INT_16(OPER_PCDI_16());
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_16_pcix(void)
+{
+ uint src = MAKE_INT_16(OPER_PCIX_16());
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_16_i(void)
+{
+ uint src = MAKE_INT_16(OPER_I_16());
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_32_d(void)
+{
+ uint src = DY;
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_32_a(void)
+{
+ uint src = AY;
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_32_ai(void)
+{
+ uint src = OPER_AY_AI_32();
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_32_pi(void)
+{
+ uint src = OPER_AY_PI_32();
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_32_pd(void)
+{
+ uint src = OPER_AY_PD_32();
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_32_di(void)
+{
+ uint src = OPER_AY_DI_32();
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_32_ix(void)
+{
+ uint src = OPER_AY_IX_32();
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_32_aw(void)
+{
+ uint src = OPER_AW_32();
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_32_al(void)
+{
+ uint src = OPER_AL_32();
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_32_pcdi(void)
+{
+ uint src = OPER_PCDI_32();
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_32_pcix(void)
+{
+ uint src = OPER_PCIX_32();
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpa_32_i(void)
+{
+ uint src = OPER_I_32();
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpi_8_d(void)
+{
+ uint src = OPER_I_8();
+ uint dst = MASK_OUT_ABOVE_8(DY);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmpi_8_ai(void)
+{
+ uint src = OPER_I_8();
+ uint dst = OPER_AY_AI_8();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmpi_8_pi(void)
+{
+ uint src = OPER_I_8();
+ uint dst = OPER_AY_PI_8();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmpi_8_pi7(void)
+{
+ uint src = OPER_I_8();
+ uint dst = OPER_A7_PI_8();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmpi_8_pd(void)
+{
+ uint src = OPER_I_8();
+ uint dst = OPER_AY_PD_8();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmpi_8_pd7(void)
+{
+ uint src = OPER_I_8();
+ uint dst = OPER_A7_PD_8();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmpi_8_di(void)
+{
+ uint src = OPER_I_8();
+ uint dst = OPER_AY_DI_8();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmpi_8_ix(void)
+{
+ uint src = OPER_I_8();
+ uint dst = OPER_AY_IX_8();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmpi_8_aw(void)
+{
+ uint src = OPER_I_8();
+ uint dst = OPER_AW_8();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmpi_8_al(void)
+{
+ uint src = OPER_I_8();
+ uint dst = OPER_AL_8();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmpi_8_pcdi(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint src = OPER_I_8();
+ uint dst = OPER_PCDI_8();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cmpi_8_pcix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint src = OPER_I_8();
+ uint dst = OPER_PCIX_8();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cmpi_16_d(void)
+{
+ uint src = OPER_I_16();
+ uint dst = MASK_OUT_ABOVE_16(DY);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+void m68k_op_cmpi_16_ai(void)
+{
+ uint src = OPER_I_16();
+ uint dst = OPER_AY_AI_16();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+void m68k_op_cmpi_16_pi(void)
+{
+ uint src = OPER_I_16();
+ uint dst = OPER_AY_PI_16();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+void m68k_op_cmpi_16_pd(void)
+{
+ uint src = OPER_I_16();
+ uint dst = OPER_AY_PD_16();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+void m68k_op_cmpi_16_di(void)
+{
+ uint src = OPER_I_16();
+ uint dst = OPER_AY_DI_16();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+void m68k_op_cmpi_16_ix(void)
+{
+ uint src = OPER_I_16();
+ uint dst = OPER_AY_IX_16();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+void m68k_op_cmpi_16_aw(void)
+{
+ uint src = OPER_I_16();
+ uint dst = OPER_AW_16();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+void m68k_op_cmpi_16_al(void)
+{
+ uint src = OPER_I_16();
+ uint dst = OPER_AL_16();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+void m68k_op_cmpi_16_pcdi(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint src = OPER_I_16();
+ uint dst = OPER_PCDI_16();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cmpi_16_pcix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint src = OPER_I_16();
+ uint dst = OPER_PCIX_16();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cmpi_32_d(void)
+{
+ uint src = OPER_I_32();
+ uint dst = DY;
+ uint res = dst - src;
+
+ m68ki_cmpild_callback(src, REG_IR & 7); /* auto-disable (see m68kcpu.h) */
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpi_32_ai(void)
+{
+ uint src = OPER_I_32();
+ uint dst = OPER_AY_AI_32();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpi_32_pi(void)
+{
+ uint src = OPER_I_32();
+ uint dst = OPER_AY_PI_32();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpi_32_pd(void)
+{
+ uint src = OPER_I_32();
+ uint dst = OPER_AY_PD_32();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpi_32_di(void)
+{
+ uint src = OPER_I_32();
+ uint dst = OPER_AY_DI_32();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpi_32_ix(void)
+{
+ uint src = OPER_I_32();
+ uint dst = OPER_AY_IX_32();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpi_32_aw(void)
+{
+ uint src = OPER_I_32();
+ uint dst = OPER_AW_32();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpi_32_al(void)
+{
+ uint src = OPER_I_32();
+ uint dst = OPER_AL_32();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cmpi_32_pcdi(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint src = OPER_I_32();
+ uint dst = OPER_PCDI_32();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cmpi_32_pcix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint src = OPER_I_32();
+ uint dst = OPER_PCIX_32();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_cmpm_8_ax7(void)
+{
+ uint src = OPER_AY_PI_8();
+ uint dst = OPER_A7_PI_8();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmpm_8_ay7(void)
+{
+ uint src = OPER_A7_PI_8();
+ uint dst = OPER_AX_PI_8();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmpm_8_axy7(void)
+{
+ uint src = OPER_A7_PI_8();
+ uint dst = OPER_A7_PI_8();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmpm_8(void)
+{
+ uint src = OPER_AY_PI_8();
+ uint dst = OPER_AX_PI_8();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+void m68k_op_cmpm_16(void)
+{
+ uint src = OPER_AY_PI_16();
+ uint dst = OPER_AX_PI_16();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+void m68k_op_cmpm_32(void)
+{
+ uint src = OPER_AY_PI_32();
+ uint dst = OPER_AX_PI_32();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+void m68k_op_cpbcc_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
+ m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
+ return;
+ }
+ m68ki_exception_1111();
+}
+
+
+void m68k_op_cpdbcc_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
+ m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
+ return;
+ }
+ m68ki_exception_1111();
+}
+
+
+void m68k_op_cpgen_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
+ m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
+ return;
+ }
+ m68ki_exception_1111();
+}
+
+
+void m68k_op_cpscc_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
+ m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
+ return;
+ }
+ m68ki_exception_1111();
+}
+
+
+void m68k_op_cptrapcc_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
+ m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
+ return;
+ }
+ m68ki_exception_1111();
+}
+
+
+/* ======================================================================== */
+/* ============================== END OF FILE ============================= */
+/* ======================================================================== */
+
+
diff --git a/Src/CPU/68K/Musashi/generated/m68kopac.o b/Src/CPU/68K/Musashi/generated/m68kopac.o
new file mode 100644
index 0000000..ce43787
Binary files /dev/null and b/Src/CPU/68K/Musashi/generated/m68kopac.o differ
diff --git a/Src/CPU/68K/Musashi/generated/m68kopdm.c b/Src/CPU/68K/Musashi/generated/m68kopdm.c
new file mode 100644
index 0000000..cb71a40
--- /dev/null
+++ b/Src/CPU/68K/Musashi/generated/m68kopdm.c
@@ -0,0 +1,13239 @@
+#include "m68kcpu.h"
+
+/* ======================================================================== */
+/* ========================= INSTRUCTION HANDLERS ========================= */
+/* ======================================================================== */
+
+
+void m68k_op_dbt_16(void)
+{
+ REG_PC += 2;
+}
+
+
+void m68k_op_dbf_16(void)
+{
+ uint* r_dst = &DY;
+ uint res = MASK_OUT_ABOVE_16(*r_dst - 1);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+ if(res != 0xffff)
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ return;
+ }
+ REG_PC += 2;
+}
+
+
+void m68k_op_dbhi_16(void)
+{
+ if(COND_NOT_HI())
+ {
+ uint* r_dst = &DY;
+ uint res = MASK_OUT_ABOVE_16(*r_dst - 1);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+ if(res != 0xffff)
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ USE_CYCLES(CYC_DBCC_F_NOEXP);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_DBCC_F_EXP);
+ return;
+ }
+ REG_PC += 2;
+}
+
+
+void m68k_op_dbls_16(void)
+{
+ if(COND_NOT_LS())
+ {
+ uint* r_dst = &DY;
+ uint res = MASK_OUT_ABOVE_16(*r_dst - 1);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+ if(res != 0xffff)
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ USE_CYCLES(CYC_DBCC_F_NOEXP);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_DBCC_F_EXP);
+ return;
+ }
+ REG_PC += 2;
+}
+
+
+void m68k_op_dbcc_16(void)
+{
+ if(COND_NOT_CC())
+ {
+ uint* r_dst = &DY;
+ uint res = MASK_OUT_ABOVE_16(*r_dst - 1);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+ if(res != 0xffff)
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ USE_CYCLES(CYC_DBCC_F_NOEXP);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_DBCC_F_EXP);
+ return;
+ }
+ REG_PC += 2;
+}
+
+
+void m68k_op_dbcs_16(void)
+{
+ if(COND_NOT_CS())
+ {
+ uint* r_dst = &DY;
+ uint res = MASK_OUT_ABOVE_16(*r_dst - 1);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+ if(res != 0xffff)
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ USE_CYCLES(CYC_DBCC_F_NOEXP);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_DBCC_F_EXP);
+ return;
+ }
+ REG_PC += 2;
+}
+
+
+void m68k_op_dbne_16(void)
+{
+ if(COND_NOT_NE())
+ {
+ uint* r_dst = &DY;
+ uint res = MASK_OUT_ABOVE_16(*r_dst - 1);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+ if(res != 0xffff)
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ USE_CYCLES(CYC_DBCC_F_NOEXP);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_DBCC_F_EXP);
+ return;
+ }
+ REG_PC += 2;
+}
+
+
+void m68k_op_dbeq_16(void)
+{
+ if(COND_NOT_EQ())
+ {
+ uint* r_dst = &DY;
+ uint res = MASK_OUT_ABOVE_16(*r_dst - 1);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+ if(res != 0xffff)
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ USE_CYCLES(CYC_DBCC_F_NOEXP);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_DBCC_F_EXP);
+ return;
+ }
+ REG_PC += 2;
+}
+
+
+void m68k_op_dbvc_16(void)
+{
+ if(COND_NOT_VC())
+ {
+ uint* r_dst = &DY;
+ uint res = MASK_OUT_ABOVE_16(*r_dst - 1);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+ if(res != 0xffff)
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ USE_CYCLES(CYC_DBCC_F_NOEXP);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_DBCC_F_EXP);
+ return;
+ }
+ REG_PC += 2;
+}
+
+
+void m68k_op_dbvs_16(void)
+{
+ if(COND_NOT_VS())
+ {
+ uint* r_dst = &DY;
+ uint res = MASK_OUT_ABOVE_16(*r_dst - 1);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+ if(res != 0xffff)
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ USE_CYCLES(CYC_DBCC_F_NOEXP);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_DBCC_F_EXP);
+ return;
+ }
+ REG_PC += 2;
+}
+
+
+void m68k_op_dbpl_16(void)
+{
+ if(COND_NOT_PL())
+ {
+ uint* r_dst = &DY;
+ uint res = MASK_OUT_ABOVE_16(*r_dst - 1);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+ if(res != 0xffff)
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ USE_CYCLES(CYC_DBCC_F_NOEXP);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_DBCC_F_EXP);
+ return;
+ }
+ REG_PC += 2;
+}
+
+
+void m68k_op_dbmi_16(void)
+{
+ if(COND_NOT_MI())
+ {
+ uint* r_dst = &DY;
+ uint res = MASK_OUT_ABOVE_16(*r_dst - 1);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+ if(res != 0xffff)
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ USE_CYCLES(CYC_DBCC_F_NOEXP);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_DBCC_F_EXP);
+ return;
+ }
+ REG_PC += 2;
+}
+
+
+void m68k_op_dbge_16(void)
+{
+ if(COND_NOT_GE())
+ {
+ uint* r_dst = &DY;
+ uint res = MASK_OUT_ABOVE_16(*r_dst - 1);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+ if(res != 0xffff)
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ USE_CYCLES(CYC_DBCC_F_NOEXP);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_DBCC_F_EXP);
+ return;
+ }
+ REG_PC += 2;
+}
+
+
+void m68k_op_dblt_16(void)
+{
+ if(COND_NOT_LT())
+ {
+ uint* r_dst = &DY;
+ uint res = MASK_OUT_ABOVE_16(*r_dst - 1);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+ if(res != 0xffff)
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ USE_CYCLES(CYC_DBCC_F_NOEXP);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_DBCC_F_EXP);
+ return;
+ }
+ REG_PC += 2;
+}
+
+
+void m68k_op_dbgt_16(void)
+{
+ if(COND_NOT_GT())
+ {
+ uint* r_dst = &DY;
+ uint res = MASK_OUT_ABOVE_16(*r_dst - 1);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+ if(res != 0xffff)
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ USE_CYCLES(CYC_DBCC_F_NOEXP);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_DBCC_F_EXP);
+ return;
+ }
+ REG_PC += 2;
+}
+
+
+void m68k_op_dble_16(void)
+{
+ if(COND_NOT_LE())
+ {
+ uint* r_dst = &DY;
+ uint res = MASK_OUT_ABOVE_16(*r_dst - 1);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+ if(res != 0xffff)
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ USE_CYCLES(CYC_DBCC_F_NOEXP);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_DBCC_F_EXP);
+ return;
+ }
+ REG_PC += 2;
+}
+
+
+void m68k_op_divs_16_d(void)
+{
+ uint* r_dst = &DX;
+ sint src = MAKE_INT_16(DY);
+ sint quotient;
+ sint remainder;
+
+ if(src != 0)
+ {
+ if((uint32)*r_dst == 0x80000000 && src == -1)
+ {
+ FLAG_Z = 0;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = 0;
+ return;
+ }
+
+ quotient = MAKE_INT_32(*r_dst) / src;
+ remainder = MAKE_INT_32(*r_dst) % src;
+
+ if(quotient == MAKE_INT_16(quotient))
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+void m68k_op_divs_16_ai(void)
+{
+ uint* r_dst = &DX;
+ sint src = MAKE_INT_16(OPER_AY_AI_16());
+ sint quotient;
+ sint remainder;
+
+ if(src != 0)
+ {
+ if((uint32)*r_dst == 0x80000000 && src == -1)
+ {
+ FLAG_Z = 0;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = 0;
+ return;
+ }
+
+ quotient = MAKE_INT_32(*r_dst) / src;
+ remainder = MAKE_INT_32(*r_dst) % src;
+
+ if(quotient == MAKE_INT_16(quotient))
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+void m68k_op_divs_16_pi(void)
+{
+ uint* r_dst = &DX;
+ sint src = MAKE_INT_16(OPER_AY_PI_16());
+ sint quotient;
+ sint remainder;
+
+ if(src != 0)
+ {
+ if((uint32)*r_dst == 0x80000000 && src == -1)
+ {
+ FLAG_Z = 0;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = 0;
+ return;
+ }
+
+ quotient = MAKE_INT_32(*r_dst) / src;
+ remainder = MAKE_INT_32(*r_dst) % src;
+
+ if(quotient == MAKE_INT_16(quotient))
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+void m68k_op_divs_16_pd(void)
+{
+ uint* r_dst = &DX;
+ sint src = MAKE_INT_16(OPER_AY_PD_16());
+ sint quotient;
+ sint remainder;
+
+ if(src != 0)
+ {
+ if((uint32)*r_dst == 0x80000000 && src == -1)
+ {
+ FLAG_Z = 0;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = 0;
+ return;
+ }
+
+ quotient = MAKE_INT_32(*r_dst) / src;
+ remainder = MAKE_INT_32(*r_dst) % src;
+
+ if(quotient == MAKE_INT_16(quotient))
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+void m68k_op_divs_16_di(void)
+{
+ uint* r_dst = &DX;
+ sint src = MAKE_INT_16(OPER_AY_DI_16());
+ sint quotient;
+ sint remainder;
+
+ if(src != 0)
+ {
+ if((uint32)*r_dst == 0x80000000 && src == -1)
+ {
+ FLAG_Z = 0;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = 0;
+ return;
+ }
+
+ quotient = MAKE_INT_32(*r_dst) / src;
+ remainder = MAKE_INT_32(*r_dst) % src;
+
+ if(quotient == MAKE_INT_16(quotient))
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+void m68k_op_divs_16_ix(void)
+{
+ uint* r_dst = &DX;
+ sint src = MAKE_INT_16(OPER_AY_IX_16());
+ sint quotient;
+ sint remainder;
+
+ if(src != 0)
+ {
+ if((uint32)*r_dst == 0x80000000 && src == -1)
+ {
+ FLAG_Z = 0;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = 0;
+ return;
+ }
+
+ quotient = MAKE_INT_32(*r_dst) / src;
+ remainder = MAKE_INT_32(*r_dst) % src;
+
+ if(quotient == MAKE_INT_16(quotient))
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+void m68k_op_divs_16_aw(void)
+{
+ uint* r_dst = &DX;
+ sint src = MAKE_INT_16(OPER_AW_16());
+ sint quotient;
+ sint remainder;
+
+ if(src != 0)
+ {
+ if((uint32)*r_dst == 0x80000000 && src == -1)
+ {
+ FLAG_Z = 0;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = 0;
+ return;
+ }
+
+ quotient = MAKE_INT_32(*r_dst) / src;
+ remainder = MAKE_INT_32(*r_dst) % src;
+
+ if(quotient == MAKE_INT_16(quotient))
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+void m68k_op_divs_16_al(void)
+{
+ uint* r_dst = &DX;
+ sint src = MAKE_INT_16(OPER_AL_16());
+ sint quotient;
+ sint remainder;
+
+ if(src != 0)
+ {
+ if((uint32)*r_dst == 0x80000000 && src == -1)
+ {
+ FLAG_Z = 0;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = 0;
+ return;
+ }
+
+ quotient = MAKE_INT_32(*r_dst) / src;
+ remainder = MAKE_INT_32(*r_dst) % src;
+
+ if(quotient == MAKE_INT_16(quotient))
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+void m68k_op_divs_16_pcdi(void)
+{
+ uint* r_dst = &DX;
+ sint src = MAKE_INT_16(OPER_PCDI_16());
+ sint quotient;
+ sint remainder;
+
+ if(src != 0)
+ {
+ if((uint32)*r_dst == 0x80000000 && src == -1)
+ {
+ FLAG_Z = 0;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = 0;
+ return;
+ }
+
+ quotient = MAKE_INT_32(*r_dst) / src;
+ remainder = MAKE_INT_32(*r_dst) % src;
+
+ if(quotient == MAKE_INT_16(quotient))
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+void m68k_op_divs_16_pcix(void)
+{
+ uint* r_dst = &DX;
+ sint src = MAKE_INT_16(OPER_PCIX_16());
+ sint quotient;
+ sint remainder;
+
+ if(src != 0)
+ {
+ if((uint32)*r_dst == 0x80000000 && src == -1)
+ {
+ FLAG_Z = 0;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = 0;
+ return;
+ }
+
+ quotient = MAKE_INT_32(*r_dst) / src;
+ remainder = MAKE_INT_32(*r_dst) % src;
+
+ if(quotient == MAKE_INT_16(quotient))
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+void m68k_op_divs_16_i(void)
+{
+ uint* r_dst = &DX;
+ sint src = MAKE_INT_16(OPER_I_16());
+ sint quotient;
+ sint remainder;
+
+ if(src != 0)
+ {
+ if((uint32)*r_dst == 0x80000000 && src == -1)
+ {
+ FLAG_Z = 0;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = 0;
+ return;
+ }
+
+ quotient = MAKE_INT_32(*r_dst) / src;
+ remainder = MAKE_INT_32(*r_dst) % src;
+
+ if(quotient == MAKE_INT_16(quotient))
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+void m68k_op_divu_16_d(void)
+{
+ uint* r_dst = &DX;
+ uint src = MASK_OUT_ABOVE_16(DY);
+
+ if(src != 0)
+ {
+ uint quotient = *r_dst / src;
+ uint remainder = *r_dst % src;
+
+ if(quotient < 0x10000)
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+void m68k_op_divu_16_ai(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_AI_16();
+
+ if(src != 0)
+ {
+ uint quotient = *r_dst / src;
+ uint remainder = *r_dst % src;
+
+ if(quotient < 0x10000)
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+void m68k_op_divu_16_pi(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_PI_16();
+
+ if(src != 0)
+ {
+ uint quotient = *r_dst / src;
+ uint remainder = *r_dst % src;
+
+ if(quotient < 0x10000)
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+void m68k_op_divu_16_pd(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_PD_16();
+
+ if(src != 0)
+ {
+ uint quotient = *r_dst / src;
+ uint remainder = *r_dst % src;
+
+ if(quotient < 0x10000)
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+void m68k_op_divu_16_di(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_DI_16();
+
+ if(src != 0)
+ {
+ uint quotient = *r_dst / src;
+ uint remainder = *r_dst % src;
+
+ if(quotient < 0x10000)
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+void m68k_op_divu_16_ix(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_IX_16();
+
+ if(src != 0)
+ {
+ uint quotient = *r_dst / src;
+ uint remainder = *r_dst % src;
+
+ if(quotient < 0x10000)
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+void m68k_op_divu_16_aw(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AW_16();
+
+ if(src != 0)
+ {
+ uint quotient = *r_dst / src;
+ uint remainder = *r_dst % src;
+
+ if(quotient < 0x10000)
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+void m68k_op_divu_16_al(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AL_16();
+
+ if(src != 0)
+ {
+ uint quotient = *r_dst / src;
+ uint remainder = *r_dst % src;
+
+ if(quotient < 0x10000)
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+void m68k_op_divu_16_pcdi(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_PCDI_16();
+
+ if(src != 0)
+ {
+ uint quotient = *r_dst / src;
+ uint remainder = *r_dst % src;
+
+ if(quotient < 0x10000)
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+void m68k_op_divu_16_pcix(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_PCIX_16();
+
+ if(src != 0)
+ {
+ uint quotient = *r_dst / src;
+ uint remainder = *r_dst % src;
+
+ if(quotient < 0x10000)
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+void m68k_op_divu_16_i(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_I_16();
+
+ if(src != 0)
+ {
+ uint quotient = *r_dst / src;
+ uint remainder = *r_dst % src;
+
+ if(quotient < 0x10000)
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+void m68k_op_divl_32_d(void)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 divisor = DY;
+ uint64 dividend = 0;
+ uint64 quotient = 0;
+ uint64 remainder = 0;
+
+ if(divisor != 0)
+ {
+ if(BIT_A(word2)) /* 64 bit */
+ {
+ dividend = REG_D[word2 & 7];
+ dividend <<= 32;
+ dividend |= REG_D[(word2 >> 12) & 7];
+
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));
+ if((sint64)quotient != (sint64)((sint32)quotient))
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ if(quotient > 0xffffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ remainder = dividend % divisor;
+ }
+ }
+ else /* 32 bit */
+ {
+ dividend = REG_D[(word2 >> 12) & 7];
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ remainder = dividend % divisor;
+ }
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint divisor = DY;
+ uint dividend_hi = REG_D[word2 & 7];
+ uint dividend_lo = REG_D[(word2 >> 12) & 7];
+ uint quotient = 0;
+ uint remainder = 0;
+ uint dividend_neg = 0;
+ uint divisor_neg = 0;
+ sint i;
+ uint overflow;
+
+ if(divisor != 0)
+ {
+ /* quad / long : long quotient, long remainder */
+ if(BIT_A(word2))
+ {
+ if(BIT_B(word2)) /* signed */
+ {
+ /* special case in signed divide */
+ if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ REG_D[word2 & 7] = 0;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ if(GET_MSB_32(dividend_hi))
+ {
+ dividend_neg = 1;
+ dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));
+ dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);
+ }
+ if(GET_MSB_32(divisor))
+ {
+ divisor_neg = 1;
+ divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);
+
+ }
+ }
+
+ /* if the upper long is greater than the divisor, we're overflowing. */
+ if(dividend_hi >= divisor)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ remainder = (remainder << 1) + ((dividend_hi >> i) & 1);
+ if(remainder >= divisor)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ overflow = GET_MSB_32(remainder);
+ remainder = (remainder << 1) + ((dividend_lo >> i) & 1);
+ if(remainder >= divisor || overflow)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(quotient > 0x7fffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ if(dividend_neg)
+ {
+ remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+ if(divisor_neg)
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+
+ /* long / long: long quotient, maybe long remainder */
+ if(BIT_B(word2)) /* signed */
+ {
+ /* Special case in divide */
+ if(dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+ REG_D[word2 & 7] = 0;
+ return;
+ }
+ REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);
+ }
+ else
+ {
+ REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);
+ }
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+void m68k_op_divl_32_ai(void)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 divisor = OPER_AY_AI_32();
+ uint64 dividend = 0;
+ uint64 quotient = 0;
+ uint64 remainder = 0;
+
+ if(divisor != 0)
+ {
+ if(BIT_A(word2)) /* 64 bit */
+ {
+ dividend = REG_D[word2 & 7];
+ dividend <<= 32;
+ dividend |= REG_D[(word2 >> 12) & 7];
+
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));
+ if((sint64)quotient != (sint64)((sint32)quotient))
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ if(quotient > 0xffffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ remainder = dividend % divisor;
+ }
+ }
+ else /* 32 bit */
+ {
+ dividend = REG_D[(word2 >> 12) & 7];
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ remainder = dividend % divisor;
+ }
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint divisor = OPER_AY_AI_32();
+ uint dividend_hi = REG_D[word2 & 7];
+ uint dividend_lo = REG_D[(word2 >> 12) & 7];
+ uint quotient = 0;
+ uint remainder = 0;
+ uint dividend_neg = 0;
+ uint divisor_neg = 0;
+ sint i;
+ uint overflow;
+
+ if(divisor != 0)
+ {
+ /* quad / long : long quotient, long remainder */
+ if(BIT_A(word2))
+ {
+ if(BIT_B(word2)) /* signed */
+ {
+ /* special case in signed divide */
+ if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ REG_D[word2 & 7] = 0;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ if(GET_MSB_32(dividend_hi))
+ {
+ dividend_neg = 1;
+ dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));
+ dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);
+ }
+ if(GET_MSB_32(divisor))
+ {
+ divisor_neg = 1;
+ divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);
+
+ }
+ }
+
+ /* if the upper long is greater than the divisor, we're overflowing. */
+ if(dividend_hi >= divisor)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ remainder = (remainder << 1) + ((dividend_hi >> i) & 1);
+ if(remainder >= divisor)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ overflow = GET_MSB_32(remainder);
+ remainder = (remainder << 1) + ((dividend_lo >> i) & 1);
+ if(remainder >= divisor || overflow)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(quotient > 0x7fffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ if(dividend_neg)
+ {
+ remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+ if(divisor_neg)
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+
+ /* long / long: long quotient, maybe long remainder */
+ if(BIT_B(word2)) /* signed */
+ {
+ /* Special case in divide */
+ if(dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+ REG_D[word2 & 7] = 0;
+ return;
+ }
+ REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);
+ }
+ else
+ {
+ REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);
+ }
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+void m68k_op_divl_32_pi(void)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 divisor = OPER_AY_PI_32();
+ uint64 dividend = 0;
+ uint64 quotient = 0;
+ uint64 remainder = 0;
+
+ if(divisor != 0)
+ {
+ if(BIT_A(word2)) /* 64 bit */
+ {
+ dividend = REG_D[word2 & 7];
+ dividend <<= 32;
+ dividend |= REG_D[(word2 >> 12) & 7];
+
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));
+ if((sint64)quotient != (sint64)((sint32)quotient))
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ if(quotient > 0xffffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ remainder = dividend % divisor;
+ }
+ }
+ else /* 32 bit */
+ {
+ dividend = REG_D[(word2 >> 12) & 7];
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ remainder = dividend % divisor;
+ }
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint divisor = OPER_AY_PI_32();
+ uint dividend_hi = REG_D[word2 & 7];
+ uint dividend_lo = REG_D[(word2 >> 12) & 7];
+ uint quotient = 0;
+ uint remainder = 0;
+ uint dividend_neg = 0;
+ uint divisor_neg = 0;
+ sint i;
+ uint overflow;
+
+ if(divisor != 0)
+ {
+ /* quad / long : long quotient, long remainder */
+ if(BIT_A(word2))
+ {
+ if(BIT_B(word2)) /* signed */
+ {
+ /* special case in signed divide */
+ if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ REG_D[word2 & 7] = 0;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ if(GET_MSB_32(dividend_hi))
+ {
+ dividend_neg = 1;
+ dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));
+ dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);
+ }
+ if(GET_MSB_32(divisor))
+ {
+ divisor_neg = 1;
+ divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);
+
+ }
+ }
+
+ /* if the upper long is greater than the divisor, we're overflowing. */
+ if(dividend_hi >= divisor)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ remainder = (remainder << 1) + ((dividend_hi >> i) & 1);
+ if(remainder >= divisor)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ overflow = GET_MSB_32(remainder);
+ remainder = (remainder << 1) + ((dividend_lo >> i) & 1);
+ if(remainder >= divisor || overflow)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(quotient > 0x7fffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ if(dividend_neg)
+ {
+ remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+ if(divisor_neg)
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+
+ /* long / long: long quotient, maybe long remainder */
+ if(BIT_B(word2)) /* signed */
+ {
+ /* Special case in divide */
+ if(dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+ REG_D[word2 & 7] = 0;
+ return;
+ }
+ REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);
+ }
+ else
+ {
+ REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);
+ }
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+void m68k_op_divl_32_pd(void)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 divisor = OPER_AY_PD_32();
+ uint64 dividend = 0;
+ uint64 quotient = 0;
+ uint64 remainder = 0;
+
+ if(divisor != 0)
+ {
+ if(BIT_A(word2)) /* 64 bit */
+ {
+ dividend = REG_D[word2 & 7];
+ dividend <<= 32;
+ dividend |= REG_D[(word2 >> 12) & 7];
+
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));
+ if((sint64)quotient != (sint64)((sint32)quotient))
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ if(quotient > 0xffffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ remainder = dividend % divisor;
+ }
+ }
+ else /* 32 bit */
+ {
+ dividend = REG_D[(word2 >> 12) & 7];
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ remainder = dividend % divisor;
+ }
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint divisor = OPER_AY_PD_32();
+ uint dividend_hi = REG_D[word2 & 7];
+ uint dividend_lo = REG_D[(word2 >> 12) & 7];
+ uint quotient = 0;
+ uint remainder = 0;
+ uint dividend_neg = 0;
+ uint divisor_neg = 0;
+ sint i;
+ uint overflow;
+
+ if(divisor != 0)
+ {
+ /* quad / long : long quotient, long remainder */
+ if(BIT_A(word2))
+ {
+ if(BIT_B(word2)) /* signed */
+ {
+ /* special case in signed divide */
+ if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ REG_D[word2 & 7] = 0;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ if(GET_MSB_32(dividend_hi))
+ {
+ dividend_neg = 1;
+ dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));
+ dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);
+ }
+ if(GET_MSB_32(divisor))
+ {
+ divisor_neg = 1;
+ divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);
+
+ }
+ }
+
+ /* if the upper long is greater than the divisor, we're overflowing. */
+ if(dividend_hi >= divisor)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ remainder = (remainder << 1) + ((dividend_hi >> i) & 1);
+ if(remainder >= divisor)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ overflow = GET_MSB_32(remainder);
+ remainder = (remainder << 1) + ((dividend_lo >> i) & 1);
+ if(remainder >= divisor || overflow)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(quotient > 0x7fffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ if(dividend_neg)
+ {
+ remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+ if(divisor_neg)
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+
+ /* long / long: long quotient, maybe long remainder */
+ if(BIT_B(word2)) /* signed */
+ {
+ /* Special case in divide */
+ if(dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+ REG_D[word2 & 7] = 0;
+ return;
+ }
+ REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);
+ }
+ else
+ {
+ REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);
+ }
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+void m68k_op_divl_32_di(void)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 divisor = OPER_AY_DI_32();
+ uint64 dividend = 0;
+ uint64 quotient = 0;
+ uint64 remainder = 0;
+
+ if(divisor != 0)
+ {
+ if(BIT_A(word2)) /* 64 bit */
+ {
+ dividend = REG_D[word2 & 7];
+ dividend <<= 32;
+ dividend |= REG_D[(word2 >> 12) & 7];
+
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));
+ if((sint64)quotient != (sint64)((sint32)quotient))
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ if(quotient > 0xffffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ remainder = dividend % divisor;
+ }
+ }
+ else /* 32 bit */
+ {
+ dividend = REG_D[(word2 >> 12) & 7];
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ remainder = dividend % divisor;
+ }
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint divisor = OPER_AY_DI_32();
+ uint dividend_hi = REG_D[word2 & 7];
+ uint dividend_lo = REG_D[(word2 >> 12) & 7];
+ uint quotient = 0;
+ uint remainder = 0;
+ uint dividend_neg = 0;
+ uint divisor_neg = 0;
+ sint i;
+ uint overflow;
+
+ if(divisor != 0)
+ {
+ /* quad / long : long quotient, long remainder */
+ if(BIT_A(word2))
+ {
+ if(BIT_B(word2)) /* signed */
+ {
+ /* special case in signed divide */
+ if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ REG_D[word2 & 7] = 0;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ if(GET_MSB_32(dividend_hi))
+ {
+ dividend_neg = 1;
+ dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));
+ dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);
+ }
+ if(GET_MSB_32(divisor))
+ {
+ divisor_neg = 1;
+ divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);
+
+ }
+ }
+
+ /* if the upper long is greater than the divisor, we're overflowing. */
+ if(dividend_hi >= divisor)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ remainder = (remainder << 1) + ((dividend_hi >> i) & 1);
+ if(remainder >= divisor)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ overflow = GET_MSB_32(remainder);
+ remainder = (remainder << 1) + ((dividend_lo >> i) & 1);
+ if(remainder >= divisor || overflow)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(quotient > 0x7fffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ if(dividend_neg)
+ {
+ remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+ if(divisor_neg)
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+
+ /* long / long: long quotient, maybe long remainder */
+ if(BIT_B(word2)) /* signed */
+ {
+ /* Special case in divide */
+ if(dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+ REG_D[word2 & 7] = 0;
+ return;
+ }
+ REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);
+ }
+ else
+ {
+ REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);
+ }
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+void m68k_op_divl_32_ix(void)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 divisor = OPER_AY_IX_32();
+ uint64 dividend = 0;
+ uint64 quotient = 0;
+ uint64 remainder = 0;
+
+ if(divisor != 0)
+ {
+ if(BIT_A(word2)) /* 64 bit */
+ {
+ dividend = REG_D[word2 & 7];
+ dividend <<= 32;
+ dividend |= REG_D[(word2 >> 12) & 7];
+
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));
+ if((sint64)quotient != (sint64)((sint32)quotient))
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ if(quotient > 0xffffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ remainder = dividend % divisor;
+ }
+ }
+ else /* 32 bit */
+ {
+ dividend = REG_D[(word2 >> 12) & 7];
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ remainder = dividend % divisor;
+ }
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint divisor = OPER_AY_IX_32();
+ uint dividend_hi = REG_D[word2 & 7];
+ uint dividend_lo = REG_D[(word2 >> 12) & 7];
+ uint quotient = 0;
+ uint remainder = 0;
+ uint dividend_neg = 0;
+ uint divisor_neg = 0;
+ sint i;
+ uint overflow;
+
+ if(divisor != 0)
+ {
+ /* quad / long : long quotient, long remainder */
+ if(BIT_A(word2))
+ {
+ if(BIT_B(word2)) /* signed */
+ {
+ /* special case in signed divide */
+ if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ REG_D[word2 & 7] = 0;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ if(GET_MSB_32(dividend_hi))
+ {
+ dividend_neg = 1;
+ dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));
+ dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);
+ }
+ if(GET_MSB_32(divisor))
+ {
+ divisor_neg = 1;
+ divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);
+
+ }
+ }
+
+ /* if the upper long is greater than the divisor, we're overflowing. */
+ if(dividend_hi >= divisor)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ remainder = (remainder << 1) + ((dividend_hi >> i) & 1);
+ if(remainder >= divisor)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ overflow = GET_MSB_32(remainder);
+ remainder = (remainder << 1) + ((dividend_lo >> i) & 1);
+ if(remainder >= divisor || overflow)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(quotient > 0x7fffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ if(dividend_neg)
+ {
+ remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+ if(divisor_neg)
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+
+ /* long / long: long quotient, maybe long remainder */
+ if(BIT_B(word2)) /* signed */
+ {
+ /* Special case in divide */
+ if(dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+ REG_D[word2 & 7] = 0;
+ return;
+ }
+ REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);
+ }
+ else
+ {
+ REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);
+ }
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+void m68k_op_divl_32_aw(void)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 divisor = OPER_AW_32();
+ uint64 dividend = 0;
+ uint64 quotient = 0;
+ uint64 remainder = 0;
+
+ if(divisor != 0)
+ {
+ if(BIT_A(word2)) /* 64 bit */
+ {
+ dividend = REG_D[word2 & 7];
+ dividend <<= 32;
+ dividend |= REG_D[(word2 >> 12) & 7];
+
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));
+ if((sint64)quotient != (sint64)((sint32)quotient))
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ if(quotient > 0xffffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ remainder = dividend % divisor;
+ }
+ }
+ else /* 32 bit */
+ {
+ dividend = REG_D[(word2 >> 12) & 7];
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ remainder = dividend % divisor;
+ }
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint divisor = OPER_AW_32();
+ uint dividend_hi = REG_D[word2 & 7];
+ uint dividend_lo = REG_D[(word2 >> 12) & 7];
+ uint quotient = 0;
+ uint remainder = 0;
+ uint dividend_neg = 0;
+ uint divisor_neg = 0;
+ sint i;
+ uint overflow;
+
+ if(divisor != 0)
+ {
+ /* quad / long : long quotient, long remainder */
+ if(BIT_A(word2))
+ {
+ if(BIT_B(word2)) /* signed */
+ {
+ /* special case in signed divide */
+ if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ REG_D[word2 & 7] = 0;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ if(GET_MSB_32(dividend_hi))
+ {
+ dividend_neg = 1;
+ dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));
+ dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);
+ }
+ if(GET_MSB_32(divisor))
+ {
+ divisor_neg = 1;
+ divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);
+
+ }
+ }
+
+ /* if the upper long is greater than the divisor, we're overflowing. */
+ if(dividend_hi >= divisor)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ remainder = (remainder << 1) + ((dividend_hi >> i) & 1);
+ if(remainder >= divisor)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ overflow = GET_MSB_32(remainder);
+ remainder = (remainder << 1) + ((dividend_lo >> i) & 1);
+ if(remainder >= divisor || overflow)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(quotient > 0x7fffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ if(dividend_neg)
+ {
+ remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+ if(divisor_neg)
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+
+ /* long / long: long quotient, maybe long remainder */
+ if(BIT_B(word2)) /* signed */
+ {
+ /* Special case in divide */
+ if(dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+ REG_D[word2 & 7] = 0;
+ return;
+ }
+ REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);
+ }
+ else
+ {
+ REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);
+ }
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+void m68k_op_divl_32_al(void)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 divisor = OPER_AL_32();
+ uint64 dividend = 0;
+ uint64 quotient = 0;
+ uint64 remainder = 0;
+
+ if(divisor != 0)
+ {
+ if(BIT_A(word2)) /* 64 bit */
+ {
+ dividend = REG_D[word2 & 7];
+ dividend <<= 32;
+ dividend |= REG_D[(word2 >> 12) & 7];
+
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));
+ if((sint64)quotient != (sint64)((sint32)quotient))
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ if(quotient > 0xffffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ remainder = dividend % divisor;
+ }
+ }
+ else /* 32 bit */
+ {
+ dividend = REG_D[(word2 >> 12) & 7];
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ remainder = dividend % divisor;
+ }
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint divisor = OPER_AL_32();
+ uint dividend_hi = REG_D[word2 & 7];
+ uint dividend_lo = REG_D[(word2 >> 12) & 7];
+ uint quotient = 0;
+ uint remainder = 0;
+ uint dividend_neg = 0;
+ uint divisor_neg = 0;
+ sint i;
+ uint overflow;
+
+ if(divisor != 0)
+ {
+ /* quad / long : long quotient, long remainder */
+ if(BIT_A(word2))
+ {
+ if(BIT_B(word2)) /* signed */
+ {
+ /* special case in signed divide */
+ if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ REG_D[word2 & 7] = 0;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ if(GET_MSB_32(dividend_hi))
+ {
+ dividend_neg = 1;
+ dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));
+ dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);
+ }
+ if(GET_MSB_32(divisor))
+ {
+ divisor_neg = 1;
+ divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);
+
+ }
+ }
+
+ /* if the upper long is greater than the divisor, we're overflowing. */
+ if(dividend_hi >= divisor)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ remainder = (remainder << 1) + ((dividend_hi >> i) & 1);
+ if(remainder >= divisor)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ overflow = GET_MSB_32(remainder);
+ remainder = (remainder << 1) + ((dividend_lo >> i) & 1);
+ if(remainder >= divisor || overflow)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(quotient > 0x7fffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ if(dividend_neg)
+ {
+ remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+ if(divisor_neg)
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+
+ /* long / long: long quotient, maybe long remainder */
+ if(BIT_B(word2)) /* signed */
+ {
+ /* Special case in divide */
+ if(dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+ REG_D[word2 & 7] = 0;
+ return;
+ }
+ REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);
+ }
+ else
+ {
+ REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);
+ }
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+void m68k_op_divl_32_pcdi(void)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 divisor = OPER_PCDI_32();
+ uint64 dividend = 0;
+ uint64 quotient = 0;
+ uint64 remainder = 0;
+
+ if(divisor != 0)
+ {
+ if(BIT_A(word2)) /* 64 bit */
+ {
+ dividend = REG_D[word2 & 7];
+ dividend <<= 32;
+ dividend |= REG_D[(word2 >> 12) & 7];
+
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));
+ if((sint64)quotient != (sint64)((sint32)quotient))
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ if(quotient > 0xffffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ remainder = dividend % divisor;
+ }
+ }
+ else /* 32 bit */
+ {
+ dividend = REG_D[(word2 >> 12) & 7];
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ remainder = dividend % divisor;
+ }
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint divisor = OPER_PCDI_32();
+ uint dividend_hi = REG_D[word2 & 7];
+ uint dividend_lo = REG_D[(word2 >> 12) & 7];
+ uint quotient = 0;
+ uint remainder = 0;
+ uint dividend_neg = 0;
+ uint divisor_neg = 0;
+ sint i;
+ uint overflow;
+
+ if(divisor != 0)
+ {
+ /* quad / long : long quotient, long remainder */
+ if(BIT_A(word2))
+ {
+ if(BIT_B(word2)) /* signed */
+ {
+ /* special case in signed divide */
+ if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ REG_D[word2 & 7] = 0;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ if(GET_MSB_32(dividend_hi))
+ {
+ dividend_neg = 1;
+ dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));
+ dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);
+ }
+ if(GET_MSB_32(divisor))
+ {
+ divisor_neg = 1;
+ divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);
+
+ }
+ }
+
+ /* if the upper long is greater than the divisor, we're overflowing. */
+ if(dividend_hi >= divisor)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ remainder = (remainder << 1) + ((dividend_hi >> i) & 1);
+ if(remainder >= divisor)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ overflow = GET_MSB_32(remainder);
+ remainder = (remainder << 1) + ((dividend_lo >> i) & 1);
+ if(remainder >= divisor || overflow)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(quotient > 0x7fffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ if(dividend_neg)
+ {
+ remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+ if(divisor_neg)
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+
+ /* long / long: long quotient, maybe long remainder */
+ if(BIT_B(word2)) /* signed */
+ {
+ /* Special case in divide */
+ if(dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+ REG_D[word2 & 7] = 0;
+ return;
+ }
+ REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);
+ }
+ else
+ {
+ REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);
+ }
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+void m68k_op_divl_32_pcix(void)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 divisor = OPER_PCIX_32();
+ uint64 dividend = 0;
+ uint64 quotient = 0;
+ uint64 remainder = 0;
+
+ if(divisor != 0)
+ {
+ if(BIT_A(word2)) /* 64 bit */
+ {
+ dividend = REG_D[word2 & 7];
+ dividend <<= 32;
+ dividend |= REG_D[(word2 >> 12) & 7];
+
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));
+ if((sint64)quotient != (sint64)((sint32)quotient))
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ if(quotient > 0xffffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ remainder = dividend % divisor;
+ }
+ }
+ else /* 32 bit */
+ {
+ dividend = REG_D[(word2 >> 12) & 7];
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ remainder = dividend % divisor;
+ }
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint divisor = OPER_PCIX_32();
+ uint dividend_hi = REG_D[word2 & 7];
+ uint dividend_lo = REG_D[(word2 >> 12) & 7];
+ uint quotient = 0;
+ uint remainder = 0;
+ uint dividend_neg = 0;
+ uint divisor_neg = 0;
+ sint i;
+ uint overflow;
+
+ if(divisor != 0)
+ {
+ /* quad / long : long quotient, long remainder */
+ if(BIT_A(word2))
+ {
+ if(BIT_B(word2)) /* signed */
+ {
+ /* special case in signed divide */
+ if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ REG_D[word2 & 7] = 0;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ if(GET_MSB_32(dividend_hi))
+ {
+ dividend_neg = 1;
+ dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));
+ dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);
+ }
+ if(GET_MSB_32(divisor))
+ {
+ divisor_neg = 1;
+ divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);
+
+ }
+ }
+
+ /* if the upper long is greater than the divisor, we're overflowing. */
+ if(dividend_hi >= divisor)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ remainder = (remainder << 1) + ((dividend_hi >> i) & 1);
+ if(remainder >= divisor)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ overflow = GET_MSB_32(remainder);
+ remainder = (remainder << 1) + ((dividend_lo >> i) & 1);
+ if(remainder >= divisor || overflow)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(quotient > 0x7fffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ if(dividend_neg)
+ {
+ remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+ if(divisor_neg)
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+
+ /* long / long: long quotient, maybe long remainder */
+ if(BIT_B(word2)) /* signed */
+ {
+ /* Special case in divide */
+ if(dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+ REG_D[word2 & 7] = 0;
+ return;
+ }
+ REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);
+ }
+ else
+ {
+ REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);
+ }
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+void m68k_op_divl_32_i(void)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 divisor = OPER_I_32();
+ uint64 dividend = 0;
+ uint64 quotient = 0;
+ uint64 remainder = 0;
+
+ if(divisor != 0)
+ {
+ if(BIT_A(word2)) /* 64 bit */
+ {
+ dividend = REG_D[word2 & 7];
+ dividend <<= 32;
+ dividend |= REG_D[(word2 >> 12) & 7];
+
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));
+ if((sint64)quotient != (sint64)((sint32)quotient))
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ if(quotient > 0xffffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ remainder = dividend % divisor;
+ }
+ }
+ else /* 32 bit */
+ {
+ dividend = REG_D[(word2 >> 12) & 7];
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ remainder = dividend % divisor;
+ }
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint divisor = OPER_I_32();
+ uint dividend_hi = REG_D[word2 & 7];
+ uint dividend_lo = REG_D[(word2 >> 12) & 7];
+ uint quotient = 0;
+ uint remainder = 0;
+ uint dividend_neg = 0;
+ uint divisor_neg = 0;
+ sint i;
+ uint overflow;
+
+ if(divisor != 0)
+ {
+ /* quad / long : long quotient, long remainder */
+ if(BIT_A(word2))
+ {
+ if(BIT_B(word2)) /* signed */
+ {
+ /* special case in signed divide */
+ if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ REG_D[word2 & 7] = 0;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ if(GET_MSB_32(dividend_hi))
+ {
+ dividend_neg = 1;
+ dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));
+ dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);
+ }
+ if(GET_MSB_32(divisor))
+ {
+ divisor_neg = 1;
+ divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);
+
+ }
+ }
+
+ /* if the upper long is greater than the divisor, we're overflowing. */
+ if(dividend_hi >= divisor)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ remainder = (remainder << 1) + ((dividend_hi >> i) & 1);
+ if(remainder >= divisor)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ overflow = GET_MSB_32(remainder);
+ remainder = (remainder << 1) + ((dividend_lo >> i) & 1);
+ if(remainder >= divisor || overflow)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(quotient > 0x7fffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ if(dividend_neg)
+ {
+ remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+ if(divisor_neg)
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+
+ /* long / long: long quotient, maybe long remainder */
+ if(BIT_B(word2)) /* signed */
+ {
+ /* Special case in divide */
+ if(dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+ REG_D[word2 & 7] = 0;
+ return;
+ }
+ REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);
+ }
+ else
+ {
+ REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);
+ }
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+void m68k_op_eor_8_d(void)
+{
+ uint res = MASK_OUT_ABOVE_8(DY ^= MASK_OUT_ABOVE_8(DX));
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_8_ai(void)
+{
+ uint ea = EA_AY_AI_8();
+ uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_8_pi(void)
+{
+ uint ea = EA_AY_PI_8();
+ uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_8_pi7(void)
+{
+ uint ea = EA_A7_PI_8();
+ uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_8_pd(void)
+{
+ uint ea = EA_AY_PD_8();
+ uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_8_pd7(void)
+{
+ uint ea = EA_A7_PD_8();
+ uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_8_di(void)
+{
+ uint ea = EA_AY_DI_8();
+ uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_8_ix(void)
+{
+ uint ea = EA_AY_IX_8();
+ uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_8_aw(void)
+{
+ uint ea = EA_AW_8();
+ uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_8_al(void)
+{
+ uint ea = EA_AL_8();
+ uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_16_d(void)
+{
+ uint res = MASK_OUT_ABOVE_16(DY ^= MASK_OUT_ABOVE_16(DX));
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_16_ai(void)
+{
+ uint ea = EA_AY_AI_16();
+ uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_16_pi(void)
+{
+ uint ea = EA_AY_PI_16();
+ uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_16_pd(void)
+{
+ uint ea = EA_AY_PD_16();
+ uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_16_di(void)
+{
+ uint ea = EA_AY_DI_16();
+ uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_16_ix(void)
+{
+ uint ea = EA_AY_IX_16();
+ uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_16_aw(void)
+{
+ uint ea = EA_AW_16();
+ uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_16_al(void)
+{
+ uint ea = EA_AL_16();
+ uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_32_d(void)
+{
+ uint res = DY ^= DX;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_32_ai(void)
+{
+ uint ea = EA_AY_AI_32();
+ uint res = DX ^ m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_32_pi(void)
+{
+ uint ea = EA_AY_PI_32();
+ uint res = DX ^ m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_32_pd(void)
+{
+ uint ea = EA_AY_PD_32();
+ uint res = DX ^ m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_32_di(void)
+{
+ uint ea = EA_AY_DI_32();
+ uint res = DX ^ m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_32_ix(void)
+{
+ uint ea = EA_AY_IX_32();
+ uint res = DX ^ m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_32_aw(void)
+{
+ uint ea = EA_AW_32();
+ uint res = DX ^ m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eor_32_al(void)
+{
+ uint ea = EA_AL_32();
+ uint res = DX ^ m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_8_d(void)
+{
+ uint res = MASK_OUT_ABOVE_8(DY ^= OPER_I_8());
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_8_ai(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_AI_8();
+ uint res = src ^ m68ki_read_8(ea);
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_8_pi(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_PI_8();
+ uint res = src ^ m68ki_read_8(ea);
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_8_pi7(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_A7_PI_8();
+ uint res = src ^ m68ki_read_8(ea);
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_8_pd(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_PD_8();
+ uint res = src ^ m68ki_read_8(ea);
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_8_pd7(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_A7_PD_8();
+ uint res = src ^ m68ki_read_8(ea);
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_8_di(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_DI_8();
+ uint res = src ^ m68ki_read_8(ea);
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_8_ix(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_IX_8();
+ uint res = src ^ m68ki_read_8(ea);
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_8_aw(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AW_8();
+ uint res = src ^ m68ki_read_8(ea);
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_8_al(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AL_8();
+ uint res = src ^ m68ki_read_8(ea);
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_16_d(void)
+{
+ uint res = MASK_OUT_ABOVE_16(DY ^= OPER_I_16());
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_16_ai(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_AI_16();
+ uint res = src ^ m68ki_read_16(ea);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_16_pi(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_PI_16();
+ uint res = src ^ m68ki_read_16(ea);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_16_pd(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_PD_16();
+ uint res = src ^ m68ki_read_16(ea);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_16_di(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_DI_16();
+ uint res = src ^ m68ki_read_16(ea);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_16_ix(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_IX_16();
+ uint res = src ^ m68ki_read_16(ea);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_16_aw(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AW_16();
+ uint res = src ^ m68ki_read_16(ea);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_16_al(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AL_16();
+ uint res = src ^ m68ki_read_16(ea);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_32_d(void)
+{
+ uint res = DY ^= OPER_I_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_32_ai(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_AI_32();
+ uint res = src ^ m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_32_pi(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_PI_32();
+ uint res = src ^ m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_32_pd(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_PD_32();
+ uint res = src ^ m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_32_di(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_DI_32();
+ uint res = src ^ m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_32_ix(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_IX_32();
+ uint res = src ^ m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_32_aw(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AW_32();
+ uint res = src ^ m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_32_al(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AL_32();
+ uint res = src ^ m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_eori_16_toc(void)
+{
+ m68ki_set_ccr(m68ki_get_ccr() ^ OPER_I_16());
+}
+
+
+void m68k_op_eori_16_tos(void)
+{
+ if(FLAG_S)
+ {
+ uint src = OPER_I_16();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_set_sr(m68ki_get_sr() ^ src);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_exg_32_dd(void)
+{
+ uint* reg_a = &DX;
+ uint* reg_b = &DY;
+ uint tmp = *reg_a;
+ *reg_a = *reg_b;
+ *reg_b = tmp;
+}
+
+
+void m68k_op_exg_32_aa(void)
+{
+ uint* reg_a = &AX;
+ uint* reg_b = &AY;
+ uint tmp = *reg_a;
+ *reg_a = *reg_b;
+ *reg_b = tmp;
+}
+
+
+void m68k_op_exg_32_da(void)
+{
+ uint* reg_a = &DX;
+ uint* reg_b = &AY;
+ uint tmp = *reg_a;
+ *reg_a = *reg_b;
+ *reg_b = tmp;
+}
+
+
+void m68k_op_ext_16(void)
+{
+ uint* r_dst = &DY;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xff00 : 0);
+
+ FLAG_N = NFLAG_16(*r_dst);
+ FLAG_Z = MASK_OUT_ABOVE_16(*r_dst);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_ext_32(void)
+{
+ uint* r_dst = &DY;
+
+ *r_dst = MASK_OUT_ABOVE_16(*r_dst) | (GET_MSB_16(*r_dst) ? 0xffff0000 : 0);
+
+ FLAG_N = NFLAG_32(*r_dst);
+ FLAG_Z = *r_dst;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_extb_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint* r_dst = &DY;
+
+ *r_dst = MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xffffff00 : 0);
+
+ FLAG_N = NFLAG_32(*r_dst);
+ FLAG_Z = *r_dst;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_illegal(void)
+{
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_jmp_32_ai(void)
+{
+ m68ki_jump(EA_AY_AI_32());
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(REG_PC == REG_PPC)
+ USE_ALL_CYCLES();
+}
+
+
+void m68k_op_jmp_32_di(void)
+{
+ m68ki_jump(EA_AY_DI_32());
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(REG_PC == REG_PPC)
+ USE_ALL_CYCLES();
+}
+
+
+void m68k_op_jmp_32_ix(void)
+{
+ m68ki_jump(EA_AY_IX_32());
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(REG_PC == REG_PPC)
+ USE_ALL_CYCLES();
+}
+
+
+void m68k_op_jmp_32_aw(void)
+{
+ m68ki_jump(EA_AW_32());
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(REG_PC == REG_PPC)
+ USE_ALL_CYCLES();
+}
+
+
+void m68k_op_jmp_32_al(void)
+{
+ m68ki_jump(EA_AL_32());
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(REG_PC == REG_PPC)
+ USE_ALL_CYCLES();
+}
+
+
+void m68k_op_jmp_32_pcdi(void)
+{
+ m68ki_jump(EA_PCDI_32());
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(REG_PC == REG_PPC)
+ USE_ALL_CYCLES();
+}
+
+
+void m68k_op_jmp_32_pcix(void)
+{
+ m68ki_jump(EA_PCIX_32());
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(REG_PC == REG_PPC)
+ USE_ALL_CYCLES();
+}
+
+
+void m68k_op_jsr_32_ai(void)
+{
+ uint ea = EA_AY_AI_32();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_push_32(REG_PC);
+ m68ki_jump(ea);
+}
+
+
+void m68k_op_jsr_32_di(void)
+{
+ uint ea = EA_AY_DI_32();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_push_32(REG_PC);
+ m68ki_jump(ea);
+}
+
+
+void m68k_op_jsr_32_ix(void)
+{
+ uint ea = EA_AY_IX_32();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_push_32(REG_PC);
+ m68ki_jump(ea);
+}
+
+
+void m68k_op_jsr_32_aw(void)
+{
+ uint ea = EA_AW_32();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_push_32(REG_PC);
+ m68ki_jump(ea);
+}
+
+
+void m68k_op_jsr_32_al(void)
+{
+ uint ea = EA_AL_32();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_push_32(REG_PC);
+ m68ki_jump(ea);
+}
+
+
+void m68k_op_jsr_32_pcdi(void)
+{
+ uint ea = EA_PCDI_32();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_push_32(REG_PC);
+ m68ki_jump(ea);
+}
+
+
+void m68k_op_jsr_32_pcix(void)
+{
+ uint ea = EA_PCIX_32();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_push_32(REG_PC);
+ m68ki_jump(ea);
+}
+
+
+void m68k_op_lea_32_ai(void)
+{
+ AX = EA_AY_AI_32();
+}
+
+
+void m68k_op_lea_32_di(void)
+{
+ AX = EA_AY_DI_32();
+}
+
+
+void m68k_op_lea_32_ix(void)
+{
+ AX = EA_AY_IX_32();
+}
+
+
+void m68k_op_lea_32_aw(void)
+{
+ AX = EA_AW_32();
+}
+
+
+void m68k_op_lea_32_al(void)
+{
+ AX = EA_AL_32();
+}
+
+
+void m68k_op_lea_32_pcdi(void)
+{
+ AX = EA_PCDI_32();
+}
+
+
+void m68k_op_lea_32_pcix(void)
+{
+ AX = EA_PCIX_32();
+}
+
+
+void m68k_op_link_16_a7(void)
+{
+ REG_A[7] -= 4;
+ m68ki_write_32(REG_A[7], REG_A[7]);
+ REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16()));
+}
+
+
+void m68k_op_link_16(void)
+{
+ uint* r_dst = &AY;
+
+ m68ki_push_32(*r_dst);
+ *r_dst = REG_A[7];
+ REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16()));
+}
+
+
+void m68k_op_link_32_a7(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ REG_A[7] -= 4;
+ m68ki_write_32(REG_A[7], REG_A[7]);
+ REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32());
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_link_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint* r_dst = &AY;
+
+ m68ki_push_32(*r_dst);
+ *r_dst = REG_A[7];
+ REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32());
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_lsr_8_s(void)
+{
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src >> shift;
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src >> shift;
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 9) - 1) & 7) + 1;
+ uint src = *r_dst;
+ uint res = src >> shift;
+
+ if(shift != 0)
+ USE_CYCLES(shift<> shift;
+
+ if(shift != 0)
+ {
+ USE_CYCLES(shift<> shift;
+
+ if(shift != 0)
+ {
+ USE_CYCLES(shift<> (shift - 1))<<8;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ *r_dst &= 0xffff0000;
+ FLAG_X = XFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_16(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_lsr_32_r(void)
+{
+ uint* r_dst = &DY;
+ uint shift = DX & 0x3f;
+ uint src = *r_dst;
+ uint res = src >> shift;
+
+ if(shift != 0)
+ {
+ USE_CYCLES(shift<> (shift - 1))<<8;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ *r_dst = 0;
+ FLAG_X = FLAG_C = (shift == 32 ? GET_MSB_32(src)>>23 : 0);
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_32(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_lsr_16_ai(void)
+{
+ uint ea = EA_AY_AI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = src >> 1;
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = res;
+ FLAG_C = FLAG_X = src << 8;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_lsr_16_pi(void)
+{
+ uint ea = EA_AY_PI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = src >> 1;
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = res;
+ FLAG_C = FLAG_X = src << 8;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_lsr_16_pd(void)
+{
+ uint ea = EA_AY_PD_16();
+ uint src = m68ki_read_16(ea);
+ uint res = src >> 1;
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = res;
+ FLAG_C = FLAG_X = src << 8;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_lsr_16_di(void)
+{
+ uint ea = EA_AY_DI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = src >> 1;
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = res;
+ FLAG_C = FLAG_X = src << 8;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_lsr_16_ix(void)
+{
+ uint ea = EA_AY_IX_16();
+ uint src = m68ki_read_16(ea);
+ uint res = src >> 1;
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = res;
+ FLAG_C = FLAG_X = src << 8;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_lsr_16_aw(void)
+{
+ uint ea = EA_AW_16();
+ uint src = m68ki_read_16(ea);
+ uint res = src >> 1;
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = res;
+ FLAG_C = FLAG_X = src << 8;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_lsr_16_al(void)
+{
+ uint ea = EA_AL_16();
+ uint src = m68ki_read_16(ea);
+ uint res = src >> 1;
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = res;
+ FLAG_C = FLAG_X = src << 8;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_lsl_8_s(void)
+{
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = MASK_OUT_ABOVE_8(src << shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = MASK_OUT_ABOVE_16(src << shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> (8-shift);
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_lsl_32_s(void)
+{
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint src = *r_dst;
+ uint res = MASK_OUT_ABOVE_32(src << shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> (24-shift);
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_lsl_8_r(void)
+{
+ uint* r_dst = &DY;
+ uint shift = DX & 0x3f;
+ uint src = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = MASK_OUT_ABOVE_8(src << shift);
+
+ if(shift != 0)
+ {
+ USE_CYCLES(shift<> 8;
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ *r_dst &= 0xffff0000;
+ FLAG_X = XFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_16(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_lsl_32_r(void)
+{
+ uint* r_dst = &DY;
+ uint shift = DX & 0x3f;
+ uint src = *r_dst;
+ uint res = MASK_OUT_ABOVE_32(src << shift);
+
+ if(shift != 0)
+ {
+ USE_CYCLES(shift<> (32 - shift)) << 8;
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ *r_dst = 0;
+ FLAG_X = FLAG_C = ((shift == 32 ? src & 1 : 0))<<8;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_32(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_lsl_16_ai(void)
+{
+ uint ea = EA_AY_AI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(src << 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_X = FLAG_C = src >> 7;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_lsl_16_pi(void)
+{
+ uint ea = EA_AY_PI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(src << 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_X = FLAG_C = src >> 7;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_lsl_16_pd(void)
+{
+ uint ea = EA_AY_PD_16();
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(src << 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_X = FLAG_C = src >> 7;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_lsl_16_di(void)
+{
+ uint ea = EA_AY_DI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(src << 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_X = FLAG_C = src >> 7;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_lsl_16_ix(void)
+{
+ uint ea = EA_AY_IX_16();
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(src << 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_X = FLAG_C = src >> 7;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_lsl_16_aw(void)
+{
+ uint ea = EA_AW_16();
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(src << 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_X = FLAG_C = src >> 7;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_lsl_16_al(void)
+{
+ uint ea = EA_AL_16();
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(src << 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_X = FLAG_C = src >> 7;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_d_d(void)
+{
+ uint res = MASK_OUT_ABOVE_8(DY);
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_d_ai(void)
+{
+ uint res = OPER_AY_AI_8();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_d_pi(void)
+{
+ uint res = OPER_AY_PI_8();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_d_pi7(void)
+{
+ uint res = OPER_A7_PI_8();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_d_pd(void)
+{
+ uint res = OPER_AY_PD_8();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_d_pd7(void)
+{
+ uint res = OPER_A7_PD_8();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_d_di(void)
+{
+ uint res = OPER_AY_DI_8();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_d_ix(void)
+{
+ uint res = OPER_AY_IX_8();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_d_aw(void)
+{
+ uint res = OPER_AW_8();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_d_al(void)
+{
+ uint res = OPER_AL_8();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_d_pcdi(void)
+{
+ uint res = OPER_PCDI_8();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_d_pcix(void)
+{
+ uint res = OPER_PCIX_8();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_d_i(void)
+{
+ uint res = OPER_I_8();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ai_d(void)
+{
+ uint res = MASK_OUT_ABOVE_8(DY);
+ uint ea = EA_AX_AI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ai_ai(void)
+{
+ uint res = OPER_AY_AI_8();
+ uint ea = EA_AX_AI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ai_pi(void)
+{
+ uint res = OPER_AY_PI_8();
+ uint ea = EA_AX_AI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ai_pi7(void)
+{
+ uint res = OPER_A7_PI_8();
+ uint ea = EA_AX_AI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ai_pd(void)
+{
+ uint res = OPER_AY_PD_8();
+ uint ea = EA_AX_AI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ai_pd7(void)
+{
+ uint res = OPER_A7_PD_8();
+ uint ea = EA_AX_AI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ai_di(void)
+{
+ uint res = OPER_AY_DI_8();
+ uint ea = EA_AX_AI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ai_ix(void)
+{
+ uint res = OPER_AY_IX_8();
+ uint ea = EA_AX_AI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ai_aw(void)
+{
+ uint res = OPER_AW_8();
+ uint ea = EA_AX_AI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ai_al(void)
+{
+ uint res = OPER_AL_8();
+ uint ea = EA_AX_AI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ai_pcdi(void)
+{
+ uint res = OPER_PCDI_8();
+ uint ea = EA_AX_AI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ai_pcix(void)
+{
+ uint res = OPER_PCIX_8();
+ uint ea = EA_AX_AI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ai_i(void)
+{
+ uint res = OPER_I_8();
+ uint ea = EA_AX_AI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi7_d(void)
+{
+ uint res = MASK_OUT_ABOVE_8(DY);
+ uint ea = EA_A7_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi_d(void)
+{
+ uint res = MASK_OUT_ABOVE_8(DY);
+ uint ea = EA_AX_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi7_ai(void)
+{
+ uint res = OPER_AY_AI_8();
+ uint ea = EA_A7_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi7_pi(void)
+{
+ uint res = OPER_AY_PI_8();
+ uint ea = EA_A7_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi7_pi7(void)
+{
+ uint res = OPER_A7_PI_8();
+ uint ea = EA_A7_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi7_pd(void)
+{
+ uint res = OPER_AY_PD_8();
+ uint ea = EA_A7_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi7_pd7(void)
+{
+ uint res = OPER_A7_PD_8();
+ uint ea = EA_A7_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi7_di(void)
+{
+ uint res = OPER_AY_DI_8();
+ uint ea = EA_A7_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi7_ix(void)
+{
+ uint res = OPER_AY_IX_8();
+ uint ea = EA_A7_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi7_aw(void)
+{
+ uint res = OPER_AW_8();
+ uint ea = EA_A7_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi7_al(void)
+{
+ uint res = OPER_AL_8();
+ uint ea = EA_A7_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi7_pcdi(void)
+{
+ uint res = OPER_PCDI_8();
+ uint ea = EA_A7_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi7_pcix(void)
+{
+ uint res = OPER_PCIX_8();
+ uint ea = EA_A7_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi7_i(void)
+{
+ uint res = OPER_I_8();
+ uint ea = EA_A7_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi_ai(void)
+{
+ uint res = OPER_AY_AI_8();
+ uint ea = EA_AX_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi_pi(void)
+{
+ uint res = OPER_AY_PI_8();
+ uint ea = EA_AX_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi_pi7(void)
+{
+ uint res = OPER_A7_PI_8();
+ uint ea = EA_AX_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi_pd(void)
+{
+ uint res = OPER_AY_PD_8();
+ uint ea = EA_AX_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi_pd7(void)
+{
+ uint res = OPER_A7_PD_8();
+ uint ea = EA_AX_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi_di(void)
+{
+ uint res = OPER_AY_DI_8();
+ uint ea = EA_AX_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi_ix(void)
+{
+ uint res = OPER_AY_IX_8();
+ uint ea = EA_AX_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi_aw(void)
+{
+ uint res = OPER_AW_8();
+ uint ea = EA_AX_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi_al(void)
+{
+ uint res = OPER_AL_8();
+ uint ea = EA_AX_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi_pcdi(void)
+{
+ uint res = OPER_PCDI_8();
+ uint ea = EA_AX_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi_pcix(void)
+{
+ uint res = OPER_PCIX_8();
+ uint ea = EA_AX_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pi_i(void)
+{
+ uint res = OPER_I_8();
+ uint ea = EA_AX_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd7_d(void)
+{
+ uint res = MASK_OUT_ABOVE_8(DY);
+ uint ea = EA_A7_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd_d(void)
+{
+ uint res = MASK_OUT_ABOVE_8(DY);
+ uint ea = EA_AX_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd7_ai(void)
+{
+ uint res = OPER_AY_AI_8();
+ uint ea = EA_A7_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd7_pi(void)
+{
+ uint res = OPER_AY_PI_8();
+ uint ea = EA_A7_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd7_pi7(void)
+{
+ uint res = OPER_A7_PI_8();
+ uint ea = EA_A7_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd7_pd(void)
+{
+ uint res = OPER_AY_PD_8();
+ uint ea = EA_A7_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd7_pd7(void)
+{
+ uint res = OPER_A7_PD_8();
+ uint ea = EA_A7_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd7_di(void)
+{
+ uint res = OPER_AY_DI_8();
+ uint ea = EA_A7_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd7_ix(void)
+{
+ uint res = OPER_AY_IX_8();
+ uint ea = EA_A7_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd7_aw(void)
+{
+ uint res = OPER_AW_8();
+ uint ea = EA_A7_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd7_al(void)
+{
+ uint res = OPER_AL_8();
+ uint ea = EA_A7_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd7_pcdi(void)
+{
+ uint res = OPER_PCDI_8();
+ uint ea = EA_A7_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd7_pcix(void)
+{
+ uint res = OPER_PCIX_8();
+ uint ea = EA_A7_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd7_i(void)
+{
+ uint res = OPER_I_8();
+ uint ea = EA_A7_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd_ai(void)
+{
+ uint res = OPER_AY_AI_8();
+ uint ea = EA_AX_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd_pi(void)
+{
+ uint res = OPER_AY_PI_8();
+ uint ea = EA_AX_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd_pi7(void)
+{
+ uint res = OPER_A7_PI_8();
+ uint ea = EA_AX_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd_pd(void)
+{
+ uint res = OPER_AY_PD_8();
+ uint ea = EA_AX_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd_pd7(void)
+{
+ uint res = OPER_A7_PD_8();
+ uint ea = EA_AX_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd_di(void)
+{
+ uint res = OPER_AY_DI_8();
+ uint ea = EA_AX_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd_ix(void)
+{
+ uint res = OPER_AY_IX_8();
+ uint ea = EA_AX_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd_aw(void)
+{
+ uint res = OPER_AW_8();
+ uint ea = EA_AX_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd_al(void)
+{
+ uint res = OPER_AL_8();
+ uint ea = EA_AX_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd_pcdi(void)
+{
+ uint res = OPER_PCDI_8();
+ uint ea = EA_AX_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd_pcix(void)
+{
+ uint res = OPER_PCIX_8();
+ uint ea = EA_AX_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_pd_i(void)
+{
+ uint res = OPER_I_8();
+ uint ea = EA_AX_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_di_d(void)
+{
+ uint res = MASK_OUT_ABOVE_8(DY);
+ uint ea = EA_AX_DI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_di_ai(void)
+{
+ uint res = OPER_AY_AI_8();
+ uint ea = EA_AX_DI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_di_pi(void)
+{
+ uint res = OPER_AY_PI_8();
+ uint ea = EA_AX_DI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_di_pi7(void)
+{
+ uint res = OPER_A7_PI_8();
+ uint ea = EA_AX_DI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_di_pd(void)
+{
+ uint res = OPER_AY_PD_8();
+ uint ea = EA_AX_DI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_di_pd7(void)
+{
+ uint res = OPER_A7_PD_8();
+ uint ea = EA_AX_DI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_di_di(void)
+{
+ uint res = OPER_AY_DI_8();
+ uint ea = EA_AX_DI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_di_ix(void)
+{
+ uint res = OPER_AY_IX_8();
+ uint ea = EA_AX_DI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_di_aw(void)
+{
+ uint res = OPER_AW_8();
+ uint ea = EA_AX_DI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_di_al(void)
+{
+ uint res = OPER_AL_8();
+ uint ea = EA_AX_DI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_di_pcdi(void)
+{
+ uint res = OPER_PCDI_8();
+ uint ea = EA_AX_DI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_di_pcix(void)
+{
+ uint res = OPER_PCIX_8();
+ uint ea = EA_AX_DI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_di_i(void)
+{
+ uint res = OPER_I_8();
+ uint ea = EA_AX_DI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ix_d(void)
+{
+ uint res = MASK_OUT_ABOVE_8(DY);
+ uint ea = EA_AX_IX_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ix_ai(void)
+{
+ uint res = OPER_AY_AI_8();
+ uint ea = EA_AX_IX_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ix_pi(void)
+{
+ uint res = OPER_AY_PI_8();
+ uint ea = EA_AX_IX_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ix_pi7(void)
+{
+ uint res = OPER_A7_PI_8();
+ uint ea = EA_AX_IX_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ix_pd(void)
+{
+ uint res = OPER_AY_PD_8();
+ uint ea = EA_AX_IX_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ix_pd7(void)
+{
+ uint res = OPER_A7_PD_8();
+ uint ea = EA_AX_IX_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ix_di(void)
+{
+ uint res = OPER_AY_DI_8();
+ uint ea = EA_AX_IX_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ix_ix(void)
+{
+ uint res = OPER_AY_IX_8();
+ uint ea = EA_AX_IX_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ix_aw(void)
+{
+ uint res = OPER_AW_8();
+ uint ea = EA_AX_IX_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ix_al(void)
+{
+ uint res = OPER_AL_8();
+ uint ea = EA_AX_IX_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ix_pcdi(void)
+{
+ uint res = OPER_PCDI_8();
+ uint ea = EA_AX_IX_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ix_pcix(void)
+{
+ uint res = OPER_PCIX_8();
+ uint ea = EA_AX_IX_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_ix_i(void)
+{
+ uint res = OPER_I_8();
+ uint ea = EA_AX_IX_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_aw_d(void)
+{
+ uint res = MASK_OUT_ABOVE_8(DY);
+ uint ea = EA_AW_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_aw_ai(void)
+{
+ uint res = OPER_AY_AI_8();
+ uint ea = EA_AW_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_aw_pi(void)
+{
+ uint res = OPER_AY_PI_8();
+ uint ea = EA_AW_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_aw_pi7(void)
+{
+ uint res = OPER_A7_PI_8();
+ uint ea = EA_AW_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_aw_pd(void)
+{
+ uint res = OPER_AY_PD_8();
+ uint ea = EA_AW_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_aw_pd7(void)
+{
+ uint res = OPER_A7_PD_8();
+ uint ea = EA_AW_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_aw_di(void)
+{
+ uint res = OPER_AY_DI_8();
+ uint ea = EA_AW_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_aw_ix(void)
+{
+ uint res = OPER_AY_IX_8();
+ uint ea = EA_AW_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_aw_aw(void)
+{
+ uint res = OPER_AW_8();
+ uint ea = EA_AW_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_aw_al(void)
+{
+ uint res = OPER_AL_8();
+ uint ea = EA_AW_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_aw_pcdi(void)
+{
+ uint res = OPER_PCDI_8();
+ uint ea = EA_AW_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_aw_pcix(void)
+{
+ uint res = OPER_PCIX_8();
+ uint ea = EA_AW_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_aw_i(void)
+{
+ uint res = OPER_I_8();
+ uint ea = EA_AW_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_al_d(void)
+{
+ uint res = MASK_OUT_ABOVE_8(DY);
+ uint ea = EA_AL_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_al_ai(void)
+{
+ uint res = OPER_AY_AI_8();
+ uint ea = EA_AL_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_al_pi(void)
+{
+ uint res = OPER_AY_PI_8();
+ uint ea = EA_AL_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_al_pi7(void)
+{
+ uint res = OPER_A7_PI_8();
+ uint ea = EA_AL_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_al_pd(void)
+{
+ uint res = OPER_AY_PD_8();
+ uint ea = EA_AL_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_al_pd7(void)
+{
+ uint res = OPER_A7_PD_8();
+ uint ea = EA_AL_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_al_di(void)
+{
+ uint res = OPER_AY_DI_8();
+ uint ea = EA_AL_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_al_ix(void)
+{
+ uint res = OPER_AY_IX_8();
+ uint ea = EA_AL_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_al_aw(void)
+{
+ uint res = OPER_AW_8();
+ uint ea = EA_AL_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_al_al(void)
+{
+ uint res = OPER_AL_8();
+ uint ea = EA_AL_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_al_pcdi(void)
+{
+ uint res = OPER_PCDI_8();
+ uint ea = EA_AL_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_al_pcix(void)
+{
+ uint res = OPER_PCIX_8();
+ uint ea = EA_AL_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_8_al_i(void)
+{
+ uint res = OPER_I_8();
+ uint ea = EA_AL_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_d_d(void)
+{
+ uint res = MASK_OUT_ABOVE_16(DY);
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_d_a(void)
+{
+ uint res = MASK_OUT_ABOVE_16(AY);
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_d_ai(void)
+{
+ uint res = OPER_AY_AI_16();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_d_pi(void)
+{
+ uint res = OPER_AY_PI_16();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_d_pd(void)
+{
+ uint res = OPER_AY_PD_16();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_d_di(void)
+{
+ uint res = OPER_AY_DI_16();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_d_ix(void)
+{
+ uint res = OPER_AY_IX_16();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_d_aw(void)
+{
+ uint res = OPER_AW_16();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_d_al(void)
+{
+ uint res = OPER_AL_16();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_d_pcdi(void)
+{
+ uint res = OPER_PCDI_16();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_d_pcix(void)
+{
+ uint res = OPER_PCIX_16();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_d_i(void)
+{
+ uint res = OPER_I_16();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ai_d(void)
+{
+ uint res = MASK_OUT_ABOVE_16(DY);
+ uint ea = EA_AX_AI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ai_a(void)
+{
+ uint res = MASK_OUT_ABOVE_16(AY);
+ uint ea = EA_AX_AI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ai_ai(void)
+{
+ uint res = OPER_AY_AI_16();
+ uint ea = EA_AX_AI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ai_pi(void)
+{
+ uint res = OPER_AY_PI_16();
+ uint ea = EA_AX_AI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ai_pd(void)
+{
+ uint res = OPER_AY_PD_16();
+ uint ea = EA_AX_AI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ai_di(void)
+{
+ uint res = OPER_AY_DI_16();
+ uint ea = EA_AX_AI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ai_ix(void)
+{
+ uint res = OPER_AY_IX_16();
+ uint ea = EA_AX_AI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ai_aw(void)
+{
+ uint res = OPER_AW_16();
+ uint ea = EA_AX_AI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ai_al(void)
+{
+ uint res = OPER_AL_16();
+ uint ea = EA_AX_AI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ai_pcdi(void)
+{
+ uint res = OPER_PCDI_16();
+ uint ea = EA_AX_AI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ai_pcix(void)
+{
+ uint res = OPER_PCIX_16();
+ uint ea = EA_AX_AI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ai_i(void)
+{
+ uint res = OPER_I_16();
+ uint ea = EA_AX_AI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pi_d(void)
+{
+ uint res = MASK_OUT_ABOVE_16(DY);
+ uint ea = EA_AX_PI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pi_a(void)
+{
+ uint res = MASK_OUT_ABOVE_16(AY);
+ uint ea = EA_AX_PI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pi_ai(void)
+{
+ uint res = OPER_AY_AI_16();
+ uint ea = EA_AX_PI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pi_pi(void)
+{
+ uint res = OPER_AY_PI_16();
+ uint ea = EA_AX_PI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pi_pd(void)
+{
+ uint res = OPER_AY_PD_16();
+ uint ea = EA_AX_PI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pi_di(void)
+{
+ uint res = OPER_AY_DI_16();
+ uint ea = EA_AX_PI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pi_ix(void)
+{
+ uint res = OPER_AY_IX_16();
+ uint ea = EA_AX_PI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pi_aw(void)
+{
+ uint res = OPER_AW_16();
+ uint ea = EA_AX_PI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pi_al(void)
+{
+ uint res = OPER_AL_16();
+ uint ea = EA_AX_PI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pi_pcdi(void)
+{
+ uint res = OPER_PCDI_16();
+ uint ea = EA_AX_PI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pi_pcix(void)
+{
+ uint res = OPER_PCIX_16();
+ uint ea = EA_AX_PI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pi_i(void)
+{
+ uint res = OPER_I_16();
+ uint ea = EA_AX_PI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pd_d(void)
+{
+ uint res = MASK_OUT_ABOVE_16(DY);
+ uint ea = EA_AX_PD_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pd_a(void)
+{
+ uint res = MASK_OUT_ABOVE_16(AY);
+ uint ea = EA_AX_PD_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pd_ai(void)
+{
+ uint res = OPER_AY_AI_16();
+ uint ea = EA_AX_PD_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pd_pi(void)
+{
+ uint res = OPER_AY_PI_16();
+ uint ea = EA_AX_PD_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pd_pd(void)
+{
+ uint res = OPER_AY_PD_16();
+ uint ea = EA_AX_PD_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pd_di(void)
+{
+ uint res = OPER_AY_DI_16();
+ uint ea = EA_AX_PD_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pd_ix(void)
+{
+ uint res = OPER_AY_IX_16();
+ uint ea = EA_AX_PD_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pd_aw(void)
+{
+ uint res = OPER_AW_16();
+ uint ea = EA_AX_PD_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pd_al(void)
+{
+ uint res = OPER_AL_16();
+ uint ea = EA_AX_PD_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pd_pcdi(void)
+{
+ uint res = OPER_PCDI_16();
+ uint ea = EA_AX_PD_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pd_pcix(void)
+{
+ uint res = OPER_PCIX_16();
+ uint ea = EA_AX_PD_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_pd_i(void)
+{
+ uint res = OPER_I_16();
+ uint ea = EA_AX_PD_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_di_d(void)
+{
+ uint res = MASK_OUT_ABOVE_16(DY);
+ uint ea = EA_AX_DI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_di_a(void)
+{
+ uint res = MASK_OUT_ABOVE_16(AY);
+ uint ea = EA_AX_DI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_di_ai(void)
+{
+ uint res = OPER_AY_AI_16();
+ uint ea = EA_AX_DI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_di_pi(void)
+{
+ uint res = OPER_AY_PI_16();
+ uint ea = EA_AX_DI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_di_pd(void)
+{
+ uint res = OPER_AY_PD_16();
+ uint ea = EA_AX_DI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_di_di(void)
+{
+ uint res = OPER_AY_DI_16();
+ uint ea = EA_AX_DI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_di_ix(void)
+{
+ uint res = OPER_AY_IX_16();
+ uint ea = EA_AX_DI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_di_aw(void)
+{
+ uint res = OPER_AW_16();
+ uint ea = EA_AX_DI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_di_al(void)
+{
+ uint res = OPER_AL_16();
+ uint ea = EA_AX_DI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_di_pcdi(void)
+{
+ uint res = OPER_PCDI_16();
+ uint ea = EA_AX_DI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_di_pcix(void)
+{
+ uint res = OPER_PCIX_16();
+ uint ea = EA_AX_DI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_di_i(void)
+{
+ uint res = OPER_I_16();
+ uint ea = EA_AX_DI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ix_d(void)
+{
+ uint res = MASK_OUT_ABOVE_16(DY);
+ uint ea = EA_AX_IX_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ix_a(void)
+{
+ uint res = MASK_OUT_ABOVE_16(AY);
+ uint ea = EA_AX_IX_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ix_ai(void)
+{
+ uint res = OPER_AY_AI_16();
+ uint ea = EA_AX_IX_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ix_pi(void)
+{
+ uint res = OPER_AY_PI_16();
+ uint ea = EA_AX_IX_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ix_pd(void)
+{
+ uint res = OPER_AY_PD_16();
+ uint ea = EA_AX_IX_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ix_di(void)
+{
+ uint res = OPER_AY_DI_16();
+ uint ea = EA_AX_IX_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ix_ix(void)
+{
+ uint res = OPER_AY_IX_16();
+ uint ea = EA_AX_IX_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ix_aw(void)
+{
+ uint res = OPER_AW_16();
+ uint ea = EA_AX_IX_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ix_al(void)
+{
+ uint res = OPER_AL_16();
+ uint ea = EA_AX_IX_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ix_pcdi(void)
+{
+ uint res = OPER_PCDI_16();
+ uint ea = EA_AX_IX_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ix_pcix(void)
+{
+ uint res = OPER_PCIX_16();
+ uint ea = EA_AX_IX_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_ix_i(void)
+{
+ uint res = OPER_I_16();
+ uint ea = EA_AX_IX_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_aw_d(void)
+{
+ uint res = MASK_OUT_ABOVE_16(DY);
+ uint ea = EA_AW_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_aw_a(void)
+{
+ uint res = MASK_OUT_ABOVE_16(AY);
+ uint ea = EA_AW_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_aw_ai(void)
+{
+ uint res = OPER_AY_AI_16();
+ uint ea = EA_AW_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_aw_pi(void)
+{
+ uint res = OPER_AY_PI_16();
+ uint ea = EA_AW_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_aw_pd(void)
+{
+ uint res = OPER_AY_PD_16();
+ uint ea = EA_AW_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_aw_di(void)
+{
+ uint res = OPER_AY_DI_16();
+ uint ea = EA_AW_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_aw_ix(void)
+{
+ uint res = OPER_AY_IX_16();
+ uint ea = EA_AW_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_aw_aw(void)
+{
+ uint res = OPER_AW_16();
+ uint ea = EA_AW_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_aw_al(void)
+{
+ uint res = OPER_AL_16();
+ uint ea = EA_AW_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_aw_pcdi(void)
+{
+ uint res = OPER_PCDI_16();
+ uint ea = EA_AW_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_aw_pcix(void)
+{
+ uint res = OPER_PCIX_16();
+ uint ea = EA_AW_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_aw_i(void)
+{
+ uint res = OPER_I_16();
+ uint ea = EA_AW_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_al_d(void)
+{
+ uint res = MASK_OUT_ABOVE_16(DY);
+ uint ea = EA_AL_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_al_a(void)
+{
+ uint res = MASK_OUT_ABOVE_16(AY);
+ uint ea = EA_AL_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_al_ai(void)
+{
+ uint res = OPER_AY_AI_16();
+ uint ea = EA_AL_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_al_pi(void)
+{
+ uint res = OPER_AY_PI_16();
+ uint ea = EA_AL_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_al_pd(void)
+{
+ uint res = OPER_AY_PD_16();
+ uint ea = EA_AL_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_al_di(void)
+{
+ uint res = OPER_AY_DI_16();
+ uint ea = EA_AL_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_al_ix(void)
+{
+ uint res = OPER_AY_IX_16();
+ uint ea = EA_AL_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_al_aw(void)
+{
+ uint res = OPER_AW_16();
+ uint ea = EA_AL_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_al_al(void)
+{
+ uint res = OPER_AL_16();
+ uint ea = EA_AL_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_al_pcdi(void)
+{
+ uint res = OPER_PCDI_16();
+ uint ea = EA_AL_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_al_pcix(void)
+{
+ uint res = OPER_PCIX_16();
+ uint ea = EA_AL_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_16_al_i(void)
+{
+ uint res = OPER_I_16();
+ uint ea = EA_AL_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_d_d(void)
+{
+ uint res = DY;
+ uint* r_dst = &DX;
+
+ *r_dst = res;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_d_a(void)
+{
+ uint res = AY;
+ uint* r_dst = &DX;
+
+ *r_dst = res;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_d_ai(void)
+{
+ uint res = OPER_AY_AI_32();
+ uint* r_dst = &DX;
+
+ *r_dst = res;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_d_pi(void)
+{
+ uint res = OPER_AY_PI_32();
+ uint* r_dst = &DX;
+
+ *r_dst = res;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_d_pd(void)
+{
+ uint res = OPER_AY_PD_32();
+ uint* r_dst = &DX;
+
+ *r_dst = res;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_d_di(void)
+{
+ uint res = OPER_AY_DI_32();
+ uint* r_dst = &DX;
+
+ *r_dst = res;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_d_ix(void)
+{
+ uint res = OPER_AY_IX_32();
+ uint* r_dst = &DX;
+
+ *r_dst = res;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_d_aw(void)
+{
+ uint res = OPER_AW_32();
+ uint* r_dst = &DX;
+
+ *r_dst = res;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_d_al(void)
+{
+ uint res = OPER_AL_32();
+ uint* r_dst = &DX;
+
+ *r_dst = res;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_d_pcdi(void)
+{
+ uint res = OPER_PCDI_32();
+ uint* r_dst = &DX;
+
+ *r_dst = res;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_d_pcix(void)
+{
+ uint res = OPER_PCIX_32();
+ uint* r_dst = &DX;
+
+ *r_dst = res;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_d_i(void)
+{
+ uint res = OPER_I_32();
+ uint* r_dst = &DX;
+
+ *r_dst = res;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ai_d(void)
+{
+ uint res = DY;
+ uint ea = EA_AX_AI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ai_a(void)
+{
+ uint res = AY;
+ uint ea = EA_AX_AI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ai_ai(void)
+{
+ uint res = OPER_AY_AI_32();
+ uint ea = EA_AX_AI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ai_pi(void)
+{
+ uint res = OPER_AY_PI_32();
+ uint ea = EA_AX_AI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ai_pd(void)
+{
+ uint res = OPER_AY_PD_32();
+ uint ea = EA_AX_AI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ai_di(void)
+{
+ uint res = OPER_AY_DI_32();
+ uint ea = EA_AX_AI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ai_ix(void)
+{
+ uint res = OPER_AY_IX_32();
+ uint ea = EA_AX_AI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ai_aw(void)
+{
+ uint res = OPER_AW_32();
+ uint ea = EA_AX_AI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ai_al(void)
+{
+ uint res = OPER_AL_32();
+ uint ea = EA_AX_AI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ai_pcdi(void)
+{
+ uint res = OPER_PCDI_32();
+ uint ea = EA_AX_AI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ai_pcix(void)
+{
+ uint res = OPER_PCIX_32();
+ uint ea = EA_AX_AI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ai_i(void)
+{
+ uint res = OPER_I_32();
+ uint ea = EA_AX_AI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pi_d(void)
+{
+ uint res = DY;
+ uint ea = EA_AX_PI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pi_a(void)
+{
+ uint res = AY;
+ uint ea = EA_AX_PI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pi_ai(void)
+{
+ uint res = OPER_AY_AI_32();
+ uint ea = EA_AX_PI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pi_pi(void)
+{
+ uint res = OPER_AY_PI_32();
+ uint ea = EA_AX_PI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pi_pd(void)
+{
+ uint res = OPER_AY_PD_32();
+ uint ea = EA_AX_PI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pi_di(void)
+{
+ uint res = OPER_AY_DI_32();
+ uint ea = EA_AX_PI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pi_ix(void)
+{
+ uint res = OPER_AY_IX_32();
+ uint ea = EA_AX_PI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pi_aw(void)
+{
+ uint res = OPER_AW_32();
+ uint ea = EA_AX_PI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pi_al(void)
+{
+ uint res = OPER_AL_32();
+ uint ea = EA_AX_PI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pi_pcdi(void)
+{
+ uint res = OPER_PCDI_32();
+ uint ea = EA_AX_PI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pi_pcix(void)
+{
+ uint res = OPER_PCIX_32();
+ uint ea = EA_AX_PI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pi_i(void)
+{
+ uint res = OPER_I_32();
+ uint ea = EA_AX_PI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pd_d(void)
+{
+ uint res = DY;
+ uint ea = EA_AX_PD_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pd_a(void)
+{
+ uint res = AY;
+ uint ea = EA_AX_PD_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pd_ai(void)
+{
+ uint res = OPER_AY_AI_32();
+ uint ea = EA_AX_PD_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pd_pi(void)
+{
+ uint res = OPER_AY_PI_32();
+ uint ea = EA_AX_PD_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pd_pd(void)
+{
+ uint res = OPER_AY_PD_32();
+ uint ea = EA_AX_PD_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pd_di(void)
+{
+ uint res = OPER_AY_DI_32();
+ uint ea = EA_AX_PD_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pd_ix(void)
+{
+ uint res = OPER_AY_IX_32();
+ uint ea = EA_AX_PD_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pd_aw(void)
+{
+ uint res = OPER_AW_32();
+ uint ea = EA_AX_PD_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pd_al(void)
+{
+ uint res = OPER_AL_32();
+ uint ea = EA_AX_PD_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pd_pcdi(void)
+{
+ uint res = OPER_PCDI_32();
+ uint ea = EA_AX_PD_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pd_pcix(void)
+{
+ uint res = OPER_PCIX_32();
+ uint ea = EA_AX_PD_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_pd_i(void)
+{
+ uint res = OPER_I_32();
+ uint ea = EA_AX_PD_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_di_d(void)
+{
+ uint res = DY;
+ uint ea = EA_AX_DI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_di_a(void)
+{
+ uint res = AY;
+ uint ea = EA_AX_DI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_di_ai(void)
+{
+ uint res = OPER_AY_AI_32();
+ uint ea = EA_AX_DI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_di_pi(void)
+{
+ uint res = OPER_AY_PI_32();
+ uint ea = EA_AX_DI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_di_pd(void)
+{
+ uint res = OPER_AY_PD_32();
+ uint ea = EA_AX_DI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_di_di(void)
+{
+ uint res = OPER_AY_DI_32();
+ uint ea = EA_AX_DI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_di_ix(void)
+{
+ uint res = OPER_AY_IX_32();
+ uint ea = EA_AX_DI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_di_aw(void)
+{
+ uint res = OPER_AW_32();
+ uint ea = EA_AX_DI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_di_al(void)
+{
+ uint res = OPER_AL_32();
+ uint ea = EA_AX_DI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_di_pcdi(void)
+{
+ uint res = OPER_PCDI_32();
+ uint ea = EA_AX_DI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_di_pcix(void)
+{
+ uint res = OPER_PCIX_32();
+ uint ea = EA_AX_DI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_di_i(void)
+{
+ uint res = OPER_I_32();
+ uint ea = EA_AX_DI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ix_d(void)
+{
+ uint res = DY;
+ uint ea = EA_AX_IX_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ix_a(void)
+{
+ uint res = AY;
+ uint ea = EA_AX_IX_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ix_ai(void)
+{
+ uint res = OPER_AY_AI_32();
+ uint ea = EA_AX_IX_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ix_pi(void)
+{
+ uint res = OPER_AY_PI_32();
+ uint ea = EA_AX_IX_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ix_pd(void)
+{
+ uint res = OPER_AY_PD_32();
+ uint ea = EA_AX_IX_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ix_di(void)
+{
+ uint res = OPER_AY_DI_32();
+ uint ea = EA_AX_IX_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ix_ix(void)
+{
+ uint res = OPER_AY_IX_32();
+ uint ea = EA_AX_IX_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ix_aw(void)
+{
+ uint res = OPER_AW_32();
+ uint ea = EA_AX_IX_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ix_al(void)
+{
+ uint res = OPER_AL_32();
+ uint ea = EA_AX_IX_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ix_pcdi(void)
+{
+ uint res = OPER_PCDI_32();
+ uint ea = EA_AX_IX_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ix_pcix(void)
+{
+ uint res = OPER_PCIX_32();
+ uint ea = EA_AX_IX_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_ix_i(void)
+{
+ uint res = OPER_I_32();
+ uint ea = EA_AX_IX_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_aw_d(void)
+{
+ uint res = DY;
+ uint ea = EA_AW_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_aw_a(void)
+{
+ uint res = AY;
+ uint ea = EA_AW_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_aw_ai(void)
+{
+ uint res = OPER_AY_AI_32();
+ uint ea = EA_AW_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_aw_pi(void)
+{
+ uint res = OPER_AY_PI_32();
+ uint ea = EA_AW_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_aw_pd(void)
+{
+ uint res = OPER_AY_PD_32();
+ uint ea = EA_AW_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_aw_di(void)
+{
+ uint res = OPER_AY_DI_32();
+ uint ea = EA_AW_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_aw_ix(void)
+{
+ uint res = OPER_AY_IX_32();
+ uint ea = EA_AW_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_aw_aw(void)
+{
+ uint res = OPER_AW_32();
+ uint ea = EA_AW_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_aw_al(void)
+{
+ uint res = OPER_AL_32();
+ uint ea = EA_AW_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_aw_pcdi(void)
+{
+ uint res = OPER_PCDI_32();
+ uint ea = EA_AW_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_aw_pcix(void)
+{
+ uint res = OPER_PCIX_32();
+ uint ea = EA_AW_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_aw_i(void)
+{
+ uint res = OPER_I_32();
+ uint ea = EA_AW_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_al_d(void)
+{
+ uint res = DY;
+ uint ea = EA_AL_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_al_a(void)
+{
+ uint res = AY;
+ uint ea = EA_AL_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_al_ai(void)
+{
+ uint res = OPER_AY_AI_32();
+ uint ea = EA_AL_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_al_pi(void)
+{
+ uint res = OPER_AY_PI_32();
+ uint ea = EA_AL_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_al_pd(void)
+{
+ uint res = OPER_AY_PD_32();
+ uint ea = EA_AL_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_al_di(void)
+{
+ uint res = OPER_AY_DI_32();
+ uint ea = EA_AL_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_al_ix(void)
+{
+ uint res = OPER_AY_IX_32();
+ uint ea = EA_AL_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_al_aw(void)
+{
+ uint res = OPER_AW_32();
+ uint ea = EA_AL_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_al_al(void)
+{
+ uint res = OPER_AL_32();
+ uint ea = EA_AL_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_al_pcdi(void)
+{
+ uint res = OPER_PCDI_32();
+ uint ea = EA_AL_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_al_pcix(void)
+{
+ uint res = OPER_PCIX_32();
+ uint ea = EA_AL_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_move_32_al_i(void)
+{
+ uint res = OPER_I_32();
+ uint ea = EA_AL_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_movea_16_d(void)
+{
+ AX = MAKE_INT_16(DY);
+}
+
+
+void m68k_op_movea_16_a(void)
+{
+ AX = MAKE_INT_16(AY);
+}
+
+
+void m68k_op_movea_16_ai(void)
+{
+ AX = MAKE_INT_16(OPER_AY_AI_16());
+}
+
+
+void m68k_op_movea_16_pi(void)
+{
+ AX = MAKE_INT_16(OPER_AY_PI_16());
+}
+
+
+void m68k_op_movea_16_pd(void)
+{
+ AX = MAKE_INT_16(OPER_AY_PD_16());
+}
+
+
+void m68k_op_movea_16_di(void)
+{
+ AX = MAKE_INT_16(OPER_AY_DI_16());
+}
+
+
+void m68k_op_movea_16_ix(void)
+{
+ AX = MAKE_INT_16(OPER_AY_IX_16());
+}
+
+
+void m68k_op_movea_16_aw(void)
+{
+ AX = MAKE_INT_16(OPER_AW_16());
+}
+
+
+void m68k_op_movea_16_al(void)
+{
+ AX = MAKE_INT_16(OPER_AL_16());
+}
+
+
+void m68k_op_movea_16_pcdi(void)
+{
+ AX = MAKE_INT_16(OPER_PCDI_16());
+}
+
+
+void m68k_op_movea_16_pcix(void)
+{
+ AX = MAKE_INT_16(OPER_PCIX_16());
+}
+
+
+void m68k_op_movea_16_i(void)
+{
+ AX = MAKE_INT_16(OPER_I_16());
+}
+
+
+void m68k_op_movea_32_d(void)
+{
+ AX = DY;
+}
+
+
+void m68k_op_movea_32_a(void)
+{
+ AX = AY;
+}
+
+
+void m68k_op_movea_32_ai(void)
+{
+ AX = OPER_AY_AI_32();
+}
+
+
+void m68k_op_movea_32_pi(void)
+{
+ AX = OPER_AY_PI_32();
+}
+
+
+void m68k_op_movea_32_pd(void)
+{
+ AX = OPER_AY_PD_32();
+}
+
+
+void m68k_op_movea_32_di(void)
+{
+ AX = OPER_AY_DI_32();
+}
+
+
+void m68k_op_movea_32_ix(void)
+{
+ AX = OPER_AY_IX_32();
+}
+
+
+void m68k_op_movea_32_aw(void)
+{
+ AX = OPER_AW_32();
+}
+
+
+void m68k_op_movea_32_al(void)
+{
+ AX = OPER_AL_32();
+}
+
+
+void m68k_op_movea_32_pcdi(void)
+{
+ AX = OPER_PCDI_32();
+}
+
+
+void m68k_op_movea_32_pcix(void)
+{
+ AX = OPER_PCIX_32();
+}
+
+
+void m68k_op_movea_32_i(void)
+{
+ AX = OPER_I_32();
+}
+
+
+void m68k_op_move_16_frc_d(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ DY = MASK_OUT_BELOW_16(DY) | m68ki_get_ccr();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_move_16_frc_ai(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ m68ki_write_16(EA_AY_AI_16(), m68ki_get_ccr());
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_move_16_frc_pi(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ m68ki_write_16(EA_AY_PI_16(), m68ki_get_ccr());
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_move_16_frc_pd(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ m68ki_write_16(EA_AY_PD_16(), m68ki_get_ccr());
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_move_16_frc_di(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ m68ki_write_16(EA_AY_DI_16(), m68ki_get_ccr());
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_move_16_frc_ix(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ m68ki_write_16(EA_AY_IX_16(), m68ki_get_ccr());
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_move_16_frc_aw(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ m68ki_write_16(EA_AW_16(), m68ki_get_ccr());
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_move_16_frc_al(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ m68ki_write_16(EA_AL_16(), m68ki_get_ccr());
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_move_16_toc_d(void)
+{
+ m68ki_set_ccr(DY);
+}
+
+
+void m68k_op_move_16_toc_ai(void)
+{
+ m68ki_set_ccr(OPER_AY_AI_16());
+}
+
+
+void m68k_op_move_16_toc_pi(void)
+{
+ m68ki_set_ccr(OPER_AY_PI_16());
+}
+
+
+void m68k_op_move_16_toc_pd(void)
+{
+ m68ki_set_ccr(OPER_AY_PD_16());
+}
+
+
+void m68k_op_move_16_toc_di(void)
+{
+ m68ki_set_ccr(OPER_AY_DI_16());
+}
+
+
+void m68k_op_move_16_toc_ix(void)
+{
+ m68ki_set_ccr(OPER_AY_IX_16());
+}
+
+
+void m68k_op_move_16_toc_aw(void)
+{
+ m68ki_set_ccr(OPER_AW_16());
+}
+
+
+void m68k_op_move_16_toc_al(void)
+{
+ m68ki_set_ccr(OPER_AL_16());
+}
+
+
+void m68k_op_move_16_toc_pcdi(void)
+{
+ m68ki_set_ccr(OPER_PCDI_16());
+}
+
+
+void m68k_op_move_16_toc_pcix(void)
+{
+ m68ki_set_ccr(OPER_PCIX_16());
+}
+
+
+void m68k_op_move_16_toc_i(void)
+{
+ m68ki_set_ccr(OPER_I_16());
+}
+
+
+void m68k_op_move_16_frs_d(void)
+{
+ if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */
+ {
+ DY = MASK_OUT_BELOW_16(DY) | m68ki_get_sr();
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_move_16_frs_ai(void)
+{
+ if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */
+ {
+ uint ea = EA_AY_AI_16();
+ m68ki_write_16(ea, m68ki_get_sr());
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_move_16_frs_pi(void)
+{
+ if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */
+ {
+ uint ea = EA_AY_PI_16();
+ m68ki_write_16(ea, m68ki_get_sr());
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_move_16_frs_pd(void)
+{
+ if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */
+ {
+ uint ea = EA_AY_PD_16();
+ m68ki_write_16(ea, m68ki_get_sr());
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_move_16_frs_di(void)
+{
+ if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */
+ {
+ uint ea = EA_AY_DI_16();
+ m68ki_write_16(ea, m68ki_get_sr());
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_move_16_frs_ix(void)
+{
+ if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */
+ {
+ uint ea = EA_AY_IX_16();
+ m68ki_write_16(ea, m68ki_get_sr());
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_move_16_frs_aw(void)
+{
+ if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */
+ {
+ uint ea = EA_AW_16();
+ m68ki_write_16(ea, m68ki_get_sr());
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_move_16_frs_al(void)
+{
+ if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */
+ {
+ uint ea = EA_AL_16();
+ m68ki_write_16(ea, m68ki_get_sr());
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_move_16_tos_d(void)
+{
+ if(FLAG_S)
+ {
+ m68ki_set_sr(DY);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_move_16_tos_ai(void)
+{
+ if(FLAG_S)
+ {
+ uint new_sr = OPER_AY_AI_16();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_set_sr(new_sr);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_move_16_tos_pi(void)
+{
+ if(FLAG_S)
+ {
+ uint new_sr = OPER_AY_PI_16();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_set_sr(new_sr);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_move_16_tos_pd(void)
+{
+ if(FLAG_S)
+ {
+ uint new_sr = OPER_AY_PD_16();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_set_sr(new_sr);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_move_16_tos_di(void)
+{
+ if(FLAG_S)
+ {
+ uint new_sr = OPER_AY_DI_16();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_set_sr(new_sr);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_move_16_tos_ix(void)
+{
+ if(FLAG_S)
+ {
+ uint new_sr = OPER_AY_IX_16();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_set_sr(new_sr);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_move_16_tos_aw(void)
+{
+ if(FLAG_S)
+ {
+ uint new_sr = OPER_AW_16();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_set_sr(new_sr);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_move_16_tos_al(void)
+{
+ if(FLAG_S)
+ {
+ uint new_sr = OPER_AL_16();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_set_sr(new_sr);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_move_16_tos_pcdi(void)
+{
+ if(FLAG_S)
+ {
+ uint new_sr = OPER_PCDI_16();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_set_sr(new_sr);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_move_16_tos_pcix(void)
+{
+ if(FLAG_S)
+ {
+ uint new_sr = OPER_PCIX_16();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_set_sr(new_sr);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_move_16_tos_i(void)
+{
+ if(FLAG_S)
+ {
+ uint new_sr = OPER_I_16();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_set_sr(new_sr);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_move_32_fru(void)
+{
+ if(FLAG_S)
+ {
+ AY = REG_USP;
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_move_32_tou(void)
+{
+ if(FLAG_S)
+ {
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ REG_USP = AY;
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_movec_32_cr(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ switch (word2 & 0xfff)
+ {
+ case 0x000: /* SFC */
+ REG_DA[(word2 >> 12) & 15] = REG_SFC;
+ return;
+ case 0x001: /* DFC */
+ REG_DA[(word2 >> 12) & 15] = REG_DFC;
+ return;
+ case 0x002: /* CACR */
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ REG_DA[(word2 >> 12) & 15] = REG_CACR;
+ return;
+ }
+ return;
+ case 0x800: /* USP */
+ REG_DA[(word2 >> 12) & 15] = REG_USP;
+ return;
+ case 0x801: /* VBR */
+ REG_DA[(word2 >> 12) & 15] = REG_VBR;
+ return;
+ case 0x802: /* CAAR */
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ REG_DA[(word2 >> 12) & 15] = REG_CAAR;
+ return;
+ }
+ m68ki_exception_illegal();
+ break;
+ case 0x803: /* MSP */
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ REG_DA[(word2 >> 12) & 15] = FLAG_M ? REG_SP : REG_MSP;
+ return;
+ }
+ m68ki_exception_illegal();
+ return;
+ case 0x804: /* ISP */
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ REG_DA[(word2 >> 12) & 15] = FLAG_M ? REG_ISP : REG_SP;
+ return;
+ }
+ m68ki_exception_illegal();
+ return;
+ default:
+ m68ki_exception_illegal();
+ return;
+ }
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_movec_32_rc(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ switch (word2 & 0xfff)
+ {
+ case 0x000: /* SFC */
+ REG_SFC = REG_DA[(word2 >> 12) & 15] & 7;
+ return;
+ case 0x001: /* DFC */
+ REG_DFC = REG_DA[(word2 >> 12) & 15] & 7;
+ return;
+ case 0x002: /* CACR */
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ REG_CACR = REG_DA[(word2 >> 12) & 15];
+ return;
+ }
+ m68ki_exception_illegal();
+ return;
+ case 0x800: /* USP */
+ REG_USP = REG_DA[(word2 >> 12) & 15];
+ return;
+ case 0x801: /* VBR */
+ REG_VBR = REG_DA[(word2 >> 12) & 15];
+ return;
+ case 0x802: /* CAAR */
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ REG_CAAR = REG_DA[(word2 >> 12) & 15];
+ return;
+ }
+ m68ki_exception_illegal();
+ return;
+ case 0x803: /* MSP */
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ /* we are in supervisor mode so just check for M flag */
+ if(!FLAG_M)
+ {
+ REG_MSP = REG_DA[(word2 >> 12) & 15];
+ return;
+ }
+ REG_SP = REG_DA[(word2 >> 12) & 15];
+ return;
+ }
+ m68ki_exception_illegal();
+ return;
+ case 0x804: /* ISP */
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(!FLAG_M)
+ {
+ REG_SP = REG_DA[(word2 >> 12) & 15];
+ return;
+ }
+ REG_ISP = REG_DA[(word2 >> 12) & 15];
+ return;
+ }
+ m68ki_exception_illegal();
+ return;
+ default:
+ m68ki_exception_illegal();
+ return;
+ }
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_movem_16_re_pd(void)
+{
+ uint i = 0;
+ uint register_list = OPER_I_16();
+ uint ea = AY;
+ uint count = 0;
+
+ for(; i < 16; i++)
+ if(register_list & (1 << i))
+ {
+ ea -= 2;
+ m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[15-i]));
+ count++;
+ }
+ AY = ea;
+
+ USE_CYCLES(count<> 8));
+ m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src));
+}
+
+
+void m68k_op_movep_32_re(void)
+{
+ uint ea = EA_AY_DI_32();
+ uint src = DX;
+
+ m68ki_write_8(ea, MASK_OUT_ABOVE_8(src >> 24));
+ m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src >> 16));
+ m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src >> 8));
+ m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src));
+}
+
+
+void m68k_op_movep_16_er(void)
+{
+ uint ea = EA_AY_DI_16();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | ((m68ki_read_8(ea) << 8) + m68ki_read_8(ea + 2));
+}
+
+
+void m68k_op_movep_32_er(void)
+{
+ uint ea = EA_AY_DI_32();
+
+ DX = (m68ki_read_8(ea) << 24) + (m68ki_read_8(ea + 2) << 16)
+ + (m68ki_read_8(ea + 4) << 8) + m68ki_read_8(ea + 6);
+}
+
+
+void m68k_op_moves_8_ai(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_AI_8();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15]));
+ return;
+ }
+ if(BIT_F(word2)) /* Memory to address register */
+ {
+ REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC));
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to data register */
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_moves_8_pi(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_PI_8();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15]));
+ return;
+ }
+ if(BIT_F(word2)) /* Memory to address register */
+ {
+ REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC));
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to data register */
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_moves_8_pi7(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_A7_PI_8();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15]));
+ return;
+ }
+ if(BIT_F(word2)) /* Memory to address register */
+ {
+ REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC));
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to data register */
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_moves_8_pd(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_PD_8();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15]));
+ return;
+ }
+ if(BIT_F(word2)) /* Memory to address register */
+ {
+ REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC));
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to data register */
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_moves_8_pd7(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_A7_PD_8();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15]));
+ return;
+ }
+ if(BIT_F(word2)) /* Memory to address register */
+ {
+ REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC));
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to data register */
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_moves_8_di(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_DI_8();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15]));
+ return;
+ }
+ if(BIT_F(word2)) /* Memory to address register */
+ {
+ REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC));
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to data register */
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_moves_8_ix(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_IX_8();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15]));
+ return;
+ }
+ if(BIT_F(word2)) /* Memory to address register */
+ {
+ REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC));
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to data register */
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_moves_8_aw(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AW_8();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15]));
+ return;
+ }
+ if(BIT_F(word2)) /* Memory to address register */
+ {
+ REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC));
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to data register */
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_moves_8_al(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AL_8();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15]));
+ return;
+ }
+ if(BIT_F(word2)) /* Memory to address register */
+ {
+ REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC));
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to data register */
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_moves_16_ai(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_AI_16();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15]));
+ return;
+ }
+ if(BIT_F(word2)) /* Memory to address register */
+ {
+ REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC));
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to data register */
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_moves_16_pi(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_PI_16();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15]));
+ return;
+ }
+ if(BIT_F(word2)) /* Memory to address register */
+ {
+ REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC));
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to data register */
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_moves_16_pd(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_PD_16();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15]));
+ return;
+ }
+ if(BIT_F(word2)) /* Memory to address register */
+ {
+ REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC));
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to data register */
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_moves_16_di(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_DI_16();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15]));
+ return;
+ }
+ if(BIT_F(word2)) /* Memory to address register */
+ {
+ REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC));
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to data register */
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_moves_16_ix(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_IX_16();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15]));
+ return;
+ }
+ if(BIT_F(word2)) /* Memory to address register */
+ {
+ REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC));
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to data register */
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_moves_16_aw(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AW_16();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15]));
+ return;
+ }
+ if(BIT_F(word2)) /* Memory to address register */
+ {
+ REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC));
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to data register */
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_moves_16_al(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AL_16();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15]));
+ return;
+ }
+ if(BIT_F(word2)) /* Memory to address register */
+ {
+ REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC));
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to data register */
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_moves_32_ai(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_AI_32();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to register */
+ REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_moves_32_pi(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_PI_32();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to register */
+ REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_moves_32_pd(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_PD_32();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to register */
+ REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_moves_32_di(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_DI_32();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to register */
+ REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_moves_32_ix(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AY_IX_32();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to register */
+ REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_moves_32_aw(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AW_32();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to register */
+ REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_moves_32_al(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = EA_AL_32();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to register */
+ REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_moveq_32(void)
+{
+ uint res = DX = MAKE_INT_8(MASK_OUT_ABOVE_8(REG_IR));
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_muls_16_d(void)
+{
+ uint* r_dst = &DX;
+ uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(DY) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_muls_16_ai(void)
+{
+ uint* r_dst = &DX;
+ uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AY_AI_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_muls_16_pi(void)
+{
+ uint* r_dst = &DX;
+ uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AY_PI_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_muls_16_pd(void)
+{
+ uint* r_dst = &DX;
+ uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AY_PD_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_muls_16_di(void)
+{
+ uint* r_dst = &DX;
+ uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AY_DI_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_muls_16_ix(void)
+{
+ uint* r_dst = &DX;
+ uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AY_IX_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_muls_16_aw(void)
+{
+ uint* r_dst = &DX;
+ uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AW_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_muls_16_al(void)
+{
+ uint* r_dst = &DX;
+ uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AL_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_muls_16_pcdi(void)
+{
+ uint* r_dst = &DX;
+ uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_PCDI_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_muls_16_pcix(void)
+{
+ uint* r_dst = &DX;
+ uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_PCIX_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_muls_16_i(void)
+{
+ uint* r_dst = &DX;
+ uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_I_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_mulu_16_d(void)
+{
+ uint* r_dst = &DX;
+ uint res = MASK_OUT_ABOVE_16(DY) * MASK_OUT_ABOVE_16(*r_dst);
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_mulu_16_ai(void)
+{
+ uint* r_dst = &DX;
+ uint res = OPER_AY_AI_16() * MASK_OUT_ABOVE_16(*r_dst);
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_mulu_16_pi(void)
+{
+ uint* r_dst = &DX;
+ uint res = OPER_AY_PI_16() * MASK_OUT_ABOVE_16(*r_dst);
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_mulu_16_pd(void)
+{
+ uint* r_dst = &DX;
+ uint res = OPER_AY_PD_16() * MASK_OUT_ABOVE_16(*r_dst);
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_mulu_16_di(void)
+{
+ uint* r_dst = &DX;
+ uint res = OPER_AY_DI_16() * MASK_OUT_ABOVE_16(*r_dst);
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_mulu_16_ix(void)
+{
+ uint* r_dst = &DX;
+ uint res = OPER_AY_IX_16() * MASK_OUT_ABOVE_16(*r_dst);
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_mulu_16_aw(void)
+{
+ uint* r_dst = &DX;
+ uint res = OPER_AW_16() * MASK_OUT_ABOVE_16(*r_dst);
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_mulu_16_al(void)
+{
+ uint* r_dst = &DX;
+ uint res = OPER_AL_16() * MASK_OUT_ABOVE_16(*r_dst);
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_mulu_16_pcdi(void)
+{
+ uint* r_dst = &DX;
+ uint res = OPER_PCDI_16() * MASK_OUT_ABOVE_16(*r_dst);
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_mulu_16_pcix(void)
+{
+ uint* r_dst = &DX;
+ uint res = OPER_PCIX_16() * MASK_OUT_ABOVE_16(*r_dst);
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_mulu_16_i(void)
+{
+ uint* r_dst = &DX;
+ uint res = OPER_I_16() * MASK_OUT_ABOVE_16(*r_dst);
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_mull_32_d(void)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 src = DY;
+ uint64 dst = REG_D[(word2 >> 12) & 7];
+ uint64 res;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ res = (sint64)((sint32)src) * (sint64)((sint32)dst);
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = ((sint64)res != (sint32)res)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+
+ res = src * dst;
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = (res > 0xffffffff)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint src = DY;
+ uint dst = REG_D[(word2 >> 12) & 7];
+ uint neg = GET_MSB_32(src ^ dst);
+ uint src1;
+ uint src2;
+ uint dst1;
+ uint dst2;
+ uint r1;
+ uint r2;
+ uint r3;
+ uint r4;
+ uint lo;
+ uint hi;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(GET_MSB_32(src))
+ src = (uint)MASK_OUT_ABOVE_32(-(sint)src);
+ if(GET_MSB_32(dst))
+ dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);
+ }
+
+ src1 = MASK_OUT_ABOVE_16(src);
+ src2 = src>>16;
+ dst1 = MASK_OUT_ABOVE_16(dst);
+ dst2 = dst>>16;
+
+
+ r1 = src1 * dst1;
+ r2 = src1 * dst2;
+ r3 = src2 * dst1;
+ r4 = src2 * dst2;
+
+ lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);
+ hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);
+
+ if(BIT_B(word2) && neg)
+ {
+ hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));
+ lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);
+ }
+
+ if(BIT_A(word2))
+ {
+ REG_D[word2 & 7] = hi;
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(hi);
+ FLAG_Z = hi | lo;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(lo);
+ FLAG_Z = lo;
+ if(BIT_B(word2))
+ FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;
+ else
+ FLAG_V = (hi != 0) << 7;
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+void m68k_op_mull_32_ai(void)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 src = OPER_AY_AI_32();
+ uint64 dst = REG_D[(word2 >> 12) & 7];
+ uint64 res;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ res = (sint64)((sint32)src) * (sint64)((sint32)dst);
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = ((sint64)res != (sint32)res)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+
+ res = src * dst;
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = (res > 0xffffffff)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint src = OPER_AY_AI_32();
+ uint dst = REG_D[(word2 >> 12) & 7];
+ uint neg = GET_MSB_32(src ^ dst);
+ uint src1;
+ uint src2;
+ uint dst1;
+ uint dst2;
+ uint r1;
+ uint r2;
+ uint r3;
+ uint r4;
+ uint lo;
+ uint hi;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(GET_MSB_32(src))
+ src = (uint)MASK_OUT_ABOVE_32(-(sint)src);
+ if(GET_MSB_32(dst))
+ dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);
+ }
+
+ src1 = MASK_OUT_ABOVE_16(src);
+ src2 = src>>16;
+ dst1 = MASK_OUT_ABOVE_16(dst);
+ dst2 = dst>>16;
+
+
+ r1 = src1 * dst1;
+ r2 = src1 * dst2;
+ r3 = src2 * dst1;
+ r4 = src2 * dst2;
+
+ lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);
+ hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);
+
+ if(BIT_B(word2) && neg)
+ {
+ hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));
+ lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);
+ }
+
+ if(BIT_A(word2))
+ {
+ REG_D[word2 & 7] = hi;
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(hi);
+ FLAG_Z = hi | lo;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(lo);
+ FLAG_Z = lo;
+ if(BIT_B(word2))
+ FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;
+ else
+ FLAG_V = (hi != 0) << 7;
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+void m68k_op_mull_32_pi(void)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 src = OPER_AY_PI_32();
+ uint64 dst = REG_D[(word2 >> 12) & 7];
+ uint64 res;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ res = (sint64)((sint32)src) * (sint64)((sint32)dst);
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = ((sint64)res != (sint32)res)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+
+ res = src * dst;
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = (res > 0xffffffff)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint src = OPER_AY_PI_32();
+ uint dst = REG_D[(word2 >> 12) & 7];
+ uint neg = GET_MSB_32(src ^ dst);
+ uint src1;
+ uint src2;
+ uint dst1;
+ uint dst2;
+ uint r1;
+ uint r2;
+ uint r3;
+ uint r4;
+ uint lo;
+ uint hi;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(GET_MSB_32(src))
+ src = (uint)MASK_OUT_ABOVE_32(-(sint)src);
+ if(GET_MSB_32(dst))
+ dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);
+ }
+
+ src1 = MASK_OUT_ABOVE_16(src);
+ src2 = src>>16;
+ dst1 = MASK_OUT_ABOVE_16(dst);
+ dst2 = dst>>16;
+
+
+ r1 = src1 * dst1;
+ r2 = src1 * dst2;
+ r3 = src2 * dst1;
+ r4 = src2 * dst2;
+
+ lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);
+ hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);
+
+ if(BIT_B(word2) && neg)
+ {
+ hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));
+ lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);
+ }
+
+ if(BIT_A(word2))
+ {
+ REG_D[word2 & 7] = hi;
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(hi);
+ FLAG_Z = hi | lo;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(lo);
+ FLAG_Z = lo;
+ if(BIT_B(word2))
+ FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;
+ else
+ FLAG_V = (hi != 0) << 7;
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+void m68k_op_mull_32_pd(void)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 src = OPER_AY_PD_32();
+ uint64 dst = REG_D[(word2 >> 12) & 7];
+ uint64 res;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ res = (sint64)((sint32)src) * (sint64)((sint32)dst);
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = ((sint64)res != (sint32)res)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+
+ res = src * dst;
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = (res > 0xffffffff)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint src = OPER_AY_PD_32();
+ uint dst = REG_D[(word2 >> 12) & 7];
+ uint neg = GET_MSB_32(src ^ dst);
+ uint src1;
+ uint src2;
+ uint dst1;
+ uint dst2;
+ uint r1;
+ uint r2;
+ uint r3;
+ uint r4;
+ uint lo;
+ uint hi;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(GET_MSB_32(src))
+ src = (uint)MASK_OUT_ABOVE_32(-(sint)src);
+ if(GET_MSB_32(dst))
+ dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);
+ }
+
+ src1 = MASK_OUT_ABOVE_16(src);
+ src2 = src>>16;
+ dst1 = MASK_OUT_ABOVE_16(dst);
+ dst2 = dst>>16;
+
+
+ r1 = src1 * dst1;
+ r2 = src1 * dst2;
+ r3 = src2 * dst1;
+ r4 = src2 * dst2;
+
+ lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);
+ hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);
+
+ if(BIT_B(word2) && neg)
+ {
+ hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));
+ lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);
+ }
+
+ if(BIT_A(word2))
+ {
+ REG_D[word2 & 7] = hi;
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(hi);
+ FLAG_Z = hi | lo;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(lo);
+ FLAG_Z = lo;
+ if(BIT_B(word2))
+ FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;
+ else
+ FLAG_V = (hi != 0) << 7;
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+void m68k_op_mull_32_di(void)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 src = OPER_AY_DI_32();
+ uint64 dst = REG_D[(word2 >> 12) & 7];
+ uint64 res;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ res = (sint64)((sint32)src) * (sint64)((sint32)dst);
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = ((sint64)res != (sint32)res)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+
+ res = src * dst;
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = (res > 0xffffffff)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint src = OPER_AY_DI_32();
+ uint dst = REG_D[(word2 >> 12) & 7];
+ uint neg = GET_MSB_32(src ^ dst);
+ uint src1;
+ uint src2;
+ uint dst1;
+ uint dst2;
+ uint r1;
+ uint r2;
+ uint r3;
+ uint r4;
+ uint lo;
+ uint hi;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(GET_MSB_32(src))
+ src = (uint)MASK_OUT_ABOVE_32(-(sint)src);
+ if(GET_MSB_32(dst))
+ dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);
+ }
+
+ src1 = MASK_OUT_ABOVE_16(src);
+ src2 = src>>16;
+ dst1 = MASK_OUT_ABOVE_16(dst);
+ dst2 = dst>>16;
+
+
+ r1 = src1 * dst1;
+ r2 = src1 * dst2;
+ r3 = src2 * dst1;
+ r4 = src2 * dst2;
+
+ lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);
+ hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);
+
+ if(BIT_B(word2) && neg)
+ {
+ hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));
+ lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);
+ }
+
+ if(BIT_A(word2))
+ {
+ REG_D[word2 & 7] = hi;
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(hi);
+ FLAG_Z = hi | lo;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(lo);
+ FLAG_Z = lo;
+ if(BIT_B(word2))
+ FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;
+ else
+ FLAG_V = (hi != 0) << 7;
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+void m68k_op_mull_32_ix(void)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 src = OPER_AY_IX_32();
+ uint64 dst = REG_D[(word2 >> 12) & 7];
+ uint64 res;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ res = (sint64)((sint32)src) * (sint64)((sint32)dst);
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = ((sint64)res != (sint32)res)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+
+ res = src * dst;
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = (res > 0xffffffff)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint src = OPER_AY_IX_32();
+ uint dst = REG_D[(word2 >> 12) & 7];
+ uint neg = GET_MSB_32(src ^ dst);
+ uint src1;
+ uint src2;
+ uint dst1;
+ uint dst2;
+ uint r1;
+ uint r2;
+ uint r3;
+ uint r4;
+ uint lo;
+ uint hi;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(GET_MSB_32(src))
+ src = (uint)MASK_OUT_ABOVE_32(-(sint)src);
+ if(GET_MSB_32(dst))
+ dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);
+ }
+
+ src1 = MASK_OUT_ABOVE_16(src);
+ src2 = src>>16;
+ dst1 = MASK_OUT_ABOVE_16(dst);
+ dst2 = dst>>16;
+
+
+ r1 = src1 * dst1;
+ r2 = src1 * dst2;
+ r3 = src2 * dst1;
+ r4 = src2 * dst2;
+
+ lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);
+ hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);
+
+ if(BIT_B(word2) && neg)
+ {
+ hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));
+ lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);
+ }
+
+ if(BIT_A(word2))
+ {
+ REG_D[word2 & 7] = hi;
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(hi);
+ FLAG_Z = hi | lo;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(lo);
+ FLAG_Z = lo;
+ if(BIT_B(word2))
+ FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;
+ else
+ FLAG_V = (hi != 0) << 7;
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+void m68k_op_mull_32_aw(void)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 src = OPER_AW_32();
+ uint64 dst = REG_D[(word2 >> 12) & 7];
+ uint64 res;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ res = (sint64)((sint32)src) * (sint64)((sint32)dst);
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = ((sint64)res != (sint32)res)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+
+ res = src * dst;
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = (res > 0xffffffff)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint src = OPER_AW_32();
+ uint dst = REG_D[(word2 >> 12) & 7];
+ uint neg = GET_MSB_32(src ^ dst);
+ uint src1;
+ uint src2;
+ uint dst1;
+ uint dst2;
+ uint r1;
+ uint r2;
+ uint r3;
+ uint r4;
+ uint lo;
+ uint hi;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(GET_MSB_32(src))
+ src = (uint)MASK_OUT_ABOVE_32(-(sint)src);
+ if(GET_MSB_32(dst))
+ dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);
+ }
+
+ src1 = MASK_OUT_ABOVE_16(src);
+ src2 = src>>16;
+ dst1 = MASK_OUT_ABOVE_16(dst);
+ dst2 = dst>>16;
+
+
+ r1 = src1 * dst1;
+ r2 = src1 * dst2;
+ r3 = src2 * dst1;
+ r4 = src2 * dst2;
+
+ lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);
+ hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);
+
+ if(BIT_B(word2) && neg)
+ {
+ hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));
+ lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);
+ }
+
+ if(BIT_A(word2))
+ {
+ REG_D[word2 & 7] = hi;
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(hi);
+ FLAG_Z = hi | lo;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(lo);
+ FLAG_Z = lo;
+ if(BIT_B(word2))
+ FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;
+ else
+ FLAG_V = (hi != 0) << 7;
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+void m68k_op_mull_32_al(void)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 src = OPER_AL_32();
+ uint64 dst = REG_D[(word2 >> 12) & 7];
+ uint64 res;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ res = (sint64)((sint32)src) * (sint64)((sint32)dst);
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = ((sint64)res != (sint32)res)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+
+ res = src * dst;
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = (res > 0xffffffff)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint src = OPER_AL_32();
+ uint dst = REG_D[(word2 >> 12) & 7];
+ uint neg = GET_MSB_32(src ^ dst);
+ uint src1;
+ uint src2;
+ uint dst1;
+ uint dst2;
+ uint r1;
+ uint r2;
+ uint r3;
+ uint r4;
+ uint lo;
+ uint hi;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(GET_MSB_32(src))
+ src = (uint)MASK_OUT_ABOVE_32(-(sint)src);
+ if(GET_MSB_32(dst))
+ dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);
+ }
+
+ src1 = MASK_OUT_ABOVE_16(src);
+ src2 = src>>16;
+ dst1 = MASK_OUT_ABOVE_16(dst);
+ dst2 = dst>>16;
+
+
+ r1 = src1 * dst1;
+ r2 = src1 * dst2;
+ r3 = src2 * dst1;
+ r4 = src2 * dst2;
+
+ lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);
+ hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);
+
+ if(BIT_B(word2) && neg)
+ {
+ hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));
+ lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);
+ }
+
+ if(BIT_A(word2))
+ {
+ REG_D[word2 & 7] = hi;
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(hi);
+ FLAG_Z = hi | lo;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(lo);
+ FLAG_Z = lo;
+ if(BIT_B(word2))
+ FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;
+ else
+ FLAG_V = (hi != 0) << 7;
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+void m68k_op_mull_32_pcdi(void)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 src = OPER_PCDI_32();
+ uint64 dst = REG_D[(word2 >> 12) & 7];
+ uint64 res;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ res = (sint64)((sint32)src) * (sint64)((sint32)dst);
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = ((sint64)res != (sint32)res)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+
+ res = src * dst;
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = (res > 0xffffffff)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint src = OPER_PCDI_32();
+ uint dst = REG_D[(word2 >> 12) & 7];
+ uint neg = GET_MSB_32(src ^ dst);
+ uint src1;
+ uint src2;
+ uint dst1;
+ uint dst2;
+ uint r1;
+ uint r2;
+ uint r3;
+ uint r4;
+ uint lo;
+ uint hi;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(GET_MSB_32(src))
+ src = (uint)MASK_OUT_ABOVE_32(-(sint)src);
+ if(GET_MSB_32(dst))
+ dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);
+ }
+
+ src1 = MASK_OUT_ABOVE_16(src);
+ src2 = src>>16;
+ dst1 = MASK_OUT_ABOVE_16(dst);
+ dst2 = dst>>16;
+
+
+ r1 = src1 * dst1;
+ r2 = src1 * dst2;
+ r3 = src2 * dst1;
+ r4 = src2 * dst2;
+
+ lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);
+ hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);
+
+ if(BIT_B(word2) && neg)
+ {
+ hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));
+ lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);
+ }
+
+ if(BIT_A(word2))
+ {
+ REG_D[word2 & 7] = hi;
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(hi);
+ FLAG_Z = hi | lo;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(lo);
+ FLAG_Z = lo;
+ if(BIT_B(word2))
+ FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;
+ else
+ FLAG_V = (hi != 0) << 7;
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+void m68k_op_mull_32_pcix(void)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 src = OPER_PCIX_32();
+ uint64 dst = REG_D[(word2 >> 12) & 7];
+ uint64 res;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ res = (sint64)((sint32)src) * (sint64)((sint32)dst);
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = ((sint64)res != (sint32)res)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+
+ res = src * dst;
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = (res > 0xffffffff)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint src = OPER_PCIX_32();
+ uint dst = REG_D[(word2 >> 12) & 7];
+ uint neg = GET_MSB_32(src ^ dst);
+ uint src1;
+ uint src2;
+ uint dst1;
+ uint dst2;
+ uint r1;
+ uint r2;
+ uint r3;
+ uint r4;
+ uint lo;
+ uint hi;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(GET_MSB_32(src))
+ src = (uint)MASK_OUT_ABOVE_32(-(sint)src);
+ if(GET_MSB_32(dst))
+ dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);
+ }
+
+ src1 = MASK_OUT_ABOVE_16(src);
+ src2 = src>>16;
+ dst1 = MASK_OUT_ABOVE_16(dst);
+ dst2 = dst>>16;
+
+
+ r1 = src1 * dst1;
+ r2 = src1 * dst2;
+ r3 = src2 * dst1;
+ r4 = src2 * dst2;
+
+ lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);
+ hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);
+
+ if(BIT_B(word2) && neg)
+ {
+ hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));
+ lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);
+ }
+
+ if(BIT_A(word2))
+ {
+ REG_D[word2 & 7] = hi;
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(hi);
+ FLAG_Z = hi | lo;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(lo);
+ FLAG_Z = lo;
+ if(BIT_B(word2))
+ FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;
+ else
+ FLAG_V = (hi != 0) << 7;
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+void m68k_op_mull_32_i(void)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 src = OPER_I_32();
+ uint64 dst = REG_D[(word2 >> 12) & 7];
+ uint64 res;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ res = (sint64)((sint32)src) * (sint64)((sint32)dst);
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = ((sint64)res != (sint32)res)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+
+ res = src * dst;
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = (res > 0xffffffff)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint src = OPER_I_32();
+ uint dst = REG_D[(word2 >> 12) & 7];
+ uint neg = GET_MSB_32(src ^ dst);
+ uint src1;
+ uint src2;
+ uint dst1;
+ uint dst2;
+ uint r1;
+ uint r2;
+ uint r3;
+ uint r4;
+ uint lo;
+ uint hi;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(GET_MSB_32(src))
+ src = (uint)MASK_OUT_ABOVE_32(-(sint)src);
+ if(GET_MSB_32(dst))
+ dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);
+ }
+
+ src1 = MASK_OUT_ABOVE_16(src);
+ src2 = src>>16;
+ dst1 = MASK_OUT_ABOVE_16(dst);
+ dst2 = dst>>16;
+
+
+ r1 = src1 * dst1;
+ r2 = src1 * dst2;
+ r3 = src2 * dst1;
+ r4 = src2 * dst2;
+
+ lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);
+ hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);
+
+ if(BIT_B(word2) && neg)
+ {
+ hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));
+ lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);
+ }
+
+ if(BIT_A(word2))
+ {
+ REG_D[word2 & 7] = hi;
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(hi);
+ FLAG_Z = hi | lo;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(lo);
+ FLAG_Z = lo;
+ if(BIT_B(word2))
+ FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;
+ else
+ FLAG_V = (hi != 0) << 7;
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+/* ======================================================================== */
+/* ============================== END OF FILE ============================= */
+/* ======================================================================== */
+
+
diff --git a/Src/CPU/68K/Musashi/generated/m68kopdm.o b/Src/CPU/68K/Musashi/generated/m68kopdm.o
new file mode 100644
index 0000000..481ca4e
Binary files /dev/null and b/Src/CPU/68K/Musashi/generated/m68kopdm.o differ
diff --git a/Src/CPU/68K/Musashi/generated/m68kopnz.c b/Src/CPU/68K/Musashi/generated/m68kopnz.c
new file mode 100644
index 0000000..4e718d2
--- /dev/null
+++ b/Src/CPU/68K/Musashi/generated/m68kopnz.c
@@ -0,0 +1,8867 @@
+#include "m68kcpu.h"
+
+/* ======================================================================== */
+/* ========================= INSTRUCTION HANDLERS ========================= */
+/* ======================================================================== */
+
+
+void m68k_op_nbcd_8_d(void)
+{
+ uint* r_dst = &DY;
+ uint dst = *r_dst;
+ uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
+
+ if(res != 0x9a)
+ {
+ FLAG_V = ~res; /* Undefined V behavior */
+
+ if((res & 0x0f) == 0xa)
+ res = (res & 0xf0) + 0x10;
+
+ res = MASK_OUT_ABOVE_8(res);
+
+ FLAG_V &= res; /* Undefined V behavior part II */
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+
+ FLAG_Z |= res;
+ FLAG_C = CFLAG_SET;
+ FLAG_X = XFLAG_SET;
+ }
+ else
+ {
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_X = XFLAG_CLEAR;
+ }
+ FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+}
+
+
+void m68k_op_nbcd_8_ai(void)
+{
+ uint ea = EA_AY_AI_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
+
+ if(res != 0x9a)
+ {
+ FLAG_V = ~res; /* Undefined V behavior */
+
+ if((res & 0x0f) == 0xa)
+ res = (res & 0xf0) + 0x10;
+
+ res = MASK_OUT_ABOVE_8(res);
+
+ FLAG_V &= res; /* Undefined V behavior part II */
+
+ m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));
+
+ FLAG_Z |= res;
+ FLAG_C = CFLAG_SET;
+ FLAG_X = XFLAG_SET;
+ }
+ else
+ {
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_X = XFLAG_CLEAR;
+ }
+ FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+}
+
+
+void m68k_op_nbcd_8_pi(void)
+{
+ uint ea = EA_AY_PI_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
+
+ if(res != 0x9a)
+ {
+ FLAG_V = ~res; /* Undefined V behavior */
+
+ if((res & 0x0f) == 0xa)
+ res = (res & 0xf0) + 0x10;
+
+ res = MASK_OUT_ABOVE_8(res);
+
+ FLAG_V &= res; /* Undefined V behavior part II */
+
+ m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));
+
+ FLAG_Z |= res;
+ FLAG_C = CFLAG_SET;
+ FLAG_X = XFLAG_SET;
+ }
+ else
+ {
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_X = XFLAG_CLEAR;
+ }
+ FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+}
+
+
+void m68k_op_nbcd_8_pi7(void)
+{
+ uint ea = EA_A7_PI_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
+
+ if(res != 0x9a)
+ {
+ FLAG_V = ~res; /* Undefined V behavior */
+
+ if((res & 0x0f) == 0xa)
+ res = (res & 0xf0) + 0x10;
+
+ res = MASK_OUT_ABOVE_8(res);
+
+ FLAG_V &= res; /* Undefined V behavior part II */
+
+ m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));
+
+ FLAG_Z |= res;
+ FLAG_C = CFLAG_SET;
+ FLAG_X = XFLAG_SET;
+ }
+ else
+ {
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_X = XFLAG_CLEAR;
+ }
+ FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+}
+
+
+void m68k_op_nbcd_8_pd(void)
+{
+ uint ea = EA_AY_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
+
+ if(res != 0x9a)
+ {
+ FLAG_V = ~res; /* Undefined V behavior */
+
+ if((res & 0x0f) == 0xa)
+ res = (res & 0xf0) + 0x10;
+
+ res = MASK_OUT_ABOVE_8(res);
+
+ FLAG_V &= res; /* Undefined V behavior part II */
+
+ m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));
+
+ FLAG_Z |= res;
+ FLAG_C = CFLAG_SET;
+ FLAG_X = XFLAG_SET;
+ }
+ else
+ {
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_X = XFLAG_CLEAR;
+ }
+ FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+}
+
+
+void m68k_op_nbcd_8_pd7(void)
+{
+ uint ea = EA_A7_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
+
+ if(res != 0x9a)
+ {
+ FLAG_V = ~res; /* Undefined V behavior */
+
+ if((res & 0x0f) == 0xa)
+ res = (res & 0xf0) + 0x10;
+
+ res = MASK_OUT_ABOVE_8(res);
+
+ FLAG_V &= res; /* Undefined V behavior part II */
+
+ m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));
+
+ FLAG_Z |= res;
+ FLAG_C = CFLAG_SET;
+ FLAG_X = XFLAG_SET;
+ }
+ else
+ {
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_X = XFLAG_CLEAR;
+ }
+ FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+}
+
+
+void m68k_op_nbcd_8_di(void)
+{
+ uint ea = EA_AY_DI_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
+
+ if(res != 0x9a)
+ {
+ FLAG_V = ~res; /* Undefined V behavior */
+
+ if((res & 0x0f) == 0xa)
+ res = (res & 0xf0) + 0x10;
+
+ res = MASK_OUT_ABOVE_8(res);
+
+ FLAG_V &= res; /* Undefined V behavior part II */
+
+ m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));
+
+ FLAG_Z |= res;
+ FLAG_C = CFLAG_SET;
+ FLAG_X = XFLAG_SET;
+ }
+ else
+ {
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_X = XFLAG_CLEAR;
+ }
+ FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+}
+
+
+void m68k_op_nbcd_8_ix(void)
+{
+ uint ea = EA_AY_IX_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
+
+ if(res != 0x9a)
+ {
+ FLAG_V = ~res; /* Undefined V behavior */
+
+ if((res & 0x0f) == 0xa)
+ res = (res & 0xf0) + 0x10;
+
+ res = MASK_OUT_ABOVE_8(res);
+
+ FLAG_V &= res; /* Undefined V behavior part II */
+
+ m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));
+
+ FLAG_Z |= res;
+ FLAG_C = CFLAG_SET;
+ FLAG_X = XFLAG_SET;
+ }
+ else
+ {
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_X = XFLAG_CLEAR;
+ }
+ FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+}
+
+
+void m68k_op_nbcd_8_aw(void)
+{
+ uint ea = EA_AW_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
+
+ if(res != 0x9a)
+ {
+ FLAG_V = ~res; /* Undefined V behavior */
+
+ if((res & 0x0f) == 0xa)
+ res = (res & 0xf0) + 0x10;
+
+ res = MASK_OUT_ABOVE_8(res);
+
+ FLAG_V &= res; /* Undefined V behavior part II */
+
+ m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));
+
+ FLAG_Z |= res;
+ FLAG_C = CFLAG_SET;
+ FLAG_X = XFLAG_SET;
+ }
+ else
+ {
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_X = XFLAG_CLEAR;
+ }
+ FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+}
+
+
+void m68k_op_nbcd_8_al(void)
+{
+ uint ea = EA_AL_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
+
+ if(res != 0x9a)
+ {
+ FLAG_V = ~res; /* Undefined V behavior */
+
+ if((res & 0x0f) == 0xa)
+ res = (res & 0xf0) + 0x10;
+
+ res = MASK_OUT_ABOVE_8(res);
+
+ FLAG_V &= res; /* Undefined V behavior part II */
+
+ m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));
+
+ FLAG_Z |= res;
+ FLAG_C = CFLAG_SET;
+ FLAG_X = XFLAG_SET;
+ }
+ else
+ {
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_X = XFLAG_CLEAR;
+ }
+ FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+}
+
+
+void m68k_op_neg_8_d(void)
+{
+ uint* r_dst = &DY;
+ uint res = 0 - MASK_OUT_ABOVE_8(*r_dst);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_C = FLAG_X = CFLAG_8(res);
+ FLAG_V = *r_dst & res;
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_neg_8_ai(void)
+{
+ uint ea = EA_AY_AI_8();
+ uint src = m68ki_read_8(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_C = FLAG_X = CFLAG_8(res);
+ FLAG_V = src & res;
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_neg_8_pi(void)
+{
+ uint ea = EA_AY_PI_8();
+ uint src = m68ki_read_8(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_C = FLAG_X = CFLAG_8(res);
+ FLAG_V = src & res;
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_neg_8_pi7(void)
+{
+ uint ea = EA_A7_PI_8();
+ uint src = m68ki_read_8(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_C = FLAG_X = CFLAG_8(res);
+ FLAG_V = src & res;
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_neg_8_pd(void)
+{
+ uint ea = EA_AY_PD_8();
+ uint src = m68ki_read_8(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_C = FLAG_X = CFLAG_8(res);
+ FLAG_V = src & res;
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_neg_8_pd7(void)
+{
+ uint ea = EA_A7_PD_8();
+ uint src = m68ki_read_8(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_C = FLAG_X = CFLAG_8(res);
+ FLAG_V = src & res;
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_neg_8_di(void)
+{
+ uint ea = EA_AY_DI_8();
+ uint src = m68ki_read_8(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_C = FLAG_X = CFLAG_8(res);
+ FLAG_V = src & res;
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_neg_8_ix(void)
+{
+ uint ea = EA_AY_IX_8();
+ uint src = m68ki_read_8(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_C = FLAG_X = CFLAG_8(res);
+ FLAG_V = src & res;
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_neg_8_aw(void)
+{
+ uint ea = EA_AW_8();
+ uint src = m68ki_read_8(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_C = FLAG_X = CFLAG_8(res);
+ FLAG_V = src & res;
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_neg_8_al(void)
+{
+ uint ea = EA_AL_8();
+ uint src = m68ki_read_8(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_C = FLAG_X = CFLAG_8(res);
+ FLAG_V = src & res;
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_neg_16_d(void)
+{
+ uint* r_dst = &DY;
+ uint res = 0 - MASK_OUT_ABOVE_16(*r_dst);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_C = FLAG_X = CFLAG_16(res);
+ FLAG_V = (*r_dst & res)>>8;
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_neg_16_ai(void)
+{
+ uint ea = EA_AY_AI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_C = FLAG_X = CFLAG_16(res);
+ FLAG_V = (src & res)>>8;
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_neg_16_pi(void)
+{
+ uint ea = EA_AY_PI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_C = FLAG_X = CFLAG_16(res);
+ FLAG_V = (src & res)>>8;
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_neg_16_pd(void)
+{
+ uint ea = EA_AY_PD_16();
+ uint src = m68ki_read_16(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_C = FLAG_X = CFLAG_16(res);
+ FLAG_V = (src & res)>>8;
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_neg_16_di(void)
+{
+ uint ea = EA_AY_DI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_C = FLAG_X = CFLAG_16(res);
+ FLAG_V = (src & res)>>8;
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_neg_16_ix(void)
+{
+ uint ea = EA_AY_IX_16();
+ uint src = m68ki_read_16(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_C = FLAG_X = CFLAG_16(res);
+ FLAG_V = (src & res)>>8;
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_neg_16_aw(void)
+{
+ uint ea = EA_AW_16();
+ uint src = m68ki_read_16(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_C = FLAG_X = CFLAG_16(res);
+ FLAG_V = (src & res)>>8;
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_neg_16_al(void)
+{
+ uint ea = EA_AL_16();
+ uint src = m68ki_read_16(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_C = FLAG_X = CFLAG_16(res);
+ FLAG_V = (src & res)>>8;
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_neg_32_d(void)
+{
+ uint* r_dst = &DY;
+ uint res = 0 - *r_dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_C = FLAG_X = CFLAG_SUB_32(*r_dst, 0, res);
+ FLAG_V = (*r_dst & res)>>24;
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_neg_32_ai(void)
+{
+ uint ea = EA_AY_AI_32();
+ uint src = m68ki_read_32(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res);
+ FLAG_V = (src & res)>>24;
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_neg_32_pi(void)
+{
+ uint ea = EA_AY_PI_32();
+ uint src = m68ki_read_32(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res);
+ FLAG_V = (src & res)>>24;
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_neg_32_pd(void)
+{
+ uint ea = EA_AY_PD_32();
+ uint src = m68ki_read_32(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res);
+ FLAG_V = (src & res)>>24;
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_neg_32_di(void)
+{
+ uint ea = EA_AY_DI_32();
+ uint src = m68ki_read_32(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res);
+ FLAG_V = (src & res)>>24;
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_neg_32_ix(void)
+{
+ uint ea = EA_AY_IX_32();
+ uint src = m68ki_read_32(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res);
+ FLAG_V = (src & res)>>24;
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_neg_32_aw(void)
+{
+ uint ea = EA_AW_32();
+ uint src = m68ki_read_32(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res);
+ FLAG_V = (src & res)>>24;
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_neg_32_al(void)
+{
+ uint ea = EA_AL_32();
+ uint src = m68ki_read_32(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res);
+ FLAG_V = (src & res)>>24;
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_negx_8_d(void)
+{
+ uint* r_dst = &DY;
+ uint res = 0 - MASK_OUT_ABOVE_8(*r_dst) - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = *r_dst & res;
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+}
+
+
+void m68k_op_negx_8_ai(void)
+{
+ uint ea = EA_AY_AI_8();
+ uint src = m68ki_read_8(ea);
+ uint res = 0 - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = src & res;
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_negx_8_pi(void)
+{
+ uint ea = EA_AY_PI_8();
+ uint src = m68ki_read_8(ea);
+ uint res = 0 - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = src & res;
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_negx_8_pi7(void)
+{
+ uint ea = EA_A7_PI_8();
+ uint src = m68ki_read_8(ea);
+ uint res = 0 - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = src & res;
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_negx_8_pd(void)
+{
+ uint ea = EA_AY_PD_8();
+ uint src = m68ki_read_8(ea);
+ uint res = 0 - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = src & res;
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_negx_8_pd7(void)
+{
+ uint ea = EA_A7_PD_8();
+ uint src = m68ki_read_8(ea);
+ uint res = 0 - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = src & res;
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_negx_8_di(void)
+{
+ uint ea = EA_AY_DI_8();
+ uint src = m68ki_read_8(ea);
+ uint res = 0 - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = src & res;
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_negx_8_ix(void)
+{
+ uint ea = EA_AY_IX_8();
+ uint src = m68ki_read_8(ea);
+ uint res = 0 - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = src & res;
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_negx_8_aw(void)
+{
+ uint ea = EA_AW_8();
+ uint src = m68ki_read_8(ea);
+ uint res = 0 - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = src & res;
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_negx_8_al(void)
+{
+ uint ea = EA_AL_8();
+ uint src = m68ki_read_8(ea);
+ uint res = 0 - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = src & res;
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_negx_16_d(void)
+{
+ uint* r_dst = &DY;
+ uint res = 0 - MASK_OUT_ABOVE_16(*r_dst) - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = (*r_dst & res)>>8;
+
+ res = MASK_OUT_ABOVE_16(res);
+ FLAG_Z |= res;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+}
+
+
+void m68k_op_negx_16_ai(void)
+{
+ uint ea = EA_AY_AI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = (src & res)>>8;
+
+ res = MASK_OUT_ABOVE_16(res);
+ FLAG_Z |= res;
+
+ m68ki_write_16(ea, res);
+}
+
+
+void m68k_op_negx_16_pi(void)
+{
+ uint ea = EA_AY_PI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = (src & res)>>8;
+
+ res = MASK_OUT_ABOVE_16(res);
+ FLAG_Z |= res;
+
+ m68ki_write_16(ea, res);
+}
+
+
+void m68k_op_negx_16_pd(void)
+{
+ uint ea = EA_AY_PD_16();
+ uint src = m68ki_read_16(ea);
+ uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = (src & res)>>8;
+
+ res = MASK_OUT_ABOVE_16(res);
+ FLAG_Z |= res;
+
+ m68ki_write_16(ea, res);
+}
+
+
+void m68k_op_negx_16_di(void)
+{
+ uint ea = EA_AY_DI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = (src & res)>>8;
+
+ res = MASK_OUT_ABOVE_16(res);
+ FLAG_Z |= res;
+
+ m68ki_write_16(ea, res);
+}
+
+
+void m68k_op_negx_16_ix(void)
+{
+ uint ea = EA_AY_IX_16();
+ uint src = m68ki_read_16(ea);
+ uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = (src & res)>>8;
+
+ res = MASK_OUT_ABOVE_16(res);
+ FLAG_Z |= res;
+
+ m68ki_write_16(ea, res);
+}
+
+
+void m68k_op_negx_16_aw(void)
+{
+ uint ea = EA_AW_16();
+ uint src = m68ki_read_16(ea);
+ uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = (src & res)>>8;
+
+ res = MASK_OUT_ABOVE_16(res);
+ FLAG_Z |= res;
+
+ m68ki_write_16(ea, res);
+}
+
+
+void m68k_op_negx_16_al(void)
+{
+ uint ea = EA_AL_16();
+ uint src = m68ki_read_16(ea);
+ uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = (src & res)>>8;
+
+ res = MASK_OUT_ABOVE_16(res);
+ FLAG_Z |= res;
+
+ m68ki_write_16(ea, res);
+}
+
+
+void m68k_op_negx_32_d(void)
+{
+ uint* r_dst = &DY;
+ uint res = 0 - MASK_OUT_ABOVE_32(*r_dst) - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(*r_dst, 0, res);
+ FLAG_V = (*r_dst & res)>>24;
+
+ res = MASK_OUT_ABOVE_32(res);
+ FLAG_Z |= res;
+
+ *r_dst = res;
+}
+
+
+void m68k_op_negx_32_ai(void)
+{
+ uint ea = EA_AY_AI_32();
+ uint src = m68ki_read_32(ea);
+ uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res);
+ FLAG_V = (src & res)>>24;
+
+ res = MASK_OUT_ABOVE_32(res);
+ FLAG_Z |= res;
+
+ m68ki_write_32(ea, res);
+}
+
+
+void m68k_op_negx_32_pi(void)
+{
+ uint ea = EA_AY_PI_32();
+ uint src = m68ki_read_32(ea);
+ uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res);
+ FLAG_V = (src & res)>>24;
+
+ res = MASK_OUT_ABOVE_32(res);
+ FLAG_Z |= res;
+
+ m68ki_write_32(ea, res);
+}
+
+
+void m68k_op_negx_32_pd(void)
+{
+ uint ea = EA_AY_PD_32();
+ uint src = m68ki_read_32(ea);
+ uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res);
+ FLAG_V = (src & res)>>24;
+
+ res = MASK_OUT_ABOVE_32(res);
+ FLAG_Z |= res;
+
+ m68ki_write_32(ea, res);
+}
+
+
+void m68k_op_negx_32_di(void)
+{
+ uint ea = EA_AY_DI_32();
+ uint src = m68ki_read_32(ea);
+ uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res);
+ FLAG_V = (src & res)>>24;
+
+ res = MASK_OUT_ABOVE_32(res);
+ FLAG_Z |= res;
+
+ m68ki_write_32(ea, res);
+}
+
+
+void m68k_op_negx_32_ix(void)
+{
+ uint ea = EA_AY_IX_32();
+ uint src = m68ki_read_32(ea);
+ uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res);
+ FLAG_V = (src & res)>>24;
+
+ res = MASK_OUT_ABOVE_32(res);
+ FLAG_Z |= res;
+
+ m68ki_write_32(ea, res);
+}
+
+
+void m68k_op_negx_32_aw(void)
+{
+ uint ea = EA_AW_32();
+ uint src = m68ki_read_32(ea);
+ uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res);
+ FLAG_V = (src & res)>>24;
+
+ res = MASK_OUT_ABOVE_32(res);
+ FLAG_Z |= res;
+
+ m68ki_write_32(ea, res);
+}
+
+
+void m68k_op_negx_32_al(void)
+{
+ uint ea = EA_AL_32();
+ uint src = m68ki_read_32(ea);
+ uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res);
+ FLAG_V = (src & res)>>24;
+
+ res = MASK_OUT_ABOVE_32(res);
+ FLAG_Z |= res;
+
+ m68ki_write_32(ea, res);
+}
+
+
+void m68k_op_nop(void)
+{
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+}
+
+
+void m68k_op_not_8_d(void)
+{
+ uint* r_dst = &DY;
+ uint res = MASK_OUT_ABOVE_8(~*r_dst);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_8_ai(void)
+{
+ uint ea = EA_AY_AI_8();
+ uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_8_pi(void)
+{
+ uint ea = EA_AY_PI_8();
+ uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_8_pi7(void)
+{
+ uint ea = EA_A7_PI_8();
+ uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_8_pd(void)
+{
+ uint ea = EA_AY_PD_8();
+ uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_8_pd7(void)
+{
+ uint ea = EA_A7_PD_8();
+ uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_8_di(void)
+{
+ uint ea = EA_AY_DI_8();
+ uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_8_ix(void)
+{
+ uint ea = EA_AY_IX_8();
+ uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_8_aw(void)
+{
+ uint ea = EA_AW_8();
+ uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_8_al(void)
+{
+ uint ea = EA_AL_8();
+ uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_16_d(void)
+{
+ uint* r_dst = &DY;
+ uint res = MASK_OUT_ABOVE_16(~*r_dst);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_16_ai(void)
+{
+ uint ea = EA_AY_AI_16();
+ uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_16_pi(void)
+{
+ uint ea = EA_AY_PI_16();
+ uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_16_pd(void)
+{
+ uint ea = EA_AY_PD_16();
+ uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_16_di(void)
+{
+ uint ea = EA_AY_DI_16();
+ uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_16_ix(void)
+{
+ uint ea = EA_AY_IX_16();
+ uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_16_aw(void)
+{
+ uint ea = EA_AW_16();
+ uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_16_al(void)
+{
+ uint ea = EA_AL_16();
+ uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_32_d(void)
+{
+ uint* r_dst = &DY;
+ uint res = *r_dst = MASK_OUT_ABOVE_32(~*r_dst);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_32_ai(void)
+{
+ uint ea = EA_AY_AI_32();
+ uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea));
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_32_pi(void)
+{
+ uint ea = EA_AY_PI_32();
+ uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea));
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_32_pd(void)
+{
+ uint ea = EA_AY_PD_32();
+ uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea));
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_32_di(void)
+{
+ uint ea = EA_AY_DI_32();
+ uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea));
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_32_ix(void)
+{
+ uint ea = EA_AY_IX_32();
+ uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea));
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_32_aw(void)
+{
+ uint ea = EA_AW_32();
+ uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea));
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_not_32_al(void)
+{
+ uint ea = EA_AL_32();
+ uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea));
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_8_er_d(void)
+{
+ uint res = MASK_OUT_ABOVE_8((DX |= MASK_OUT_ABOVE_8(DY)));
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_8_er_ai(void)
+{
+ uint res = MASK_OUT_ABOVE_8((DX |= OPER_AY_AI_8()));
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_8_er_pi(void)
+{
+ uint res = MASK_OUT_ABOVE_8((DX |= OPER_AY_PI_8()));
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_8_er_pi7(void)
+{
+ uint res = MASK_OUT_ABOVE_8((DX |= OPER_A7_PI_8()));
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_8_er_pd(void)
+{
+ uint res = MASK_OUT_ABOVE_8((DX |= OPER_AY_PD_8()));
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_8_er_pd7(void)
+{
+ uint res = MASK_OUT_ABOVE_8((DX |= OPER_A7_PD_8()));
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_8_er_di(void)
+{
+ uint res = MASK_OUT_ABOVE_8((DX |= OPER_AY_DI_8()));
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_8_er_ix(void)
+{
+ uint res = MASK_OUT_ABOVE_8((DX |= OPER_AY_IX_8()));
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_8_er_aw(void)
+{
+ uint res = MASK_OUT_ABOVE_8((DX |= OPER_AW_8()));
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_8_er_al(void)
+{
+ uint res = MASK_OUT_ABOVE_8((DX |= OPER_AL_8()));
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_8_er_pcdi(void)
+{
+ uint res = MASK_OUT_ABOVE_8((DX |= OPER_PCDI_8()));
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_8_er_pcix(void)
+{
+ uint res = MASK_OUT_ABOVE_8((DX |= OPER_PCIX_8()));
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_8_er_i(void)
+{
+ uint res = MASK_OUT_ABOVE_8((DX |= OPER_I_8()));
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_16_er_d(void)
+{
+ uint res = MASK_OUT_ABOVE_16((DX |= MASK_OUT_ABOVE_16(DY)));
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_16_er_ai(void)
+{
+ uint res = MASK_OUT_ABOVE_16((DX |= OPER_AY_AI_16()));
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_16_er_pi(void)
+{
+ uint res = MASK_OUT_ABOVE_16((DX |= OPER_AY_PI_16()));
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_16_er_pd(void)
+{
+ uint res = MASK_OUT_ABOVE_16((DX |= OPER_AY_PD_16()));
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_16_er_di(void)
+{
+ uint res = MASK_OUT_ABOVE_16((DX |= OPER_AY_DI_16()));
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_16_er_ix(void)
+{
+ uint res = MASK_OUT_ABOVE_16((DX |= OPER_AY_IX_16()));
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_16_er_aw(void)
+{
+ uint res = MASK_OUT_ABOVE_16((DX |= OPER_AW_16()));
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_16_er_al(void)
+{
+ uint res = MASK_OUT_ABOVE_16((DX |= OPER_AL_16()));
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_16_er_pcdi(void)
+{
+ uint res = MASK_OUT_ABOVE_16((DX |= OPER_PCDI_16()));
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_16_er_pcix(void)
+{
+ uint res = MASK_OUT_ABOVE_16((DX |= OPER_PCIX_16()));
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_16_er_i(void)
+{
+ uint res = MASK_OUT_ABOVE_16((DX |= OPER_I_16()));
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_32_er_d(void)
+{
+ uint res = DX |= DY;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_32_er_ai(void)
+{
+ uint res = DX |= OPER_AY_AI_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_32_er_pi(void)
+{
+ uint res = DX |= OPER_AY_PI_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_32_er_pd(void)
+{
+ uint res = DX |= OPER_AY_PD_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_32_er_di(void)
+{
+ uint res = DX |= OPER_AY_DI_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_32_er_ix(void)
+{
+ uint res = DX |= OPER_AY_IX_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_32_er_aw(void)
+{
+ uint res = DX |= OPER_AW_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_32_er_al(void)
+{
+ uint res = DX |= OPER_AL_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_32_er_pcdi(void)
+{
+ uint res = DX |= OPER_PCDI_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_32_er_pcix(void)
+{
+ uint res = DX |= OPER_PCIX_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_32_er_i(void)
+{
+ uint res = DX |= OPER_I_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_8_re_ai(void)
+{
+ uint ea = EA_AY_AI_8();
+ uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_8_re_pi(void)
+{
+ uint ea = EA_AY_PI_8();
+ uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_8_re_pi7(void)
+{
+ uint ea = EA_A7_PI_8();
+ uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_8_re_pd(void)
+{
+ uint ea = EA_AY_PD_8();
+ uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_8_re_pd7(void)
+{
+ uint ea = EA_A7_PD_8();
+ uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_8_re_di(void)
+{
+ uint ea = EA_AY_DI_8();
+ uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_8_re_ix(void)
+{
+ uint ea = EA_AY_IX_8();
+ uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_8_re_aw(void)
+{
+ uint ea = EA_AW_8();
+ uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_8_re_al(void)
+{
+ uint ea = EA_AL_8();
+ uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_16_re_ai(void)
+{
+ uint ea = EA_AY_AI_16();
+ uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_16_re_pi(void)
+{
+ uint ea = EA_AY_PI_16();
+ uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_16_re_pd(void)
+{
+ uint ea = EA_AY_PD_16();
+ uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_16_re_di(void)
+{
+ uint ea = EA_AY_DI_16();
+ uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_16_re_ix(void)
+{
+ uint ea = EA_AY_IX_16();
+ uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_16_re_aw(void)
+{
+ uint ea = EA_AW_16();
+ uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_16_re_al(void)
+{
+ uint ea = EA_AL_16();
+ uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_32_re_ai(void)
+{
+ uint ea = EA_AY_AI_32();
+ uint res = DX | m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_32_re_pi(void)
+{
+ uint ea = EA_AY_PI_32();
+ uint res = DX | m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_32_re_pd(void)
+{
+ uint ea = EA_AY_PD_32();
+ uint res = DX | m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_32_re_di(void)
+{
+ uint ea = EA_AY_DI_32();
+ uint res = DX | m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_32_re_ix(void)
+{
+ uint ea = EA_AY_IX_32();
+ uint res = DX | m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_32_re_aw(void)
+{
+ uint ea = EA_AW_32();
+ uint res = DX | m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_or_32_re_al(void)
+{
+ uint ea = EA_AL_32();
+ uint res = DX | m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_8_d(void)
+{
+ uint res = MASK_OUT_ABOVE_8((DY |= OPER_I_8()));
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_8_ai(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_AI_8();
+ uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_8_pi(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_PI_8();
+ uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_8_pi7(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_A7_PI_8();
+ uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_8_pd(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_PD_8();
+ uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_8_pd7(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_A7_PD_8();
+ uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_8_di(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_DI_8();
+ uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_8_ix(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_IX_8();
+ uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_8_aw(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AW_8();
+ uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_8_al(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AL_8();
+ uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_16_d(void)
+{
+ uint res = MASK_OUT_ABOVE_16(DY |= OPER_I_16());
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_16_ai(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_AI_16();
+ uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_16_pi(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_PI_16();
+ uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_16_pd(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_PD_16();
+ uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_16_di(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_DI_16();
+ uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_16_ix(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_IX_16();
+ uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_16_aw(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AW_16();
+ uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_16_al(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AL_16();
+ uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_32_d(void)
+{
+ uint res = DY |= OPER_I_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_32_ai(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_AI_32();
+ uint res = src | m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_32_pi(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_PI_32();
+ uint res = src | m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_32_pd(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_PD_32();
+ uint res = src | m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_32_di(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_DI_32();
+ uint res = src | m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_32_ix(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_IX_32();
+ uint res = src | m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_32_aw(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AW_32();
+ uint res = src | m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_32_al(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AL_32();
+ uint res = src | m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ori_16_toc(void)
+{
+ m68ki_set_ccr(m68ki_get_ccr() | OPER_I_16());
+}
+
+
+void m68k_op_ori_16_tos(void)
+{
+ if(FLAG_S)
+ {
+ uint src = OPER_I_16();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_set_sr(m68ki_get_sr() | src);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_pack_16_rr(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ /* Note: DX and DY are reversed in Motorola's docs */
+ uint src = DY + OPER_I_16();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | ((src >> 4) & 0x00f0) | (src & 0x000f);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_pack_16_mm_ax7(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ /* Note: AX and AY are reversed in Motorola's docs */
+ uint ea_src = EA_AY_PD_8();
+ uint src = m68ki_read_8(ea_src);
+ ea_src = EA_AY_PD_8();
+ src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();
+
+ m68ki_write_8(EA_A7_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_pack_16_mm_ay7(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ /* Note: AX and AY are reversed in Motorola's docs */
+ uint ea_src = EA_A7_PD_8();
+ uint src = m68ki_read_8(ea_src);
+ ea_src = EA_A7_PD_8();
+ src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();
+
+ m68ki_write_8(EA_AX_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_pack_16_mm_axy7(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint ea_src = EA_A7_PD_8();
+ uint src = m68ki_read_8(ea_src);
+ ea_src = EA_A7_PD_8();
+ src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();
+
+ m68ki_write_8(EA_A7_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_pack_16_mm(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ /* Note: AX and AY are reversed in Motorola's docs */
+ uint ea_src = EA_AY_PD_8();
+ uint src = m68ki_read_8(ea_src);
+ ea_src = EA_AY_PD_8();
+ src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();
+
+ m68ki_write_8(EA_AX_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_pea_32_ai(void)
+{
+ uint ea = EA_AY_AI_32();
+
+ m68ki_push_32(ea);
+}
+
+
+void m68k_op_pea_32_di(void)
+{
+ uint ea = EA_AY_DI_32();
+
+ m68ki_push_32(ea);
+}
+
+
+void m68k_op_pea_32_ix(void)
+{
+ uint ea = EA_AY_IX_32();
+
+ m68ki_push_32(ea);
+}
+
+
+void m68k_op_pea_32_aw(void)
+{
+ uint ea = EA_AW_32();
+
+ m68ki_push_32(ea);
+}
+
+
+void m68k_op_pea_32_al(void)
+{
+ uint ea = EA_AL_32();
+
+ m68ki_push_32(ea);
+}
+
+
+void m68k_op_pea_32_pcdi(void)
+{
+ uint ea = EA_PCDI_32();
+
+ m68ki_push_32(ea);
+}
+
+
+void m68k_op_pea_32_pcix(void)
+{
+ uint ea = EA_PCIX_32();
+
+ m68ki_push_32(ea);
+}
+
+
+void m68k_op_reset(void)
+{
+ if(FLAG_S)
+ {
+ m68ki_output_reset(); /* auto-disable (see m68kcpu.h) */
+ USE_CYCLES(CYC_RESET);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_ror_8_s(void)
+{
+ uint* r_dst = &DY;
+ uint orig_shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint shift = orig_shift & 7;
+ uint src = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = ROR_8(src, shift);
+
+ if(orig_shift != 0)
+ USE_CYCLES(orig_shift<> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = ROR_16(src, shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 9) - 1) & 7) + 1;
+ uint64 src = *r_dst;
+ uint res = ROR_32(src, shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> ((shift - 1) & 15)) << 8;
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_16(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ror_32_r(void)
+{
+ uint* r_dst = &DY;
+ uint orig_shift = DX & 0x3f;
+ uint shift = orig_shift & 31;
+ uint64 src = *r_dst;
+ uint res = ROR_32(src, shift);
+
+ if(orig_shift != 0)
+ {
+ USE_CYCLES(orig_shift<> ((shift - 1) & 31)) << 8;
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_32(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ror_16_ai(void)
+{
+ uint ea = EA_AY_AI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = ROR_16(src, 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = src << 8;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ror_16_pi(void)
+{
+ uint ea = EA_AY_PI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = ROR_16(src, 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = src << 8;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ror_16_pd(void)
+{
+ uint ea = EA_AY_PD_16();
+ uint src = m68ki_read_16(ea);
+ uint res = ROR_16(src, 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = src << 8;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ror_16_di(void)
+{
+ uint ea = EA_AY_DI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = ROR_16(src, 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = src << 8;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ror_16_ix(void)
+{
+ uint ea = EA_AY_IX_16();
+ uint src = m68ki_read_16(ea);
+ uint res = ROR_16(src, 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = src << 8;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ror_16_aw(void)
+{
+ uint ea = EA_AW_16();
+ uint src = m68ki_read_16(ea);
+ uint res = ROR_16(src, 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = src << 8;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_ror_16_al(void)
+{
+ uint ea = EA_AL_16();
+ uint src = m68ki_read_16(ea);
+ uint res = ROR_16(src, 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = src << 8;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_rol_8_s(void)
+{
+ uint* r_dst = &DY;
+ uint orig_shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint shift = orig_shift & 7;
+ uint src = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = ROL_8(src, shift);
+
+ if(orig_shift != 0)
+ USE_CYCLES(orig_shift<> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = ROL_16(src, shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> (8-shift);
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_rol_32_s(void)
+{
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint64 src = *r_dst;
+ uint res = ROL_32(src, shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> (24-shift);
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_rol_8_r(void)
+{
+ uint* r_dst = &DY;
+ uint orig_shift = DX & 0x3f;
+ uint shift = orig_shift & 7;
+ uint src = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = ROL_8(src, shift);
+
+ if(orig_shift != 0)
+ {
+ USE_CYCLES(orig_shift<> 8;
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+ FLAG_C = (src & 1)<<8;
+ FLAG_N = NFLAG_16(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_16(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_rol_32_r(void)
+{
+ uint* r_dst = &DY;
+ uint orig_shift = DX & 0x3f;
+ uint shift = orig_shift & 31;
+ uint64 src = *r_dst;
+ uint res = ROL_32(src, shift);
+
+ if(orig_shift != 0)
+ {
+ USE_CYCLES(orig_shift<> (32 - shift)) << 8;
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_32(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_rol_16_ai(void)
+{
+ uint ea = EA_AY_AI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = src >> 7;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_rol_16_pi(void)
+{
+ uint ea = EA_AY_PI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = src >> 7;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_rol_16_pd(void)
+{
+ uint ea = EA_AY_PD_16();
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = src >> 7;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_rol_16_di(void)
+{
+ uint ea = EA_AY_DI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = src >> 7;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_rol_16_ix(void)
+{
+ uint ea = EA_AY_IX_16();
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = src >> 7;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_rol_16_aw(void)
+{
+ uint ea = EA_AW_16();
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = src >> 7;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_rol_16_al(void)
+{
+ uint ea = EA_AL_16();
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = src >> 7;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_roxr_8_s(void)
+{
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = ROR_9(src | (XFLAG_AS_1() << 8), shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = ROR_17(src | (XFLAG_AS_1() << 16), shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_roxr_32_s(void)
+{
+#if M68K_USE_64_BIT
+
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint64 src = *r_dst;
+ uint64 res = src | (((uint64)XFLAG_AS_1()) << 32);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 24;
+ res = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = res;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+
+#else
+
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint src = *r_dst;
+ uint res = MASK_OUT_ABOVE_32((ROR_33(src, shift) & ~(1 << (32 - shift))) | (XFLAG_AS_1() << (32 - shift)));
+ uint new_x_flag = src & (1 << (shift - 1));
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = FLAG_X;
+ FLAG_N = NFLAG_16(*r_dst);
+ FLAG_Z = MASK_OUT_ABOVE_16(*r_dst);
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_roxr_32_r(void)
+{
+#if M68K_USE_64_BIT
+
+ uint* r_dst = &DY;
+ uint orig_shift = DX & 0x3f;
+
+ if(orig_shift != 0)
+ {
+ uint shift = orig_shift % 33;
+ uint64 src = *r_dst;
+ uint64 res = src | (((uint64)XFLAG_AS_1()) << 32);
+
+ res = ROR_33_64(res, shift);
+
+ USE_CYCLES(orig_shift<> 24;
+ res = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = FLAG_X;
+ FLAG_N = NFLAG_32(*r_dst);
+ FLAG_Z = *r_dst;
+ FLAG_V = VFLAG_CLEAR;
+
+#else
+
+ uint* r_dst = &DY;
+ uint orig_shift = DX & 0x3f;
+ uint shift = orig_shift % 33;
+ uint src = *r_dst;
+ uint res = MASK_OUT_ABOVE_32((ROR_33(src, shift) & ~(1 << (32 - shift))) | (XFLAG_AS_1() << (32 - shift)));
+ uint new_x_flag = src & (1 << (shift - 1));
+
+ if(orig_shift != 0)
+ USE_CYCLES(orig_shift<> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_roxr_16_pi(void)
+{
+ uint ea = EA_AY_PI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1);
+
+ FLAG_C = FLAG_X = res >> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_roxr_16_pd(void)
+{
+ uint ea = EA_AY_PD_16();
+ uint src = m68ki_read_16(ea);
+ uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1);
+
+ FLAG_C = FLAG_X = res >> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_roxr_16_di(void)
+{
+ uint ea = EA_AY_DI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1);
+
+ FLAG_C = FLAG_X = res >> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_roxr_16_ix(void)
+{
+ uint ea = EA_AY_IX_16();
+ uint src = m68ki_read_16(ea);
+ uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1);
+
+ FLAG_C = FLAG_X = res >> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_roxr_16_aw(void)
+{
+ uint ea = EA_AW_16();
+ uint src = m68ki_read_16(ea);
+ uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1);
+
+ FLAG_C = FLAG_X = res >> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_roxr_16_al(void)
+{
+ uint ea = EA_AL_16();
+ uint src = m68ki_read_16(ea);
+ uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1);
+
+ FLAG_C = FLAG_X = res >> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_roxl_8_s(void)
+{
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = ROL_9(src | (XFLAG_AS_1() << 8), shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = ROL_17(src | (XFLAG_AS_1() << 16), shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_roxl_32_s(void)
+{
+#if M68K_USE_64_BIT
+
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint64 src = *r_dst;
+ uint64 res = src | (((uint64)XFLAG_AS_1()) << 32);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 24;
+ res = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = res;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+
+#else
+
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint src = *r_dst;
+ uint res = MASK_OUT_ABOVE_32((ROL_33(src, shift) & ~(1 << (shift - 1))) | (XFLAG_AS_1() << (shift - 1)));
+ uint new_x_flag = src & (1 << (32 - shift));
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = FLAG_X;
+ FLAG_N = NFLAG_16(*r_dst);
+ FLAG_Z = MASK_OUT_ABOVE_16(*r_dst);
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_roxl_32_r(void)
+{
+#if M68K_USE_64_BIT
+
+ uint* r_dst = &DY;
+ uint orig_shift = DX & 0x3f;
+
+ if(orig_shift != 0)
+ {
+ uint shift = orig_shift % 33;
+ uint64 src = *r_dst;
+ uint64 res = src | (((uint64)XFLAG_AS_1()) << 32);
+
+ res = ROL_33_64(res, shift);
+
+ USE_CYCLES(orig_shift<> 24;
+ res = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = FLAG_X;
+ FLAG_N = NFLAG_32(*r_dst);
+ FLAG_Z = *r_dst;
+ FLAG_V = VFLAG_CLEAR;
+
+#else
+
+ uint* r_dst = &DY;
+ uint orig_shift = DX & 0x3f;
+ uint shift = orig_shift % 33;
+ uint src = *r_dst;
+ uint res = MASK_OUT_ABOVE_32((ROL_33(src, shift) & ~(1 << (shift - 1))) | (XFLAG_AS_1() << (shift - 1)));
+ uint new_x_flag = src & (1 << (32 - shift));
+
+ if(orig_shift != 0)
+ USE_CYCLES(orig_shift<> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_roxl_16_pi(void)
+{
+ uint ea = EA_AY_PI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1);
+
+ FLAG_C = FLAG_X = res >> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_roxl_16_pd(void)
+{
+ uint ea = EA_AY_PD_16();
+ uint src = m68ki_read_16(ea);
+ uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1);
+
+ FLAG_C = FLAG_X = res >> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_roxl_16_di(void)
+{
+ uint ea = EA_AY_DI_16();
+ uint src = m68ki_read_16(ea);
+ uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1);
+
+ FLAG_C = FLAG_X = res >> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_roxl_16_ix(void)
+{
+ uint ea = EA_AY_IX_16();
+ uint src = m68ki_read_16(ea);
+ uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1);
+
+ FLAG_C = FLAG_X = res >> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_roxl_16_aw(void)
+{
+ uint ea = EA_AW_16();
+ uint src = m68ki_read_16(ea);
+ uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1);
+
+ FLAG_C = FLAG_X = res >> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_roxl_16_al(void)
+{
+ uint ea = EA_AL_16();
+ uint src = m68ki_read_16(ea);
+ uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1);
+
+ FLAG_C = FLAG_X = res >> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_rtd_32(void)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ uint new_pc = m68ki_pull_32();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16()));
+ m68ki_jump(new_pc);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_rte_32(void)
+{
+ if(FLAG_S)
+ {
+ uint new_sr;
+ uint new_pc;
+ uint format_word;
+
+ m68ki_rte_callback(); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+
+ if(CPU_TYPE_IS_000(CPU_TYPE))
+ {
+ new_sr = m68ki_pull_16();
+ new_pc = m68ki_pull_32();
+ m68ki_jump(new_pc);
+ m68ki_set_sr(new_sr);
+
+ CPU_INSTR_MODE = INSTRUCTION_YES;
+ CPU_RUN_MODE = RUN_MODE_NORMAL;
+
+ return;
+ }
+
+ if(CPU_TYPE_IS_010(CPU_TYPE))
+ {
+ format_word = m68ki_read_16(REG_A[7]+6) >> 12;
+ if(format_word == 0)
+ {
+ new_sr = m68ki_pull_16();
+ new_pc = m68ki_pull_32();
+ m68ki_fake_pull_16(); /* format word */
+ m68ki_jump(new_pc);
+ m68ki_set_sr(new_sr);
+ CPU_INSTR_MODE = INSTRUCTION_YES;
+ CPU_RUN_MODE = RUN_MODE_NORMAL;
+ return;
+ }
+ CPU_INSTR_MODE = INSTRUCTION_YES;
+ CPU_RUN_MODE = RUN_MODE_NORMAL;
+ /* Not handling bus fault (9) */
+ m68ki_exception_format_error();
+ return;
+ }
+
+ /* Otherwise it's 020 */
+rte_loop:
+ format_word = m68ki_read_16(REG_A[7]+6) >> 12;
+ switch(format_word)
+ {
+ case 0: /* Normal */
+ new_sr = m68ki_pull_16();
+ new_pc = m68ki_pull_32();
+ m68ki_fake_pull_16(); /* format word */
+ m68ki_jump(new_pc);
+ m68ki_set_sr(new_sr);
+ CPU_INSTR_MODE = INSTRUCTION_YES;
+ CPU_RUN_MODE = RUN_MODE_NORMAL;
+ return;
+ case 1: /* Throwaway */
+ new_sr = m68ki_pull_16();
+ m68ki_fake_pull_32(); /* program counter */
+ m68ki_fake_pull_16(); /* format word */
+ m68ki_set_sr_noint(new_sr);
+ goto rte_loop;
+ case 2: /* Trap */
+ new_sr = m68ki_pull_16();
+ new_pc = m68ki_pull_32();
+ m68ki_fake_pull_16(); /* format word */
+ m68ki_fake_pull_32(); /* address */
+ m68ki_jump(new_pc);
+ m68ki_set_sr(new_sr);
+ CPU_INSTR_MODE = INSTRUCTION_YES;
+ CPU_RUN_MODE = RUN_MODE_NORMAL;
+ return;
+ }
+ /* Not handling long or short bus fault */
+ CPU_INSTR_MODE = INSTRUCTION_YES;
+ CPU_RUN_MODE = RUN_MODE_NORMAL;
+ m68ki_exception_format_error();
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_rtm_32(void)
+{
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ {
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
+ m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_rtr_32(void)
+{
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_set_ccr(m68ki_pull_16());
+ m68ki_jump(m68ki_pull_32());
+}
+
+
+void m68k_op_rts_32(void)
+{
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_jump(m68ki_pull_32());
+}
+
+
+void m68k_op_sbcd_8_rr(void)
+{
+ uint* r_dst = &DX;
+ uint src = DY;
+ uint dst = *r_dst;
+ uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
+
+// FLAG_V = ~res; /* Undefined V behavior */
+ FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to assume cleared. */
+
+ if(res > 9)
+ res -= 6;
+ res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
+ if(res > 0x99)
+ {
+ res += 0xa0;
+ FLAG_X = FLAG_C = CFLAG_SET;
+ FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
+ }
+ else
+ FLAG_N = FLAG_X = FLAG_C = 0;
+
+ res = MASK_OUT_ABOVE_8(res);
+
+// FLAG_V &= res; /* Undefined V behavior part II */
+// FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+ FLAG_Z |= res;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+}
+
+
+void m68k_op_sbcd_8_mm_ax7(void)
+{
+ uint src = OPER_AY_PD_8();
+ uint ea = EA_A7_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
+
+// FLAG_V = ~res; /* Undefined V behavior */
+ FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
+
+ if(res > 9)
+ res -= 6;
+ res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
+ if(res > 0x99)
+ {
+ res += 0xa0;
+ FLAG_X = FLAG_C = CFLAG_SET;
+ FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
+ }
+ else
+ FLAG_N = FLAG_X = FLAG_C = 0;
+
+ res = MASK_OUT_ABOVE_8(res);
+
+// FLAG_V &= res; /* Undefined V behavior part II */
+// FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_sbcd_8_mm_ay7(void)
+{
+ uint src = OPER_A7_PD_8();
+ uint ea = EA_AX_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
+
+// FLAG_V = ~res; /* Undefined V behavior */
+ FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
+
+ if(res > 9)
+ res -= 6;
+ res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
+ if(res > 0x99)
+ {
+ res += 0xa0;
+ FLAG_X = FLAG_C = CFLAG_SET;
+ FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
+ }
+ else
+ FLAG_N = FLAG_X = FLAG_C = 0;
+
+ res = MASK_OUT_ABOVE_8(res);
+
+// FLAG_V &= res; /* Undefined V behavior part II */
+// FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_sbcd_8_mm_axy7(void)
+{
+ uint src = OPER_A7_PD_8();
+ uint ea = EA_A7_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
+
+// FLAG_V = ~res; /* Undefined V behavior */
+ FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
+
+ if(res > 9)
+ res -= 6;
+ res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
+ if(res > 0x99)
+ {
+ res += 0xa0;
+ FLAG_X = FLAG_C = CFLAG_SET;
+ FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
+ }
+ else
+ FLAG_N = FLAG_X = FLAG_C = 0;
+
+ res = MASK_OUT_ABOVE_8(res);
+
+// FLAG_V &= res; /* Undefined V behavior part II */
+// FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_sbcd_8_mm(void)
+{
+ uint src = OPER_AY_PD_8();
+ uint ea = EA_AX_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
+
+// FLAG_V = ~res; /* Undefined V behavior */
+ FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
+
+ if(res > 9)
+ res -= 6;
+ res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
+ if(res > 0x99)
+ {
+ res += 0xa0;
+ FLAG_X = FLAG_C = CFLAG_SET;
+ FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
+ }
+ else
+ FLAG_N = FLAG_X = FLAG_C = 0;
+
+ res = MASK_OUT_ABOVE_8(res);
+
+// FLAG_V &= res; /* Undefined V behavior part II */
+// FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_st_8_d(void)
+{
+ DY |= 0xff;
+}
+
+
+void m68k_op_st_8_ai(void)
+{
+ m68ki_write_8(EA_AY_AI_8(), 0xff);
+}
+
+
+void m68k_op_st_8_pi(void)
+{
+ m68ki_write_8(EA_AY_PI_8(), 0xff);
+}
+
+
+void m68k_op_st_8_pi7(void)
+{
+ m68ki_write_8(EA_A7_PI_8(), 0xff);
+}
+
+
+void m68k_op_st_8_pd(void)
+{
+ m68ki_write_8(EA_AY_PD_8(), 0xff);
+}
+
+
+void m68k_op_st_8_pd7(void)
+{
+ m68ki_write_8(EA_A7_PD_8(), 0xff);
+}
+
+
+void m68k_op_st_8_di(void)
+{
+ m68ki_write_8(EA_AY_DI_8(), 0xff);
+}
+
+
+void m68k_op_st_8_ix(void)
+{
+ m68ki_write_8(EA_AY_IX_8(), 0xff);
+}
+
+
+void m68k_op_st_8_aw(void)
+{
+ m68ki_write_8(EA_AW_8(), 0xff);
+}
+
+
+void m68k_op_st_8_al(void)
+{
+ m68ki_write_8(EA_AL_8(), 0xff);
+}
+
+
+void m68k_op_sf_8_d(void)
+{
+ DY &= 0xffffff00;
+}
+
+
+void m68k_op_sf_8_ai(void)
+{
+ m68ki_write_8(EA_AY_AI_8(), 0);
+}
+
+
+void m68k_op_sf_8_pi(void)
+{
+ m68ki_write_8(EA_AY_PI_8(), 0);
+}
+
+
+void m68k_op_sf_8_pi7(void)
+{
+ m68ki_write_8(EA_A7_PI_8(), 0);
+}
+
+
+void m68k_op_sf_8_pd(void)
+{
+ m68ki_write_8(EA_AY_PD_8(), 0);
+}
+
+
+void m68k_op_sf_8_pd7(void)
+{
+ m68ki_write_8(EA_A7_PD_8(), 0);
+}
+
+
+void m68k_op_sf_8_di(void)
+{
+ m68ki_write_8(EA_AY_DI_8(), 0);
+}
+
+
+void m68k_op_sf_8_ix(void)
+{
+ m68ki_write_8(EA_AY_IX_8(), 0);
+}
+
+
+void m68k_op_sf_8_aw(void)
+{
+ m68ki_write_8(EA_AW_8(), 0);
+}
+
+
+void m68k_op_sf_8_al(void)
+{
+ m68ki_write_8(EA_AL_8(), 0);
+}
+
+
+void m68k_op_shi_8_d(void)
+{
+ if(COND_HI())
+ {
+ DY |= 0xff;
+ USE_CYCLES(CYC_SCC_R_TRUE);
+ return;
+ }
+ DY &= 0xffffff00;
+}
+
+
+void m68k_op_sls_8_d(void)
+{
+ if(COND_LS())
+ {
+ DY |= 0xff;
+ USE_CYCLES(CYC_SCC_R_TRUE);
+ return;
+ }
+ DY &= 0xffffff00;
+}
+
+
+void m68k_op_scc_8_d(void)
+{
+ if(COND_CC())
+ {
+ DY |= 0xff;
+ USE_CYCLES(CYC_SCC_R_TRUE);
+ return;
+ }
+ DY &= 0xffffff00;
+}
+
+
+void m68k_op_scs_8_d(void)
+{
+ if(COND_CS())
+ {
+ DY |= 0xff;
+ USE_CYCLES(CYC_SCC_R_TRUE);
+ return;
+ }
+ DY &= 0xffffff00;
+}
+
+
+void m68k_op_sne_8_d(void)
+{
+ if(COND_NE())
+ {
+ DY |= 0xff;
+ USE_CYCLES(CYC_SCC_R_TRUE);
+ return;
+ }
+ DY &= 0xffffff00;
+}
+
+
+void m68k_op_seq_8_d(void)
+{
+ if(COND_EQ())
+ {
+ DY |= 0xff;
+ USE_CYCLES(CYC_SCC_R_TRUE);
+ return;
+ }
+ DY &= 0xffffff00;
+}
+
+
+void m68k_op_svc_8_d(void)
+{
+ if(COND_VC())
+ {
+ DY |= 0xff;
+ USE_CYCLES(CYC_SCC_R_TRUE);
+ return;
+ }
+ DY &= 0xffffff00;
+}
+
+
+void m68k_op_svs_8_d(void)
+{
+ if(COND_VS())
+ {
+ DY |= 0xff;
+ USE_CYCLES(CYC_SCC_R_TRUE);
+ return;
+ }
+ DY &= 0xffffff00;
+}
+
+
+void m68k_op_spl_8_d(void)
+{
+ if(COND_PL())
+ {
+ DY |= 0xff;
+ USE_CYCLES(CYC_SCC_R_TRUE);
+ return;
+ }
+ DY &= 0xffffff00;
+}
+
+
+void m68k_op_smi_8_d(void)
+{
+ if(COND_MI())
+ {
+ DY |= 0xff;
+ USE_CYCLES(CYC_SCC_R_TRUE);
+ return;
+ }
+ DY &= 0xffffff00;
+}
+
+
+void m68k_op_sge_8_d(void)
+{
+ if(COND_GE())
+ {
+ DY |= 0xff;
+ USE_CYCLES(CYC_SCC_R_TRUE);
+ return;
+ }
+ DY &= 0xffffff00;
+}
+
+
+void m68k_op_slt_8_d(void)
+{
+ if(COND_LT())
+ {
+ DY |= 0xff;
+ USE_CYCLES(CYC_SCC_R_TRUE);
+ return;
+ }
+ DY &= 0xffffff00;
+}
+
+
+void m68k_op_sgt_8_d(void)
+{
+ if(COND_GT())
+ {
+ DY |= 0xff;
+ USE_CYCLES(CYC_SCC_R_TRUE);
+ return;
+ }
+ DY &= 0xffffff00;
+}
+
+
+void m68k_op_sle_8_d(void)
+{
+ if(COND_LE())
+ {
+ DY |= 0xff;
+ USE_CYCLES(CYC_SCC_R_TRUE);
+ return;
+ }
+ DY &= 0xffffff00;
+}
+
+
+void m68k_op_shi_8_ai(void)
+{
+ m68ki_write_8(EA_AY_AI_8(), COND_HI() ? 0xff : 0);
+}
+
+
+void m68k_op_shi_8_pi(void)
+{
+ m68ki_write_8(EA_AY_PI_8(), COND_HI() ? 0xff : 0);
+}
+
+
+void m68k_op_shi_8_pi7(void)
+{
+ m68ki_write_8(EA_A7_PI_8(), COND_HI() ? 0xff : 0);
+}
+
+
+void m68k_op_shi_8_pd(void)
+{
+ m68ki_write_8(EA_AY_PD_8(), COND_HI() ? 0xff : 0);
+}
+
+
+void m68k_op_shi_8_pd7(void)
+{
+ m68ki_write_8(EA_A7_PD_8(), COND_HI() ? 0xff : 0);
+}
+
+
+void m68k_op_shi_8_di(void)
+{
+ m68ki_write_8(EA_AY_DI_8(), COND_HI() ? 0xff : 0);
+}
+
+
+void m68k_op_shi_8_ix(void)
+{
+ m68ki_write_8(EA_AY_IX_8(), COND_HI() ? 0xff : 0);
+}
+
+
+void m68k_op_shi_8_aw(void)
+{
+ m68ki_write_8(EA_AW_8(), COND_HI() ? 0xff : 0);
+}
+
+
+void m68k_op_shi_8_al(void)
+{
+ m68ki_write_8(EA_AL_8(), COND_HI() ? 0xff : 0);
+}
+
+
+void m68k_op_sls_8_ai(void)
+{
+ m68ki_write_8(EA_AY_AI_8(), COND_LS() ? 0xff : 0);
+}
+
+
+void m68k_op_sls_8_pi(void)
+{
+ m68ki_write_8(EA_AY_PI_8(), COND_LS() ? 0xff : 0);
+}
+
+
+void m68k_op_sls_8_pi7(void)
+{
+ m68ki_write_8(EA_A7_PI_8(), COND_LS() ? 0xff : 0);
+}
+
+
+void m68k_op_sls_8_pd(void)
+{
+ m68ki_write_8(EA_AY_PD_8(), COND_LS() ? 0xff : 0);
+}
+
+
+void m68k_op_sls_8_pd7(void)
+{
+ m68ki_write_8(EA_A7_PD_8(), COND_LS() ? 0xff : 0);
+}
+
+
+void m68k_op_sls_8_di(void)
+{
+ m68ki_write_8(EA_AY_DI_8(), COND_LS() ? 0xff : 0);
+}
+
+
+void m68k_op_sls_8_ix(void)
+{
+ m68ki_write_8(EA_AY_IX_8(), COND_LS() ? 0xff : 0);
+}
+
+
+void m68k_op_sls_8_aw(void)
+{
+ m68ki_write_8(EA_AW_8(), COND_LS() ? 0xff : 0);
+}
+
+
+void m68k_op_sls_8_al(void)
+{
+ m68ki_write_8(EA_AL_8(), COND_LS() ? 0xff : 0);
+}
+
+
+void m68k_op_scc_8_ai(void)
+{
+ m68ki_write_8(EA_AY_AI_8(), COND_CC() ? 0xff : 0);
+}
+
+
+void m68k_op_scc_8_pi(void)
+{
+ m68ki_write_8(EA_AY_PI_8(), COND_CC() ? 0xff : 0);
+}
+
+
+void m68k_op_scc_8_pi7(void)
+{
+ m68ki_write_8(EA_A7_PI_8(), COND_CC() ? 0xff : 0);
+}
+
+
+void m68k_op_scc_8_pd(void)
+{
+ m68ki_write_8(EA_AY_PD_8(), COND_CC() ? 0xff : 0);
+}
+
+
+void m68k_op_scc_8_pd7(void)
+{
+ m68ki_write_8(EA_A7_PD_8(), COND_CC() ? 0xff : 0);
+}
+
+
+void m68k_op_scc_8_di(void)
+{
+ m68ki_write_8(EA_AY_DI_8(), COND_CC() ? 0xff : 0);
+}
+
+
+void m68k_op_scc_8_ix(void)
+{
+ m68ki_write_8(EA_AY_IX_8(), COND_CC() ? 0xff : 0);
+}
+
+
+void m68k_op_scc_8_aw(void)
+{
+ m68ki_write_8(EA_AW_8(), COND_CC() ? 0xff : 0);
+}
+
+
+void m68k_op_scc_8_al(void)
+{
+ m68ki_write_8(EA_AL_8(), COND_CC() ? 0xff : 0);
+}
+
+
+void m68k_op_scs_8_ai(void)
+{
+ m68ki_write_8(EA_AY_AI_8(), COND_CS() ? 0xff : 0);
+}
+
+
+void m68k_op_scs_8_pi(void)
+{
+ m68ki_write_8(EA_AY_PI_8(), COND_CS() ? 0xff : 0);
+}
+
+
+void m68k_op_scs_8_pi7(void)
+{
+ m68ki_write_8(EA_A7_PI_8(), COND_CS() ? 0xff : 0);
+}
+
+
+void m68k_op_scs_8_pd(void)
+{
+ m68ki_write_8(EA_AY_PD_8(), COND_CS() ? 0xff : 0);
+}
+
+
+void m68k_op_scs_8_pd7(void)
+{
+ m68ki_write_8(EA_A7_PD_8(), COND_CS() ? 0xff : 0);
+}
+
+
+void m68k_op_scs_8_di(void)
+{
+ m68ki_write_8(EA_AY_DI_8(), COND_CS() ? 0xff : 0);
+}
+
+
+void m68k_op_scs_8_ix(void)
+{
+ m68ki_write_8(EA_AY_IX_8(), COND_CS() ? 0xff : 0);
+}
+
+
+void m68k_op_scs_8_aw(void)
+{
+ m68ki_write_8(EA_AW_8(), COND_CS() ? 0xff : 0);
+}
+
+
+void m68k_op_scs_8_al(void)
+{
+ m68ki_write_8(EA_AL_8(), COND_CS() ? 0xff : 0);
+}
+
+
+void m68k_op_sne_8_ai(void)
+{
+ m68ki_write_8(EA_AY_AI_8(), COND_NE() ? 0xff : 0);
+}
+
+
+void m68k_op_sne_8_pi(void)
+{
+ m68ki_write_8(EA_AY_PI_8(), COND_NE() ? 0xff : 0);
+}
+
+
+void m68k_op_sne_8_pi7(void)
+{
+ m68ki_write_8(EA_A7_PI_8(), COND_NE() ? 0xff : 0);
+}
+
+
+void m68k_op_sne_8_pd(void)
+{
+ m68ki_write_8(EA_AY_PD_8(), COND_NE() ? 0xff : 0);
+}
+
+
+void m68k_op_sne_8_pd7(void)
+{
+ m68ki_write_8(EA_A7_PD_8(), COND_NE() ? 0xff : 0);
+}
+
+
+void m68k_op_sne_8_di(void)
+{
+ m68ki_write_8(EA_AY_DI_8(), COND_NE() ? 0xff : 0);
+}
+
+
+void m68k_op_sne_8_ix(void)
+{
+ m68ki_write_8(EA_AY_IX_8(), COND_NE() ? 0xff : 0);
+}
+
+
+void m68k_op_sne_8_aw(void)
+{
+ m68ki_write_8(EA_AW_8(), COND_NE() ? 0xff : 0);
+}
+
+
+void m68k_op_sne_8_al(void)
+{
+ m68ki_write_8(EA_AL_8(), COND_NE() ? 0xff : 0);
+}
+
+
+void m68k_op_seq_8_ai(void)
+{
+ m68ki_write_8(EA_AY_AI_8(), COND_EQ() ? 0xff : 0);
+}
+
+
+void m68k_op_seq_8_pi(void)
+{
+ m68ki_write_8(EA_AY_PI_8(), COND_EQ() ? 0xff : 0);
+}
+
+
+void m68k_op_seq_8_pi7(void)
+{
+ m68ki_write_8(EA_A7_PI_8(), COND_EQ() ? 0xff : 0);
+}
+
+
+void m68k_op_seq_8_pd(void)
+{
+ m68ki_write_8(EA_AY_PD_8(), COND_EQ() ? 0xff : 0);
+}
+
+
+void m68k_op_seq_8_pd7(void)
+{
+ m68ki_write_8(EA_A7_PD_8(), COND_EQ() ? 0xff : 0);
+}
+
+
+void m68k_op_seq_8_di(void)
+{
+ m68ki_write_8(EA_AY_DI_8(), COND_EQ() ? 0xff : 0);
+}
+
+
+void m68k_op_seq_8_ix(void)
+{
+ m68ki_write_8(EA_AY_IX_8(), COND_EQ() ? 0xff : 0);
+}
+
+
+void m68k_op_seq_8_aw(void)
+{
+ m68ki_write_8(EA_AW_8(), COND_EQ() ? 0xff : 0);
+}
+
+
+void m68k_op_seq_8_al(void)
+{
+ m68ki_write_8(EA_AL_8(), COND_EQ() ? 0xff : 0);
+}
+
+
+void m68k_op_svc_8_ai(void)
+{
+ m68ki_write_8(EA_AY_AI_8(), COND_VC() ? 0xff : 0);
+}
+
+
+void m68k_op_svc_8_pi(void)
+{
+ m68ki_write_8(EA_AY_PI_8(), COND_VC() ? 0xff : 0);
+}
+
+
+void m68k_op_svc_8_pi7(void)
+{
+ m68ki_write_8(EA_A7_PI_8(), COND_VC() ? 0xff : 0);
+}
+
+
+void m68k_op_svc_8_pd(void)
+{
+ m68ki_write_8(EA_AY_PD_8(), COND_VC() ? 0xff : 0);
+}
+
+
+void m68k_op_svc_8_pd7(void)
+{
+ m68ki_write_8(EA_A7_PD_8(), COND_VC() ? 0xff : 0);
+}
+
+
+void m68k_op_svc_8_di(void)
+{
+ m68ki_write_8(EA_AY_DI_8(), COND_VC() ? 0xff : 0);
+}
+
+
+void m68k_op_svc_8_ix(void)
+{
+ m68ki_write_8(EA_AY_IX_8(), COND_VC() ? 0xff : 0);
+}
+
+
+void m68k_op_svc_8_aw(void)
+{
+ m68ki_write_8(EA_AW_8(), COND_VC() ? 0xff : 0);
+}
+
+
+void m68k_op_svc_8_al(void)
+{
+ m68ki_write_8(EA_AL_8(), COND_VC() ? 0xff : 0);
+}
+
+
+void m68k_op_svs_8_ai(void)
+{
+ m68ki_write_8(EA_AY_AI_8(), COND_VS() ? 0xff : 0);
+}
+
+
+void m68k_op_svs_8_pi(void)
+{
+ m68ki_write_8(EA_AY_PI_8(), COND_VS() ? 0xff : 0);
+}
+
+
+void m68k_op_svs_8_pi7(void)
+{
+ m68ki_write_8(EA_A7_PI_8(), COND_VS() ? 0xff : 0);
+}
+
+
+void m68k_op_svs_8_pd(void)
+{
+ m68ki_write_8(EA_AY_PD_8(), COND_VS() ? 0xff : 0);
+}
+
+
+void m68k_op_svs_8_pd7(void)
+{
+ m68ki_write_8(EA_A7_PD_8(), COND_VS() ? 0xff : 0);
+}
+
+
+void m68k_op_svs_8_di(void)
+{
+ m68ki_write_8(EA_AY_DI_8(), COND_VS() ? 0xff : 0);
+}
+
+
+void m68k_op_svs_8_ix(void)
+{
+ m68ki_write_8(EA_AY_IX_8(), COND_VS() ? 0xff : 0);
+}
+
+
+void m68k_op_svs_8_aw(void)
+{
+ m68ki_write_8(EA_AW_8(), COND_VS() ? 0xff : 0);
+}
+
+
+void m68k_op_svs_8_al(void)
+{
+ m68ki_write_8(EA_AL_8(), COND_VS() ? 0xff : 0);
+}
+
+
+void m68k_op_spl_8_ai(void)
+{
+ m68ki_write_8(EA_AY_AI_8(), COND_PL() ? 0xff : 0);
+}
+
+
+void m68k_op_spl_8_pi(void)
+{
+ m68ki_write_8(EA_AY_PI_8(), COND_PL() ? 0xff : 0);
+}
+
+
+void m68k_op_spl_8_pi7(void)
+{
+ m68ki_write_8(EA_A7_PI_8(), COND_PL() ? 0xff : 0);
+}
+
+
+void m68k_op_spl_8_pd(void)
+{
+ m68ki_write_8(EA_AY_PD_8(), COND_PL() ? 0xff : 0);
+}
+
+
+void m68k_op_spl_8_pd7(void)
+{
+ m68ki_write_8(EA_A7_PD_8(), COND_PL() ? 0xff : 0);
+}
+
+
+void m68k_op_spl_8_di(void)
+{
+ m68ki_write_8(EA_AY_DI_8(), COND_PL() ? 0xff : 0);
+}
+
+
+void m68k_op_spl_8_ix(void)
+{
+ m68ki_write_8(EA_AY_IX_8(), COND_PL() ? 0xff : 0);
+}
+
+
+void m68k_op_spl_8_aw(void)
+{
+ m68ki_write_8(EA_AW_8(), COND_PL() ? 0xff : 0);
+}
+
+
+void m68k_op_spl_8_al(void)
+{
+ m68ki_write_8(EA_AL_8(), COND_PL() ? 0xff : 0);
+}
+
+
+void m68k_op_smi_8_ai(void)
+{
+ m68ki_write_8(EA_AY_AI_8(), COND_MI() ? 0xff : 0);
+}
+
+
+void m68k_op_smi_8_pi(void)
+{
+ m68ki_write_8(EA_AY_PI_8(), COND_MI() ? 0xff : 0);
+}
+
+
+void m68k_op_smi_8_pi7(void)
+{
+ m68ki_write_8(EA_A7_PI_8(), COND_MI() ? 0xff : 0);
+}
+
+
+void m68k_op_smi_8_pd(void)
+{
+ m68ki_write_8(EA_AY_PD_8(), COND_MI() ? 0xff : 0);
+}
+
+
+void m68k_op_smi_8_pd7(void)
+{
+ m68ki_write_8(EA_A7_PD_8(), COND_MI() ? 0xff : 0);
+}
+
+
+void m68k_op_smi_8_di(void)
+{
+ m68ki_write_8(EA_AY_DI_8(), COND_MI() ? 0xff : 0);
+}
+
+
+void m68k_op_smi_8_ix(void)
+{
+ m68ki_write_8(EA_AY_IX_8(), COND_MI() ? 0xff : 0);
+}
+
+
+void m68k_op_smi_8_aw(void)
+{
+ m68ki_write_8(EA_AW_8(), COND_MI() ? 0xff : 0);
+}
+
+
+void m68k_op_smi_8_al(void)
+{
+ m68ki_write_8(EA_AL_8(), COND_MI() ? 0xff : 0);
+}
+
+
+void m68k_op_sge_8_ai(void)
+{
+ m68ki_write_8(EA_AY_AI_8(), COND_GE() ? 0xff : 0);
+}
+
+
+void m68k_op_sge_8_pi(void)
+{
+ m68ki_write_8(EA_AY_PI_8(), COND_GE() ? 0xff : 0);
+}
+
+
+void m68k_op_sge_8_pi7(void)
+{
+ m68ki_write_8(EA_A7_PI_8(), COND_GE() ? 0xff : 0);
+}
+
+
+void m68k_op_sge_8_pd(void)
+{
+ m68ki_write_8(EA_AY_PD_8(), COND_GE() ? 0xff : 0);
+}
+
+
+void m68k_op_sge_8_pd7(void)
+{
+ m68ki_write_8(EA_A7_PD_8(), COND_GE() ? 0xff : 0);
+}
+
+
+void m68k_op_sge_8_di(void)
+{
+ m68ki_write_8(EA_AY_DI_8(), COND_GE() ? 0xff : 0);
+}
+
+
+void m68k_op_sge_8_ix(void)
+{
+ m68ki_write_8(EA_AY_IX_8(), COND_GE() ? 0xff : 0);
+}
+
+
+void m68k_op_sge_8_aw(void)
+{
+ m68ki_write_8(EA_AW_8(), COND_GE() ? 0xff : 0);
+}
+
+
+void m68k_op_sge_8_al(void)
+{
+ m68ki_write_8(EA_AL_8(), COND_GE() ? 0xff : 0);
+}
+
+
+void m68k_op_slt_8_ai(void)
+{
+ m68ki_write_8(EA_AY_AI_8(), COND_LT() ? 0xff : 0);
+}
+
+
+void m68k_op_slt_8_pi(void)
+{
+ m68ki_write_8(EA_AY_PI_8(), COND_LT() ? 0xff : 0);
+}
+
+
+void m68k_op_slt_8_pi7(void)
+{
+ m68ki_write_8(EA_A7_PI_8(), COND_LT() ? 0xff : 0);
+}
+
+
+void m68k_op_slt_8_pd(void)
+{
+ m68ki_write_8(EA_AY_PD_8(), COND_LT() ? 0xff : 0);
+}
+
+
+void m68k_op_slt_8_pd7(void)
+{
+ m68ki_write_8(EA_A7_PD_8(), COND_LT() ? 0xff : 0);
+}
+
+
+void m68k_op_slt_8_di(void)
+{
+ m68ki_write_8(EA_AY_DI_8(), COND_LT() ? 0xff : 0);
+}
+
+
+void m68k_op_slt_8_ix(void)
+{
+ m68ki_write_8(EA_AY_IX_8(), COND_LT() ? 0xff : 0);
+}
+
+
+void m68k_op_slt_8_aw(void)
+{
+ m68ki_write_8(EA_AW_8(), COND_LT() ? 0xff : 0);
+}
+
+
+void m68k_op_slt_8_al(void)
+{
+ m68ki_write_8(EA_AL_8(), COND_LT() ? 0xff : 0);
+}
+
+
+void m68k_op_sgt_8_ai(void)
+{
+ m68ki_write_8(EA_AY_AI_8(), COND_GT() ? 0xff : 0);
+}
+
+
+void m68k_op_sgt_8_pi(void)
+{
+ m68ki_write_8(EA_AY_PI_8(), COND_GT() ? 0xff : 0);
+}
+
+
+void m68k_op_sgt_8_pi7(void)
+{
+ m68ki_write_8(EA_A7_PI_8(), COND_GT() ? 0xff : 0);
+}
+
+
+void m68k_op_sgt_8_pd(void)
+{
+ m68ki_write_8(EA_AY_PD_8(), COND_GT() ? 0xff : 0);
+}
+
+
+void m68k_op_sgt_8_pd7(void)
+{
+ m68ki_write_8(EA_A7_PD_8(), COND_GT() ? 0xff : 0);
+}
+
+
+void m68k_op_sgt_8_di(void)
+{
+ m68ki_write_8(EA_AY_DI_8(), COND_GT() ? 0xff : 0);
+}
+
+
+void m68k_op_sgt_8_ix(void)
+{
+ m68ki_write_8(EA_AY_IX_8(), COND_GT() ? 0xff : 0);
+}
+
+
+void m68k_op_sgt_8_aw(void)
+{
+ m68ki_write_8(EA_AW_8(), COND_GT() ? 0xff : 0);
+}
+
+
+void m68k_op_sgt_8_al(void)
+{
+ m68ki_write_8(EA_AL_8(), COND_GT() ? 0xff : 0);
+}
+
+
+void m68k_op_sle_8_ai(void)
+{
+ m68ki_write_8(EA_AY_AI_8(), COND_LE() ? 0xff : 0);
+}
+
+
+void m68k_op_sle_8_pi(void)
+{
+ m68ki_write_8(EA_AY_PI_8(), COND_LE() ? 0xff : 0);
+}
+
+
+void m68k_op_sle_8_pi7(void)
+{
+ m68ki_write_8(EA_A7_PI_8(), COND_LE() ? 0xff : 0);
+}
+
+
+void m68k_op_sle_8_pd(void)
+{
+ m68ki_write_8(EA_AY_PD_8(), COND_LE() ? 0xff : 0);
+}
+
+
+void m68k_op_sle_8_pd7(void)
+{
+ m68ki_write_8(EA_A7_PD_8(), COND_LE() ? 0xff : 0);
+}
+
+
+void m68k_op_sle_8_di(void)
+{
+ m68ki_write_8(EA_AY_DI_8(), COND_LE() ? 0xff : 0);
+}
+
+
+void m68k_op_sle_8_ix(void)
+{
+ m68ki_write_8(EA_AY_IX_8(), COND_LE() ? 0xff : 0);
+}
+
+
+void m68k_op_sle_8_aw(void)
+{
+ m68ki_write_8(EA_AW_8(), COND_LE() ? 0xff : 0);
+}
+
+
+void m68k_op_sle_8_al(void)
+{
+ m68ki_write_8(EA_AL_8(), COND_LE() ? 0xff : 0);
+}
+
+
+void m68k_op_stop(void)
+{
+ if(FLAG_S)
+ {
+ uint new_sr = OPER_I_16();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ CPU_STOPPED |= STOP_LEVEL_STOP;
+ m68ki_set_sr(new_sr);
+ m68ki_remaining_cycles = 0;
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+void m68k_op_sub_8_er_d(void)
+{
+ uint* r_dst = &DX;
+ uint src = MASK_OUT_ABOVE_8(DY);
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_8_er_ai(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_AI_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_8_er_pi(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_PI_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_8_er_pi7(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_A7_PI_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_8_er_pd(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_PD_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_8_er_pd7(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_A7_PD_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_8_er_di(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_DI_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_8_er_ix(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_IX_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_8_er_aw(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AW_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_8_er_al(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AL_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_8_er_pcdi(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_PCDI_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_8_er_pcix(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_PCIX_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_8_er_i(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_I_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_16_er_d(void)
+{
+ uint* r_dst = &DX;
+ uint src = MASK_OUT_ABOVE_16(DY);
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_16_er_a(void)
+{
+ uint* r_dst = &DX;
+ uint src = MASK_OUT_ABOVE_16(AY);
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_16_er_ai(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_AI_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_16_er_pi(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_PI_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_16_er_pd(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_PD_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_16_er_di(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_DI_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_16_er_ix(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_IX_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_16_er_aw(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AW_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_16_er_al(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AL_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_16_er_pcdi(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_PCDI_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_16_er_pcix(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_PCIX_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_16_er_i(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_I_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_sub_32_er_d(void)
+{
+ uint* r_dst = &DX;
+ uint src = DY;
+ uint dst = *r_dst;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_sub_32_er_a(void)
+{
+ uint* r_dst = &DX;
+ uint src = AY;
+ uint dst = *r_dst;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_sub_32_er_ai(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_AI_32();
+ uint dst = *r_dst;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_sub_32_er_pi(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_PI_32();
+ uint dst = *r_dst;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_sub_32_er_pd(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_PD_32();
+ uint dst = *r_dst;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_sub_32_er_di(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_DI_32();
+ uint dst = *r_dst;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_sub_32_er_ix(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AY_IX_32();
+ uint dst = *r_dst;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_sub_32_er_aw(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AW_32();
+ uint dst = *r_dst;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_sub_32_er_al(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_AL_32();
+ uint dst = *r_dst;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_sub_32_er_pcdi(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_PCDI_32();
+ uint dst = *r_dst;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_sub_32_er_pcix(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_PCIX_32();
+ uint dst = *r_dst;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_sub_32_er_i(void)
+{
+ uint* r_dst = &DX;
+ uint src = OPER_I_32();
+ uint dst = *r_dst;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_sub_8_re_ai(void)
+{
+ uint ea = EA_AY_AI_8();
+ uint src = MASK_OUT_ABOVE_8(DX);
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_sub_8_re_pi(void)
+{
+ uint ea = EA_AY_PI_8();
+ uint src = MASK_OUT_ABOVE_8(DX);
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_sub_8_re_pi7(void)
+{
+ uint ea = EA_A7_PI_8();
+ uint src = MASK_OUT_ABOVE_8(DX);
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_sub_8_re_pd(void)
+{
+ uint ea = EA_AY_PD_8();
+ uint src = MASK_OUT_ABOVE_8(DX);
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_sub_8_re_pd7(void)
+{
+ uint ea = EA_A7_PD_8();
+ uint src = MASK_OUT_ABOVE_8(DX);
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_sub_8_re_di(void)
+{
+ uint ea = EA_AY_DI_8();
+ uint src = MASK_OUT_ABOVE_8(DX);
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_sub_8_re_ix(void)
+{
+ uint ea = EA_AY_IX_8();
+ uint src = MASK_OUT_ABOVE_8(DX);
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_sub_8_re_aw(void)
+{
+ uint ea = EA_AW_8();
+ uint src = MASK_OUT_ABOVE_8(DX);
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_sub_8_re_al(void)
+{
+ uint ea = EA_AL_8();
+ uint src = MASK_OUT_ABOVE_8(DX);
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_sub_16_re_ai(void)
+{
+ uint ea = EA_AY_AI_16();
+ uint src = MASK_OUT_ABOVE_16(DX);
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_sub_16_re_pi(void)
+{
+ uint ea = EA_AY_PI_16();
+ uint src = MASK_OUT_ABOVE_16(DX);
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_sub_16_re_pd(void)
+{
+ uint ea = EA_AY_PD_16();
+ uint src = MASK_OUT_ABOVE_16(DX);
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_sub_16_re_di(void)
+{
+ uint ea = EA_AY_DI_16();
+ uint src = MASK_OUT_ABOVE_16(DX);
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_sub_16_re_ix(void)
+{
+ uint ea = EA_AY_IX_16();
+ uint src = MASK_OUT_ABOVE_16(DX);
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_sub_16_re_aw(void)
+{
+ uint ea = EA_AW_16();
+ uint src = MASK_OUT_ABOVE_16(DX);
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_sub_16_re_al(void)
+{
+ uint ea = EA_AL_16();
+ uint src = MASK_OUT_ABOVE_16(DX);
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_sub_32_re_ai(void)
+{
+ uint ea = EA_AY_AI_32();
+ uint src = DX;
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_sub_32_re_pi(void)
+{
+ uint ea = EA_AY_PI_32();
+ uint src = DX;
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_sub_32_re_pd(void)
+{
+ uint ea = EA_AY_PD_32();
+ uint src = DX;
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_sub_32_re_di(void)
+{
+ uint ea = EA_AY_DI_32();
+ uint src = DX;
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_sub_32_re_ix(void)
+{
+ uint ea = EA_AY_IX_32();
+ uint src = DX;
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_sub_32_re_aw(void)
+{
+ uint ea = EA_AW_32();
+ uint src = DX;
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_sub_32_re_al(void)
+{
+ uint ea = EA_AL_32();
+ uint src = DX;
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_suba_16_d(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(DY));
+}
+
+
+void m68k_op_suba_16_a(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(AY));
+}
+
+
+void m68k_op_suba_16_ai(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_AY_AI_16()));
+}
+
+
+void m68k_op_suba_16_pi(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_AY_PI_16()));
+}
+
+
+void m68k_op_suba_16_pd(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_AY_PD_16()));
+}
+
+
+void m68k_op_suba_16_di(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_AY_DI_16()));
+}
+
+
+void m68k_op_suba_16_ix(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_AY_IX_16()));
+}
+
+
+void m68k_op_suba_16_aw(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_AW_16()));
+}
+
+
+void m68k_op_suba_16_al(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_AL_16()));
+}
+
+
+void m68k_op_suba_16_pcdi(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_PCDI_16()));
+}
+
+
+void m68k_op_suba_16_pcix(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_PCIX_16()));
+}
+
+
+void m68k_op_suba_16_i(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_I_16()));
+}
+
+
+void m68k_op_suba_32_d(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - DY);
+}
+
+
+void m68k_op_suba_32_a(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - AY);
+}
+
+
+void m68k_op_suba_32_ai(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_AY_AI_32());
+}
+
+
+void m68k_op_suba_32_pi(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_AY_PI_32());
+}
+
+
+void m68k_op_suba_32_pd(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_AY_PD_32());
+}
+
+
+void m68k_op_suba_32_di(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_AY_DI_32());
+}
+
+
+void m68k_op_suba_32_ix(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_AY_IX_32());
+}
+
+
+void m68k_op_suba_32_aw(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_AW_32());
+}
+
+
+void m68k_op_suba_32_al(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_AL_32());
+}
+
+
+void m68k_op_suba_32_pcdi(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_PCDI_32());
+}
+
+
+void m68k_op_suba_32_pcix(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_PCIX_32());
+}
+
+
+void m68k_op_suba_32_i(void)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_I_32());
+}
+
+
+void m68k_op_subi_8_d(void)
+{
+ uint* r_dst = &DY;
+ uint src = OPER_I_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_subi_8_ai(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_AI_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_subi_8_pi(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_PI_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_subi_8_pi7(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_A7_PI_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_subi_8_pd(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_subi_8_pd7(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_A7_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_subi_8_di(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_DI_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_subi_8_ix(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AY_IX_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_subi_8_aw(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AW_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_subi_8_al(void)
+{
+ uint src = OPER_I_8();
+ uint ea = EA_AL_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_subi_16_d(void)
+{
+ uint* r_dst = &DY;
+ uint src = OPER_I_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_subi_16_ai(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_AI_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_subi_16_pi(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_PI_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_subi_16_pd(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_PD_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_subi_16_di(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_DI_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_subi_16_ix(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AY_IX_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_subi_16_aw(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AW_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_subi_16_al(void)
+{
+ uint src = OPER_I_16();
+ uint ea = EA_AL_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_subi_32_d(void)
+{
+ uint* r_dst = &DY;
+ uint src = OPER_I_32();
+ uint dst = *r_dst;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_subi_32_ai(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_AI_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_subi_32_pi(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_PI_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_subi_32_pd(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_PD_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_subi_32_di(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_DI_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_subi_32_ix(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AY_IX_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_subi_32_aw(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AW_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_subi_32_al(void)
+{
+ uint src = OPER_I_32();
+ uint ea = EA_AL_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_subq_8_d(void)
+{
+ uint* r_dst = &DY;
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_subq_8_ai(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_AI_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_subq_8_pi(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_PI_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_subq_8_pi7(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_A7_PI_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_subq_8_pd(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_subq_8_pd7(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_A7_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_subq_8_di(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_DI_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_subq_8_ix(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_IX_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_subq_8_aw(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AW_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_subq_8_al(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AL_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+void m68k_op_subq_16_d(void)
+{
+ uint* r_dst = &DY;
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+void m68k_op_subq_16_a(void)
+{
+ uint* r_dst = &AY;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - ((((REG_IR >> 9) - 1) & 7) + 1));
+}
+
+
+void m68k_op_subq_16_ai(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_AI_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_subq_16_pi(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_PI_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_subq_16_pd(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_PD_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_subq_16_di(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_DI_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_subq_16_ix(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_IX_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_subq_16_aw(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AW_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_subq_16_al(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AL_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+void m68k_op_subq_32_d(void)
+{
+ uint* r_dst = &DY;
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint dst = *r_dst;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+void m68k_op_subq_32_a(void)
+{
+ uint* r_dst = &AY;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - ((((REG_IR >> 9) - 1) & 7) + 1));
+}
+
+
+void m68k_op_subq_32_ai(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_AI_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_subq_32_pi(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_PI_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_subq_32_pd(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_PD_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_subq_32_di(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_DI_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_subq_32_ix(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AY_IX_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_subq_32_aw(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AW_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_subq_32_al(void)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = EA_AL_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+void m68k_op_subx_8_rr(void)
+{
+ uint* r_dst = &DX;
+ uint src = MASK_OUT_ABOVE_8(DY);
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = dst - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+}
+
+
+void m68k_op_subx_16_rr(void)
+{
+ uint* r_dst = &DX;
+ uint src = MASK_OUT_ABOVE_16(DY);
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = dst - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ res = MASK_OUT_ABOVE_16(res);
+ FLAG_Z |= res;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+}
+
+
+void m68k_op_subx_32_rr(void)
+{
+ uint* r_dst = &DX;
+ uint src = DY;
+ uint dst = *r_dst;
+ uint res = dst - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ res = MASK_OUT_ABOVE_32(res);
+ FLAG_Z |= res;
+
+ *r_dst = res;
+}
+
+
+void m68k_op_subx_8_mm_ax7(void)
+{
+ uint src = OPER_AY_PD_8();
+ uint ea = EA_A7_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_subx_8_mm_ay7(void)
+{
+ uint src = OPER_A7_PD_8();
+ uint ea = EA_AX_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_subx_8_mm_axy7(void)
+{
+ uint src = OPER_A7_PD_8();
+ uint ea = EA_A7_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_subx_8_mm(void)
+{
+ uint src = OPER_AY_PD_8();
+ uint ea = EA_AX_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+void m68k_op_subx_16_mm(void)
+{
+ uint src = OPER_AY_PD_16();
+ uint ea = EA_AX_PD_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ res = MASK_OUT_ABOVE_16(res);
+ FLAG_Z |= res;
+
+ m68ki_write_16(ea, res);
+}
+
+
+void m68k_op_subx_32_mm(void)
+{
+ uint src = OPER_AY_PD_32();
+ uint ea = EA_AX_PD_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ res = MASK_OUT_ABOVE_32(res);
+ FLAG_Z |= res;
+
+ m68ki_write_32(ea, res);
+}
+
+
+void m68k_op_swap_32(void)
+{
+ uint* r_dst = &DY;
+
+ FLAG_Z = MASK_OUT_ABOVE_32(*r_dst<<16);
+ *r_dst = (*r_dst>>16) | FLAG_Z;
+
+ FLAG_Z = *r_dst;
+ FLAG_N = NFLAG_32(*r_dst);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+void m68k_op_tas_8_d(void)
+{
+ uint* r_dst = &DY;
+
+ FLAG_Z = MASK_OUT_ABOVE_8(*r_dst);
+ FLAG_N = NFLAG_8(*r_dst);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst |= 0x80;
+}
+
+
+void m68k_op_tas_8_ai(void)
+{
+ uint ea = EA_AY_AI_8();
+ uint dst = m68ki_read_8(ea);
+
+ FLAG_Z = dst;
+ FLAG_N = NFLAG_8(dst);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ m68ki_write_8(ea, dst | 0x80);
+}
+
+
+void m68k_op_tas_8_pi(void)
+{
+ uint ea = EA_AY_PI_8();
+ uint dst = m68ki_read_8(ea);
+
+ FLAG_Z = dst;
+ FLAG_N = NFLAG_8(dst);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ m68ki_write_8(ea, dst | 0x80);
+}
+
+
+void m68k_op_tas_8_pi7(void)
+{
+ uint ea = EA_A7_PI_8();
+ uint dst = m68ki_read_8(ea);
+
+ FLAG_Z = dst;
+ FLAG_N = NFLAG_8(dst);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ m68ki_write_8(ea, dst | 0x80);
+}
+
+
+void m68k_op_tas_8_pd(void)
+{
+ uint ea = EA_AY_PD_8();
+ uint dst = m68ki_read_8(ea);
+
+ FLAG_Z = dst;
+ FLAG_N = NFLAG_8(dst);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ m68ki_write_8(ea, dst | 0x80);
+}
+
+
+void m68k_op_tas_8_pd7(void)
+{
+ uint ea = EA_A7_PD_8();
+ uint dst = m68ki_read_8(ea);
+
+ FLAG_Z = dst;
+ FLAG_N = NFLAG_8(dst);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ m68ki_write_8(ea, dst | 0x80);
+}
+
+
+void m68k_op_tas_8_di(void)
+{
+ uint ea = EA_AY_DI_8();
+ uint dst = m68ki_read_8(ea);
+
+ FLAG_Z = dst;
+ FLAG_N = NFLAG_8(dst);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ m68ki_write_8(ea, dst | 0x80);
+}
+
+
+void m68k_op_tas_8_ix(void)
+{
+ uint ea = EA_AY_IX_8();
+ uint dst = m68ki_read_8(ea);
+
+ FLAG_Z = dst;
+ FLAG_N = NFLAG_8(dst);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ m68ki_write_8(ea, dst | 0x80);
+}
+
+
+void m68k_op_tas_8_aw(void)
+{
+ uint ea = EA_AW_8();
+ uint dst = m68ki_read_8(ea);
+
+ FLAG_Z = dst;
+ FLAG_N = NFLAG_8(dst);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ m68ki_write_8(ea, dst | 0x80);
+}
+
+
+void m68k_op_tas_8_al(void)
+{
+ uint ea = EA_AL_8();
+ uint dst = m68ki_read_8(ea);
+
+ FLAG_Z = dst;
+ FLAG_N = NFLAG_8(dst);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ m68ki_write_8(ea, dst | 0x80);
+}
+
+
+void m68k_op_trap(void)
+{
+ /* Trap#n stacks exception frame type 0 */
+ m68ki_exception_trapN(EXCEPTION_TRAP_BASE + (REG_IR & 0xf)); /* HJB 990403 */
+}
+
+
+void m68k_op_trapt(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapt_16(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapt_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapf(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapf_16(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ REG_PC += 2;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapf_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_traphi(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_HI())
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapls(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_LS())
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapcc(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_CC())
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapcs(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_CS())
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapne(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_NE())
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapeq(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_EQ())
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapvc(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_VC())
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapvs(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_VS())
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trappl(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_PL())
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapmi(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_MI())
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapge(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_GE())
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_traplt(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_LT())
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapgt(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_GT())
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_traple(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_LE())
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_traphi_16(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_HI())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 2;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapls_16(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_LS())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 2;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapcc_16(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_CC())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 2;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapcs_16(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_CS())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 2;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapne_16(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_NE())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 2;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapeq_16(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_EQ())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 2;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapvc_16(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_VC())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 2;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapvs_16(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_VS())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 2;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trappl_16(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_PL())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 2;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapmi_16(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_MI())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 2;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapge_16(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_GE())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 2;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_traplt_16(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_LT())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 2;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapgt_16(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_GT())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 2;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_traple_16(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_LE())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 2;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_traphi_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_HI())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapls_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_LS())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapcc_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_CC())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapcs_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_CS())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapne_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_NE())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapeq_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_EQ())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapvc_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_VC())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapvs_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_VS())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trappl_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_PL())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapmi_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_MI())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapge_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_GE())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_traplt_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_LT())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapgt_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_GT())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_traple_32(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(COND_LE())
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_trapv(void)
+{
+ if(COND_VC())
+ {
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+}
+
+
+void m68k_op_tst_8_d(void)
+{
+ uint res = MASK_OUT_ABOVE_8(DY);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_8_ai(void)
+{
+ uint res = OPER_AY_AI_8();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_8_pi(void)
+{
+ uint res = OPER_AY_PI_8();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_8_pi7(void)
+{
+ uint res = OPER_A7_PI_8();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_8_pd(void)
+{
+ uint res = OPER_AY_PD_8();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_8_pd7(void)
+{
+ uint res = OPER_A7_PD_8();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_8_di(void)
+{
+ uint res = OPER_AY_DI_8();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_8_ix(void)
+{
+ uint res = OPER_AY_IX_8();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_8_aw(void)
+{
+ uint res = OPER_AW_8();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_8_al(void)
+{
+ uint res = OPER_AL_8();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_8_pcdi(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint res = OPER_PCDI_8();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_tst_8_pcix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint res = OPER_PCIX_8();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_tst_8_i(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint res = OPER_I_8();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_tst_16_d(void)
+{
+ uint res = MASK_OUT_ABOVE_16(DY);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_16_a(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint res = MAKE_INT_16(AY);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_tst_16_ai(void)
+{
+ uint res = OPER_AY_AI_16();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_16_pi(void)
+{
+ uint res = OPER_AY_PI_16();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_16_pd(void)
+{
+ uint res = OPER_AY_PD_16();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_16_di(void)
+{
+ uint res = OPER_AY_DI_16();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_16_ix(void)
+{
+ uint res = OPER_AY_IX_16();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_16_aw(void)
+{
+ uint res = OPER_AW_16();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_16_al(void)
+{
+ uint res = OPER_AL_16();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_16_pcdi(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint res = OPER_PCDI_16();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_tst_16_pcix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint res = OPER_PCIX_16();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_tst_16_i(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint res = OPER_I_16();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_tst_32_d(void)
+{
+ uint res = DY;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_32_a(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint res = AY;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_tst_32_ai(void)
+{
+ uint res = OPER_AY_AI_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_32_pi(void)
+{
+ uint res = OPER_AY_PI_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_32_pd(void)
+{
+ uint res = OPER_AY_PD_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_32_di(void)
+{
+ uint res = OPER_AY_DI_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_32_ix(void)
+{
+ uint res = OPER_AY_IX_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_32_aw(void)
+{
+ uint res = OPER_AW_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_32_al(void)
+{
+ uint res = OPER_AL_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+void m68k_op_tst_32_pcdi(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint res = OPER_PCDI_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_tst_32_pcix(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint res = OPER_PCIX_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_tst_32_i(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint res = OPER_I_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_unlk_32_a7(void)
+{
+ REG_A[7] = m68ki_read_32(REG_A[7]);
+}
+
+
+void m68k_op_unlk_32(void)
+{
+ uint* r_dst = &AY;
+
+ REG_A[7] = *r_dst;
+ *r_dst = m68ki_pull_32();
+}
+
+
+void m68k_op_unpk_16_rr(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ /* Note: DX and DY are reversed in Motorola's docs */
+ uint src = DY;
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | (((((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16()) & 0xffff);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_unpk_16_mm_ax7(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ /* Note: AX and AY are reversed in Motorola's docs */
+ uint src = OPER_AY_PD_8();
+ uint ea_dst;
+
+ src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
+ ea_dst = EA_A7_PD_8();
+ m68ki_write_8(ea_dst, (src >> 8) & 0xff);
+ ea_dst = EA_A7_PD_8();
+ m68ki_write_8(ea_dst, src & 0xff);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_unpk_16_mm_ay7(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ /* Note: AX and AY are reversed in Motorola's docs */
+ uint src = OPER_A7_PD_8();
+ uint ea_dst;
+
+ src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
+ ea_dst = EA_AX_PD_8();
+ m68ki_write_8(ea_dst, (src >> 8) & 0xff);
+ ea_dst = EA_AX_PD_8();
+ m68ki_write_8(ea_dst, src & 0xff);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_unpk_16_mm_axy7(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint src = OPER_A7_PD_8();
+ uint ea_dst;
+
+ src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
+ ea_dst = EA_A7_PD_8();
+ m68ki_write_8(ea_dst, (src >> 8) & 0xff);
+ ea_dst = EA_A7_PD_8();
+ m68ki_write_8(ea_dst, src & 0xff);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+void m68k_op_unpk_16_mm(void)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ /* Note: AX and AY are reversed in Motorola's docs */
+ uint src = OPER_AY_PD_8();
+ uint ea_dst;
+
+ src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
+ ea_dst = EA_AX_PD_8();
+ m68ki_write_8(ea_dst, (src >> 8) & 0xff);
+ ea_dst = EA_AX_PD_8();
+ m68ki_write_8(ea_dst, src & 0xff);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+/* ======================================================================== */
+/* ============================== END OF FILE ============================= */
+/* ======================================================================== */
+
+
diff --git a/Src/CPU/68K/Musashi/generated/m68kopnz.o b/Src/CPU/68K/Musashi/generated/m68kopnz.o
new file mode 100644
index 0000000..91f2d2f
Binary files /dev/null and b/Src/CPU/68K/Musashi/generated/m68kopnz.o differ
diff --git a/Src/CPU/68K/Musashi/generated/m68kops.c b/Src/CPU/68K/Musashi/generated/m68kops.c
new file mode 100644
index 0000000..959ddc1
--- /dev/null
+++ b/Src/CPU/68K/Musashi/generated/m68kops.c
@@ -0,0 +1,2093 @@
+/* ======================================================================== */
+/* ========================= OPCODE TABLE BUILDER ========================= */
+/* ======================================================================== */
+
+#include "m68kops.h"
+
+#define NUM_CPU_TYPES 3
+
+void (*m68ki_instruction_jump_table[0x10000])(void); /* opcode handler jump table */
+unsigned char m68ki_cycles[NUM_CPU_TYPES][0x10000]; /* Cycles used by CPU type */
+
+/* This is used to generate the opcode handler jump table */
+typedef struct
+{
+ void (*opcode_handler)(void); /* handler function */
+ unsigned int mask; /* mask on opcode */
+ unsigned int match; /* what to match after masking */
+ unsigned char cycles[NUM_CPU_TYPES]; /* cycles each cpu type takes */
+} opcode_handler_struct;
+
+
+/* Opcode handler table */
+static opcode_handler_struct m68k_opcode_handler_table[] =
+{
+/* function mask match 000 010 020 */
+ {m68k_op_1010 , 0xf000, 0xa000, { 4, 4, 4}},
+ {m68k_op_1111 , 0xf000, 0xf000, { 4, 4, 4}},
+ {m68k_op_moveq_32 , 0xf100, 0x7000, { 4, 4, 2}},
+ {m68k_op_cpbcc_32 , 0xf180, 0xf080, { 0, 0, 4}},
+ {m68k_op_cpgen_32 , 0xf1c0, 0xf000, { 0, 0, 4}},
+ {m68k_op_cpscc_32 , 0xf1c0, 0xf040, { 0, 0, 4}},
+ {m68k_op_bra_8 , 0xff00, 0x6000, { 10, 10, 10}},
+ {m68k_op_bsr_8 , 0xff00, 0x6100, { 18, 18, 7}},
+ {m68k_op_bhi_8 , 0xff00, 0x6200, { 8, 8, 6}},
+ {m68k_op_bls_8 , 0xff00, 0x6300, { 8, 8, 6}},
+ {m68k_op_bcc_8 , 0xff00, 0x6400, { 8, 8, 6}},
+ {m68k_op_bcs_8 , 0xff00, 0x6500, { 8, 8, 6}},
+ {m68k_op_bne_8 , 0xff00, 0x6600, { 8, 8, 6}},
+ {m68k_op_beq_8 , 0xff00, 0x6700, { 8, 8, 6}},
+ {m68k_op_bvc_8 , 0xff00, 0x6800, { 8, 8, 6}},
+ {m68k_op_bvs_8 , 0xff00, 0x6900, { 8, 8, 6}},
+ {m68k_op_bpl_8 , 0xff00, 0x6a00, { 8, 8, 6}},
+ {m68k_op_bmi_8 , 0xff00, 0x6b00, { 8, 8, 6}},
+ {m68k_op_bge_8 , 0xff00, 0x6c00, { 8, 8, 6}},
+ {m68k_op_blt_8 , 0xff00, 0x6d00, { 8, 8, 6}},
+ {m68k_op_bgt_8 , 0xff00, 0x6e00, { 8, 8, 6}},
+ {m68k_op_ble_8 , 0xff00, 0x6f00, { 8, 8, 6}},
+ {m68k_op_btst_32_r_d , 0xf1f8, 0x0100, { 6, 6, 4}},
+ {m68k_op_movep_16_er , 0xf1f8, 0x0108, { 16, 16, 12}},
+ {m68k_op_btst_8_r_ai , 0xf1f8, 0x0110, { 8, 8, 8}},
+ {m68k_op_btst_8_r_pi , 0xf1f8, 0x0118, { 8, 8, 8}},
+ {m68k_op_btst_8_r_pd , 0xf1f8, 0x0120, { 10, 10, 9}},
+ {m68k_op_btst_8_r_di , 0xf1f8, 0x0128, { 12, 12, 9}},
+ {m68k_op_btst_8_r_ix , 0xf1f8, 0x0130, { 14, 14, 11}},
+ {m68k_op_bchg_32_r_d , 0xf1f8, 0x0140, { 8, 8, 4}},
+ {m68k_op_movep_32_er , 0xf1f8, 0x0148, { 24, 24, 18}},
+ {m68k_op_bchg_8_r_ai , 0xf1f8, 0x0150, { 12, 12, 8}},
+ {m68k_op_bchg_8_r_pi , 0xf1f8, 0x0158, { 12, 12, 8}},
+ {m68k_op_bchg_8_r_pd , 0xf1f8, 0x0160, { 14, 14, 9}},
+ {m68k_op_bchg_8_r_di , 0xf1f8, 0x0168, { 16, 16, 9}},
+ {m68k_op_bchg_8_r_ix , 0xf1f8, 0x0170, { 18, 18, 11}},
+ {m68k_op_bclr_32_r_d , 0xf1f8, 0x0180, { 10, 10, 4}},
+ {m68k_op_movep_16_re , 0xf1f8, 0x0188, { 16, 16, 11}},
+ {m68k_op_bclr_8_r_ai , 0xf1f8, 0x0190, { 12, 14, 8}},
+ {m68k_op_bclr_8_r_pi , 0xf1f8, 0x0198, { 12, 14, 8}},
+ {m68k_op_bclr_8_r_pd , 0xf1f8, 0x01a0, { 14, 16, 9}},
+ {m68k_op_bclr_8_r_di , 0xf1f8, 0x01a8, { 16, 18, 9}},
+ {m68k_op_bclr_8_r_ix , 0xf1f8, 0x01b0, { 18, 20, 11}},
+ {m68k_op_bset_32_r_d , 0xf1f8, 0x01c0, { 8, 8, 4}},
+ {m68k_op_movep_32_re , 0xf1f8, 0x01c8, { 24, 24, 17}},
+ {m68k_op_bset_8_r_ai , 0xf1f8, 0x01d0, { 12, 12, 8}},
+ {m68k_op_bset_8_r_pi , 0xf1f8, 0x01d8, { 12, 12, 8}},
+ {m68k_op_bset_8_r_pd , 0xf1f8, 0x01e0, { 14, 14, 9}},
+ {m68k_op_bset_8_r_di , 0xf1f8, 0x01e8, { 16, 16, 9}},
+ {m68k_op_bset_8_r_ix , 0xf1f8, 0x01f0, { 18, 18, 11}},
+ {m68k_op_move_8_d_d , 0xf1f8, 0x1000, { 4, 4, 2}},
+ {m68k_op_move_8_d_ai , 0xf1f8, 0x1010, { 8, 8, 6}},
+ {m68k_op_move_8_d_pi , 0xf1f8, 0x1018, { 8, 8, 6}},
+ {m68k_op_move_8_d_pd , 0xf1f8, 0x1020, { 10, 10, 7}},
+ {m68k_op_move_8_d_di , 0xf1f8, 0x1028, { 12, 12, 7}},
+ {m68k_op_move_8_d_ix , 0xf1f8, 0x1030, { 14, 14, 9}},
+ {m68k_op_move_8_ai_d , 0xf1f8, 0x1080, { 8, 8, 4}},
+ {m68k_op_move_8_ai_ai , 0xf1f8, 0x1090, { 12, 12, 8}},
+ {m68k_op_move_8_ai_pi , 0xf1f8, 0x1098, { 12, 12, 8}},
+ {m68k_op_move_8_ai_pd , 0xf1f8, 0x10a0, { 14, 14, 9}},
+ {m68k_op_move_8_ai_di , 0xf1f8, 0x10a8, { 16, 16, 9}},
+ {m68k_op_move_8_ai_ix , 0xf1f8, 0x10b0, { 18, 18, 11}},
+ {m68k_op_move_8_pi_d , 0xf1f8, 0x10c0, { 8, 8, 4}},
+ {m68k_op_move_8_pi_ai , 0xf1f8, 0x10d0, { 12, 12, 8}},
+ {m68k_op_move_8_pi_pi , 0xf1f8, 0x10d8, { 12, 12, 8}},
+ {m68k_op_move_8_pi_pd , 0xf1f8, 0x10e0, { 14, 14, 9}},
+ {m68k_op_move_8_pi_di , 0xf1f8, 0x10e8, { 16, 16, 9}},
+ {m68k_op_move_8_pi_ix , 0xf1f8, 0x10f0, { 18, 18, 11}},
+ {m68k_op_move_8_pd_d , 0xf1f8, 0x1100, { 8, 8, 5}},
+ {m68k_op_move_8_pd_ai , 0xf1f8, 0x1110, { 12, 12, 9}},
+ {m68k_op_move_8_pd_pi , 0xf1f8, 0x1118, { 12, 12, 9}},
+ {m68k_op_move_8_pd_pd , 0xf1f8, 0x1120, { 14, 14, 10}},
+ {m68k_op_move_8_pd_di , 0xf1f8, 0x1128, { 16, 16, 10}},
+ {m68k_op_move_8_pd_ix , 0xf1f8, 0x1130, { 18, 18, 12}},
+ {m68k_op_move_8_di_d , 0xf1f8, 0x1140, { 12, 12, 5}},
+ {m68k_op_move_8_di_ai , 0xf1f8, 0x1150, { 16, 16, 9}},
+ {m68k_op_move_8_di_pi , 0xf1f8, 0x1158, { 16, 16, 9}},
+ {m68k_op_move_8_di_pd , 0xf1f8, 0x1160, { 18, 18, 10}},
+ {m68k_op_move_8_di_di , 0xf1f8, 0x1168, { 20, 20, 10}},
+ {m68k_op_move_8_di_ix , 0xf1f8, 0x1170, { 22, 22, 12}},
+ {m68k_op_move_8_ix_d , 0xf1f8, 0x1180, { 14, 14, 7}},
+ {m68k_op_move_8_ix_ai , 0xf1f8, 0x1190, { 18, 18, 11}},
+ {m68k_op_move_8_ix_pi , 0xf1f8, 0x1198, { 18, 18, 11}},
+ {m68k_op_move_8_ix_pd , 0xf1f8, 0x11a0, { 20, 20, 12}},
+ {m68k_op_move_8_ix_di , 0xf1f8, 0x11a8, { 22, 22, 12}},
+ {m68k_op_move_8_ix_ix , 0xf1f8, 0x11b0, { 24, 24, 14}},
+ {m68k_op_move_32_d_d , 0xf1f8, 0x2000, { 4, 4, 2}},
+ {m68k_op_move_32_d_a , 0xf1f8, 0x2008, { 4, 4, 2}},
+ {m68k_op_move_32_d_ai , 0xf1f8, 0x2010, { 12, 12, 6}},
+ {m68k_op_move_32_d_pi , 0xf1f8, 0x2018, { 12, 12, 6}},
+ {m68k_op_move_32_d_pd , 0xf1f8, 0x2020, { 14, 14, 7}},
+ {m68k_op_move_32_d_di , 0xf1f8, 0x2028, { 16, 16, 7}},
+ {m68k_op_move_32_d_ix , 0xf1f8, 0x2030, { 18, 18, 9}},
+ {m68k_op_movea_32_d , 0xf1f8, 0x2040, { 4, 4, 2}},
+ {m68k_op_movea_32_a , 0xf1f8, 0x2048, { 4, 4, 2}},
+ {m68k_op_movea_32_ai , 0xf1f8, 0x2050, { 12, 12, 6}},
+ {m68k_op_movea_32_pi , 0xf1f8, 0x2058, { 12, 12, 6}},
+ {m68k_op_movea_32_pd , 0xf1f8, 0x2060, { 14, 14, 7}},
+ {m68k_op_movea_32_di , 0xf1f8, 0x2068, { 16, 16, 7}},
+ {m68k_op_movea_32_ix , 0xf1f8, 0x2070, { 18, 18, 9}},
+ {m68k_op_move_32_ai_d , 0xf1f8, 0x2080, { 12, 12, 4}},
+ {m68k_op_move_32_ai_a , 0xf1f8, 0x2088, { 12, 12, 4}},
+ {m68k_op_move_32_ai_ai , 0xf1f8, 0x2090, { 20, 20, 8}},
+ {m68k_op_move_32_ai_pi , 0xf1f8, 0x2098, { 20, 20, 8}},
+ {m68k_op_move_32_ai_pd , 0xf1f8, 0x20a0, { 22, 22, 9}},
+ {m68k_op_move_32_ai_di , 0xf1f8, 0x20a8, { 24, 24, 9}},
+ {m68k_op_move_32_ai_ix , 0xf1f8, 0x20b0, { 26, 26, 11}},
+ {m68k_op_move_32_pi_d , 0xf1f8, 0x20c0, { 12, 12, 4}},
+ {m68k_op_move_32_pi_a , 0xf1f8, 0x20c8, { 12, 12, 4}},
+ {m68k_op_move_32_pi_ai , 0xf1f8, 0x20d0, { 20, 20, 8}},
+ {m68k_op_move_32_pi_pi , 0xf1f8, 0x20d8, { 20, 20, 8}},
+ {m68k_op_move_32_pi_pd , 0xf1f8, 0x20e0, { 22, 22, 9}},
+ {m68k_op_move_32_pi_di , 0xf1f8, 0x20e8, { 24, 24, 9}},
+ {m68k_op_move_32_pi_ix , 0xf1f8, 0x20f0, { 26, 26, 11}},
+ {m68k_op_move_32_pd_d , 0xf1f8, 0x2100, { 12, 14, 5}},
+ {m68k_op_move_32_pd_a , 0xf1f8, 0x2108, { 12, 14, 5}},
+ {m68k_op_move_32_pd_ai , 0xf1f8, 0x2110, { 20, 22, 9}},
+ {m68k_op_move_32_pd_pi , 0xf1f8, 0x2118, { 20, 22, 9}},
+ {m68k_op_move_32_pd_pd , 0xf1f8, 0x2120, { 22, 24, 10}},
+ {m68k_op_move_32_pd_di , 0xf1f8, 0x2128, { 24, 26, 10}},
+ {m68k_op_move_32_pd_ix , 0xf1f8, 0x2130, { 26, 28, 12}},
+ {m68k_op_move_32_di_d , 0xf1f8, 0x2140, { 16, 16, 5}},
+ {m68k_op_move_32_di_a , 0xf1f8, 0x2148, { 16, 16, 5}},
+ {m68k_op_move_32_di_ai , 0xf1f8, 0x2150, { 24, 24, 9}},
+ {m68k_op_move_32_di_pi , 0xf1f8, 0x2158, { 24, 24, 9}},
+ {m68k_op_move_32_di_pd , 0xf1f8, 0x2160, { 26, 26, 10}},
+ {m68k_op_move_32_di_di , 0xf1f8, 0x2168, { 28, 28, 10}},
+ {m68k_op_move_32_di_ix , 0xf1f8, 0x2170, { 30, 30, 12}},
+ {m68k_op_move_32_ix_d , 0xf1f8, 0x2180, { 18, 18, 7}},
+ {m68k_op_move_32_ix_a , 0xf1f8, 0x2188, { 18, 18, 7}},
+ {m68k_op_move_32_ix_ai , 0xf1f8, 0x2190, { 26, 26, 11}},
+ {m68k_op_move_32_ix_pi , 0xf1f8, 0x2198, { 26, 26, 11}},
+ {m68k_op_move_32_ix_pd , 0xf1f8, 0x21a0, { 28, 28, 12}},
+ {m68k_op_move_32_ix_di , 0xf1f8, 0x21a8, { 30, 30, 12}},
+ {m68k_op_move_32_ix_ix , 0xf1f8, 0x21b0, { 32, 32, 14}},
+ {m68k_op_move_16_d_d , 0xf1f8, 0x3000, { 4, 4, 2}},
+ {m68k_op_move_16_d_a , 0xf1f8, 0x3008, { 4, 4, 2}},
+ {m68k_op_move_16_d_ai , 0xf1f8, 0x3010, { 8, 8, 6}},
+ {m68k_op_move_16_d_pi , 0xf1f8, 0x3018, { 8, 8, 6}},
+ {m68k_op_move_16_d_pd , 0xf1f8, 0x3020, { 10, 10, 7}},
+ {m68k_op_move_16_d_di , 0xf1f8, 0x3028, { 12, 12, 7}},
+ {m68k_op_move_16_d_ix , 0xf1f8, 0x3030, { 14, 14, 9}},
+ {m68k_op_movea_16_d , 0xf1f8, 0x3040, { 4, 4, 2}},
+ {m68k_op_movea_16_a , 0xf1f8, 0x3048, { 4, 4, 2}},
+ {m68k_op_movea_16_ai , 0xf1f8, 0x3050, { 8, 8, 6}},
+ {m68k_op_movea_16_pi , 0xf1f8, 0x3058, { 8, 8, 6}},
+ {m68k_op_movea_16_pd , 0xf1f8, 0x3060, { 10, 10, 7}},
+ {m68k_op_movea_16_di , 0xf1f8, 0x3068, { 12, 12, 7}},
+ {m68k_op_movea_16_ix , 0xf1f8, 0x3070, { 14, 14, 9}},
+ {m68k_op_move_16_ai_d , 0xf1f8, 0x3080, { 8, 8, 4}},
+ {m68k_op_move_16_ai_a , 0xf1f8, 0x3088, { 8, 8, 4}},
+ {m68k_op_move_16_ai_ai , 0xf1f8, 0x3090, { 12, 12, 8}},
+ {m68k_op_move_16_ai_pi , 0xf1f8, 0x3098, { 12, 12, 8}},
+ {m68k_op_move_16_ai_pd , 0xf1f8, 0x30a0, { 14, 14, 9}},
+ {m68k_op_move_16_ai_di , 0xf1f8, 0x30a8, { 16, 16, 9}},
+ {m68k_op_move_16_ai_ix , 0xf1f8, 0x30b0, { 18, 18, 11}},
+ {m68k_op_move_16_pi_d , 0xf1f8, 0x30c0, { 8, 8, 4}},
+ {m68k_op_move_16_pi_a , 0xf1f8, 0x30c8, { 8, 8, 4}},
+ {m68k_op_move_16_pi_ai , 0xf1f8, 0x30d0, { 12, 12, 8}},
+ {m68k_op_move_16_pi_pi , 0xf1f8, 0x30d8, { 12, 12, 8}},
+ {m68k_op_move_16_pi_pd , 0xf1f8, 0x30e0, { 14, 14, 9}},
+ {m68k_op_move_16_pi_di , 0xf1f8, 0x30e8, { 16, 16, 9}},
+ {m68k_op_move_16_pi_ix , 0xf1f8, 0x30f0, { 18, 18, 11}},
+ {m68k_op_move_16_pd_d , 0xf1f8, 0x3100, { 8, 8, 5}},
+ {m68k_op_move_16_pd_a , 0xf1f8, 0x3108, { 8, 8, 5}},
+ {m68k_op_move_16_pd_ai , 0xf1f8, 0x3110, { 12, 12, 9}},
+ {m68k_op_move_16_pd_pi , 0xf1f8, 0x3118, { 12, 12, 9}},
+ {m68k_op_move_16_pd_pd , 0xf1f8, 0x3120, { 14, 14, 10}},
+ {m68k_op_move_16_pd_di , 0xf1f8, 0x3128, { 16, 16, 10}},
+ {m68k_op_move_16_pd_ix , 0xf1f8, 0x3130, { 18, 18, 12}},
+ {m68k_op_move_16_di_d , 0xf1f8, 0x3140, { 12, 12, 5}},
+ {m68k_op_move_16_di_a , 0xf1f8, 0x3148, { 12, 12, 5}},
+ {m68k_op_move_16_di_ai , 0xf1f8, 0x3150, { 16, 16, 9}},
+ {m68k_op_move_16_di_pi , 0xf1f8, 0x3158, { 16, 16, 9}},
+ {m68k_op_move_16_di_pd , 0xf1f8, 0x3160, { 18, 18, 10}},
+ {m68k_op_move_16_di_di , 0xf1f8, 0x3168, { 20, 20, 10}},
+ {m68k_op_move_16_di_ix , 0xf1f8, 0x3170, { 22, 22, 12}},
+ {m68k_op_move_16_ix_d , 0xf1f8, 0x3180, { 14, 14, 7}},
+ {m68k_op_move_16_ix_a , 0xf1f8, 0x3188, { 14, 14, 7}},
+ {m68k_op_move_16_ix_ai , 0xf1f8, 0x3190, { 18, 18, 11}},
+ {m68k_op_move_16_ix_pi , 0xf1f8, 0x3198, { 18, 18, 11}},
+ {m68k_op_move_16_ix_pd , 0xf1f8, 0x31a0, { 20, 20, 12}},
+ {m68k_op_move_16_ix_di , 0xf1f8, 0x31a8, { 22, 22, 12}},
+ {m68k_op_move_16_ix_ix , 0xf1f8, 0x31b0, { 24, 24, 14}},
+ {m68k_op_chk_32_d , 0xf1f8, 0x4100, { 0, 0, 8}},
+ {m68k_op_chk_32_ai , 0xf1f8, 0x4110, { 0, 0, 12}},
+ {m68k_op_chk_32_pi , 0xf1f8, 0x4118, { 0, 0, 12}},
+ {m68k_op_chk_32_pd , 0xf1f8, 0x4120, { 0, 0, 13}},
+ {m68k_op_chk_32_di , 0xf1f8, 0x4128, { 0, 0, 13}},
+ {m68k_op_chk_32_ix , 0xf1f8, 0x4130, { 0, 0, 15}},
+ {m68k_op_chk_16_d , 0xf1f8, 0x4180, { 10, 8, 8}},
+ {m68k_op_chk_16_ai , 0xf1f8, 0x4190, { 14, 12, 12}},
+ {m68k_op_chk_16_pi , 0xf1f8, 0x4198, { 14, 12, 12}},
+ {m68k_op_chk_16_pd , 0xf1f8, 0x41a0, { 16, 14, 13}},
+ {m68k_op_chk_16_di , 0xf1f8, 0x41a8, { 18, 16, 13}},
+ {m68k_op_chk_16_ix , 0xf1f8, 0x41b0, { 20, 18, 15}},
+ {m68k_op_lea_32_ai , 0xf1f8, 0x41d0, { 4, 4, 6}},
+ {m68k_op_lea_32_di , 0xf1f8, 0x41e8, { 8, 8, 7}},
+ {m68k_op_lea_32_ix , 0xf1f8, 0x41f0, { 12, 12, 9}},
+ {m68k_op_addq_8_d , 0xf1f8, 0x5000, { 4, 4, 2}},
+ {m68k_op_addq_8_ai , 0xf1f8, 0x5010, { 12, 12, 8}},
+ {m68k_op_addq_8_pi , 0xf1f8, 0x5018, { 12, 12, 8}},
+ {m68k_op_addq_8_pd , 0xf1f8, 0x5020, { 14, 14, 9}},
+ {m68k_op_addq_8_di , 0xf1f8, 0x5028, { 16, 16, 9}},
+ {m68k_op_addq_8_ix , 0xf1f8, 0x5030, { 18, 18, 11}},
+ {m68k_op_addq_16_d , 0xf1f8, 0x5040, { 4, 4, 2}},
+ {m68k_op_addq_16_a , 0xf1f8, 0x5048, { 4, 4, 2}},
+ {m68k_op_addq_16_ai , 0xf1f8, 0x5050, { 12, 12, 8}},
+ {m68k_op_addq_16_pi , 0xf1f8, 0x5058, { 12, 12, 8}},
+ {m68k_op_addq_16_pd , 0xf1f8, 0x5060, { 14, 14, 9}},
+ {m68k_op_addq_16_di , 0xf1f8, 0x5068, { 16, 16, 9}},
+ {m68k_op_addq_16_ix , 0xf1f8, 0x5070, { 18, 18, 11}},
+ {m68k_op_addq_32_d , 0xf1f8, 0x5080, { 8, 8, 2}},
+ {m68k_op_addq_32_a , 0xf1f8, 0x5088, { 8, 8, 2}},
+ {m68k_op_addq_32_ai , 0xf1f8, 0x5090, { 20, 20, 8}},
+ {m68k_op_addq_32_pi , 0xf1f8, 0x5098, { 20, 20, 8}},
+ {m68k_op_addq_32_pd , 0xf1f8, 0x50a0, { 22, 22, 9}},
+ {m68k_op_addq_32_di , 0xf1f8, 0x50a8, { 24, 24, 9}},
+ {m68k_op_addq_32_ix , 0xf1f8, 0x50b0, { 26, 26, 11}},
+ {m68k_op_subq_8_d , 0xf1f8, 0x5100, { 4, 4, 2}},
+ {m68k_op_subq_8_ai , 0xf1f8, 0x5110, { 12, 12, 8}},
+ {m68k_op_subq_8_pi , 0xf1f8, 0x5118, { 12, 12, 8}},
+ {m68k_op_subq_8_pd , 0xf1f8, 0x5120, { 14, 14, 9}},
+ {m68k_op_subq_8_di , 0xf1f8, 0x5128, { 16, 16, 9}},
+ {m68k_op_subq_8_ix , 0xf1f8, 0x5130, { 18, 18, 11}},
+ {m68k_op_subq_16_d , 0xf1f8, 0x5140, { 4, 4, 2}},
+ {m68k_op_subq_16_a , 0xf1f8, 0x5148, { 8, 4, 2}},
+ {m68k_op_subq_16_ai , 0xf1f8, 0x5150, { 12, 12, 8}},
+ {m68k_op_subq_16_pi , 0xf1f8, 0x5158, { 12, 12, 8}},
+ {m68k_op_subq_16_pd , 0xf1f8, 0x5160, { 14, 14, 9}},
+ {m68k_op_subq_16_di , 0xf1f8, 0x5168, { 16, 16, 9}},
+ {m68k_op_subq_16_ix , 0xf1f8, 0x5170, { 18, 18, 11}},
+ {m68k_op_subq_32_d , 0xf1f8, 0x5180, { 8, 8, 2}},
+ {m68k_op_subq_32_a , 0xf1f8, 0x5188, { 8, 8, 2}},
+ {m68k_op_subq_32_ai , 0xf1f8, 0x5190, { 20, 20, 8}},
+ {m68k_op_subq_32_pi , 0xf1f8, 0x5198, { 20, 20, 8}},
+ {m68k_op_subq_32_pd , 0xf1f8, 0x51a0, { 22, 22, 9}},
+ {m68k_op_subq_32_di , 0xf1f8, 0x51a8, { 24, 24, 9}},
+ {m68k_op_subq_32_ix , 0xf1f8, 0x51b0, { 26, 26, 11}},
+ {m68k_op_or_8_er_d , 0xf1f8, 0x8000, { 4, 4, 2}},
+ {m68k_op_or_8_er_ai , 0xf1f8, 0x8010, { 8, 8, 6}},
+ {m68k_op_or_8_er_pi , 0xf1f8, 0x8018, { 8, 8, 6}},
+ {m68k_op_or_8_er_pd , 0xf1f8, 0x8020, { 10, 10, 7}},
+ {m68k_op_or_8_er_di , 0xf1f8, 0x8028, { 12, 12, 7}},
+ {m68k_op_or_8_er_ix , 0xf1f8, 0x8030, { 14, 14, 9}},
+ {m68k_op_or_16_er_d , 0xf1f8, 0x8040, { 4, 4, 2}},
+ {m68k_op_or_16_er_ai , 0xf1f8, 0x8050, { 8, 8, 6}},
+ {m68k_op_or_16_er_pi , 0xf1f8, 0x8058, { 8, 8, 6}},
+ {m68k_op_or_16_er_pd , 0xf1f8, 0x8060, { 10, 10, 7}},
+ {m68k_op_or_16_er_di , 0xf1f8, 0x8068, { 12, 12, 7}},
+ {m68k_op_or_16_er_ix , 0xf1f8, 0x8070, { 14, 14, 9}},
+ {m68k_op_or_32_er_d , 0xf1f8, 0x8080, { 8, 6, 2}},
+ {m68k_op_or_32_er_ai , 0xf1f8, 0x8090, { 14, 14, 6}},
+ {m68k_op_or_32_er_pi , 0xf1f8, 0x8098, { 14, 14, 6}},
+ {m68k_op_or_32_er_pd , 0xf1f8, 0x80a0, { 16, 16, 7}},
+ {m68k_op_or_32_er_di , 0xf1f8, 0x80a8, { 18, 18, 7}},
+ {m68k_op_or_32_er_ix , 0xf1f8, 0x80b0, { 20, 20, 9}},
+ {m68k_op_divu_16_d , 0xf1f8, 0x80c0, {140, 108, 44}},
+ {m68k_op_divu_16_ai , 0xf1f8, 0x80d0, {144, 112, 48}},
+ {m68k_op_divu_16_pi , 0xf1f8, 0x80d8, {144, 112, 48}},
+ {m68k_op_divu_16_pd , 0xf1f8, 0x80e0, {146, 114, 49}},
+ {m68k_op_divu_16_di , 0xf1f8, 0x80e8, {148, 116, 49}},
+ {m68k_op_divu_16_ix , 0xf1f8, 0x80f0, {150, 118, 51}},
+ {m68k_op_sbcd_8_rr , 0xf1f8, 0x8100, { 6, 6, 4}},
+ {m68k_op_sbcd_8_mm , 0xf1f8, 0x8108, { 18, 18, 16}},
+ {m68k_op_or_8_re_ai , 0xf1f8, 0x8110, { 12, 12, 8}},
+ {m68k_op_or_8_re_pi , 0xf1f8, 0x8118, { 12, 12, 8}},
+ {m68k_op_or_8_re_pd , 0xf1f8, 0x8120, { 14, 14, 9}},
+ {m68k_op_or_8_re_di , 0xf1f8, 0x8128, { 16, 16, 9}},
+ {m68k_op_or_8_re_ix , 0xf1f8, 0x8130, { 18, 18, 11}},
+ {m68k_op_pack_16_rr , 0xf1f8, 0x8140, { 0, 0, 6}},
+ {m68k_op_pack_16_mm , 0xf1f8, 0x8148, { 0, 0, 13}},
+ {m68k_op_or_16_re_ai , 0xf1f8, 0x8150, { 12, 12, 8}},
+ {m68k_op_or_16_re_pi , 0xf1f8, 0x8158, { 12, 12, 8}},
+ {m68k_op_or_16_re_pd , 0xf1f8, 0x8160, { 14, 14, 9}},
+ {m68k_op_or_16_re_di , 0xf1f8, 0x8168, { 16, 16, 9}},
+ {m68k_op_or_16_re_ix , 0xf1f8, 0x8170, { 18, 18, 11}},
+ {m68k_op_unpk_16_rr , 0xf1f8, 0x8180, { 0, 0, 8}},
+ {m68k_op_unpk_16_mm , 0xf1f8, 0x8188, { 0, 0, 13}},
+ {m68k_op_or_32_re_ai , 0xf1f8, 0x8190, { 20, 20, 8}},
+ {m68k_op_or_32_re_pi , 0xf1f8, 0x8198, { 20, 20, 8}},
+ {m68k_op_or_32_re_pd , 0xf1f8, 0x81a0, { 22, 22, 9}},
+ {m68k_op_or_32_re_di , 0xf1f8, 0x81a8, { 24, 24, 9}},
+ {m68k_op_or_32_re_ix , 0xf1f8, 0x81b0, { 26, 26, 11}},
+ {m68k_op_divs_16_d , 0xf1f8, 0x81c0, {158, 122, 56}},
+ {m68k_op_divs_16_ai , 0xf1f8, 0x81d0, {162, 126, 60}},
+ {m68k_op_divs_16_pi , 0xf1f8, 0x81d8, {162, 126, 60}},
+ {m68k_op_divs_16_pd , 0xf1f8, 0x81e0, {164, 128, 61}},
+ {m68k_op_divs_16_di , 0xf1f8, 0x81e8, {166, 130, 61}},
+ {m68k_op_divs_16_ix , 0xf1f8, 0x81f0, {168, 132, 63}},
+ {m68k_op_sub_8_er_d , 0xf1f8, 0x9000, { 4, 4, 2}},
+ {m68k_op_sub_8_er_ai , 0xf1f8, 0x9010, { 8, 8, 6}},
+ {m68k_op_sub_8_er_pi , 0xf1f8, 0x9018, { 8, 8, 6}},
+ {m68k_op_sub_8_er_pd , 0xf1f8, 0x9020, { 10, 10, 7}},
+ {m68k_op_sub_8_er_di , 0xf1f8, 0x9028, { 12, 12, 7}},
+ {m68k_op_sub_8_er_ix , 0xf1f8, 0x9030, { 14, 14, 9}},
+ {m68k_op_sub_16_er_d , 0xf1f8, 0x9040, { 4, 4, 2}},
+ {m68k_op_sub_16_er_a , 0xf1f8, 0x9048, { 4, 4, 2}},
+ {m68k_op_sub_16_er_ai , 0xf1f8, 0x9050, { 8, 8, 6}},
+ {m68k_op_sub_16_er_pi , 0xf1f8, 0x9058, { 8, 8, 6}},
+ {m68k_op_sub_16_er_pd , 0xf1f8, 0x9060, { 10, 10, 7}},
+ {m68k_op_sub_16_er_di , 0xf1f8, 0x9068, { 12, 12, 7}},
+ {m68k_op_sub_16_er_ix , 0xf1f8, 0x9070, { 14, 14, 9}},
+ {m68k_op_sub_32_er_d , 0xf1f8, 0x9080, { 8, 6, 2}},
+ {m68k_op_sub_32_er_a , 0xf1f8, 0x9088, { 8, 6, 2}},
+ {m68k_op_sub_32_er_ai , 0xf1f8, 0x9090, { 14, 14, 6}},
+ {m68k_op_sub_32_er_pi , 0xf1f8, 0x9098, { 14, 14, 6}},
+ {m68k_op_sub_32_er_pd , 0xf1f8, 0x90a0, { 16, 16, 7}},
+ {m68k_op_sub_32_er_di , 0xf1f8, 0x90a8, { 18, 18, 7}},
+ {m68k_op_sub_32_er_ix , 0xf1f8, 0x90b0, { 20, 20, 9}},
+ {m68k_op_suba_16_d , 0xf1f8, 0x90c0, { 8, 8, 2}},
+ {m68k_op_suba_16_a , 0xf1f8, 0x90c8, { 8, 8, 2}},
+ {m68k_op_suba_16_ai , 0xf1f8, 0x90d0, { 12, 12, 6}},
+ {m68k_op_suba_16_pi , 0xf1f8, 0x90d8, { 12, 12, 6}},
+ {m68k_op_suba_16_pd , 0xf1f8, 0x90e0, { 14, 14, 7}},
+ {m68k_op_suba_16_di , 0xf1f8, 0x90e8, { 16, 16, 7}},
+ {m68k_op_suba_16_ix , 0xf1f8, 0x90f0, { 18, 18, 9}},
+ {m68k_op_subx_8_rr , 0xf1f8, 0x9100, { 4, 4, 2}},
+ {m68k_op_subx_8_mm , 0xf1f8, 0x9108, { 18, 18, 12}},
+ {m68k_op_sub_8_re_ai , 0xf1f8, 0x9110, { 12, 12, 8}},
+ {m68k_op_sub_8_re_pi , 0xf1f8, 0x9118, { 12, 12, 8}},
+ {m68k_op_sub_8_re_pd , 0xf1f8, 0x9120, { 14, 14, 9}},
+ {m68k_op_sub_8_re_di , 0xf1f8, 0x9128, { 16, 16, 9}},
+ {m68k_op_sub_8_re_ix , 0xf1f8, 0x9130, { 18, 18, 11}},
+ {m68k_op_subx_16_rr , 0xf1f8, 0x9140, { 4, 4, 2}},
+ {m68k_op_subx_16_mm , 0xf1f8, 0x9148, { 18, 18, 12}},
+ {m68k_op_sub_16_re_ai , 0xf1f8, 0x9150, { 12, 12, 8}},
+ {m68k_op_sub_16_re_pi , 0xf1f8, 0x9158, { 12, 12, 8}},
+ {m68k_op_sub_16_re_pd , 0xf1f8, 0x9160, { 14, 14, 9}},
+ {m68k_op_sub_16_re_di , 0xf1f8, 0x9168, { 16, 16, 9}},
+ {m68k_op_sub_16_re_ix , 0xf1f8, 0x9170, { 18, 18, 11}},
+ {m68k_op_subx_32_rr , 0xf1f8, 0x9180, { 8, 6, 2}},
+ {m68k_op_subx_32_mm , 0xf1f8, 0x9188, { 30, 30, 12}},
+ {m68k_op_sub_32_re_ai , 0xf1f8, 0x9190, { 20, 20, 8}},
+ {m68k_op_sub_32_re_pi , 0xf1f8, 0x9198, { 20, 20, 8}},
+ {m68k_op_sub_32_re_pd , 0xf1f8, 0x91a0, { 22, 22, 9}},
+ {m68k_op_sub_32_re_di , 0xf1f8, 0x91a8, { 24, 24, 9}},
+ {m68k_op_sub_32_re_ix , 0xf1f8, 0x91b0, { 26, 26, 11}},
+ {m68k_op_suba_32_d , 0xf1f8, 0x91c0, { 8, 6, 2}},
+ {m68k_op_suba_32_a , 0xf1f8, 0x91c8, { 8, 6, 2}},
+ {m68k_op_suba_32_ai , 0xf1f8, 0x91d0, { 14, 14, 6}},
+ {m68k_op_suba_32_pi , 0xf1f8, 0x91d8, { 14, 14, 6}},
+ {m68k_op_suba_32_pd , 0xf1f8, 0x91e0, { 16, 16, 7}},
+ {m68k_op_suba_32_di , 0xf1f8, 0x91e8, { 18, 18, 7}},
+ {m68k_op_suba_32_ix , 0xf1f8, 0x91f0, { 20, 20, 9}},
+ {m68k_op_cmp_8_d , 0xf1f8, 0xb000, { 4, 4, 2}},
+ {m68k_op_cmp_8_ai , 0xf1f8, 0xb010, { 8, 8, 6}},
+ {m68k_op_cmp_8_pi , 0xf1f8, 0xb018, { 8, 8, 6}},
+ {m68k_op_cmp_8_pd , 0xf1f8, 0xb020, { 10, 10, 7}},
+ {m68k_op_cmp_8_di , 0xf1f8, 0xb028, { 12, 12, 7}},
+ {m68k_op_cmp_8_ix , 0xf1f8, 0xb030, { 14, 14, 9}},
+ {m68k_op_cmp_16_d , 0xf1f8, 0xb040, { 4, 4, 2}},
+ {m68k_op_cmp_16_a , 0xf1f8, 0xb048, { 4, 4, 2}},
+ {m68k_op_cmp_16_ai , 0xf1f8, 0xb050, { 8, 8, 6}},
+ {m68k_op_cmp_16_pi , 0xf1f8, 0xb058, { 8, 8, 6}},
+ {m68k_op_cmp_16_pd , 0xf1f8, 0xb060, { 10, 10, 7}},
+ {m68k_op_cmp_16_di , 0xf1f8, 0xb068, { 12, 12, 7}},
+ {m68k_op_cmp_16_ix , 0xf1f8, 0xb070, { 14, 14, 9}},
+ {m68k_op_cmp_32_d , 0xf1f8, 0xb080, { 6, 6, 2}},
+ {m68k_op_cmp_32_a , 0xf1f8, 0xb088, { 6, 6, 2}},
+ {m68k_op_cmp_32_ai , 0xf1f8, 0xb090, { 14, 14, 6}},
+ {m68k_op_cmp_32_pi , 0xf1f8, 0xb098, { 14, 14, 6}},
+ {m68k_op_cmp_32_pd , 0xf1f8, 0xb0a0, { 16, 16, 7}},
+ {m68k_op_cmp_32_di , 0xf1f8, 0xb0a8, { 18, 18, 7}},
+ {m68k_op_cmp_32_ix , 0xf1f8, 0xb0b0, { 20, 20, 9}},
+ {m68k_op_cmpa_16_d , 0xf1f8, 0xb0c0, { 6, 6, 4}},
+ {m68k_op_cmpa_16_a , 0xf1f8, 0xb0c8, { 6, 6, 4}},
+ {m68k_op_cmpa_16_ai , 0xf1f8, 0xb0d0, { 10, 10, 8}},
+ {m68k_op_cmpa_16_pi , 0xf1f8, 0xb0d8, { 10, 10, 8}},
+ {m68k_op_cmpa_16_pd , 0xf1f8, 0xb0e0, { 12, 12, 9}},
+ {m68k_op_cmpa_16_di , 0xf1f8, 0xb0e8, { 14, 14, 9}},
+ {m68k_op_cmpa_16_ix , 0xf1f8, 0xb0f0, { 16, 16, 11}},
+ {m68k_op_eor_8_d , 0xf1f8, 0xb100, { 4, 4, 2}},
+ {m68k_op_cmpm_8 , 0xf1f8, 0xb108, { 12, 12, 9}},
+ {m68k_op_eor_8_ai , 0xf1f8, 0xb110, { 12, 12, 8}},
+ {m68k_op_eor_8_pi , 0xf1f8, 0xb118, { 12, 12, 8}},
+ {m68k_op_eor_8_pd , 0xf1f8, 0xb120, { 14, 14, 9}},
+ {m68k_op_eor_8_di , 0xf1f8, 0xb128, { 16, 16, 9}},
+ {m68k_op_eor_8_ix , 0xf1f8, 0xb130, { 18, 18, 11}},
+ {m68k_op_eor_16_d , 0xf1f8, 0xb140, { 4, 4, 2}},
+ {m68k_op_cmpm_16 , 0xf1f8, 0xb148, { 12, 12, 9}},
+ {m68k_op_eor_16_ai , 0xf1f8, 0xb150, { 12, 12, 8}},
+ {m68k_op_eor_16_pi , 0xf1f8, 0xb158, { 12, 12, 8}},
+ {m68k_op_eor_16_pd , 0xf1f8, 0xb160, { 14, 14, 9}},
+ {m68k_op_eor_16_di , 0xf1f8, 0xb168, { 16, 16, 9}},
+ {m68k_op_eor_16_ix , 0xf1f8, 0xb170, { 18, 18, 11}},
+ {m68k_op_eor_32_d , 0xf1f8, 0xb180, { 8, 6, 2}},
+ {m68k_op_cmpm_32 , 0xf1f8, 0xb188, { 20, 20, 9}},
+ {m68k_op_eor_32_ai , 0xf1f8, 0xb190, { 20, 20, 8}},
+ {m68k_op_eor_32_pi , 0xf1f8, 0xb198, { 20, 20, 8}},
+ {m68k_op_eor_32_pd , 0xf1f8, 0xb1a0, { 22, 22, 9}},
+ {m68k_op_eor_32_di , 0xf1f8, 0xb1a8, { 24, 24, 9}},
+ {m68k_op_eor_32_ix , 0xf1f8, 0xb1b0, { 26, 26, 11}},
+ {m68k_op_cmpa_32_d , 0xf1f8, 0xb1c0, { 6, 6, 4}},
+ {m68k_op_cmpa_32_a , 0xf1f8, 0xb1c8, { 6, 6, 4}},
+ {m68k_op_cmpa_32_ai , 0xf1f8, 0xb1d0, { 14, 14, 8}},
+ {m68k_op_cmpa_32_pi , 0xf1f8, 0xb1d8, { 14, 14, 8}},
+ {m68k_op_cmpa_32_pd , 0xf1f8, 0xb1e0, { 16, 16, 9}},
+ {m68k_op_cmpa_32_di , 0xf1f8, 0xb1e8, { 18, 18, 9}},
+ {m68k_op_cmpa_32_ix , 0xf1f8, 0xb1f0, { 20, 20, 11}},
+ {m68k_op_and_8_er_d , 0xf1f8, 0xc000, { 4, 4, 2}},
+ {m68k_op_and_8_er_ai , 0xf1f8, 0xc010, { 8, 8, 6}},
+ {m68k_op_and_8_er_pi , 0xf1f8, 0xc018, { 8, 8, 6}},
+ {m68k_op_and_8_er_pd , 0xf1f8, 0xc020, { 10, 10, 7}},
+ {m68k_op_and_8_er_di , 0xf1f8, 0xc028, { 12, 12, 7}},
+ {m68k_op_and_8_er_ix , 0xf1f8, 0xc030, { 14, 14, 9}},
+ {m68k_op_and_16_er_d , 0xf1f8, 0xc040, { 4, 4, 2}},
+ {m68k_op_and_16_er_ai , 0xf1f8, 0xc050, { 8, 8, 6}},
+ {m68k_op_and_16_er_pi , 0xf1f8, 0xc058, { 8, 8, 6}},
+ {m68k_op_and_16_er_pd , 0xf1f8, 0xc060, { 10, 10, 7}},
+ {m68k_op_and_16_er_di , 0xf1f8, 0xc068, { 12, 12, 7}},
+ {m68k_op_and_16_er_ix , 0xf1f8, 0xc070, { 14, 14, 9}},
+ {m68k_op_and_32_er_d , 0xf1f8, 0xc080, { 8, 6, 2}},
+ {m68k_op_and_32_er_ai , 0xf1f8, 0xc090, { 14, 14, 6}},
+ {m68k_op_and_32_er_pi , 0xf1f8, 0xc098, { 14, 14, 6}},
+ {m68k_op_and_32_er_pd , 0xf1f8, 0xc0a0, { 16, 16, 7}},
+ {m68k_op_and_32_er_di , 0xf1f8, 0xc0a8, { 18, 18, 7}},
+ {m68k_op_and_32_er_ix , 0xf1f8, 0xc0b0, { 20, 20, 9}},
+ {m68k_op_mulu_16_d , 0xf1f8, 0xc0c0, { 54, 30, 27}},
+ {m68k_op_mulu_16_ai , 0xf1f8, 0xc0d0, { 58, 34, 31}},
+ {m68k_op_mulu_16_pi , 0xf1f8, 0xc0d8, { 58, 34, 31}},
+ {m68k_op_mulu_16_pd , 0xf1f8, 0xc0e0, { 60, 36, 32}},
+ {m68k_op_mulu_16_di , 0xf1f8, 0xc0e8, { 62, 38, 32}},
+ {m68k_op_mulu_16_ix , 0xf1f8, 0xc0f0, { 64, 40, 34}},
+ {m68k_op_abcd_8_rr , 0xf1f8, 0xc100, { 6, 6, 4}},
+ {m68k_op_abcd_8_mm , 0xf1f8, 0xc108, { 18, 18, 16}},
+ {m68k_op_and_8_re_ai , 0xf1f8, 0xc110, { 12, 12, 8}},
+ {m68k_op_and_8_re_pi , 0xf1f8, 0xc118, { 12, 12, 8}},
+ {m68k_op_and_8_re_pd , 0xf1f8, 0xc120, { 14, 14, 9}},
+ {m68k_op_and_8_re_di , 0xf1f8, 0xc128, { 16, 16, 9}},
+ {m68k_op_and_8_re_ix , 0xf1f8, 0xc130, { 18, 18, 11}},
+ {m68k_op_exg_32_dd , 0xf1f8, 0xc140, { 6, 6, 2}},
+ {m68k_op_exg_32_aa , 0xf1f8, 0xc148, { 6, 6, 2}},
+ {m68k_op_and_16_re_ai , 0xf1f8, 0xc150, { 12, 12, 8}},
+ {m68k_op_and_16_re_pi , 0xf1f8, 0xc158, { 12, 12, 8}},
+ {m68k_op_and_16_re_pd , 0xf1f8, 0xc160, { 14, 14, 9}},
+ {m68k_op_and_16_re_di , 0xf1f8, 0xc168, { 16, 16, 9}},
+ {m68k_op_and_16_re_ix , 0xf1f8, 0xc170, { 18, 18, 11}},
+ {m68k_op_exg_32_da , 0xf1f8, 0xc188, { 6, 6, 2}},
+ {m68k_op_and_32_re_ai , 0xf1f8, 0xc190, { 20, 20, 8}},
+ {m68k_op_and_32_re_pi , 0xf1f8, 0xc198, { 20, 20, 8}},
+ {m68k_op_and_32_re_pd , 0xf1f8, 0xc1a0, { 22, 22, 9}},
+ {m68k_op_and_32_re_di , 0xf1f8, 0xc1a8, { 24, 24, 9}},
+ {m68k_op_and_32_re_ix , 0xf1f8, 0xc1b0, { 26, 26, 11}},
+ {m68k_op_muls_16_d , 0xf1f8, 0xc1c0, { 54, 32, 27}},
+ {m68k_op_muls_16_ai , 0xf1f8, 0xc1d0, { 58, 36, 31}},
+ {m68k_op_muls_16_pi , 0xf1f8, 0xc1d8, { 58, 36, 31}},
+ {m68k_op_muls_16_pd , 0xf1f8, 0xc1e0, { 60, 38, 32}},
+ {m68k_op_muls_16_di , 0xf1f8, 0xc1e8, { 62, 40, 32}},
+ {m68k_op_muls_16_ix , 0xf1f8, 0xc1f0, { 64, 42, 34}},
+ {m68k_op_add_8_er_d , 0xf1f8, 0xd000, { 4, 4, 2}},
+ {m68k_op_add_8_er_ai , 0xf1f8, 0xd010, { 8, 8, 6}},
+ {m68k_op_add_8_er_pi , 0xf1f8, 0xd018, { 8, 8, 6}},
+ {m68k_op_add_8_er_pd , 0xf1f8, 0xd020, { 10, 10, 7}},
+ {m68k_op_add_8_er_di , 0xf1f8, 0xd028, { 12, 12, 7}},
+ {m68k_op_add_8_er_ix , 0xf1f8, 0xd030, { 14, 14, 9}},
+ {m68k_op_add_16_er_d , 0xf1f8, 0xd040, { 4, 4, 2}},
+ {m68k_op_add_16_er_a , 0xf1f8, 0xd048, { 4, 4, 2}},
+ {m68k_op_add_16_er_ai , 0xf1f8, 0xd050, { 8, 8, 6}},
+ {m68k_op_add_16_er_pi , 0xf1f8, 0xd058, { 8, 8, 6}},
+ {m68k_op_add_16_er_pd , 0xf1f8, 0xd060, { 10, 10, 7}},
+ {m68k_op_add_16_er_di , 0xf1f8, 0xd068, { 12, 12, 7}},
+ {m68k_op_add_16_er_ix , 0xf1f8, 0xd070, { 14, 14, 9}},
+ {m68k_op_add_32_er_d , 0xf1f8, 0xd080, { 8, 6, 2}},
+ {m68k_op_add_32_er_a , 0xf1f8, 0xd088, { 8, 6, 2}},
+ {m68k_op_add_32_er_ai , 0xf1f8, 0xd090, { 14, 14, 6}},
+ {m68k_op_add_32_er_pi , 0xf1f8, 0xd098, { 14, 14, 6}},
+ {m68k_op_add_32_er_pd , 0xf1f8, 0xd0a0, { 16, 16, 7}},
+ {m68k_op_add_32_er_di , 0xf1f8, 0xd0a8, { 18, 18, 7}},
+ {m68k_op_add_32_er_ix , 0xf1f8, 0xd0b0, { 20, 20, 9}},
+ {m68k_op_adda_16_d , 0xf1f8, 0xd0c0, { 8, 8, 2}},
+ {m68k_op_adda_16_a , 0xf1f8, 0xd0c8, { 8, 8, 2}},
+ {m68k_op_adda_16_ai , 0xf1f8, 0xd0d0, { 12, 12, 6}},
+ {m68k_op_adda_16_pi , 0xf1f8, 0xd0d8, { 12, 12, 6}},
+ {m68k_op_adda_16_pd , 0xf1f8, 0xd0e0, { 14, 14, 7}},
+ {m68k_op_adda_16_di , 0xf1f8, 0xd0e8, { 16, 16, 7}},
+ {m68k_op_adda_16_ix , 0xf1f8, 0xd0f0, { 18, 18, 9}},
+ {m68k_op_addx_8_rr , 0xf1f8, 0xd100, { 4, 4, 2}},
+ {m68k_op_addx_8_mm , 0xf1f8, 0xd108, { 18, 18, 12}},
+ {m68k_op_add_8_re_ai , 0xf1f8, 0xd110, { 12, 12, 8}},
+ {m68k_op_add_8_re_pi , 0xf1f8, 0xd118, { 12, 12, 8}},
+ {m68k_op_add_8_re_pd , 0xf1f8, 0xd120, { 14, 14, 9}},
+ {m68k_op_add_8_re_di , 0xf1f8, 0xd128, { 16, 16, 9}},
+ {m68k_op_add_8_re_ix , 0xf1f8, 0xd130, { 18, 18, 11}},
+ {m68k_op_addx_16_rr , 0xf1f8, 0xd140, { 4, 4, 2}},
+ {m68k_op_addx_16_mm , 0xf1f8, 0xd148, { 18, 18, 12}},
+ {m68k_op_add_16_re_ai , 0xf1f8, 0xd150, { 12, 12, 8}},
+ {m68k_op_add_16_re_pi , 0xf1f8, 0xd158, { 12, 12, 8}},
+ {m68k_op_add_16_re_pd , 0xf1f8, 0xd160, { 14, 14, 9}},
+ {m68k_op_add_16_re_di , 0xf1f8, 0xd168, { 16, 16, 9}},
+ {m68k_op_add_16_re_ix , 0xf1f8, 0xd170, { 18, 18, 11}},
+ {m68k_op_addx_32_rr , 0xf1f8, 0xd180, { 8, 6, 2}},
+ {m68k_op_addx_32_mm , 0xf1f8, 0xd188, { 30, 30, 12}},
+ {m68k_op_add_32_re_ai , 0xf1f8, 0xd190, { 20, 20, 8}},
+ {m68k_op_add_32_re_pi , 0xf1f8, 0xd198, { 20, 20, 8}},
+ {m68k_op_add_32_re_pd , 0xf1f8, 0xd1a0, { 22, 22, 9}},
+ {m68k_op_add_32_re_di , 0xf1f8, 0xd1a8, { 24, 24, 9}},
+ {m68k_op_add_32_re_ix , 0xf1f8, 0xd1b0, { 26, 26, 11}},
+ {m68k_op_adda_32_d , 0xf1f8, 0xd1c0, { 8, 6, 2}},
+ {m68k_op_adda_32_a , 0xf1f8, 0xd1c8, { 8, 6, 2}},
+ {m68k_op_adda_32_ai , 0xf1f8, 0xd1d0, { 14, 14, 6}},
+ {m68k_op_adda_32_pi , 0xf1f8, 0xd1d8, { 14, 14, 6}},
+ {m68k_op_adda_32_pd , 0xf1f8, 0xd1e0, { 16, 16, 7}},
+ {m68k_op_adda_32_di , 0xf1f8, 0xd1e8, { 18, 18, 7}},
+ {m68k_op_adda_32_ix , 0xf1f8, 0xd1f0, { 20, 20, 9}},
+ {m68k_op_asr_8_s , 0xf1f8, 0xe000, { 6, 6, 6}},
+ {m68k_op_lsr_8_s , 0xf1f8, 0xe008, { 6, 6, 4}},
+ {m68k_op_roxr_8_s , 0xf1f8, 0xe010, { 6, 6, 12}},
+ {m68k_op_ror_8_s , 0xf1f8, 0xe018, { 6, 6, 8}},
+ {m68k_op_asr_8_r , 0xf1f8, 0xe020, { 6, 6, 6}},
+ {m68k_op_lsr_8_r , 0xf1f8, 0xe028, { 6, 6, 6}},
+ {m68k_op_roxr_8_r , 0xf1f8, 0xe030, { 6, 6, 12}},
+ {m68k_op_ror_8_r , 0xf1f8, 0xe038, { 6, 6, 8}},
+ {m68k_op_asr_16_s , 0xf1f8, 0xe040, { 6, 6, 6}},
+ {m68k_op_lsr_16_s , 0xf1f8, 0xe048, { 6, 6, 4}},
+ {m68k_op_roxr_16_s , 0xf1f8, 0xe050, { 6, 6, 12}},
+ {m68k_op_ror_16_s , 0xf1f8, 0xe058, { 6, 6, 8}},
+ {m68k_op_asr_16_r , 0xf1f8, 0xe060, { 6, 6, 6}},
+ {m68k_op_lsr_16_r , 0xf1f8, 0xe068, { 6, 6, 6}},
+ {m68k_op_roxr_16_r , 0xf1f8, 0xe070, { 6, 6, 12}},
+ {m68k_op_ror_16_r , 0xf1f8, 0xe078, { 6, 6, 8}},
+ {m68k_op_asr_32_s , 0xf1f8, 0xe080, { 8, 8, 6}},
+ {m68k_op_lsr_32_s , 0xf1f8, 0xe088, { 8, 8, 4}},
+ {m68k_op_roxr_32_s , 0xf1f8, 0xe090, { 8, 8, 12}},
+ {m68k_op_ror_32_s , 0xf1f8, 0xe098, { 8, 8, 8}},
+ {m68k_op_asr_32_r , 0xf1f8, 0xe0a0, { 8, 8, 6}},
+ {m68k_op_lsr_32_r , 0xf1f8, 0xe0a8, { 8, 8, 6}},
+ {m68k_op_roxr_32_r , 0xf1f8, 0xe0b0, { 8, 8, 12}},
+ {m68k_op_ror_32_r , 0xf1f8, 0xe0b8, { 8, 8, 8}},
+ {m68k_op_asl_8_s , 0xf1f8, 0xe100, { 6, 6, 8}},
+ {m68k_op_lsl_8_s , 0xf1f8, 0xe108, { 6, 6, 4}},
+ {m68k_op_roxl_8_s , 0xf1f8, 0xe110, { 6, 6, 12}},
+ {m68k_op_rol_8_s , 0xf1f8, 0xe118, { 6, 6, 8}},
+ {m68k_op_asl_8_r , 0xf1f8, 0xe120, { 6, 6, 8}},
+ {m68k_op_lsl_8_r , 0xf1f8, 0xe128, { 6, 6, 6}},
+ {m68k_op_roxl_8_r , 0xf1f8, 0xe130, { 6, 6, 12}},
+ {m68k_op_rol_8_r , 0xf1f8, 0xe138, { 6, 6, 8}},
+ {m68k_op_asl_16_s , 0xf1f8, 0xe140, { 6, 6, 8}},
+ {m68k_op_lsl_16_s , 0xf1f8, 0xe148, { 6, 6, 4}},
+ {m68k_op_roxl_16_s , 0xf1f8, 0xe150, { 6, 6, 12}},
+ {m68k_op_rol_16_s , 0xf1f8, 0xe158, { 6, 6, 8}},
+ {m68k_op_asl_16_r , 0xf1f8, 0xe160, { 6, 6, 8}},
+ {m68k_op_lsl_16_r , 0xf1f8, 0xe168, { 6, 6, 6}},
+ {m68k_op_roxl_16_r , 0xf1f8, 0xe170, { 6, 6, 12}},
+ {m68k_op_rol_16_r , 0xf1f8, 0xe178, { 6, 6, 8}},
+ {m68k_op_asl_32_s , 0xf1f8, 0xe180, { 8, 8, 8}},
+ {m68k_op_lsl_32_s , 0xf1f8, 0xe188, { 8, 8, 4}},
+ {m68k_op_roxl_32_s , 0xf1f8, 0xe190, { 8, 8, 12}},
+ {m68k_op_rol_32_s , 0xf1f8, 0xe198, { 8, 8, 8}},
+ {m68k_op_asl_32_r , 0xf1f8, 0xe1a0, { 8, 8, 8}},
+ {m68k_op_lsl_32_r , 0xf1f8, 0xe1a8, { 8, 8, 6}},
+ {m68k_op_roxl_32_r , 0xf1f8, 0xe1b0, { 8, 8, 12}},
+ {m68k_op_rol_32_r , 0xf1f8, 0xe1b8, { 8, 8, 8}},
+ {m68k_op_cpdbcc_32 , 0xf1f8, 0xf048, { 0, 0, 4}},
+ {m68k_op_cptrapcc_32 , 0xf1f8, 0xf078, { 0, 0, 4}},
+ {m68k_op_rtm_32 , 0xfff0, 0x06c0, { 0, 0, 19}},
+ {m68k_op_trap , 0xfff0, 0x4e40, { 4, 4, 4}},
+ {m68k_op_btst_8_r_pi7 , 0xf1ff, 0x011f, { 8, 8, 8}},
+ {m68k_op_btst_8_r_pd7 , 0xf1ff, 0x0127, { 10, 10, 9}},
+ {m68k_op_btst_8_r_aw , 0xf1ff, 0x0138, { 12, 12, 8}},
+ {m68k_op_btst_8_r_al , 0xf1ff, 0x0139, { 16, 16, 8}},
+ {m68k_op_btst_8_r_pcdi , 0xf1ff, 0x013a, { 12, 12, 9}},
+ {m68k_op_btst_8_r_pcix , 0xf1ff, 0x013b, { 14, 14, 11}},
+ {m68k_op_btst_8_r_i , 0xf1ff, 0x013c, { 8, 8, 6}},
+ {m68k_op_bchg_8_r_pi7 , 0xf1ff, 0x015f, { 12, 12, 8}},
+ {m68k_op_bchg_8_r_pd7 , 0xf1ff, 0x0167, { 14, 14, 9}},
+ {m68k_op_bchg_8_r_aw , 0xf1ff, 0x0178, { 16, 16, 8}},
+ {m68k_op_bchg_8_r_al , 0xf1ff, 0x0179, { 20, 20, 8}},
+ {m68k_op_bclr_8_r_pi7 , 0xf1ff, 0x019f, { 12, 14, 8}},
+ {m68k_op_bclr_8_r_pd7 , 0xf1ff, 0x01a7, { 14, 16, 9}},
+ {m68k_op_bclr_8_r_aw , 0xf1ff, 0x01b8, { 16, 18, 8}},
+ {m68k_op_bclr_8_r_al , 0xf1ff, 0x01b9, { 20, 22, 8}},
+ {m68k_op_bset_8_r_pi7 , 0xf1ff, 0x01df, { 12, 12, 8}},
+ {m68k_op_bset_8_r_pd7 , 0xf1ff, 0x01e7, { 14, 14, 9}},
+ {m68k_op_bset_8_r_aw , 0xf1ff, 0x01f8, { 16, 16, 8}},
+ {m68k_op_bset_8_r_al , 0xf1ff, 0x01f9, { 20, 20, 8}},
+ {m68k_op_move_8_d_pi7 , 0xf1ff, 0x101f, { 8, 8, 6}},
+ {m68k_op_move_8_d_pd7 , 0xf1ff, 0x1027, { 10, 10, 7}},
+ {m68k_op_move_8_d_aw , 0xf1ff, 0x1038, { 12, 12, 6}},
+ {m68k_op_move_8_d_al , 0xf1ff, 0x1039, { 16, 16, 6}},
+ {m68k_op_move_8_d_pcdi , 0xf1ff, 0x103a, { 12, 12, 7}},
+ {m68k_op_move_8_d_pcix , 0xf1ff, 0x103b, { 14, 14, 9}},
+ {m68k_op_move_8_d_i , 0xf1ff, 0x103c, { 8, 8, 4}},
+ {m68k_op_move_8_ai_pi7 , 0xf1ff, 0x109f, { 12, 12, 8}},
+ {m68k_op_move_8_ai_pd7 , 0xf1ff, 0x10a7, { 14, 14, 9}},
+ {m68k_op_move_8_ai_aw , 0xf1ff, 0x10b8, { 16, 16, 8}},
+ {m68k_op_move_8_ai_al , 0xf1ff, 0x10b9, { 20, 20, 8}},
+ {m68k_op_move_8_ai_pcdi , 0xf1ff, 0x10ba, { 16, 16, 9}},
+ {m68k_op_move_8_ai_pcix , 0xf1ff, 0x10bb, { 18, 18, 11}},
+ {m68k_op_move_8_ai_i , 0xf1ff, 0x10bc, { 12, 12, 6}},
+ {m68k_op_move_8_pi_pi7 , 0xf1ff, 0x10df, { 12, 12, 8}},
+ {m68k_op_move_8_pi_pd7 , 0xf1ff, 0x10e7, { 14, 14, 9}},
+ {m68k_op_move_8_pi_aw , 0xf1ff, 0x10f8, { 16, 16, 8}},
+ {m68k_op_move_8_pi_al , 0xf1ff, 0x10f9, { 20, 20, 8}},
+ {m68k_op_move_8_pi_pcdi , 0xf1ff, 0x10fa, { 16, 16, 9}},
+ {m68k_op_move_8_pi_pcix , 0xf1ff, 0x10fb, { 18, 18, 11}},
+ {m68k_op_move_8_pi_i , 0xf1ff, 0x10fc, { 12, 12, 6}},
+ {m68k_op_move_8_pd_pi7 , 0xf1ff, 0x111f, { 12, 12, 9}},
+ {m68k_op_move_8_pd_pd7 , 0xf1ff, 0x1127, { 14, 14, 10}},
+ {m68k_op_move_8_pd_aw , 0xf1ff, 0x1138, { 16, 16, 9}},
+ {m68k_op_move_8_pd_al , 0xf1ff, 0x1139, { 20, 20, 9}},
+ {m68k_op_move_8_pd_pcdi , 0xf1ff, 0x113a, { 16, 16, 10}},
+ {m68k_op_move_8_pd_pcix , 0xf1ff, 0x113b, { 18, 18, 12}},
+ {m68k_op_move_8_pd_i , 0xf1ff, 0x113c, { 12, 12, 7}},
+ {m68k_op_move_8_di_pi7 , 0xf1ff, 0x115f, { 16, 16, 9}},
+ {m68k_op_move_8_di_pd7 , 0xf1ff, 0x1167, { 18, 18, 10}},
+ {m68k_op_move_8_di_aw , 0xf1ff, 0x1178, { 20, 20, 9}},
+ {m68k_op_move_8_di_al , 0xf1ff, 0x1179, { 24, 24, 9}},
+ {m68k_op_move_8_di_pcdi , 0xf1ff, 0x117a, { 20, 20, 10}},
+ {m68k_op_move_8_di_pcix , 0xf1ff, 0x117b, { 22, 22, 12}},
+ {m68k_op_move_8_di_i , 0xf1ff, 0x117c, { 16, 16, 7}},
+ {m68k_op_move_8_ix_pi7 , 0xf1ff, 0x119f, { 18, 18, 11}},
+ {m68k_op_move_8_ix_pd7 , 0xf1ff, 0x11a7, { 20, 20, 12}},
+ {m68k_op_move_8_ix_aw , 0xf1ff, 0x11b8, { 22, 22, 11}},
+ {m68k_op_move_8_ix_al , 0xf1ff, 0x11b9, { 26, 26, 11}},
+ {m68k_op_move_8_ix_pcdi , 0xf1ff, 0x11ba, { 22, 22, 12}},
+ {m68k_op_move_8_ix_pcix , 0xf1ff, 0x11bb, { 24, 24, 14}},
+ {m68k_op_move_8_ix_i , 0xf1ff, 0x11bc, { 18, 18, 9}},
+ {m68k_op_move_32_d_aw , 0xf1ff, 0x2038, { 16, 16, 6}},
+ {m68k_op_move_32_d_al , 0xf1ff, 0x2039, { 20, 20, 6}},
+ {m68k_op_move_32_d_pcdi , 0xf1ff, 0x203a, { 16, 16, 7}},
+ {m68k_op_move_32_d_pcix , 0xf1ff, 0x203b, { 18, 18, 9}},
+ {m68k_op_move_32_d_i , 0xf1ff, 0x203c, { 12, 12, 6}},
+ {m68k_op_movea_32_aw , 0xf1ff, 0x2078, { 16, 16, 6}},
+ {m68k_op_movea_32_al , 0xf1ff, 0x2079, { 20, 20, 6}},
+ {m68k_op_movea_32_pcdi , 0xf1ff, 0x207a, { 16, 16, 7}},
+ {m68k_op_movea_32_pcix , 0xf1ff, 0x207b, { 18, 18, 9}},
+ {m68k_op_movea_32_i , 0xf1ff, 0x207c, { 12, 12, 6}},
+ {m68k_op_move_32_ai_aw , 0xf1ff, 0x20b8, { 24, 24, 8}},
+ {m68k_op_move_32_ai_al , 0xf1ff, 0x20b9, { 28, 28, 8}},
+ {m68k_op_move_32_ai_pcdi , 0xf1ff, 0x20ba, { 24, 24, 9}},
+ {m68k_op_move_32_ai_pcix , 0xf1ff, 0x20bb, { 26, 26, 11}},
+ {m68k_op_move_32_ai_i , 0xf1ff, 0x20bc, { 20, 20, 8}},
+ {m68k_op_move_32_pi_aw , 0xf1ff, 0x20f8, { 24, 24, 8}},
+ {m68k_op_move_32_pi_al , 0xf1ff, 0x20f9, { 28, 28, 8}},
+ {m68k_op_move_32_pi_pcdi , 0xf1ff, 0x20fa, { 24, 24, 9}},
+ {m68k_op_move_32_pi_pcix , 0xf1ff, 0x20fb, { 26, 26, 11}},
+ {m68k_op_move_32_pi_i , 0xf1ff, 0x20fc, { 20, 20, 8}},
+ {m68k_op_move_32_pd_aw , 0xf1ff, 0x2138, { 24, 26, 9}},
+ {m68k_op_move_32_pd_al , 0xf1ff, 0x2139, { 28, 30, 9}},
+ {m68k_op_move_32_pd_pcdi , 0xf1ff, 0x213a, { 24, 26, 10}},
+ {m68k_op_move_32_pd_pcix , 0xf1ff, 0x213b, { 26, 28, 12}},
+ {m68k_op_move_32_pd_i , 0xf1ff, 0x213c, { 20, 22, 9}},
+ {m68k_op_move_32_di_aw , 0xf1ff, 0x2178, { 28, 28, 9}},
+ {m68k_op_move_32_di_al , 0xf1ff, 0x2179, { 32, 32, 9}},
+ {m68k_op_move_32_di_pcdi , 0xf1ff, 0x217a, { 28, 28, 10}},
+ {m68k_op_move_32_di_pcix , 0xf1ff, 0x217b, { 30, 30, 12}},
+ {m68k_op_move_32_di_i , 0xf1ff, 0x217c, { 24, 24, 9}},
+ {m68k_op_move_32_ix_aw , 0xf1ff, 0x21b8, { 30, 30, 11}},
+ {m68k_op_move_32_ix_al , 0xf1ff, 0x21b9, { 34, 34, 11}},
+ {m68k_op_move_32_ix_pcdi , 0xf1ff, 0x21ba, { 30, 30, 12}},
+ {m68k_op_move_32_ix_pcix , 0xf1ff, 0x21bb, { 32, 32, 14}},
+ {m68k_op_move_32_ix_i , 0xf1ff, 0x21bc, { 26, 26, 11}},
+ {m68k_op_move_16_d_aw , 0xf1ff, 0x3038, { 12, 12, 6}},
+ {m68k_op_move_16_d_al , 0xf1ff, 0x3039, { 16, 16, 6}},
+ {m68k_op_move_16_d_pcdi , 0xf1ff, 0x303a, { 12, 12, 7}},
+ {m68k_op_move_16_d_pcix , 0xf1ff, 0x303b, { 14, 14, 9}},
+ {m68k_op_move_16_d_i , 0xf1ff, 0x303c, { 8, 8, 4}},
+ {m68k_op_movea_16_aw , 0xf1ff, 0x3078, { 12, 12, 6}},
+ {m68k_op_movea_16_al , 0xf1ff, 0x3079, { 16, 16, 6}},
+ {m68k_op_movea_16_pcdi , 0xf1ff, 0x307a, { 12, 12, 7}},
+ {m68k_op_movea_16_pcix , 0xf1ff, 0x307b, { 14, 14, 9}},
+ {m68k_op_movea_16_i , 0xf1ff, 0x307c, { 8, 8, 4}},
+ {m68k_op_move_16_ai_aw , 0xf1ff, 0x30b8, { 16, 16, 8}},
+ {m68k_op_move_16_ai_al , 0xf1ff, 0x30b9, { 20, 20, 8}},
+ {m68k_op_move_16_ai_pcdi , 0xf1ff, 0x30ba, { 16, 16, 9}},
+ {m68k_op_move_16_ai_pcix , 0xf1ff, 0x30bb, { 18, 18, 11}},
+ {m68k_op_move_16_ai_i , 0xf1ff, 0x30bc, { 12, 12, 6}},
+ {m68k_op_move_16_pi_aw , 0xf1ff, 0x30f8, { 16, 16, 8}},
+ {m68k_op_move_16_pi_al , 0xf1ff, 0x30f9, { 20, 20, 8}},
+ {m68k_op_move_16_pi_pcdi , 0xf1ff, 0x30fa, { 16, 16, 9}},
+ {m68k_op_move_16_pi_pcix , 0xf1ff, 0x30fb, { 18, 18, 11}},
+ {m68k_op_move_16_pi_i , 0xf1ff, 0x30fc, { 12, 12, 6}},
+ {m68k_op_move_16_pd_aw , 0xf1ff, 0x3138, { 16, 16, 9}},
+ {m68k_op_move_16_pd_al , 0xf1ff, 0x3139, { 20, 20, 9}},
+ {m68k_op_move_16_pd_pcdi , 0xf1ff, 0x313a, { 16, 16, 10}},
+ {m68k_op_move_16_pd_pcix , 0xf1ff, 0x313b, { 18, 18, 12}},
+ {m68k_op_move_16_pd_i , 0xf1ff, 0x313c, { 12, 12, 7}},
+ {m68k_op_move_16_di_aw , 0xf1ff, 0x3178, { 20, 20, 9}},
+ {m68k_op_move_16_di_al , 0xf1ff, 0x3179, { 24, 24, 9}},
+ {m68k_op_move_16_di_pcdi , 0xf1ff, 0x317a, { 20, 20, 10}},
+ {m68k_op_move_16_di_pcix , 0xf1ff, 0x317b, { 22, 22, 12}},
+ {m68k_op_move_16_di_i , 0xf1ff, 0x317c, { 16, 16, 7}},
+ {m68k_op_move_16_ix_aw , 0xf1ff, 0x31b8, { 22, 22, 11}},
+ {m68k_op_move_16_ix_al , 0xf1ff, 0x31b9, { 26, 26, 11}},
+ {m68k_op_move_16_ix_pcdi , 0xf1ff, 0x31ba, { 22, 22, 12}},
+ {m68k_op_move_16_ix_pcix , 0xf1ff, 0x31bb, { 24, 24, 14}},
+ {m68k_op_move_16_ix_i , 0xf1ff, 0x31bc, { 18, 18, 9}},
+ {m68k_op_chk_32_aw , 0xf1ff, 0x4138, { 0, 0, 12}},
+ {m68k_op_chk_32_al , 0xf1ff, 0x4139, { 0, 0, 12}},
+ {m68k_op_chk_32_pcdi , 0xf1ff, 0x413a, { 0, 0, 13}},
+ {m68k_op_chk_32_pcix , 0xf1ff, 0x413b, { 0, 0, 15}},
+ {m68k_op_chk_32_i , 0xf1ff, 0x413c, { 0, 0, 12}},
+ {m68k_op_chk_16_aw , 0xf1ff, 0x41b8, { 18, 16, 12}},
+ {m68k_op_chk_16_al , 0xf1ff, 0x41b9, { 22, 20, 12}},
+ {m68k_op_chk_16_pcdi , 0xf1ff, 0x41ba, { 18, 16, 13}},
+ {m68k_op_chk_16_pcix , 0xf1ff, 0x41bb, { 20, 18, 15}},
+ {m68k_op_chk_16_i , 0xf1ff, 0x41bc, { 14, 12, 10}},
+ {m68k_op_lea_32_aw , 0xf1ff, 0x41f8, { 8, 8, 6}},
+ {m68k_op_lea_32_al , 0xf1ff, 0x41f9, { 12, 12, 6}},
+ {m68k_op_lea_32_pcdi , 0xf1ff, 0x41fa, { 8, 8, 7}},
+ {m68k_op_lea_32_pcix , 0xf1ff, 0x41fb, { 12, 12, 9}},
+ {m68k_op_addq_8_pi7 , 0xf1ff, 0x501f, { 12, 12, 8}},
+ {m68k_op_addq_8_pd7 , 0xf1ff, 0x5027, { 14, 14, 9}},
+ {m68k_op_addq_8_aw , 0xf1ff, 0x5038, { 16, 16, 8}},
+ {m68k_op_addq_8_al , 0xf1ff, 0x5039, { 20, 20, 8}},
+ {m68k_op_addq_16_aw , 0xf1ff, 0x5078, { 16, 16, 8}},
+ {m68k_op_addq_16_al , 0xf1ff, 0x5079, { 20, 20, 8}},
+ {m68k_op_addq_32_aw , 0xf1ff, 0x50b8, { 24, 24, 8}},
+ {m68k_op_addq_32_al , 0xf1ff, 0x50b9, { 28, 28, 8}},
+ {m68k_op_subq_8_pi7 , 0xf1ff, 0x511f, { 12, 12, 8}},
+ {m68k_op_subq_8_pd7 , 0xf1ff, 0x5127, { 14, 14, 9}},
+ {m68k_op_subq_8_aw , 0xf1ff, 0x5138, { 16, 16, 8}},
+ {m68k_op_subq_8_al , 0xf1ff, 0x5139, { 20, 20, 8}},
+ {m68k_op_subq_16_aw , 0xf1ff, 0x5178, { 16, 16, 8}},
+ {m68k_op_subq_16_al , 0xf1ff, 0x5179, { 20, 20, 8}},
+ {m68k_op_subq_32_aw , 0xf1ff, 0x51b8, { 24, 24, 8}},
+ {m68k_op_subq_32_al , 0xf1ff, 0x51b9, { 28, 28, 8}},
+ {m68k_op_or_8_er_pi7 , 0xf1ff, 0x801f, { 8, 8, 6}},
+ {m68k_op_or_8_er_pd7 , 0xf1ff, 0x8027, { 10, 10, 7}},
+ {m68k_op_or_8_er_aw , 0xf1ff, 0x8038, { 12, 12, 6}},
+ {m68k_op_or_8_er_al , 0xf1ff, 0x8039, { 16, 16, 6}},
+ {m68k_op_or_8_er_pcdi , 0xf1ff, 0x803a, { 12, 12, 7}},
+ {m68k_op_or_8_er_pcix , 0xf1ff, 0x803b, { 14, 14, 9}},
+ {m68k_op_or_8_er_i , 0xf1ff, 0x803c, { 8, 8, 4}},
+ {m68k_op_or_16_er_aw , 0xf1ff, 0x8078, { 12, 12, 6}},
+ {m68k_op_or_16_er_al , 0xf1ff, 0x8079, { 16, 16, 6}},
+ {m68k_op_or_16_er_pcdi , 0xf1ff, 0x807a, { 12, 12, 7}},
+ {m68k_op_or_16_er_pcix , 0xf1ff, 0x807b, { 14, 14, 9}},
+ {m68k_op_or_16_er_i , 0xf1ff, 0x807c, { 8, 8, 4}},
+ {m68k_op_or_32_er_aw , 0xf1ff, 0x80b8, { 18, 18, 6}},
+ {m68k_op_or_32_er_al , 0xf1ff, 0x80b9, { 22, 22, 6}},
+ {m68k_op_or_32_er_pcdi , 0xf1ff, 0x80ba, { 18, 18, 7}},
+ {m68k_op_or_32_er_pcix , 0xf1ff, 0x80bb, { 20, 20, 9}},
+ {m68k_op_or_32_er_i , 0xf1ff, 0x80bc, { 16, 14, 6}},
+ {m68k_op_divu_16_aw , 0xf1ff, 0x80f8, {148, 116, 48}},
+ {m68k_op_divu_16_al , 0xf1ff, 0x80f9, {152, 120, 48}},
+ {m68k_op_divu_16_pcdi , 0xf1ff, 0x80fa, {148, 116, 49}},
+ {m68k_op_divu_16_pcix , 0xf1ff, 0x80fb, {150, 118, 51}},
+ {m68k_op_divu_16_i , 0xf1ff, 0x80fc, {144, 112, 46}},
+ {m68k_op_sbcd_8_mm_ay7 , 0xf1ff, 0x810f, { 18, 18, 16}},
+ {m68k_op_or_8_re_pi7 , 0xf1ff, 0x811f, { 12, 12, 8}},
+ {m68k_op_or_8_re_pd7 , 0xf1ff, 0x8127, { 14, 14, 9}},
+ {m68k_op_or_8_re_aw , 0xf1ff, 0x8138, { 16, 16, 8}},
+ {m68k_op_or_8_re_al , 0xf1ff, 0x8139, { 20, 20, 8}},
+ {m68k_op_pack_16_mm_ay7 , 0xf1ff, 0x814f, { 0, 0, 13}},
+ {m68k_op_or_16_re_aw , 0xf1ff, 0x8178, { 16, 16, 8}},
+ {m68k_op_or_16_re_al , 0xf1ff, 0x8179, { 20, 20, 8}},
+ {m68k_op_unpk_16_mm_ay7 , 0xf1ff, 0x818f, { 0, 0, 13}},
+ {m68k_op_or_32_re_aw , 0xf1ff, 0x81b8, { 24, 24, 8}},
+ {m68k_op_or_32_re_al , 0xf1ff, 0x81b9, { 28, 28, 8}},
+ {m68k_op_divs_16_aw , 0xf1ff, 0x81f8, {166, 130, 60}},
+ {m68k_op_divs_16_al , 0xf1ff, 0x81f9, {170, 134, 60}},
+ {m68k_op_divs_16_pcdi , 0xf1ff, 0x81fa, {166, 130, 61}},
+ {m68k_op_divs_16_pcix , 0xf1ff, 0x81fb, {168, 132, 63}},
+ {m68k_op_divs_16_i , 0xf1ff, 0x81fc, {162, 126, 58}},
+ {m68k_op_sub_8_er_pi7 , 0xf1ff, 0x901f, { 8, 8, 6}},
+ {m68k_op_sub_8_er_pd7 , 0xf1ff, 0x9027, { 10, 10, 7}},
+ {m68k_op_sub_8_er_aw , 0xf1ff, 0x9038, { 12, 12, 6}},
+ {m68k_op_sub_8_er_al , 0xf1ff, 0x9039, { 16, 16, 6}},
+ {m68k_op_sub_8_er_pcdi , 0xf1ff, 0x903a, { 12, 12, 7}},
+ {m68k_op_sub_8_er_pcix , 0xf1ff, 0x903b, { 14, 14, 9}},
+ {m68k_op_sub_8_er_i , 0xf1ff, 0x903c, { 8, 8, 4}},
+ {m68k_op_sub_16_er_aw , 0xf1ff, 0x9078, { 12, 12, 6}},
+ {m68k_op_sub_16_er_al , 0xf1ff, 0x9079, { 16, 16, 6}},
+ {m68k_op_sub_16_er_pcdi , 0xf1ff, 0x907a, { 12, 12, 7}},
+ {m68k_op_sub_16_er_pcix , 0xf1ff, 0x907b, { 14, 14, 9}},
+ {m68k_op_sub_16_er_i , 0xf1ff, 0x907c, { 8, 8, 4}},
+ {m68k_op_sub_32_er_aw , 0xf1ff, 0x90b8, { 18, 18, 6}},
+ {m68k_op_sub_32_er_al , 0xf1ff, 0x90b9, { 22, 22, 6}},
+ {m68k_op_sub_32_er_pcdi , 0xf1ff, 0x90ba, { 18, 18, 7}},
+ {m68k_op_sub_32_er_pcix , 0xf1ff, 0x90bb, { 20, 20, 9}},
+ {m68k_op_sub_32_er_i , 0xf1ff, 0x90bc, { 16, 14, 6}},
+ {m68k_op_suba_16_aw , 0xf1ff, 0x90f8, { 16, 16, 6}},
+ {m68k_op_suba_16_al , 0xf1ff, 0x90f9, { 20, 20, 6}},
+ {m68k_op_suba_16_pcdi , 0xf1ff, 0x90fa, { 16, 16, 7}},
+ {m68k_op_suba_16_pcix , 0xf1ff, 0x90fb, { 18, 18, 9}},
+ {m68k_op_suba_16_i , 0xf1ff, 0x90fc, { 12, 12, 4}},
+ {m68k_op_subx_8_mm_ay7 , 0xf1ff, 0x910f, { 18, 18, 12}},
+ {m68k_op_sub_8_re_pi7 , 0xf1ff, 0x911f, { 12, 12, 8}},
+ {m68k_op_sub_8_re_pd7 , 0xf1ff, 0x9127, { 14, 14, 9}},
+ {m68k_op_sub_8_re_aw , 0xf1ff, 0x9138, { 16, 16, 8}},
+ {m68k_op_sub_8_re_al , 0xf1ff, 0x9139, { 20, 20, 8}},
+ {m68k_op_sub_16_re_aw , 0xf1ff, 0x9178, { 16, 16, 8}},
+ {m68k_op_sub_16_re_al , 0xf1ff, 0x9179, { 20, 20, 8}},
+ {m68k_op_sub_32_re_aw , 0xf1ff, 0x91b8, { 24, 24, 8}},
+ {m68k_op_sub_32_re_al , 0xf1ff, 0x91b9, { 28, 28, 8}},
+ {m68k_op_suba_32_aw , 0xf1ff, 0x91f8, { 18, 18, 6}},
+ {m68k_op_suba_32_al , 0xf1ff, 0x91f9, { 22, 22, 6}},
+ {m68k_op_suba_32_pcdi , 0xf1ff, 0x91fa, { 18, 18, 7}},
+ {m68k_op_suba_32_pcix , 0xf1ff, 0x91fb, { 20, 20, 9}},
+ {m68k_op_suba_32_i , 0xf1ff, 0x91fc, { 16, 14, 6}},
+ {m68k_op_cmp_8_pi7 , 0xf1ff, 0xb01f, { 8, 8, 6}},
+ {m68k_op_cmp_8_pd7 , 0xf1ff, 0xb027, { 10, 10, 7}},
+ {m68k_op_cmp_8_aw , 0xf1ff, 0xb038, { 12, 12, 6}},
+ {m68k_op_cmp_8_al , 0xf1ff, 0xb039, { 16, 16, 6}},
+ {m68k_op_cmp_8_pcdi , 0xf1ff, 0xb03a, { 12, 12, 7}},
+ {m68k_op_cmp_8_pcix , 0xf1ff, 0xb03b, { 14, 14, 9}},
+ {m68k_op_cmp_8_i , 0xf1ff, 0xb03c, { 8, 8, 4}},
+ {m68k_op_cmp_16_aw , 0xf1ff, 0xb078, { 12, 12, 6}},
+ {m68k_op_cmp_16_al , 0xf1ff, 0xb079, { 16, 16, 6}},
+ {m68k_op_cmp_16_pcdi , 0xf1ff, 0xb07a, { 12, 12, 7}},
+ {m68k_op_cmp_16_pcix , 0xf1ff, 0xb07b, { 14, 14, 9}},
+ {m68k_op_cmp_16_i , 0xf1ff, 0xb07c, { 8, 8, 4}},
+ {m68k_op_cmp_32_aw , 0xf1ff, 0xb0b8, { 18, 18, 6}},
+ {m68k_op_cmp_32_al , 0xf1ff, 0xb0b9, { 22, 22, 6}},
+ {m68k_op_cmp_32_pcdi , 0xf1ff, 0xb0ba, { 18, 18, 7}},
+ {m68k_op_cmp_32_pcix , 0xf1ff, 0xb0bb, { 20, 20, 9}},
+ {m68k_op_cmp_32_i , 0xf1ff, 0xb0bc, { 14, 14, 6}},
+ {m68k_op_cmpa_16_aw , 0xf1ff, 0xb0f8, { 14, 14, 8}},
+ {m68k_op_cmpa_16_al , 0xf1ff, 0xb0f9, { 18, 18, 8}},
+ {m68k_op_cmpa_16_pcdi , 0xf1ff, 0xb0fa, { 14, 14, 9}},
+ {m68k_op_cmpa_16_pcix , 0xf1ff, 0xb0fb, { 16, 16, 11}},
+ {m68k_op_cmpa_16_i , 0xf1ff, 0xb0fc, { 10, 10, 6}},
+ {m68k_op_cmpm_8_ay7 , 0xf1ff, 0xb10f, { 12, 12, 9}},
+ {m68k_op_eor_8_pi7 , 0xf1ff, 0xb11f, { 12, 12, 8}},
+ {m68k_op_eor_8_pd7 , 0xf1ff, 0xb127, { 14, 14, 9}},
+ {m68k_op_eor_8_aw , 0xf1ff, 0xb138, { 16, 16, 8}},
+ {m68k_op_eor_8_al , 0xf1ff, 0xb139, { 20, 20, 8}},
+ {m68k_op_eor_16_aw , 0xf1ff, 0xb178, { 16, 16, 8}},
+ {m68k_op_eor_16_al , 0xf1ff, 0xb179, { 20, 20, 8}},
+ {m68k_op_eor_32_aw , 0xf1ff, 0xb1b8, { 24, 24, 8}},
+ {m68k_op_eor_32_al , 0xf1ff, 0xb1b9, { 28, 28, 8}},
+ {m68k_op_cmpa_32_aw , 0xf1ff, 0xb1f8, { 18, 18, 8}},
+ {m68k_op_cmpa_32_al , 0xf1ff, 0xb1f9, { 22, 22, 8}},
+ {m68k_op_cmpa_32_pcdi , 0xf1ff, 0xb1fa, { 18, 18, 9}},
+ {m68k_op_cmpa_32_pcix , 0xf1ff, 0xb1fb, { 20, 20, 11}},
+ {m68k_op_cmpa_32_i , 0xf1ff, 0xb1fc, { 14, 14, 8}},
+ {m68k_op_and_8_er_pi7 , 0xf1ff, 0xc01f, { 8, 8, 6}},
+ {m68k_op_and_8_er_pd7 , 0xf1ff, 0xc027, { 10, 10, 7}},
+ {m68k_op_and_8_er_aw , 0xf1ff, 0xc038, { 12, 12, 6}},
+ {m68k_op_and_8_er_al , 0xf1ff, 0xc039, { 16, 16, 6}},
+ {m68k_op_and_8_er_pcdi , 0xf1ff, 0xc03a, { 12, 12, 7}},
+ {m68k_op_and_8_er_pcix , 0xf1ff, 0xc03b, { 14, 14, 9}},
+ {m68k_op_and_8_er_i , 0xf1ff, 0xc03c, { 8, 8, 4}},
+ {m68k_op_and_16_er_aw , 0xf1ff, 0xc078, { 12, 12, 6}},
+ {m68k_op_and_16_er_al , 0xf1ff, 0xc079, { 16, 16, 6}},
+ {m68k_op_and_16_er_pcdi , 0xf1ff, 0xc07a, { 12, 12, 7}},
+ {m68k_op_and_16_er_pcix , 0xf1ff, 0xc07b, { 14, 14, 9}},
+ {m68k_op_and_16_er_i , 0xf1ff, 0xc07c, { 8, 8, 4}},
+ {m68k_op_and_32_er_aw , 0xf1ff, 0xc0b8, { 18, 18, 6}},
+ {m68k_op_and_32_er_al , 0xf1ff, 0xc0b9, { 22, 22, 6}},
+ {m68k_op_and_32_er_pcdi , 0xf1ff, 0xc0ba, { 18, 18, 7}},
+ {m68k_op_and_32_er_pcix , 0xf1ff, 0xc0bb, { 20, 20, 9}},
+ {m68k_op_and_32_er_i , 0xf1ff, 0xc0bc, { 16, 14, 6}},
+ {m68k_op_mulu_16_aw , 0xf1ff, 0xc0f8, { 62, 38, 31}},
+ {m68k_op_mulu_16_al , 0xf1ff, 0xc0f9, { 66, 42, 31}},
+ {m68k_op_mulu_16_pcdi , 0xf1ff, 0xc0fa, { 62, 38, 32}},
+ {m68k_op_mulu_16_pcix , 0xf1ff, 0xc0fb, { 64, 40, 34}},
+ {m68k_op_mulu_16_i , 0xf1ff, 0xc0fc, { 58, 34, 29}},
+ {m68k_op_abcd_8_mm_ay7 , 0xf1ff, 0xc10f, { 18, 18, 16}},
+ {m68k_op_and_8_re_pi7 , 0xf1ff, 0xc11f, { 12, 12, 8}},
+ {m68k_op_and_8_re_pd7 , 0xf1ff, 0xc127, { 14, 14, 9}},
+ {m68k_op_and_8_re_aw , 0xf1ff, 0xc138, { 16, 16, 8}},
+ {m68k_op_and_8_re_al , 0xf1ff, 0xc139, { 20, 20, 8}},
+ {m68k_op_and_16_re_aw , 0xf1ff, 0xc178, { 16, 16, 8}},
+ {m68k_op_and_16_re_al , 0xf1ff, 0xc179, { 20, 20, 8}},
+ {m68k_op_and_32_re_aw , 0xf1ff, 0xc1b8, { 24, 24, 8}},
+ {m68k_op_and_32_re_al , 0xf1ff, 0xc1b9, { 28, 28, 8}},
+ {m68k_op_muls_16_aw , 0xf1ff, 0xc1f8, { 62, 40, 31}},
+ {m68k_op_muls_16_al , 0xf1ff, 0xc1f9, { 66, 44, 31}},
+ {m68k_op_muls_16_pcdi , 0xf1ff, 0xc1fa, { 62, 40, 32}},
+ {m68k_op_muls_16_pcix , 0xf1ff, 0xc1fb, { 64, 42, 34}},
+ {m68k_op_muls_16_i , 0xf1ff, 0xc1fc, { 58, 36, 29}},
+ {m68k_op_add_8_er_pi7 , 0xf1ff, 0xd01f, { 8, 8, 6}},
+ {m68k_op_add_8_er_pd7 , 0xf1ff, 0xd027, { 10, 10, 7}},
+ {m68k_op_add_8_er_aw , 0xf1ff, 0xd038, { 12, 12, 6}},
+ {m68k_op_add_8_er_al , 0xf1ff, 0xd039, { 16, 16, 6}},
+ {m68k_op_add_8_er_pcdi , 0xf1ff, 0xd03a, { 12, 12, 7}},
+ {m68k_op_add_8_er_pcix , 0xf1ff, 0xd03b, { 14, 14, 9}},
+ {m68k_op_add_8_er_i , 0xf1ff, 0xd03c, { 8, 8, 4}},
+ {m68k_op_add_16_er_aw , 0xf1ff, 0xd078, { 12, 12, 6}},
+ {m68k_op_add_16_er_al , 0xf1ff, 0xd079, { 16, 16, 6}},
+ {m68k_op_add_16_er_pcdi , 0xf1ff, 0xd07a, { 12, 12, 7}},
+ {m68k_op_add_16_er_pcix , 0xf1ff, 0xd07b, { 14, 14, 9}},
+ {m68k_op_add_16_er_i , 0xf1ff, 0xd07c, { 8, 8, 4}},
+ {m68k_op_add_32_er_aw , 0xf1ff, 0xd0b8, { 18, 18, 6}},
+ {m68k_op_add_32_er_al , 0xf1ff, 0xd0b9, { 22, 22, 6}},
+ {m68k_op_add_32_er_pcdi , 0xf1ff, 0xd0ba, { 18, 18, 7}},
+ {m68k_op_add_32_er_pcix , 0xf1ff, 0xd0bb, { 20, 20, 9}},
+ {m68k_op_add_32_er_i , 0xf1ff, 0xd0bc, { 16, 14, 6}},
+ {m68k_op_adda_16_aw , 0xf1ff, 0xd0f8, { 16, 16, 6}},
+ {m68k_op_adda_16_al , 0xf1ff, 0xd0f9, { 20, 20, 6}},
+ {m68k_op_adda_16_pcdi , 0xf1ff, 0xd0fa, { 16, 16, 7}},
+ {m68k_op_adda_16_pcix , 0xf1ff, 0xd0fb, { 18, 18, 9}},
+ {m68k_op_adda_16_i , 0xf1ff, 0xd0fc, { 12, 12, 4}},
+ {m68k_op_addx_8_mm_ay7 , 0xf1ff, 0xd10f, { 18, 18, 12}},
+ {m68k_op_add_8_re_pi7 , 0xf1ff, 0xd11f, { 12, 12, 8}},
+ {m68k_op_add_8_re_pd7 , 0xf1ff, 0xd127, { 14, 14, 9}},
+ {m68k_op_add_8_re_aw , 0xf1ff, 0xd138, { 16, 16, 8}},
+ {m68k_op_add_8_re_al , 0xf1ff, 0xd139, { 20, 20, 8}},
+ {m68k_op_add_16_re_aw , 0xf1ff, 0xd178, { 16, 16, 8}},
+ {m68k_op_add_16_re_al , 0xf1ff, 0xd179, { 20, 20, 8}},
+ {m68k_op_add_32_re_aw , 0xf1ff, 0xd1b8, { 24, 24, 8}},
+ {m68k_op_add_32_re_al , 0xf1ff, 0xd1b9, { 28, 28, 8}},
+ {m68k_op_adda_32_aw , 0xf1ff, 0xd1f8, { 18, 18, 6}},
+ {m68k_op_adda_32_al , 0xf1ff, 0xd1f9, { 22, 22, 6}},
+ {m68k_op_adda_32_pcdi , 0xf1ff, 0xd1fa, { 18, 18, 7}},
+ {m68k_op_adda_32_pcix , 0xf1ff, 0xd1fb, { 20, 20, 9}},
+ {m68k_op_adda_32_i , 0xf1ff, 0xd1fc, { 16, 14, 6}},
+ {m68k_op_ori_8_d , 0xfff8, 0x0000, { 8, 8, 2}},
+ {m68k_op_ori_8_ai , 0xfff8, 0x0010, { 16, 16, 8}},
+ {m68k_op_ori_8_pi , 0xfff8, 0x0018, { 16, 16, 8}},
+ {m68k_op_ori_8_pd , 0xfff8, 0x0020, { 18, 18, 9}},
+ {m68k_op_ori_8_di , 0xfff8, 0x0028, { 20, 20, 9}},
+ {m68k_op_ori_8_ix , 0xfff8, 0x0030, { 22, 22, 11}},
+ {m68k_op_ori_16_d , 0xfff8, 0x0040, { 8, 8, 2}},
+ {m68k_op_ori_16_ai , 0xfff8, 0x0050, { 16, 16, 8}},
+ {m68k_op_ori_16_pi , 0xfff8, 0x0058, { 16, 16, 8}},
+ {m68k_op_ori_16_pd , 0xfff8, 0x0060, { 18, 18, 9}},
+ {m68k_op_ori_16_di , 0xfff8, 0x0068, { 20, 20, 9}},
+ {m68k_op_ori_16_ix , 0xfff8, 0x0070, { 22, 22, 11}},
+ {m68k_op_ori_32_d , 0xfff8, 0x0080, { 16, 14, 2}},
+ {m68k_op_ori_32_ai , 0xfff8, 0x0090, { 28, 28, 8}},
+ {m68k_op_ori_32_pi , 0xfff8, 0x0098, { 28, 28, 8}},
+ {m68k_op_ori_32_pd , 0xfff8, 0x00a0, { 30, 30, 9}},
+ {m68k_op_ori_32_di , 0xfff8, 0x00a8, { 32, 32, 9}},
+ {m68k_op_ori_32_ix , 0xfff8, 0x00b0, { 34, 34, 11}},
+ {m68k_op_chk2cmp2_8_ai , 0xfff8, 0x00d0, { 0, 0, 22}},
+ {m68k_op_chk2cmp2_8_di , 0xfff8, 0x00e8, { 0, 0, 23}},
+ {m68k_op_chk2cmp2_8_ix , 0xfff8, 0x00f0, { 0, 0, 25}},
+ {m68k_op_andi_8_d , 0xfff8, 0x0200, { 8, 8, 2}},
+ {m68k_op_andi_8_ai , 0xfff8, 0x0210, { 16, 16, 8}},
+ {m68k_op_andi_8_pi , 0xfff8, 0x0218, { 16, 16, 8}},
+ {m68k_op_andi_8_pd , 0xfff8, 0x0220, { 18, 18, 9}},
+ {m68k_op_andi_8_di , 0xfff8, 0x0228, { 20, 20, 9}},
+ {m68k_op_andi_8_ix , 0xfff8, 0x0230, { 22, 22, 11}},
+ {m68k_op_andi_16_d , 0xfff8, 0x0240, { 8, 8, 2}},
+ {m68k_op_andi_16_ai , 0xfff8, 0x0250, { 16, 16, 8}},
+ {m68k_op_andi_16_pi , 0xfff8, 0x0258, { 16, 16, 8}},
+ {m68k_op_andi_16_pd , 0xfff8, 0x0260, { 18, 18, 9}},
+ {m68k_op_andi_16_di , 0xfff8, 0x0268, { 20, 20, 9}},
+ {m68k_op_andi_16_ix , 0xfff8, 0x0270, { 22, 22, 11}},
+ {m68k_op_andi_32_d , 0xfff8, 0x0280, { 14, 14, 2}},
+ {m68k_op_andi_32_ai , 0xfff8, 0x0290, { 28, 28, 8}},
+ {m68k_op_andi_32_pi , 0xfff8, 0x0298, { 28, 28, 8}},
+ {m68k_op_andi_32_pd , 0xfff8, 0x02a0, { 30, 30, 9}},
+ {m68k_op_andi_32_di , 0xfff8, 0x02a8, { 32, 32, 9}},
+ {m68k_op_andi_32_ix , 0xfff8, 0x02b0, { 34, 34, 11}},
+ {m68k_op_chk2cmp2_16_ai , 0xfff8, 0x02d0, { 0, 0, 22}},
+ {m68k_op_chk2cmp2_16_di , 0xfff8, 0x02e8, { 0, 0, 23}},
+ {m68k_op_chk2cmp2_16_ix , 0xfff8, 0x02f0, { 0, 0, 25}},
+ {m68k_op_subi_8_d , 0xfff8, 0x0400, { 8, 8, 2}},
+ {m68k_op_subi_8_ai , 0xfff8, 0x0410, { 16, 16, 8}},
+ {m68k_op_subi_8_pi , 0xfff8, 0x0418, { 16, 16, 8}},
+ {m68k_op_subi_8_pd , 0xfff8, 0x0420, { 18, 18, 9}},
+ {m68k_op_subi_8_di , 0xfff8, 0x0428, { 20, 20, 9}},
+ {m68k_op_subi_8_ix , 0xfff8, 0x0430, { 22, 22, 11}},
+ {m68k_op_subi_16_d , 0xfff8, 0x0440, { 8, 8, 2}},
+ {m68k_op_subi_16_ai , 0xfff8, 0x0450, { 16, 16, 8}},
+ {m68k_op_subi_16_pi , 0xfff8, 0x0458, { 16, 16, 8}},
+ {m68k_op_subi_16_pd , 0xfff8, 0x0460, { 18, 18, 9}},
+ {m68k_op_subi_16_di , 0xfff8, 0x0468, { 20, 20, 9}},
+ {m68k_op_subi_16_ix , 0xfff8, 0x0470, { 22, 22, 11}},
+ {m68k_op_subi_32_d , 0xfff8, 0x0480, { 16, 14, 2}},
+ {m68k_op_subi_32_ai , 0xfff8, 0x0490, { 28, 28, 8}},
+ {m68k_op_subi_32_pi , 0xfff8, 0x0498, { 28, 28, 8}},
+ {m68k_op_subi_32_pd , 0xfff8, 0x04a0, { 30, 30, 9}},
+ {m68k_op_subi_32_di , 0xfff8, 0x04a8, { 32, 32, 9}},
+ {m68k_op_subi_32_ix , 0xfff8, 0x04b0, { 34, 34, 11}},
+ {m68k_op_chk2cmp2_32_ai , 0xfff8, 0x04d0, { 0, 0, 22}},
+ {m68k_op_chk2cmp2_32_di , 0xfff8, 0x04e8, { 0, 0, 23}},
+ {m68k_op_chk2cmp2_32_ix , 0xfff8, 0x04f0, { 0, 0, 25}},
+ {m68k_op_addi_8_d , 0xfff8, 0x0600, { 8, 8, 2}},
+ {m68k_op_addi_8_ai , 0xfff8, 0x0610, { 16, 16, 8}},
+ {m68k_op_addi_8_pi , 0xfff8, 0x0618, { 16, 16, 8}},
+ {m68k_op_addi_8_pd , 0xfff8, 0x0620, { 18, 18, 9}},
+ {m68k_op_addi_8_di , 0xfff8, 0x0628, { 20, 20, 9}},
+ {m68k_op_addi_8_ix , 0xfff8, 0x0630, { 22, 22, 11}},
+ {m68k_op_addi_16_d , 0xfff8, 0x0640, { 8, 8, 2}},
+ {m68k_op_addi_16_ai , 0xfff8, 0x0650, { 16, 16, 8}},
+ {m68k_op_addi_16_pi , 0xfff8, 0x0658, { 16, 16, 8}},
+ {m68k_op_addi_16_pd , 0xfff8, 0x0660, { 18, 18, 9}},
+ {m68k_op_addi_16_di , 0xfff8, 0x0668, { 20, 20, 9}},
+ {m68k_op_addi_16_ix , 0xfff8, 0x0670, { 22, 22, 11}},
+ {m68k_op_addi_32_d , 0xfff8, 0x0680, { 16, 14, 2}},
+ {m68k_op_addi_32_ai , 0xfff8, 0x0690, { 28, 28, 8}},
+ {m68k_op_addi_32_pi , 0xfff8, 0x0698, { 28, 28, 8}},
+ {m68k_op_addi_32_pd , 0xfff8, 0x06a0, { 30, 30, 9}},
+ {m68k_op_addi_32_di , 0xfff8, 0x06a8, { 32, 32, 9}},
+ {m68k_op_addi_32_ix , 0xfff8, 0x06b0, { 34, 34, 11}},
+ {m68k_op_callm_32_ai , 0xfff8, 0x06d0, { 0, 0, 64}},
+ {m68k_op_callm_32_di , 0xfff8, 0x06e8, { 0, 0, 65}},
+ {m68k_op_callm_32_ix , 0xfff8, 0x06f0, { 0, 0, 67}},
+ {m68k_op_btst_32_s_d , 0xfff8, 0x0800, { 10, 10, 4}},
+ {m68k_op_btst_8_s_ai , 0xfff8, 0x0810, { 12, 12, 8}},
+ {m68k_op_btst_8_s_pi , 0xfff8, 0x0818, { 12, 12, 8}},
+ {m68k_op_btst_8_s_pd , 0xfff8, 0x0820, { 14, 14, 9}},
+ {m68k_op_btst_8_s_di , 0xfff8, 0x0828, { 16, 16, 9}},
+ {m68k_op_btst_8_s_ix , 0xfff8, 0x0830, { 18, 18, 11}},
+ {m68k_op_bchg_32_s_d , 0xfff8, 0x0840, { 12, 12, 4}},
+ {m68k_op_bchg_8_s_ai , 0xfff8, 0x0850, { 16, 16, 8}},
+ {m68k_op_bchg_8_s_pi , 0xfff8, 0x0858, { 16, 16, 8}},
+ {m68k_op_bchg_8_s_pd , 0xfff8, 0x0860, { 18, 18, 9}},
+ {m68k_op_bchg_8_s_di , 0xfff8, 0x0868, { 20, 20, 9}},
+ {m68k_op_bchg_8_s_ix , 0xfff8, 0x0870, { 22, 22, 11}},
+ {m68k_op_bclr_32_s_d , 0xfff8, 0x0880, { 14, 14, 4}},
+ {m68k_op_bclr_8_s_ai , 0xfff8, 0x0890, { 16, 16, 8}},
+ {m68k_op_bclr_8_s_pi , 0xfff8, 0x0898, { 16, 16, 8}},
+ {m68k_op_bclr_8_s_pd , 0xfff8, 0x08a0, { 18, 18, 9}},
+ {m68k_op_bclr_8_s_di , 0xfff8, 0x08a8, { 20, 20, 9}},
+ {m68k_op_bclr_8_s_ix , 0xfff8, 0x08b0, { 22, 22, 11}},
+ {m68k_op_bset_32_s_d , 0xfff8, 0x08c0, { 12, 12, 4}},
+ {m68k_op_bset_8_s_ai , 0xfff8, 0x08d0, { 16, 16, 8}},
+ {m68k_op_bset_8_s_pi , 0xfff8, 0x08d8, { 16, 16, 8}},
+ {m68k_op_bset_8_s_pd , 0xfff8, 0x08e0, { 18, 18, 9}},
+ {m68k_op_bset_8_s_di , 0xfff8, 0x08e8, { 20, 20, 9}},
+ {m68k_op_bset_8_s_ix , 0xfff8, 0x08f0, { 22, 22, 11}},
+ {m68k_op_eori_8_d , 0xfff8, 0x0a00, { 8, 8, 2}},
+ {m68k_op_eori_8_ai , 0xfff8, 0x0a10, { 16, 16, 8}},
+ {m68k_op_eori_8_pi , 0xfff8, 0x0a18, { 16, 16, 8}},
+ {m68k_op_eori_8_pd , 0xfff8, 0x0a20, { 18, 18, 9}},
+ {m68k_op_eori_8_di , 0xfff8, 0x0a28, { 20, 20, 9}},
+ {m68k_op_eori_8_ix , 0xfff8, 0x0a30, { 22, 22, 11}},
+ {m68k_op_eori_16_d , 0xfff8, 0x0a40, { 8, 8, 2}},
+ {m68k_op_eori_16_ai , 0xfff8, 0x0a50, { 16, 16, 8}},
+ {m68k_op_eori_16_pi , 0xfff8, 0x0a58, { 16, 16, 8}},
+ {m68k_op_eori_16_pd , 0xfff8, 0x0a60, { 18, 18, 9}},
+ {m68k_op_eori_16_di , 0xfff8, 0x0a68, { 20, 20, 9}},
+ {m68k_op_eori_16_ix , 0xfff8, 0x0a70, { 22, 22, 11}},
+ {m68k_op_eori_32_d , 0xfff8, 0x0a80, { 16, 14, 2}},
+ {m68k_op_eori_32_ai , 0xfff8, 0x0a90, { 28, 28, 8}},
+ {m68k_op_eori_32_pi , 0xfff8, 0x0a98, { 28, 28, 8}},
+ {m68k_op_eori_32_pd , 0xfff8, 0x0aa0, { 30, 30, 9}},
+ {m68k_op_eori_32_di , 0xfff8, 0x0aa8, { 32, 32, 9}},
+ {m68k_op_eori_32_ix , 0xfff8, 0x0ab0, { 34, 34, 11}},
+ {m68k_op_cas_8_ai , 0xfff8, 0x0ad0, { 0, 0, 16}},
+ {m68k_op_cas_8_pi , 0xfff8, 0x0ad8, { 0, 0, 16}},
+ {m68k_op_cas_8_pd , 0xfff8, 0x0ae0, { 0, 0, 17}},
+ {m68k_op_cas_8_di , 0xfff8, 0x0ae8, { 0, 0, 17}},
+ {m68k_op_cas_8_ix , 0xfff8, 0x0af0, { 0, 0, 19}},
+ {m68k_op_cmpi_8_d , 0xfff8, 0x0c00, { 8, 8, 2}},
+ {m68k_op_cmpi_8_ai , 0xfff8, 0x0c10, { 12, 12, 6}},
+ {m68k_op_cmpi_8_pi , 0xfff8, 0x0c18, { 12, 12, 6}},
+ {m68k_op_cmpi_8_pd , 0xfff8, 0x0c20, { 14, 14, 7}},
+ {m68k_op_cmpi_8_di , 0xfff8, 0x0c28, { 16, 16, 7}},
+ {m68k_op_cmpi_8_ix , 0xfff8, 0x0c30, { 18, 18, 9}},
+ {m68k_op_cmpi_16_d , 0xfff8, 0x0c40, { 8, 8, 2}},
+ {m68k_op_cmpi_16_ai , 0xfff8, 0x0c50, { 12, 12, 6}},
+ {m68k_op_cmpi_16_pi , 0xfff8, 0x0c58, { 12, 12, 6}},
+ {m68k_op_cmpi_16_pd , 0xfff8, 0x0c60, { 14, 14, 7}},
+ {m68k_op_cmpi_16_di , 0xfff8, 0x0c68, { 16, 16, 7}},
+ {m68k_op_cmpi_16_ix , 0xfff8, 0x0c70, { 18, 18, 9}},
+ {m68k_op_cmpi_32_d , 0xfff8, 0x0c80, { 14, 12, 2}},
+ {m68k_op_cmpi_32_ai , 0xfff8, 0x0c90, { 20, 20, 6}},
+ {m68k_op_cmpi_32_pi , 0xfff8, 0x0c98, { 20, 20, 6}},
+ {m68k_op_cmpi_32_pd , 0xfff8, 0x0ca0, { 22, 22, 7}},
+ {m68k_op_cmpi_32_di , 0xfff8, 0x0ca8, { 24, 24, 7}},
+ {m68k_op_cmpi_32_ix , 0xfff8, 0x0cb0, { 26, 26, 9}},
+ {m68k_op_cas_16_ai , 0xfff8, 0x0cd0, { 0, 0, 16}},
+ {m68k_op_cas_16_pi , 0xfff8, 0x0cd8, { 0, 0, 16}},
+ {m68k_op_cas_16_pd , 0xfff8, 0x0ce0, { 0, 0, 17}},
+ {m68k_op_cas_16_di , 0xfff8, 0x0ce8, { 0, 0, 17}},
+ {m68k_op_cas_16_ix , 0xfff8, 0x0cf0, { 0, 0, 19}},
+ {m68k_op_moves_8_ai , 0xfff8, 0x0e10, { 0, 18, 9}},
+ {m68k_op_moves_8_pi , 0xfff8, 0x0e18, { 0, 18, 9}},
+ {m68k_op_moves_8_pd , 0xfff8, 0x0e20, { 0, 20, 10}},
+ {m68k_op_moves_8_di , 0xfff8, 0x0e28, { 0, 26, 10}},
+ {m68k_op_moves_8_ix , 0xfff8, 0x0e30, { 0, 30, 12}},
+ {m68k_op_moves_16_ai , 0xfff8, 0x0e50, { 0, 18, 9}},
+ {m68k_op_moves_16_pi , 0xfff8, 0x0e58, { 0, 18, 9}},
+ {m68k_op_moves_16_pd , 0xfff8, 0x0e60, { 0, 20, 10}},
+ {m68k_op_moves_16_di , 0xfff8, 0x0e68, { 0, 26, 10}},
+ {m68k_op_moves_16_ix , 0xfff8, 0x0e70, { 0, 30, 12}},
+ {m68k_op_moves_32_ai , 0xfff8, 0x0e90, { 0, 22, 9}},
+ {m68k_op_moves_32_pi , 0xfff8, 0x0e98, { 0, 22, 9}},
+ {m68k_op_moves_32_pd , 0xfff8, 0x0ea0, { 0, 28, 10}},
+ {m68k_op_moves_32_di , 0xfff8, 0x0ea8, { 0, 32, 10}},
+ {m68k_op_moves_32_ix , 0xfff8, 0x0eb0, { 0, 36, 12}},
+ {m68k_op_cas_32_ai , 0xfff8, 0x0ed0, { 0, 0, 16}},
+ {m68k_op_cas_32_pi , 0xfff8, 0x0ed8, { 0, 0, 16}},
+ {m68k_op_cas_32_pd , 0xfff8, 0x0ee0, { 0, 0, 17}},
+ {m68k_op_cas_32_di , 0xfff8, 0x0ee8, { 0, 0, 17}},
+ {m68k_op_cas_32_ix , 0xfff8, 0x0ef0, { 0, 0, 19}},
+ {m68k_op_move_8_aw_d , 0xfff8, 0x11c0, { 12, 12, 4}},
+ {m68k_op_move_8_aw_ai , 0xfff8, 0x11d0, { 16, 16, 8}},
+ {m68k_op_move_8_aw_pi , 0xfff8, 0x11d8, { 16, 16, 8}},
+ {m68k_op_move_8_aw_pd , 0xfff8, 0x11e0, { 18, 18, 9}},
+ {m68k_op_move_8_aw_di , 0xfff8, 0x11e8, { 20, 20, 9}},
+ {m68k_op_move_8_aw_ix , 0xfff8, 0x11f0, { 22, 22, 11}},
+ {m68k_op_move_8_al_d , 0xfff8, 0x13c0, { 16, 16, 6}},
+ {m68k_op_move_8_al_ai , 0xfff8, 0x13d0, { 20, 20, 10}},
+ {m68k_op_move_8_al_pi , 0xfff8, 0x13d8, { 20, 20, 10}},
+ {m68k_op_move_8_al_pd , 0xfff8, 0x13e0, { 22, 22, 11}},
+ {m68k_op_move_8_al_di , 0xfff8, 0x13e8, { 24, 24, 11}},
+ {m68k_op_move_8_al_ix , 0xfff8, 0x13f0, { 26, 26, 13}},
+ {m68k_op_move_8_pi7_d , 0xfff8, 0x1ec0, { 8, 8, 4}},
+ {m68k_op_move_8_pi7_ai , 0xfff8, 0x1ed0, { 12, 12, 8}},
+ {m68k_op_move_8_pi7_pi , 0xfff8, 0x1ed8, { 12, 12, 8}},
+ {m68k_op_move_8_pi7_pd , 0xfff8, 0x1ee0, { 14, 14, 9}},
+ {m68k_op_move_8_pi7_di , 0xfff8, 0x1ee8, { 16, 16, 9}},
+ {m68k_op_move_8_pi7_ix , 0xfff8, 0x1ef0, { 18, 18, 11}},
+ {m68k_op_move_8_pd7_d , 0xfff8, 0x1f00, { 8, 8, 5}},
+ {m68k_op_move_8_pd7_ai , 0xfff8, 0x1f10, { 12, 12, 9}},
+ {m68k_op_move_8_pd7_pi , 0xfff8, 0x1f18, { 12, 12, 9}},
+ {m68k_op_move_8_pd7_pd , 0xfff8, 0x1f20, { 14, 14, 10}},
+ {m68k_op_move_8_pd7_di , 0xfff8, 0x1f28, { 16, 16, 10}},
+ {m68k_op_move_8_pd7_ix , 0xfff8, 0x1f30, { 18, 18, 12}},
+ {m68k_op_move_32_aw_d , 0xfff8, 0x21c0, { 16, 16, 4}},
+ {m68k_op_move_32_aw_a , 0xfff8, 0x21c8, { 16, 16, 4}},
+ {m68k_op_move_32_aw_ai , 0xfff8, 0x21d0, { 24, 24, 8}},
+ {m68k_op_move_32_aw_pi , 0xfff8, 0x21d8, { 24, 24, 8}},
+ {m68k_op_move_32_aw_pd , 0xfff8, 0x21e0, { 26, 26, 9}},
+ {m68k_op_move_32_aw_di , 0xfff8, 0x21e8, { 28, 28, 9}},
+ {m68k_op_move_32_aw_ix , 0xfff8, 0x21f0, { 30, 30, 11}},
+ {m68k_op_move_32_al_d , 0xfff8, 0x23c0, { 20, 20, 6}},
+ {m68k_op_move_32_al_a , 0xfff8, 0x23c8, { 20, 20, 6}},
+ {m68k_op_move_32_al_ai , 0xfff8, 0x23d0, { 28, 28, 10}},
+ {m68k_op_move_32_al_pi , 0xfff8, 0x23d8, { 28, 28, 10}},
+ {m68k_op_move_32_al_pd , 0xfff8, 0x23e0, { 30, 30, 11}},
+ {m68k_op_move_32_al_di , 0xfff8, 0x23e8, { 32, 32, 11}},
+ {m68k_op_move_32_al_ix , 0xfff8, 0x23f0, { 34, 34, 13}},
+ {m68k_op_move_16_aw_d , 0xfff8, 0x31c0, { 12, 12, 4}},
+ {m68k_op_move_16_aw_a , 0xfff8, 0x31c8, { 12, 12, 4}},
+ {m68k_op_move_16_aw_ai , 0xfff8, 0x31d0, { 16, 16, 8}},
+ {m68k_op_move_16_aw_pi , 0xfff8, 0x31d8, { 16, 16, 8}},
+ {m68k_op_move_16_aw_pd , 0xfff8, 0x31e0, { 18, 18, 9}},
+ {m68k_op_move_16_aw_di , 0xfff8, 0x31e8, { 20, 20, 9}},
+ {m68k_op_move_16_aw_ix , 0xfff8, 0x31f0, { 22, 22, 11}},
+ {m68k_op_move_16_al_d , 0xfff8, 0x33c0, { 16, 16, 6}},
+ {m68k_op_move_16_al_a , 0xfff8, 0x33c8, { 16, 16, 6}},
+ {m68k_op_move_16_al_ai , 0xfff8, 0x33d0, { 20, 20, 10}},
+ {m68k_op_move_16_al_pi , 0xfff8, 0x33d8, { 20, 20, 10}},
+ {m68k_op_move_16_al_pd , 0xfff8, 0x33e0, { 22, 22, 11}},
+ {m68k_op_move_16_al_di , 0xfff8, 0x33e8, { 24, 24, 11}},
+ {m68k_op_move_16_al_ix , 0xfff8, 0x33f0, { 26, 26, 13}},
+ {m68k_op_negx_8_d , 0xfff8, 0x4000, { 4, 4, 2}},
+ {m68k_op_negx_8_ai , 0xfff8, 0x4010, { 12, 12, 8}},
+ {m68k_op_negx_8_pi , 0xfff8, 0x4018, { 12, 12, 8}},
+ {m68k_op_negx_8_pd , 0xfff8, 0x4020, { 14, 14, 9}},
+ {m68k_op_negx_8_di , 0xfff8, 0x4028, { 16, 16, 9}},
+ {m68k_op_negx_8_ix , 0xfff8, 0x4030, { 18, 18, 11}},
+ {m68k_op_negx_16_d , 0xfff8, 0x4040, { 4, 4, 2}},
+ {m68k_op_negx_16_ai , 0xfff8, 0x4050, { 12, 12, 8}},
+ {m68k_op_negx_16_pi , 0xfff8, 0x4058, { 12, 12, 8}},
+ {m68k_op_negx_16_pd , 0xfff8, 0x4060, { 14, 14, 9}},
+ {m68k_op_negx_16_di , 0xfff8, 0x4068, { 16, 16, 9}},
+ {m68k_op_negx_16_ix , 0xfff8, 0x4070, { 18, 18, 11}},
+ {m68k_op_negx_32_d , 0xfff8, 0x4080, { 6, 6, 2}},
+ {m68k_op_negx_32_ai , 0xfff8, 0x4090, { 20, 20, 8}},
+ {m68k_op_negx_32_pi , 0xfff8, 0x4098, { 20, 20, 8}},
+ {m68k_op_negx_32_pd , 0xfff8, 0x40a0, { 22, 22, 9}},
+ {m68k_op_negx_32_di , 0xfff8, 0x40a8, { 24, 24, 9}},
+ {m68k_op_negx_32_ix , 0xfff8, 0x40b0, { 26, 26, 11}},
+ {m68k_op_move_16_frs_d , 0xfff8, 0x40c0, { 6, 4, 8}},
+ {m68k_op_move_16_frs_ai , 0xfff8, 0x40d0, { 12, 12, 12}},
+ {m68k_op_move_16_frs_pi , 0xfff8, 0x40d8, { 12, 12, 12}},
+ {m68k_op_move_16_frs_pd , 0xfff8, 0x40e0, { 14, 14, 13}},
+ {m68k_op_move_16_frs_di , 0xfff8, 0x40e8, { 16, 16, 13}},
+ {m68k_op_move_16_frs_ix , 0xfff8, 0x40f0, { 18, 18, 15}},
+ {m68k_op_clr_8_d , 0xfff8, 0x4200, { 4, 4, 2}},
+ {m68k_op_clr_8_ai , 0xfff8, 0x4210, { 12, 8, 8}},
+ {m68k_op_clr_8_pi , 0xfff8, 0x4218, { 12, 8, 8}},
+ {m68k_op_clr_8_pd , 0xfff8, 0x4220, { 14, 10, 9}},
+ {m68k_op_clr_8_di , 0xfff8, 0x4228, { 16, 12, 9}},
+ {m68k_op_clr_8_ix , 0xfff8, 0x4230, { 18, 14, 11}},
+ {m68k_op_clr_16_d , 0xfff8, 0x4240, { 4, 4, 2}},
+ {m68k_op_clr_16_ai , 0xfff8, 0x4250, { 12, 8, 8}},
+ {m68k_op_clr_16_pi , 0xfff8, 0x4258, { 12, 8, 8}},
+ {m68k_op_clr_16_pd , 0xfff8, 0x4260, { 14, 10, 9}},
+ {m68k_op_clr_16_di , 0xfff8, 0x4268, { 16, 12, 9}},
+ {m68k_op_clr_16_ix , 0xfff8, 0x4270, { 18, 14, 11}},
+ {m68k_op_clr_32_d , 0xfff8, 0x4280, { 6, 6, 2}},
+ {m68k_op_clr_32_ai , 0xfff8, 0x4290, { 20, 12, 8}},
+ {m68k_op_clr_32_pi , 0xfff8, 0x4298, { 20, 12, 8}},
+ {m68k_op_clr_32_pd , 0xfff8, 0x42a0, { 22, 14, 9}},
+ {m68k_op_clr_32_di , 0xfff8, 0x42a8, { 24, 16, 9}},
+ {m68k_op_clr_32_ix , 0xfff8, 0x42b0, { 26, 20, 11}},
+ {m68k_op_move_16_frc_d , 0xfff8, 0x42c0, { 0, 4, 4}},
+ {m68k_op_move_16_frc_ai , 0xfff8, 0x42d0, { 0, 12, 8}},
+ {m68k_op_move_16_frc_pi , 0xfff8, 0x42d8, { 0, 12, 8}},
+ {m68k_op_move_16_frc_pd , 0xfff8, 0x42e0, { 0, 14, 9}},
+ {m68k_op_move_16_frc_di , 0xfff8, 0x42e8, { 0, 16, 9}},
+ {m68k_op_move_16_frc_ix , 0xfff8, 0x42f0, { 0, 18, 11}},
+ {m68k_op_neg_8_d , 0xfff8, 0x4400, { 4, 4, 2}},
+ {m68k_op_neg_8_ai , 0xfff8, 0x4410, { 12, 12, 8}},
+ {m68k_op_neg_8_pi , 0xfff8, 0x4418, { 12, 12, 8}},
+ {m68k_op_neg_8_pd , 0xfff8, 0x4420, { 14, 14, 9}},
+ {m68k_op_neg_8_di , 0xfff8, 0x4428, { 16, 16, 9}},
+ {m68k_op_neg_8_ix , 0xfff8, 0x4430, { 18, 18, 11}},
+ {m68k_op_neg_16_d , 0xfff8, 0x4440, { 4, 4, 2}},
+ {m68k_op_neg_16_ai , 0xfff8, 0x4450, { 12, 12, 8}},
+ {m68k_op_neg_16_pi , 0xfff8, 0x4458, { 12, 12, 8}},
+ {m68k_op_neg_16_pd , 0xfff8, 0x4460, { 14, 14, 9}},
+ {m68k_op_neg_16_di , 0xfff8, 0x4468, { 16, 16, 9}},
+ {m68k_op_neg_16_ix , 0xfff8, 0x4470, { 18, 18, 11}},
+ {m68k_op_neg_32_d , 0xfff8, 0x4480, { 6, 6, 2}},
+ {m68k_op_neg_32_ai , 0xfff8, 0x4490, { 20, 20, 8}},
+ {m68k_op_neg_32_pi , 0xfff8, 0x4498, { 20, 20, 8}},
+ {m68k_op_neg_32_pd , 0xfff8, 0x44a0, { 22, 22, 9}},
+ {m68k_op_neg_32_di , 0xfff8, 0x44a8, { 24, 24, 9}},
+ {m68k_op_neg_32_ix , 0xfff8, 0x44b0, { 26, 26, 11}},
+ {m68k_op_move_16_toc_d , 0xfff8, 0x44c0, { 12, 12, 4}},
+ {m68k_op_move_16_toc_ai , 0xfff8, 0x44d0, { 16, 16, 8}},
+ {m68k_op_move_16_toc_pi , 0xfff8, 0x44d8, { 16, 16, 8}},
+ {m68k_op_move_16_toc_pd , 0xfff8, 0x44e0, { 18, 18, 9}},
+ {m68k_op_move_16_toc_di , 0xfff8, 0x44e8, { 20, 20, 9}},
+ {m68k_op_move_16_toc_ix , 0xfff8, 0x44f0, { 22, 22, 11}},
+ {m68k_op_not_8_d , 0xfff8, 0x4600, { 4, 4, 2}},
+ {m68k_op_not_8_ai , 0xfff8, 0x4610, { 12, 12, 8}},
+ {m68k_op_not_8_pi , 0xfff8, 0x4618, { 12, 12, 8}},
+ {m68k_op_not_8_pd , 0xfff8, 0x4620, { 14, 14, 9}},
+ {m68k_op_not_8_di , 0xfff8, 0x4628, { 16, 16, 9}},
+ {m68k_op_not_8_ix , 0xfff8, 0x4630, { 18, 18, 11}},
+ {m68k_op_not_16_d , 0xfff8, 0x4640, { 4, 4, 2}},
+ {m68k_op_not_16_ai , 0xfff8, 0x4650, { 12, 12, 8}},
+ {m68k_op_not_16_pi , 0xfff8, 0x4658, { 12, 12, 8}},
+ {m68k_op_not_16_pd , 0xfff8, 0x4660, { 14, 14, 9}},
+ {m68k_op_not_16_di , 0xfff8, 0x4668, { 16, 16, 9}},
+ {m68k_op_not_16_ix , 0xfff8, 0x4670, { 18, 18, 11}},
+ {m68k_op_not_32_d , 0xfff8, 0x4680, { 6, 6, 2}},
+ {m68k_op_not_32_ai , 0xfff8, 0x4690, { 20, 20, 8}},
+ {m68k_op_not_32_pi , 0xfff8, 0x4698, { 20, 20, 8}},
+ {m68k_op_not_32_pd , 0xfff8, 0x46a0, { 22, 22, 9}},
+ {m68k_op_not_32_di , 0xfff8, 0x46a8, { 24, 24, 9}},
+ {m68k_op_not_32_ix , 0xfff8, 0x46b0, { 26, 26, 11}},
+ {m68k_op_move_16_tos_d , 0xfff8, 0x46c0, { 12, 12, 8}},
+ {m68k_op_move_16_tos_ai , 0xfff8, 0x46d0, { 16, 16, 12}},
+ {m68k_op_move_16_tos_pi , 0xfff8, 0x46d8, { 16, 16, 12}},
+ {m68k_op_move_16_tos_pd , 0xfff8, 0x46e0, { 18, 18, 13}},
+ {m68k_op_move_16_tos_di , 0xfff8, 0x46e8, { 20, 20, 13}},
+ {m68k_op_move_16_tos_ix , 0xfff8, 0x46f0, { 22, 22, 15}},
+ {m68k_op_nbcd_8_d , 0xfff8, 0x4800, { 6, 6, 6}},
+ {m68k_op_link_32 , 0xfff8, 0x4808, { 0, 0, 6}},
+ {m68k_op_nbcd_8_ai , 0xfff8, 0x4810, { 12, 12, 10}},
+ {m68k_op_nbcd_8_pi , 0xfff8, 0x4818, { 12, 12, 10}},
+ {m68k_op_nbcd_8_pd , 0xfff8, 0x4820, { 14, 14, 11}},
+ {m68k_op_nbcd_8_di , 0xfff8, 0x4828, { 16, 16, 11}},
+ {m68k_op_nbcd_8_ix , 0xfff8, 0x4830, { 18, 18, 13}},
+ {m68k_op_swap_32 , 0xfff8, 0x4840, { 4, 4, 4}},
+ {m68k_op_bkpt , 0xfff8, 0x4848, { 0, 10, 10}},
+ {m68k_op_pea_32_ai , 0xfff8, 0x4850, { 12, 12, 9}},
+ {m68k_op_pea_32_di , 0xfff8, 0x4868, { 16, 16, 10}},
+ {m68k_op_pea_32_ix , 0xfff8, 0x4870, { 20, 20, 12}},
+ {m68k_op_ext_16 , 0xfff8, 0x4880, { 4, 4, 4}},
+ {m68k_op_movem_16_re_ai , 0xfff8, 0x4890, { 8, 8, 8}},
+ {m68k_op_movem_16_re_pd , 0xfff8, 0x48a0, { 8, 8, 4}},
+ {m68k_op_movem_16_re_di , 0xfff8, 0x48a8, { 12, 12, 9}},
+ {m68k_op_movem_16_re_ix , 0xfff8, 0x48b0, { 14, 14, 11}},
+ {m68k_op_ext_32 , 0xfff8, 0x48c0, { 4, 4, 4}},
+ {m68k_op_movem_32_re_ai , 0xfff8, 0x48d0, { 8, 8, 8}},
+ {m68k_op_movem_32_re_pd , 0xfff8, 0x48e0, { 8, 8, 4}},
+ {m68k_op_movem_32_re_di , 0xfff8, 0x48e8, { 12, 12, 9}},
+ {m68k_op_movem_32_re_ix , 0xfff8, 0x48f0, { 14, 14, 11}},
+ {m68k_op_extb_32 , 0xfff8, 0x49c0, { 0, 0, 4}},
+ {m68k_op_tst_8_d , 0xfff8, 0x4a00, { 4, 4, 2}},
+ {m68k_op_tst_8_ai , 0xfff8, 0x4a10, { 8, 8, 6}},
+ {m68k_op_tst_8_pi , 0xfff8, 0x4a18, { 8, 8, 6}},
+ {m68k_op_tst_8_pd , 0xfff8, 0x4a20, { 10, 10, 7}},
+ {m68k_op_tst_8_di , 0xfff8, 0x4a28, { 12, 12, 7}},
+ {m68k_op_tst_8_ix , 0xfff8, 0x4a30, { 14, 14, 9}},
+ {m68k_op_tst_16_d , 0xfff8, 0x4a40, { 4, 4, 2}},
+ {m68k_op_tst_16_a , 0xfff8, 0x4a48, { 0, 0, 2}},
+ {m68k_op_tst_16_ai , 0xfff8, 0x4a50, { 8, 8, 6}},
+ {m68k_op_tst_16_pi , 0xfff8, 0x4a58, { 8, 8, 6}},
+ {m68k_op_tst_16_pd , 0xfff8, 0x4a60, { 10, 10, 7}},
+ {m68k_op_tst_16_di , 0xfff8, 0x4a68, { 12, 12, 7}},
+ {m68k_op_tst_16_ix , 0xfff8, 0x4a70, { 14, 14, 9}},
+ {m68k_op_tst_32_d , 0xfff8, 0x4a80, { 4, 4, 2}},
+ {m68k_op_tst_32_a , 0xfff8, 0x4a88, { 0, 0, 2}},
+ {m68k_op_tst_32_ai , 0xfff8, 0x4a90, { 12, 12, 6}},
+ {m68k_op_tst_32_pi , 0xfff8, 0x4a98, { 12, 12, 6}},
+ {m68k_op_tst_32_pd , 0xfff8, 0x4aa0, { 14, 14, 7}},
+ {m68k_op_tst_32_di , 0xfff8, 0x4aa8, { 16, 16, 7}},
+ {m68k_op_tst_32_ix , 0xfff8, 0x4ab0, { 18, 18, 9}},
+ {m68k_op_tas_8_d , 0xfff8, 0x4ac0, { 4, 4, 4}},
+ {m68k_op_tas_8_ai , 0xfff8, 0x4ad0, { 18, 18, 16}},
+ {m68k_op_tas_8_pi , 0xfff8, 0x4ad8, { 18, 18, 16}},
+ {m68k_op_tas_8_pd , 0xfff8, 0x4ae0, { 20, 20, 17}},
+ {m68k_op_tas_8_di , 0xfff8, 0x4ae8, { 22, 22, 17}},
+ {m68k_op_tas_8_ix , 0xfff8, 0x4af0, { 24, 24, 19}},
+ {m68k_op_mull_32_d , 0xfff8, 0x4c00, { 0, 0, 43}},
+ {m68k_op_mull_32_ai , 0xfff8, 0x4c10, { 0, 0, 47}},
+ {m68k_op_mull_32_pi , 0xfff8, 0x4c18, { 0, 0, 47}},
+ {m68k_op_mull_32_pd , 0xfff8, 0x4c20, { 0, 0, 48}},
+ {m68k_op_mull_32_di , 0xfff8, 0x4c28, { 0, 0, 48}},
+ {m68k_op_mull_32_ix , 0xfff8, 0x4c30, { 0, 0, 50}},
+ {m68k_op_divl_32_d , 0xfff8, 0x4c40, { 0, 0, 84}},
+ {m68k_op_divl_32_ai , 0xfff8, 0x4c50, { 0, 0, 88}},
+ {m68k_op_divl_32_pi , 0xfff8, 0x4c58, { 0, 0, 88}},
+ {m68k_op_divl_32_pd , 0xfff8, 0x4c60, { 0, 0, 89}},
+ {m68k_op_divl_32_di , 0xfff8, 0x4c68, { 0, 0, 89}},
+ {m68k_op_divl_32_ix , 0xfff8, 0x4c70, { 0, 0, 91}},
+ {m68k_op_movem_16_er_ai , 0xfff8, 0x4c90, { 12, 12, 12}},
+ {m68k_op_movem_16_er_pi , 0xfff8, 0x4c98, { 12, 12, 8}},
+ {m68k_op_movem_16_er_di , 0xfff8, 0x4ca8, { 16, 16, 13}},
+ {m68k_op_movem_16_er_ix , 0xfff8, 0x4cb0, { 18, 18, 15}},
+ {m68k_op_movem_32_er_ai , 0xfff8, 0x4cd0, { 12, 12, 12}},
+ {m68k_op_movem_32_er_pi , 0xfff8, 0x4cd8, { 12, 12, 8}},
+ {m68k_op_movem_32_er_di , 0xfff8, 0x4ce8, { 16, 16, 13}},
+ {m68k_op_movem_32_er_ix , 0xfff8, 0x4cf0, { 18, 18, 15}},
+ {m68k_op_link_16 , 0xfff8, 0x4e50, { 16, 16, 5}},
+ {m68k_op_unlk_32 , 0xfff8, 0x4e58, { 12, 12, 6}},
+ {m68k_op_move_32_tou , 0xfff8, 0x4e60, { 4, 6, 2}},
+ {m68k_op_move_32_fru , 0xfff8, 0x4e68, { 4, 6, 2}},
+ {m68k_op_jsr_32_ai , 0xfff8, 0x4e90, { 16, 16, 4}},
+ {m68k_op_jsr_32_di , 0xfff8, 0x4ea8, { 18, 18, 5}},
+ {m68k_op_jsr_32_ix , 0xfff8, 0x4eb0, { 22, 22, 7}},
+ {m68k_op_jmp_32_ai , 0xfff8, 0x4ed0, { 8, 8, 4}},
+ {m68k_op_jmp_32_di , 0xfff8, 0x4ee8, { 10, 10, 5}},
+ {m68k_op_jmp_32_ix , 0xfff8, 0x4ef0, { 14, 14, 7}},
+ {m68k_op_st_8_d , 0xfff8, 0x50c0, { 6, 4, 4}},
+ {m68k_op_dbt_16 , 0xfff8, 0x50c8, { 12, 12, 6}},
+ {m68k_op_st_8_ai , 0xfff8, 0x50d0, { 12, 12, 10}},
+ {m68k_op_st_8_pi , 0xfff8, 0x50d8, { 12, 12, 10}},
+ {m68k_op_st_8_pd , 0xfff8, 0x50e0, { 14, 14, 11}},
+ {m68k_op_st_8_di , 0xfff8, 0x50e8, { 16, 16, 11}},
+ {m68k_op_st_8_ix , 0xfff8, 0x50f0, { 18, 18, 13}},
+ {m68k_op_sf_8_d , 0xfff8, 0x51c0, { 4, 4, 4}},
+ {m68k_op_dbf_16 , 0xfff8, 0x51c8, { 14, 14, 6}},
+ {m68k_op_sf_8_ai , 0xfff8, 0x51d0, { 12, 12, 10}},
+ {m68k_op_sf_8_pi , 0xfff8, 0x51d8, { 12, 12, 10}},
+ {m68k_op_sf_8_pd , 0xfff8, 0x51e0, { 14, 14, 11}},
+ {m68k_op_sf_8_di , 0xfff8, 0x51e8, { 16, 16, 11}},
+ {m68k_op_sf_8_ix , 0xfff8, 0x51f0, { 18, 18, 13}},
+ {m68k_op_shi_8_d , 0xfff8, 0x52c0, { 4, 4, 4}},
+ {m68k_op_dbhi_16 , 0xfff8, 0x52c8, { 12, 12, 6}},
+ {m68k_op_shi_8_ai , 0xfff8, 0x52d0, { 12, 12, 10}},
+ {m68k_op_shi_8_pi , 0xfff8, 0x52d8, { 12, 12, 10}},
+ {m68k_op_shi_8_pd , 0xfff8, 0x52e0, { 14, 14, 11}},
+ {m68k_op_shi_8_di , 0xfff8, 0x52e8, { 16, 16, 11}},
+ {m68k_op_shi_8_ix , 0xfff8, 0x52f0, { 18, 18, 13}},
+ {m68k_op_sls_8_d , 0xfff8, 0x53c0, { 4, 4, 4}},
+ {m68k_op_dbls_16 , 0xfff8, 0x53c8, { 12, 12, 6}},
+ {m68k_op_sls_8_ai , 0xfff8, 0x53d0, { 12, 12, 10}},
+ {m68k_op_sls_8_pi , 0xfff8, 0x53d8, { 12, 12, 10}},
+ {m68k_op_sls_8_pd , 0xfff8, 0x53e0, { 14, 14, 11}},
+ {m68k_op_sls_8_di , 0xfff8, 0x53e8, { 16, 16, 11}},
+ {m68k_op_sls_8_ix , 0xfff8, 0x53f0, { 18, 18, 13}},
+ {m68k_op_scc_8_d , 0xfff8, 0x54c0, { 4, 4, 4}},
+ {m68k_op_dbcc_16 , 0xfff8, 0x54c8, { 12, 12, 6}},
+ {m68k_op_scc_8_ai , 0xfff8, 0x54d0, { 12, 12, 10}},
+ {m68k_op_scc_8_pi , 0xfff8, 0x54d8, { 12, 12, 10}},
+ {m68k_op_scc_8_pd , 0xfff8, 0x54e0, { 14, 14, 11}},
+ {m68k_op_scc_8_di , 0xfff8, 0x54e8, { 16, 16, 11}},
+ {m68k_op_scc_8_ix , 0xfff8, 0x54f0, { 18, 18, 13}},
+ {m68k_op_scs_8_d , 0xfff8, 0x55c0, { 4, 4, 4}},
+ {m68k_op_dbcs_16 , 0xfff8, 0x55c8, { 12, 12, 6}},
+ {m68k_op_scs_8_ai , 0xfff8, 0x55d0, { 12, 12, 10}},
+ {m68k_op_scs_8_pi , 0xfff8, 0x55d8, { 12, 12, 10}},
+ {m68k_op_scs_8_pd , 0xfff8, 0x55e0, { 14, 14, 11}},
+ {m68k_op_scs_8_di , 0xfff8, 0x55e8, { 16, 16, 11}},
+ {m68k_op_scs_8_ix , 0xfff8, 0x55f0, { 18, 18, 13}},
+ {m68k_op_sne_8_d , 0xfff8, 0x56c0, { 4, 4, 4}},
+ {m68k_op_dbne_16 , 0xfff8, 0x56c8, { 12, 12, 6}},
+ {m68k_op_sne_8_ai , 0xfff8, 0x56d0, { 12, 12, 10}},
+ {m68k_op_sne_8_pi , 0xfff8, 0x56d8, { 12, 12, 10}},
+ {m68k_op_sne_8_pd , 0xfff8, 0x56e0, { 14, 14, 11}},
+ {m68k_op_sne_8_di , 0xfff8, 0x56e8, { 16, 16, 11}},
+ {m68k_op_sne_8_ix , 0xfff8, 0x56f0, { 18, 18, 13}},
+ {m68k_op_seq_8_d , 0xfff8, 0x57c0, { 4, 4, 4}},
+ {m68k_op_dbeq_16 , 0xfff8, 0x57c8, { 12, 12, 6}},
+ {m68k_op_seq_8_ai , 0xfff8, 0x57d0, { 12, 12, 10}},
+ {m68k_op_seq_8_pi , 0xfff8, 0x57d8, { 12, 12, 10}},
+ {m68k_op_seq_8_pd , 0xfff8, 0x57e0, { 14, 14, 11}},
+ {m68k_op_seq_8_di , 0xfff8, 0x57e8, { 16, 16, 11}},
+ {m68k_op_seq_8_ix , 0xfff8, 0x57f0, { 18, 18, 13}},
+ {m68k_op_svc_8_d , 0xfff8, 0x58c0, { 4, 4, 4}},
+ {m68k_op_dbvc_16 , 0xfff8, 0x58c8, { 12, 12, 6}},
+ {m68k_op_svc_8_ai , 0xfff8, 0x58d0, { 12, 12, 10}},
+ {m68k_op_svc_8_pi , 0xfff8, 0x58d8, { 12, 12, 10}},
+ {m68k_op_svc_8_pd , 0xfff8, 0x58e0, { 14, 14, 11}},
+ {m68k_op_svc_8_di , 0xfff8, 0x58e8, { 16, 16, 11}},
+ {m68k_op_svc_8_ix , 0xfff8, 0x58f0, { 18, 18, 13}},
+ {m68k_op_svs_8_d , 0xfff8, 0x59c0, { 4, 4, 4}},
+ {m68k_op_dbvs_16 , 0xfff8, 0x59c8, { 12, 12, 6}},
+ {m68k_op_svs_8_ai , 0xfff8, 0x59d0, { 12, 12, 10}},
+ {m68k_op_svs_8_pi , 0xfff8, 0x59d8, { 12, 12, 10}},
+ {m68k_op_svs_8_pd , 0xfff8, 0x59e0, { 14, 14, 11}},
+ {m68k_op_svs_8_di , 0xfff8, 0x59e8, { 16, 16, 11}},
+ {m68k_op_svs_8_ix , 0xfff8, 0x59f0, { 18, 18, 13}},
+ {m68k_op_spl_8_d , 0xfff8, 0x5ac0, { 4, 4, 4}},
+ {m68k_op_dbpl_16 , 0xfff8, 0x5ac8, { 12, 12, 6}},
+ {m68k_op_spl_8_ai , 0xfff8, 0x5ad0, { 12, 12, 10}},
+ {m68k_op_spl_8_pi , 0xfff8, 0x5ad8, { 12, 12, 10}},
+ {m68k_op_spl_8_pd , 0xfff8, 0x5ae0, { 14, 14, 11}},
+ {m68k_op_spl_8_di , 0xfff8, 0x5ae8, { 16, 16, 11}},
+ {m68k_op_spl_8_ix , 0xfff8, 0x5af0, { 18, 18, 13}},
+ {m68k_op_smi_8_d , 0xfff8, 0x5bc0, { 4, 4, 4}},
+ {m68k_op_dbmi_16 , 0xfff8, 0x5bc8, { 12, 12, 6}},
+ {m68k_op_smi_8_ai , 0xfff8, 0x5bd0, { 12, 12, 10}},
+ {m68k_op_smi_8_pi , 0xfff8, 0x5bd8, { 12, 12, 10}},
+ {m68k_op_smi_8_pd , 0xfff8, 0x5be0, { 14, 14, 11}},
+ {m68k_op_smi_8_di , 0xfff8, 0x5be8, { 16, 16, 11}},
+ {m68k_op_smi_8_ix , 0xfff8, 0x5bf0, { 18, 18, 13}},
+ {m68k_op_sge_8_d , 0xfff8, 0x5cc0, { 4, 4, 4}},
+ {m68k_op_dbge_16 , 0xfff8, 0x5cc8, { 12, 12, 6}},
+ {m68k_op_sge_8_ai , 0xfff8, 0x5cd0, { 12, 12, 10}},
+ {m68k_op_sge_8_pi , 0xfff8, 0x5cd8, { 12, 12, 10}},
+ {m68k_op_sge_8_pd , 0xfff8, 0x5ce0, { 14, 14, 11}},
+ {m68k_op_sge_8_di , 0xfff8, 0x5ce8, { 16, 16, 11}},
+ {m68k_op_sge_8_ix , 0xfff8, 0x5cf0, { 18, 18, 13}},
+ {m68k_op_slt_8_d , 0xfff8, 0x5dc0, { 4, 4, 4}},
+ {m68k_op_dblt_16 , 0xfff8, 0x5dc8, { 12, 12, 6}},
+ {m68k_op_slt_8_ai , 0xfff8, 0x5dd0, { 12, 12, 10}},
+ {m68k_op_slt_8_pi , 0xfff8, 0x5dd8, { 12, 12, 10}},
+ {m68k_op_slt_8_pd , 0xfff8, 0x5de0, { 14, 14, 11}},
+ {m68k_op_slt_8_di , 0xfff8, 0x5de8, { 16, 16, 11}},
+ {m68k_op_slt_8_ix , 0xfff8, 0x5df0, { 18, 18, 13}},
+ {m68k_op_sgt_8_d , 0xfff8, 0x5ec0, { 4, 4, 4}},
+ {m68k_op_dbgt_16 , 0xfff8, 0x5ec8, { 12, 12, 6}},
+ {m68k_op_sgt_8_ai , 0xfff8, 0x5ed0, { 12, 12, 10}},
+ {m68k_op_sgt_8_pi , 0xfff8, 0x5ed8, { 12, 12, 10}},
+ {m68k_op_sgt_8_pd , 0xfff8, 0x5ee0, { 14, 14, 11}},
+ {m68k_op_sgt_8_di , 0xfff8, 0x5ee8, { 16, 16, 11}},
+ {m68k_op_sgt_8_ix , 0xfff8, 0x5ef0, { 18, 18, 13}},
+ {m68k_op_sle_8_d , 0xfff8, 0x5fc0, { 4, 4, 4}},
+ {m68k_op_dble_16 , 0xfff8, 0x5fc8, { 12, 12, 6}},
+ {m68k_op_sle_8_ai , 0xfff8, 0x5fd0, { 12, 12, 10}},
+ {m68k_op_sle_8_pi , 0xfff8, 0x5fd8, { 12, 12, 10}},
+ {m68k_op_sle_8_pd , 0xfff8, 0x5fe0, { 14, 14, 11}},
+ {m68k_op_sle_8_di , 0xfff8, 0x5fe8, { 16, 16, 11}},
+ {m68k_op_sle_8_ix , 0xfff8, 0x5ff0, { 18, 18, 13}},
+ {m68k_op_sbcd_8_mm_ax7 , 0xfff8, 0x8f08, { 18, 18, 16}},
+ {m68k_op_pack_16_mm_ax7 , 0xfff8, 0x8f48, { 0, 0, 13}},
+ {m68k_op_unpk_16_mm_ax7 , 0xfff8, 0x8f88, { 0, 0, 13}},
+ {m68k_op_subx_8_mm_ax7 , 0xfff8, 0x9f08, { 18, 18, 12}},
+ {m68k_op_cmpm_8_ax7 , 0xfff8, 0xbf08, { 12, 12, 9}},
+ {m68k_op_abcd_8_mm_ax7 , 0xfff8, 0xcf08, { 18, 18, 16}},
+ {m68k_op_addx_8_mm_ax7 , 0xfff8, 0xdf08, { 18, 18, 12}},
+ {m68k_op_asr_16_ai , 0xfff8, 0xe0d0, { 12, 12, 9}},
+ {m68k_op_asr_16_pi , 0xfff8, 0xe0d8, { 12, 12, 9}},
+ {m68k_op_asr_16_pd , 0xfff8, 0xe0e0, { 14, 14, 10}},
+ {m68k_op_asr_16_di , 0xfff8, 0xe0e8, { 16, 16, 10}},
+ {m68k_op_asr_16_ix , 0xfff8, 0xe0f0, { 18, 18, 12}},
+ {m68k_op_asl_16_ai , 0xfff8, 0xe1d0, { 12, 12, 10}},
+ {m68k_op_asl_16_pi , 0xfff8, 0xe1d8, { 12, 12, 10}},
+ {m68k_op_asl_16_pd , 0xfff8, 0xe1e0, { 14, 14, 11}},
+ {m68k_op_asl_16_di , 0xfff8, 0xe1e8, { 16, 16, 11}},
+ {m68k_op_asl_16_ix , 0xfff8, 0xe1f0, { 18, 18, 13}},
+ {m68k_op_lsr_16_ai , 0xfff8, 0xe2d0, { 12, 12, 9}},
+ {m68k_op_lsr_16_pi , 0xfff8, 0xe2d8, { 12, 12, 9}},
+ {m68k_op_lsr_16_pd , 0xfff8, 0xe2e0, { 14, 14, 10}},
+ {m68k_op_lsr_16_di , 0xfff8, 0xe2e8, { 16, 16, 10}},
+ {m68k_op_lsr_16_ix , 0xfff8, 0xe2f0, { 18, 18, 12}},
+ {m68k_op_lsl_16_ai , 0xfff8, 0xe3d0, { 12, 12, 9}},
+ {m68k_op_lsl_16_pi , 0xfff8, 0xe3d8, { 12, 12, 9}},
+ {m68k_op_lsl_16_pd , 0xfff8, 0xe3e0, { 14, 14, 10}},
+ {m68k_op_lsl_16_di , 0xfff8, 0xe3e8, { 16, 16, 10}},
+ {m68k_op_lsl_16_ix , 0xfff8, 0xe3f0, { 18, 18, 12}},
+ {m68k_op_roxr_16_ai , 0xfff8, 0xe4d0, { 12, 12, 9}},
+ {m68k_op_roxr_16_pi , 0xfff8, 0xe4d8, { 12, 12, 9}},
+ {m68k_op_roxr_16_pd , 0xfff8, 0xe4e0, { 14, 14, 10}},
+ {m68k_op_roxr_16_di , 0xfff8, 0xe4e8, { 16, 16, 10}},
+ {m68k_op_roxr_16_ix , 0xfff8, 0xe4f0, { 18, 18, 12}},
+ {m68k_op_roxl_16_ai , 0xfff8, 0xe5d0, { 12, 12, 9}},
+ {m68k_op_roxl_16_pi , 0xfff8, 0xe5d8, { 12, 12, 9}},
+ {m68k_op_roxl_16_pd , 0xfff8, 0xe5e0, { 14, 14, 10}},
+ {m68k_op_roxl_16_di , 0xfff8, 0xe5e8, { 16, 16, 10}},
+ {m68k_op_roxl_16_ix , 0xfff8, 0xe5f0, { 18, 18, 12}},
+ {m68k_op_ror_16_ai , 0xfff8, 0xe6d0, { 12, 12, 11}},
+ {m68k_op_ror_16_pi , 0xfff8, 0xe6d8, { 12, 12, 11}},
+ {m68k_op_ror_16_pd , 0xfff8, 0xe6e0, { 14, 14, 12}},
+ {m68k_op_ror_16_di , 0xfff8, 0xe6e8, { 16, 16, 12}},
+ {m68k_op_ror_16_ix , 0xfff8, 0xe6f0, { 18, 18, 14}},
+ {m68k_op_rol_16_ai , 0xfff8, 0xe7d0, { 12, 12, 11}},
+ {m68k_op_rol_16_pi , 0xfff8, 0xe7d8, { 12, 12, 11}},
+ {m68k_op_rol_16_pd , 0xfff8, 0xe7e0, { 14, 14, 12}},
+ {m68k_op_rol_16_di , 0xfff8, 0xe7e8, { 16, 16, 12}},
+ {m68k_op_rol_16_ix , 0xfff8, 0xe7f0, { 18, 18, 14}},
+ {m68k_op_bftst_32_d , 0xfff8, 0xe8c0, { 0, 0, 6}},
+ {m68k_op_bftst_32_ai , 0xfff8, 0xe8d0, { 0, 0, 17}},
+ {m68k_op_bftst_32_di , 0xfff8, 0xe8e8, { 0, 0, 18}},
+ {m68k_op_bftst_32_ix , 0xfff8, 0xe8f0, { 0, 0, 20}},
+ {m68k_op_bfextu_32_d , 0xfff8, 0xe9c0, { 0, 0, 8}},
+ {m68k_op_bfextu_32_ai , 0xfff8, 0xe9d0, { 0, 0, 19}},
+ {m68k_op_bfextu_32_di , 0xfff8, 0xe9e8, { 0, 0, 20}},
+ {m68k_op_bfextu_32_ix , 0xfff8, 0xe9f0, { 0, 0, 22}},
+ {m68k_op_bfchg_32_d , 0xfff8, 0xeac0, { 0, 0, 12}},
+ {m68k_op_bfchg_32_ai , 0xfff8, 0xead0, { 0, 0, 24}},
+ {m68k_op_bfchg_32_di , 0xfff8, 0xeae8, { 0, 0, 25}},
+ {m68k_op_bfchg_32_ix , 0xfff8, 0xeaf0, { 0, 0, 27}},
+ {m68k_op_bfexts_32_d , 0xfff8, 0xebc0, { 0, 0, 8}},
+ {m68k_op_bfexts_32_ai , 0xfff8, 0xebd0, { 0, 0, 19}},
+ {m68k_op_bfexts_32_di , 0xfff8, 0xebe8, { 0, 0, 20}},
+ {m68k_op_bfexts_32_ix , 0xfff8, 0xebf0, { 0, 0, 22}},
+ {m68k_op_bfclr_32_d , 0xfff8, 0xecc0, { 0, 0, 12}},
+ {m68k_op_bfclr_32_ai , 0xfff8, 0xecd0, { 0, 0, 24}},
+ {m68k_op_bfclr_32_di , 0xfff8, 0xece8, { 0, 0, 25}},
+ {m68k_op_bfclr_32_ix , 0xfff8, 0xecf0, { 0, 0, 27}},
+ {m68k_op_bfffo_32_d , 0xfff8, 0xedc0, { 0, 0, 18}},
+ {m68k_op_bfffo_32_ai , 0xfff8, 0xedd0, { 0, 0, 32}},
+ {m68k_op_bfffo_32_di , 0xfff8, 0xede8, { 0, 0, 33}},
+ {m68k_op_bfffo_32_ix , 0xfff8, 0xedf0, { 0, 0, 35}},
+ {m68k_op_bfset_32_d , 0xfff8, 0xeec0, { 0, 0, 12}},
+ {m68k_op_bfset_32_ai , 0xfff8, 0xeed0, { 0, 0, 24}},
+ {m68k_op_bfset_32_di , 0xfff8, 0xeee8, { 0, 0, 25}},
+ {m68k_op_bfset_32_ix , 0xfff8, 0xeef0, { 0, 0, 27}},
+ {m68k_op_bfins_32_d , 0xfff8, 0xefc0, { 0, 0, 10}},
+ {m68k_op_bfins_32_ai , 0xfff8, 0xefd0, { 0, 0, 21}},
+ {m68k_op_bfins_32_di , 0xfff8, 0xefe8, { 0, 0, 22}},
+ {m68k_op_bfins_32_ix , 0xfff8, 0xeff0, { 0, 0, 24}},
+ {m68k_op_ori_8_pi7 , 0xffff, 0x001f, { 16, 16, 8}},
+ {m68k_op_ori_8_pd7 , 0xffff, 0x0027, { 18, 18, 9}},
+ {m68k_op_ori_8_aw , 0xffff, 0x0038, { 20, 20, 8}},
+ {m68k_op_ori_8_al , 0xffff, 0x0039, { 24, 24, 8}},
+ {m68k_op_ori_16_toc , 0xffff, 0x003c, { 20, 16, 12}},
+ {m68k_op_ori_16_aw , 0xffff, 0x0078, { 20, 20, 8}},
+ {m68k_op_ori_16_al , 0xffff, 0x0079, { 24, 24, 8}},
+ {m68k_op_ori_16_tos , 0xffff, 0x007c, { 20, 16, 12}},
+ {m68k_op_ori_32_aw , 0xffff, 0x00b8, { 32, 32, 8}},
+ {m68k_op_ori_32_al , 0xffff, 0x00b9, { 36, 36, 8}},
+ {m68k_op_chk2cmp2_8_aw , 0xffff, 0x00f8, { 0, 0, 22}},
+ {m68k_op_chk2cmp2_8_al , 0xffff, 0x00f9, { 0, 0, 22}},
+ {m68k_op_chk2cmp2_8_pcdi , 0xffff, 0x00fa, { 0, 0, 23}},
+ {m68k_op_chk2cmp2_8_pcix , 0xffff, 0x00fb, { 0, 0, 23}},
+ {m68k_op_andi_8_pi7 , 0xffff, 0x021f, { 16, 16, 8}},
+ {m68k_op_andi_8_pd7 , 0xffff, 0x0227, { 18, 18, 9}},
+ {m68k_op_andi_8_aw , 0xffff, 0x0238, { 20, 20, 8}},
+ {m68k_op_andi_8_al , 0xffff, 0x0239, { 24, 24, 8}},
+ {m68k_op_andi_16_toc , 0xffff, 0x023c, { 20, 16, 12}},
+ {m68k_op_andi_16_aw , 0xffff, 0x0278, { 20, 20, 8}},
+ {m68k_op_andi_16_al , 0xffff, 0x0279, { 24, 24, 8}},
+ {m68k_op_andi_16_tos , 0xffff, 0x027c, { 20, 16, 12}},
+ {m68k_op_andi_32_aw , 0xffff, 0x02b8, { 32, 32, 8}},
+ {m68k_op_andi_32_al , 0xffff, 0x02b9, { 36, 36, 8}},
+ {m68k_op_chk2cmp2_16_aw , 0xffff, 0x02f8, { 0, 0, 22}},
+ {m68k_op_chk2cmp2_16_al , 0xffff, 0x02f9, { 0, 0, 22}},
+ {m68k_op_chk2cmp2_16_pcdi , 0xffff, 0x02fa, { 0, 0, 23}},
+ {m68k_op_chk2cmp2_16_pcix , 0xffff, 0x02fb, { 0, 0, 23}},
+ {m68k_op_subi_8_pi7 , 0xffff, 0x041f, { 16, 16, 8}},
+ {m68k_op_subi_8_pd7 , 0xffff, 0x0427, { 18, 18, 9}},
+ {m68k_op_subi_8_aw , 0xffff, 0x0438, { 20, 20, 8}},
+ {m68k_op_subi_8_al , 0xffff, 0x0439, { 24, 24, 8}},
+ {m68k_op_subi_16_aw , 0xffff, 0x0478, { 20, 20, 8}},
+ {m68k_op_subi_16_al , 0xffff, 0x0479, { 24, 24, 8}},
+ {m68k_op_subi_32_aw , 0xffff, 0x04b8, { 32, 32, 8}},
+ {m68k_op_subi_32_al , 0xffff, 0x04b9, { 36, 36, 8}},
+ {m68k_op_chk2cmp2_32_aw , 0xffff, 0x04f8, { 0, 0, 22}},
+ {m68k_op_chk2cmp2_32_al , 0xffff, 0x04f9, { 0, 0, 22}},
+ {m68k_op_chk2cmp2_32_pcdi , 0xffff, 0x04fa, { 0, 0, 23}},
+ {m68k_op_chk2cmp2_32_pcix , 0xffff, 0x04fb, { 0, 0, 23}},
+ {m68k_op_addi_8_pi7 , 0xffff, 0x061f, { 16, 16, 8}},
+ {m68k_op_addi_8_pd7 , 0xffff, 0x0627, { 18, 18, 9}},
+ {m68k_op_addi_8_aw , 0xffff, 0x0638, { 20, 20, 8}},
+ {m68k_op_addi_8_al , 0xffff, 0x0639, { 24, 24, 8}},
+ {m68k_op_addi_16_aw , 0xffff, 0x0678, { 20, 20, 8}},
+ {m68k_op_addi_16_al , 0xffff, 0x0679, { 24, 24, 8}},
+ {m68k_op_addi_32_aw , 0xffff, 0x06b8, { 32, 32, 8}},
+ {m68k_op_addi_32_al , 0xffff, 0x06b9, { 36, 36, 8}},
+ {m68k_op_callm_32_aw , 0xffff, 0x06f8, { 0, 0, 64}},
+ {m68k_op_callm_32_al , 0xffff, 0x06f9, { 0, 0, 64}},
+ {m68k_op_callm_32_pcdi , 0xffff, 0x06fa, { 0, 0, 65}},
+ {m68k_op_callm_32_pcix , 0xffff, 0x06fb, { 0, 0, 67}},
+ {m68k_op_btst_8_s_pi7 , 0xffff, 0x081f, { 12, 12, 8}},
+ {m68k_op_btst_8_s_pd7 , 0xffff, 0x0827, { 14, 14, 9}},
+ {m68k_op_btst_8_s_aw , 0xffff, 0x0838, { 16, 16, 8}},
+ {m68k_op_btst_8_s_al , 0xffff, 0x0839, { 20, 20, 8}},
+ {m68k_op_btst_8_s_pcdi , 0xffff, 0x083a, { 16, 16, 9}},
+ {m68k_op_btst_8_s_pcix , 0xffff, 0x083b, { 18, 18, 11}},
+ {m68k_op_bchg_8_s_pi7 , 0xffff, 0x085f, { 16, 16, 8}},
+ {m68k_op_bchg_8_s_pd7 , 0xffff, 0x0867, { 18, 18, 9}},
+ {m68k_op_bchg_8_s_aw , 0xffff, 0x0878, { 20, 20, 8}},
+ {m68k_op_bchg_8_s_al , 0xffff, 0x0879, { 24, 24, 8}},
+ {m68k_op_bclr_8_s_pi7 , 0xffff, 0x089f, { 16, 16, 8}},
+ {m68k_op_bclr_8_s_pd7 , 0xffff, 0x08a7, { 18, 18, 9}},
+ {m68k_op_bclr_8_s_aw , 0xffff, 0x08b8, { 20, 20, 8}},
+ {m68k_op_bclr_8_s_al , 0xffff, 0x08b9, { 24, 24, 8}},
+ {m68k_op_bset_8_s_pi7 , 0xffff, 0x08df, { 16, 16, 8}},
+ {m68k_op_bset_8_s_pd7 , 0xffff, 0x08e7, { 18, 18, 9}},
+ {m68k_op_bset_8_s_aw , 0xffff, 0x08f8, { 20, 20, 8}},
+ {m68k_op_bset_8_s_al , 0xffff, 0x08f9, { 24, 24, 8}},
+ {m68k_op_eori_8_pi7 , 0xffff, 0x0a1f, { 16, 16, 8}},
+ {m68k_op_eori_8_pd7 , 0xffff, 0x0a27, { 18, 18, 9}},
+ {m68k_op_eori_8_aw , 0xffff, 0x0a38, { 20, 20, 8}},
+ {m68k_op_eori_8_al , 0xffff, 0x0a39, { 24, 24, 8}},
+ {m68k_op_eori_16_toc , 0xffff, 0x0a3c, { 20, 16, 12}},
+ {m68k_op_eori_16_aw , 0xffff, 0x0a78, { 20, 20, 8}},
+ {m68k_op_eori_16_al , 0xffff, 0x0a79, { 24, 24, 8}},
+ {m68k_op_eori_16_tos , 0xffff, 0x0a7c, { 20, 16, 12}},
+ {m68k_op_eori_32_aw , 0xffff, 0x0ab8, { 32, 32, 8}},
+ {m68k_op_eori_32_al , 0xffff, 0x0ab9, { 36, 36, 8}},
+ {m68k_op_cas_8_pi7 , 0xffff, 0x0adf, { 0, 0, 16}},
+ {m68k_op_cas_8_pd7 , 0xffff, 0x0ae7, { 0, 0, 17}},
+ {m68k_op_cas_8_aw , 0xffff, 0x0af8, { 0, 0, 16}},
+ {m68k_op_cas_8_al , 0xffff, 0x0af9, { 0, 0, 16}},
+ {m68k_op_cmpi_8_pi7 , 0xffff, 0x0c1f, { 12, 12, 6}},
+ {m68k_op_cmpi_8_pd7 , 0xffff, 0x0c27, { 14, 14, 7}},
+ {m68k_op_cmpi_8_aw , 0xffff, 0x0c38, { 16, 16, 6}},
+ {m68k_op_cmpi_8_al , 0xffff, 0x0c39, { 20, 20, 6}},
+ {m68k_op_cmpi_8_pcdi , 0xffff, 0x0c3a, { 0, 0, 7}},
+ {m68k_op_cmpi_8_pcix , 0xffff, 0x0c3b, { 0, 0, 9}},
+ {m68k_op_cmpi_16_aw , 0xffff, 0x0c78, { 16, 16, 6}},
+ {m68k_op_cmpi_16_al , 0xffff, 0x0c79, { 20, 20, 6}},
+ {m68k_op_cmpi_16_pcdi , 0xffff, 0x0c7a, { 0, 0, 7}},
+ {m68k_op_cmpi_16_pcix , 0xffff, 0x0c7b, { 0, 0, 9}},
+ {m68k_op_cmpi_32_aw , 0xffff, 0x0cb8, { 24, 24, 6}},
+ {m68k_op_cmpi_32_al , 0xffff, 0x0cb9, { 28, 28, 6}},
+ {m68k_op_cmpi_32_pcdi , 0xffff, 0x0cba, { 0, 0, 7}},
+ {m68k_op_cmpi_32_pcix , 0xffff, 0x0cbb, { 0, 0, 9}},
+ {m68k_op_cas_16_aw , 0xffff, 0x0cf8, { 0, 0, 16}},
+ {m68k_op_cas_16_al , 0xffff, 0x0cf9, { 0, 0, 16}},
+ {m68k_op_cas2_16 , 0xffff, 0x0cfc, { 0, 0, 12}},
+ {m68k_op_moves_8_pi7 , 0xffff, 0x0e1f, { 0, 18, 9}},
+ {m68k_op_moves_8_pd7 , 0xffff, 0x0e27, { 0, 20, 10}},
+ {m68k_op_moves_8_aw , 0xffff, 0x0e38, { 0, 26, 9}},
+ {m68k_op_moves_8_al , 0xffff, 0x0e39, { 0, 30, 9}},
+ {m68k_op_moves_16_aw , 0xffff, 0x0e78, { 0, 26, 9}},
+ {m68k_op_moves_16_al , 0xffff, 0x0e79, { 0, 30, 9}},
+ {m68k_op_moves_32_aw , 0xffff, 0x0eb8, { 0, 32, 9}},
+ {m68k_op_moves_32_al , 0xffff, 0x0eb9, { 0, 36, 9}},
+ {m68k_op_cas_32_aw , 0xffff, 0x0ef8, { 0, 0, 16}},
+ {m68k_op_cas_32_al , 0xffff, 0x0ef9, { 0, 0, 16}},
+ {m68k_op_cas2_32 , 0xffff, 0x0efc, { 0, 0, 12}},
+ {m68k_op_move_8_aw_pi7 , 0xffff, 0x11df, { 16, 16, 8}},
+ {m68k_op_move_8_aw_pd7 , 0xffff, 0x11e7, { 18, 18, 9}},
+ {m68k_op_move_8_aw_aw , 0xffff, 0x11f8, { 20, 20, 8}},
+ {m68k_op_move_8_aw_al , 0xffff, 0x11f9, { 24, 24, 8}},
+ {m68k_op_move_8_aw_pcdi , 0xffff, 0x11fa, { 20, 20, 9}},
+ {m68k_op_move_8_aw_pcix , 0xffff, 0x11fb, { 22, 22, 11}},
+ {m68k_op_move_8_aw_i , 0xffff, 0x11fc, { 16, 16, 6}},
+ {m68k_op_move_8_al_pi7 , 0xffff, 0x13df, { 20, 20, 10}},
+ {m68k_op_move_8_al_pd7 , 0xffff, 0x13e7, { 22, 22, 11}},
+ {m68k_op_move_8_al_aw , 0xffff, 0x13f8, { 24, 24, 10}},
+ {m68k_op_move_8_al_al , 0xffff, 0x13f9, { 28, 28, 10}},
+ {m68k_op_move_8_al_pcdi , 0xffff, 0x13fa, { 24, 24, 11}},
+ {m68k_op_move_8_al_pcix , 0xffff, 0x13fb, { 26, 26, 13}},
+ {m68k_op_move_8_al_i , 0xffff, 0x13fc, { 20, 20, 8}},
+ {m68k_op_move_8_pi7_pi7 , 0xffff, 0x1edf, { 12, 12, 8}},
+ {m68k_op_move_8_pi7_pd7 , 0xffff, 0x1ee7, { 14, 14, 9}},
+ {m68k_op_move_8_pi7_aw , 0xffff, 0x1ef8, { 16, 16, 8}},
+ {m68k_op_move_8_pi7_al , 0xffff, 0x1ef9, { 20, 20, 8}},
+ {m68k_op_move_8_pi7_pcdi , 0xffff, 0x1efa, { 16, 16, 9}},
+ {m68k_op_move_8_pi7_pcix , 0xffff, 0x1efb, { 18, 18, 11}},
+ {m68k_op_move_8_pi7_i , 0xffff, 0x1efc, { 12, 12, 6}},
+ {m68k_op_move_8_pd7_pi7 , 0xffff, 0x1f1f, { 12, 12, 9}},
+ {m68k_op_move_8_pd7_pd7 , 0xffff, 0x1f27, { 14, 14, 10}},
+ {m68k_op_move_8_pd7_aw , 0xffff, 0x1f38, { 16, 16, 9}},
+ {m68k_op_move_8_pd7_al , 0xffff, 0x1f39, { 20, 20, 9}},
+ {m68k_op_move_8_pd7_pcdi , 0xffff, 0x1f3a, { 16, 16, 10}},
+ {m68k_op_move_8_pd7_pcix , 0xffff, 0x1f3b, { 18, 18, 12}},
+ {m68k_op_move_8_pd7_i , 0xffff, 0x1f3c, { 12, 12, 7}},
+ {m68k_op_move_32_aw_aw , 0xffff, 0x21f8, { 28, 28, 8}},
+ {m68k_op_move_32_aw_al , 0xffff, 0x21f9, { 32, 32, 8}},
+ {m68k_op_move_32_aw_pcdi , 0xffff, 0x21fa, { 28, 28, 9}},
+ {m68k_op_move_32_aw_pcix , 0xffff, 0x21fb, { 30, 30, 11}},
+ {m68k_op_move_32_aw_i , 0xffff, 0x21fc, { 24, 24, 8}},
+ {m68k_op_move_32_al_aw , 0xffff, 0x23f8, { 32, 32, 10}},
+ {m68k_op_move_32_al_al , 0xffff, 0x23f9, { 36, 36, 10}},
+ {m68k_op_move_32_al_pcdi , 0xffff, 0x23fa, { 32, 32, 11}},
+ {m68k_op_move_32_al_pcix , 0xffff, 0x23fb, { 34, 34, 13}},
+ {m68k_op_move_32_al_i , 0xffff, 0x23fc, { 28, 28, 10}},
+ {m68k_op_move_16_aw_aw , 0xffff, 0x31f8, { 20, 20, 8}},
+ {m68k_op_move_16_aw_al , 0xffff, 0x31f9, { 24, 24, 8}},
+ {m68k_op_move_16_aw_pcdi , 0xffff, 0x31fa, { 20, 20, 9}},
+ {m68k_op_move_16_aw_pcix , 0xffff, 0x31fb, { 22, 22, 11}},
+ {m68k_op_move_16_aw_i , 0xffff, 0x31fc, { 16, 16, 6}},
+ {m68k_op_move_16_al_aw , 0xffff, 0x33f8, { 24, 24, 10}},
+ {m68k_op_move_16_al_al , 0xffff, 0x33f9, { 28, 28, 10}},
+ {m68k_op_move_16_al_pcdi , 0xffff, 0x33fa, { 24, 24, 11}},
+ {m68k_op_move_16_al_pcix , 0xffff, 0x33fb, { 26, 26, 13}},
+ {m68k_op_move_16_al_i , 0xffff, 0x33fc, { 20, 20, 8}},
+ {m68k_op_negx_8_pi7 , 0xffff, 0x401f, { 12, 12, 8}},
+ {m68k_op_negx_8_pd7 , 0xffff, 0x4027, { 14, 14, 9}},
+ {m68k_op_negx_8_aw , 0xffff, 0x4038, { 16, 16, 8}},
+ {m68k_op_negx_8_al , 0xffff, 0x4039, { 20, 20, 8}},
+ {m68k_op_negx_16_aw , 0xffff, 0x4078, { 16, 16, 8}},
+ {m68k_op_negx_16_al , 0xffff, 0x4079, { 20, 20, 8}},
+ {m68k_op_negx_32_aw , 0xffff, 0x40b8, { 24, 24, 8}},
+ {m68k_op_negx_32_al , 0xffff, 0x40b9, { 28, 28, 8}},
+ {m68k_op_move_16_frs_aw , 0xffff, 0x40f8, { 16, 16, 12}},
+ {m68k_op_move_16_frs_al , 0xffff, 0x40f9, { 20, 20, 12}},
+ {m68k_op_clr_8_pi7 , 0xffff, 0x421f, { 12, 8, 8}},
+ {m68k_op_clr_8_pd7 , 0xffff, 0x4227, { 14, 10, 9}},
+ {m68k_op_clr_8_aw , 0xffff, 0x4238, { 16, 12, 8}},
+ {m68k_op_clr_8_al , 0xffff, 0x4239, { 20, 14, 8}},
+ {m68k_op_clr_16_aw , 0xffff, 0x4278, { 16, 12, 8}},
+ {m68k_op_clr_16_al , 0xffff, 0x4279, { 20, 14, 8}},
+ {m68k_op_clr_32_aw , 0xffff, 0x42b8, { 24, 16, 8}},
+ {m68k_op_clr_32_al , 0xffff, 0x42b9, { 28, 20, 8}},
+ {m68k_op_move_16_frc_aw , 0xffff, 0x42f8, { 0, 16, 8}},
+ {m68k_op_move_16_frc_al , 0xffff, 0x42f9, { 0, 20, 8}},
+ {m68k_op_neg_8_pi7 , 0xffff, 0x441f, { 12, 12, 8}},
+ {m68k_op_neg_8_pd7 , 0xffff, 0x4427, { 14, 14, 9}},
+ {m68k_op_neg_8_aw , 0xffff, 0x4438, { 16, 16, 8}},
+ {m68k_op_neg_8_al , 0xffff, 0x4439, { 20, 20, 8}},
+ {m68k_op_neg_16_aw , 0xffff, 0x4478, { 16, 16, 8}},
+ {m68k_op_neg_16_al , 0xffff, 0x4479, { 20, 20, 8}},
+ {m68k_op_neg_32_aw , 0xffff, 0x44b8, { 24, 24, 8}},
+ {m68k_op_neg_32_al , 0xffff, 0x44b9, { 28, 28, 8}},
+ {m68k_op_move_16_toc_aw , 0xffff, 0x44f8, { 20, 20, 8}},
+ {m68k_op_move_16_toc_al , 0xffff, 0x44f9, { 24, 24, 8}},
+ {m68k_op_move_16_toc_pcdi , 0xffff, 0x44fa, { 20, 20, 9}},
+ {m68k_op_move_16_toc_pcix , 0xffff, 0x44fb, { 22, 22, 11}},
+ {m68k_op_move_16_toc_i , 0xffff, 0x44fc, { 16, 16, 6}},
+ {m68k_op_not_8_pi7 , 0xffff, 0x461f, { 12, 12, 8}},
+ {m68k_op_not_8_pd7 , 0xffff, 0x4627, { 14, 14, 9}},
+ {m68k_op_not_8_aw , 0xffff, 0x4638, { 16, 16, 8}},
+ {m68k_op_not_8_al , 0xffff, 0x4639, { 20, 20, 8}},
+ {m68k_op_not_16_aw , 0xffff, 0x4678, { 16, 16, 8}},
+ {m68k_op_not_16_al , 0xffff, 0x4679, { 20, 20, 8}},
+ {m68k_op_not_32_aw , 0xffff, 0x46b8, { 24, 24, 8}},
+ {m68k_op_not_32_al , 0xffff, 0x46b9, { 28, 28, 8}},
+ {m68k_op_move_16_tos_aw , 0xffff, 0x46f8, { 20, 20, 12}},
+ {m68k_op_move_16_tos_al , 0xffff, 0x46f9, { 24, 24, 12}},
+ {m68k_op_move_16_tos_pcdi , 0xffff, 0x46fa, { 20, 20, 13}},
+ {m68k_op_move_16_tos_pcix , 0xffff, 0x46fb, { 22, 22, 15}},
+ {m68k_op_move_16_tos_i , 0xffff, 0x46fc, { 16, 16, 10}},
+ {m68k_op_link_32_a7 , 0xffff, 0x480f, { 0, 0, 6}},
+ {m68k_op_nbcd_8_pi7 , 0xffff, 0x481f, { 12, 12, 10}},
+ {m68k_op_nbcd_8_pd7 , 0xffff, 0x4827, { 14, 14, 11}},
+ {m68k_op_nbcd_8_aw , 0xffff, 0x4838, { 16, 16, 10}},
+ {m68k_op_nbcd_8_al , 0xffff, 0x4839, { 20, 20, 10}},
+ {m68k_op_pea_32_aw , 0xffff, 0x4878, { 16, 16, 9}},
+ {m68k_op_pea_32_al , 0xffff, 0x4879, { 20, 20, 9}},
+ {m68k_op_pea_32_pcdi , 0xffff, 0x487a, { 16, 16, 10}},
+ {m68k_op_pea_32_pcix , 0xffff, 0x487b, { 20, 20, 12}},
+ {m68k_op_movem_16_re_aw , 0xffff, 0x48b8, { 12, 12, 8}},
+ {m68k_op_movem_16_re_al , 0xffff, 0x48b9, { 16, 16, 8}},
+ {m68k_op_movem_32_re_aw , 0xffff, 0x48f8, { 12, 12, 8}},
+ {m68k_op_movem_32_re_al , 0xffff, 0x48f9, { 16, 16, 8}},
+ {m68k_op_tst_8_pi7 , 0xffff, 0x4a1f, { 8, 8, 6}},
+ {m68k_op_tst_8_pd7 , 0xffff, 0x4a27, { 10, 10, 7}},
+ {m68k_op_tst_8_aw , 0xffff, 0x4a38, { 12, 12, 6}},
+ {m68k_op_tst_8_al , 0xffff, 0x4a39, { 16, 16, 6}},
+ {m68k_op_tst_8_pcdi , 0xffff, 0x4a3a, { 0, 0, 7}},
+ {m68k_op_tst_8_pcix , 0xffff, 0x4a3b, { 0, 0, 9}},
+ {m68k_op_tst_8_i , 0xffff, 0x4a3c, { 0, 0, 6}},
+ {m68k_op_tst_16_aw , 0xffff, 0x4a78, { 12, 12, 6}},
+ {m68k_op_tst_16_al , 0xffff, 0x4a79, { 16, 16, 6}},
+ {m68k_op_tst_16_pcdi , 0xffff, 0x4a7a, { 0, 0, 7}},
+ {m68k_op_tst_16_pcix , 0xffff, 0x4a7b, { 0, 0, 9}},
+ {m68k_op_tst_16_i , 0xffff, 0x4a7c, { 0, 0, 6}},
+ {m68k_op_tst_32_aw , 0xffff, 0x4ab8, { 16, 16, 6}},
+ {m68k_op_tst_32_al , 0xffff, 0x4ab9, { 20, 20, 6}},
+ {m68k_op_tst_32_pcdi , 0xffff, 0x4aba, { 0, 0, 7}},
+ {m68k_op_tst_32_pcix , 0xffff, 0x4abb, { 0, 0, 9}},
+ {m68k_op_tst_32_i , 0xffff, 0x4abc, { 0, 0, 6}},
+ {m68k_op_tas_8_pi7 , 0xffff, 0x4adf, { 18, 18, 16}},
+ {m68k_op_tas_8_pd7 , 0xffff, 0x4ae7, { 20, 20, 17}},
+ {m68k_op_tas_8_aw , 0xffff, 0x4af8, { 22, 22, 16}},
+ {m68k_op_tas_8_al , 0xffff, 0x4af9, { 26, 26, 16}},
+ {m68k_op_illegal , 0xffff, 0x4afc, { 4, 4, 4}},
+ {m68k_op_mull_32_aw , 0xffff, 0x4c38, { 0, 0, 47}},
+ {m68k_op_mull_32_al , 0xffff, 0x4c39, { 0, 0, 47}},
+ {m68k_op_mull_32_pcdi , 0xffff, 0x4c3a, { 0, 0, 48}},
+ {m68k_op_mull_32_pcix , 0xffff, 0x4c3b, { 0, 0, 50}},
+ {m68k_op_mull_32_i , 0xffff, 0x4c3c, { 0, 0, 47}},
+ {m68k_op_divl_32_aw , 0xffff, 0x4c78, { 0, 0, 88}},
+ {m68k_op_divl_32_al , 0xffff, 0x4c79, { 0, 0, 88}},
+ {m68k_op_divl_32_pcdi , 0xffff, 0x4c7a, { 0, 0, 89}},
+ {m68k_op_divl_32_pcix , 0xffff, 0x4c7b, { 0, 0, 91}},
+ {m68k_op_divl_32_i , 0xffff, 0x4c7c, { 0, 0, 88}},
+ {m68k_op_movem_16_er_aw , 0xffff, 0x4cb8, { 16, 16, 12}},
+ {m68k_op_movem_16_er_al , 0xffff, 0x4cb9, { 20, 20, 12}},
+ {m68k_op_movem_16_er_pcdi , 0xffff, 0x4cba, { 16, 16, 9}},
+ {m68k_op_movem_16_er_pcix , 0xffff, 0x4cbb, { 18, 18, 11}},
+ {m68k_op_movem_32_er_aw , 0xffff, 0x4cf8, { 16, 16, 12}},
+ {m68k_op_movem_32_er_al , 0xffff, 0x4cf9, { 20, 20, 12}},
+ {m68k_op_movem_32_er_pcdi , 0xffff, 0x4cfa, { 16, 16, 9}},
+ {m68k_op_movem_32_er_pcix , 0xffff, 0x4cfb, { 18, 18, 11}},
+ {m68k_op_link_16_a7 , 0xffff, 0x4e57, { 16, 16, 5}},
+ {m68k_op_unlk_32_a7 , 0xffff, 0x4e5f, { 12, 12, 6}},
+ {m68k_op_reset , 0xffff, 0x4e70, { 0, 0, 0}},
+ {m68k_op_nop , 0xffff, 0x4e71, { 4, 4, 2}},
+ {m68k_op_stop , 0xffff, 0x4e72, { 4, 4, 8}},
+ {m68k_op_rte_32 , 0xffff, 0x4e73, { 20, 24, 20}},
+ {m68k_op_rtd_32 , 0xffff, 0x4e74, { 0, 16, 10}},
+ {m68k_op_rts_32 , 0xffff, 0x4e75, { 16, 16, 10}},
+ {m68k_op_trapv , 0xffff, 0x4e76, { 4, 4, 4}},
+ {m68k_op_rtr_32 , 0xffff, 0x4e77, { 20, 20, 14}},
+ {m68k_op_movec_32_cr , 0xffff, 0x4e7a, { 0, 12, 6}},
+ {m68k_op_movec_32_rc , 0xffff, 0x4e7b, { 0, 10, 12}},
+ {m68k_op_jsr_32_aw , 0xffff, 0x4eb8, { 18, 18, 4}},
+ {m68k_op_jsr_32_al , 0xffff, 0x4eb9, { 20, 20, 4}},
+ {m68k_op_jsr_32_pcdi , 0xffff, 0x4eba, { 18, 18, 5}},
+ {m68k_op_jsr_32_pcix , 0xffff, 0x4ebb, { 22, 22, 7}},
+ {m68k_op_jmp_32_aw , 0xffff, 0x4ef8, { 10, 10, 4}},
+ {m68k_op_jmp_32_al , 0xffff, 0x4ef9, { 12, 12, 4}},
+ {m68k_op_jmp_32_pcdi , 0xffff, 0x4efa, { 10, 10, 5}},
+ {m68k_op_jmp_32_pcix , 0xffff, 0x4efb, { 14, 14, 7}},
+ {m68k_op_st_8_pi7 , 0xffff, 0x50df, { 12, 12, 10}},
+ {m68k_op_st_8_pd7 , 0xffff, 0x50e7, { 14, 14, 11}},
+ {m68k_op_st_8_aw , 0xffff, 0x50f8, { 16, 16, 10}},
+ {m68k_op_st_8_al , 0xffff, 0x50f9, { 20, 20, 10}},
+ {m68k_op_trapt_16 , 0xffff, 0x50fa, { 0, 0, 6}},
+ {m68k_op_trapt_32 , 0xffff, 0x50fb, { 0, 0, 8}},
+ {m68k_op_trapt , 0xffff, 0x50fc, { 0, 0, 4}},
+ {m68k_op_sf_8_pi7 , 0xffff, 0x51df, { 12, 12, 10}},
+ {m68k_op_sf_8_pd7 , 0xffff, 0x51e7, { 14, 14, 11}},
+ {m68k_op_sf_8_aw , 0xffff, 0x51f8, { 16, 16, 10}},
+ {m68k_op_sf_8_al , 0xffff, 0x51f9, { 20, 20, 10}},
+ {m68k_op_trapf_16 , 0xffff, 0x51fa, { 0, 0, 6}},
+ {m68k_op_trapf_32 , 0xffff, 0x51fb, { 0, 0, 8}},
+ {m68k_op_trapf , 0xffff, 0x51fc, { 0, 0, 4}},
+ {m68k_op_shi_8_pi7 , 0xffff, 0x52df, { 12, 12, 10}},
+ {m68k_op_shi_8_pd7 , 0xffff, 0x52e7, { 14, 14, 11}},
+ {m68k_op_shi_8_aw , 0xffff, 0x52f8, { 16, 16, 10}},
+ {m68k_op_shi_8_al , 0xffff, 0x52f9, { 20, 20, 10}},
+ {m68k_op_traphi_16 , 0xffff, 0x52fa, { 0, 0, 6}},
+ {m68k_op_traphi_32 , 0xffff, 0x52fb, { 0, 0, 8}},
+ {m68k_op_traphi , 0xffff, 0x52fc, { 0, 0, 4}},
+ {m68k_op_sls_8_pi7 , 0xffff, 0x53df, { 12, 12, 10}},
+ {m68k_op_sls_8_pd7 , 0xffff, 0x53e7, { 14, 14, 11}},
+ {m68k_op_sls_8_aw , 0xffff, 0x53f8, { 16, 16, 10}},
+ {m68k_op_sls_8_al , 0xffff, 0x53f9, { 20, 20, 10}},
+ {m68k_op_trapls_16 , 0xffff, 0x53fa, { 0, 0, 6}},
+ {m68k_op_trapls_32 , 0xffff, 0x53fb, { 0, 0, 8}},
+ {m68k_op_trapls , 0xffff, 0x53fc, { 0, 0, 4}},
+ {m68k_op_scc_8_pi7 , 0xffff, 0x54df, { 12, 12, 10}},
+ {m68k_op_scc_8_pd7 , 0xffff, 0x54e7, { 14, 14, 11}},
+ {m68k_op_scc_8_aw , 0xffff, 0x54f8, { 16, 16, 10}},
+ {m68k_op_scc_8_al , 0xffff, 0x54f9, { 20, 20, 10}},
+ {m68k_op_trapcc_16 , 0xffff, 0x54fa, { 0, 0, 6}},
+ {m68k_op_trapcc_32 , 0xffff, 0x54fb, { 0, 0, 8}},
+ {m68k_op_trapcc , 0xffff, 0x54fc, { 0, 0, 4}},
+ {m68k_op_scs_8_pi7 , 0xffff, 0x55df, { 12, 12, 10}},
+ {m68k_op_scs_8_pd7 , 0xffff, 0x55e7, { 14, 14, 11}},
+ {m68k_op_scs_8_aw , 0xffff, 0x55f8, { 16, 16, 10}},
+ {m68k_op_scs_8_al , 0xffff, 0x55f9, { 20, 20, 10}},
+ {m68k_op_trapcs_16 , 0xffff, 0x55fa, { 0, 0, 6}},
+ {m68k_op_trapcs_32 , 0xffff, 0x55fb, { 0, 0, 8}},
+ {m68k_op_trapcs , 0xffff, 0x55fc, { 0, 0, 4}},
+ {m68k_op_sne_8_pi7 , 0xffff, 0x56df, { 12, 12, 10}},
+ {m68k_op_sne_8_pd7 , 0xffff, 0x56e7, { 14, 14, 11}},
+ {m68k_op_sne_8_aw , 0xffff, 0x56f8, { 16, 16, 10}},
+ {m68k_op_sne_8_al , 0xffff, 0x56f9, { 20, 20, 10}},
+ {m68k_op_trapne_16 , 0xffff, 0x56fa, { 0, 0, 6}},
+ {m68k_op_trapne_32 , 0xffff, 0x56fb, { 0, 0, 8}},
+ {m68k_op_trapne , 0xffff, 0x56fc, { 0, 0, 4}},
+ {m68k_op_seq_8_pi7 , 0xffff, 0x57df, { 12, 12, 10}},
+ {m68k_op_seq_8_pd7 , 0xffff, 0x57e7, { 14, 14, 11}},
+ {m68k_op_seq_8_aw , 0xffff, 0x57f8, { 16, 16, 10}},
+ {m68k_op_seq_8_al , 0xffff, 0x57f9, { 20, 20, 10}},
+ {m68k_op_trapeq_16 , 0xffff, 0x57fa, { 0, 0, 6}},
+ {m68k_op_trapeq_32 , 0xffff, 0x57fb, { 0, 0, 8}},
+ {m68k_op_trapeq , 0xffff, 0x57fc, { 0, 0, 4}},
+ {m68k_op_svc_8_pi7 , 0xffff, 0x58df, { 12, 12, 10}},
+ {m68k_op_svc_8_pd7 , 0xffff, 0x58e7, { 14, 14, 11}},
+ {m68k_op_svc_8_aw , 0xffff, 0x58f8, { 16, 16, 10}},
+ {m68k_op_svc_8_al , 0xffff, 0x58f9, { 20, 20, 10}},
+ {m68k_op_trapvc_16 , 0xffff, 0x58fa, { 0, 0, 6}},
+ {m68k_op_trapvc_32 , 0xffff, 0x58fb, { 0, 0, 8}},
+ {m68k_op_trapvc , 0xffff, 0x58fc, { 0, 0, 4}},
+ {m68k_op_svs_8_pi7 , 0xffff, 0x59df, { 12, 12, 10}},
+ {m68k_op_svs_8_pd7 , 0xffff, 0x59e7, { 14, 14, 11}},
+ {m68k_op_svs_8_aw , 0xffff, 0x59f8, { 16, 16, 10}},
+ {m68k_op_svs_8_al , 0xffff, 0x59f9, { 20, 20, 10}},
+ {m68k_op_trapvs_16 , 0xffff, 0x59fa, { 0, 0, 6}},
+ {m68k_op_trapvs_32 , 0xffff, 0x59fb, { 0, 0, 8}},
+ {m68k_op_trapvs , 0xffff, 0x59fc, { 0, 0, 4}},
+ {m68k_op_spl_8_pi7 , 0xffff, 0x5adf, { 12, 12, 10}},
+ {m68k_op_spl_8_pd7 , 0xffff, 0x5ae7, { 14, 14, 11}},
+ {m68k_op_spl_8_aw , 0xffff, 0x5af8, { 16, 16, 10}},
+ {m68k_op_spl_8_al , 0xffff, 0x5af9, { 20, 20, 10}},
+ {m68k_op_trappl_16 , 0xffff, 0x5afa, { 0, 0, 6}},
+ {m68k_op_trappl_32 , 0xffff, 0x5afb, { 0, 0, 8}},
+ {m68k_op_trappl , 0xffff, 0x5afc, { 0, 0, 4}},
+ {m68k_op_smi_8_pi7 , 0xffff, 0x5bdf, { 12, 12, 10}},
+ {m68k_op_smi_8_pd7 , 0xffff, 0x5be7, { 14, 14, 11}},
+ {m68k_op_smi_8_aw , 0xffff, 0x5bf8, { 16, 16, 10}},
+ {m68k_op_smi_8_al , 0xffff, 0x5bf9, { 20, 20, 10}},
+ {m68k_op_trapmi_16 , 0xffff, 0x5bfa, { 0, 0, 6}},
+ {m68k_op_trapmi_32 , 0xffff, 0x5bfb, { 0, 0, 8}},
+ {m68k_op_trapmi , 0xffff, 0x5bfc, { 0, 0, 4}},
+ {m68k_op_sge_8_pi7 , 0xffff, 0x5cdf, { 12, 12, 10}},
+ {m68k_op_sge_8_pd7 , 0xffff, 0x5ce7, { 14, 14, 11}},
+ {m68k_op_sge_8_aw , 0xffff, 0x5cf8, { 16, 16, 10}},
+ {m68k_op_sge_8_al , 0xffff, 0x5cf9, { 20, 20, 10}},
+ {m68k_op_trapge_16 , 0xffff, 0x5cfa, { 0, 0, 6}},
+ {m68k_op_trapge_32 , 0xffff, 0x5cfb, { 0, 0, 8}},
+ {m68k_op_trapge , 0xffff, 0x5cfc, { 0, 0, 4}},
+ {m68k_op_slt_8_pi7 , 0xffff, 0x5ddf, { 12, 12, 10}},
+ {m68k_op_slt_8_pd7 , 0xffff, 0x5de7, { 14, 14, 11}},
+ {m68k_op_slt_8_aw , 0xffff, 0x5df8, { 16, 16, 10}},
+ {m68k_op_slt_8_al , 0xffff, 0x5df9, { 20, 20, 10}},
+ {m68k_op_traplt_16 , 0xffff, 0x5dfa, { 0, 0, 6}},
+ {m68k_op_traplt_32 , 0xffff, 0x5dfb, { 0, 0, 8}},
+ {m68k_op_traplt , 0xffff, 0x5dfc, { 0, 0, 4}},
+ {m68k_op_sgt_8_pi7 , 0xffff, 0x5edf, { 12, 12, 10}},
+ {m68k_op_sgt_8_pd7 , 0xffff, 0x5ee7, { 14, 14, 11}},
+ {m68k_op_sgt_8_aw , 0xffff, 0x5ef8, { 16, 16, 10}},
+ {m68k_op_sgt_8_al , 0xffff, 0x5ef9, { 20, 20, 10}},
+ {m68k_op_trapgt_16 , 0xffff, 0x5efa, { 0, 0, 6}},
+ {m68k_op_trapgt_32 , 0xffff, 0x5efb, { 0, 0, 8}},
+ {m68k_op_trapgt , 0xffff, 0x5efc, { 0, 0, 4}},
+ {m68k_op_sle_8_pi7 , 0xffff, 0x5fdf, { 12, 12, 10}},
+ {m68k_op_sle_8_pd7 , 0xffff, 0x5fe7, { 14, 14, 11}},
+ {m68k_op_sle_8_aw , 0xffff, 0x5ff8, { 16, 16, 10}},
+ {m68k_op_sle_8_al , 0xffff, 0x5ff9, { 20, 20, 10}},
+ {m68k_op_traple_16 , 0xffff, 0x5ffa, { 0, 0, 6}},
+ {m68k_op_traple_32 , 0xffff, 0x5ffb, { 0, 0, 8}},
+ {m68k_op_traple , 0xffff, 0x5ffc, { 0, 0, 4}},
+ {m68k_op_bra_16 , 0xffff, 0x6000, { 10, 10, 10}},
+ {m68k_op_bra_32 , 0xffff, 0x60ff, { 0, 0, 10}},
+ {m68k_op_bsr_16 , 0xffff, 0x6100, { 18, 18, 7}},
+ {m68k_op_bsr_32 , 0xffff, 0x61ff, { 0, 0, 7}},
+ {m68k_op_bhi_16 , 0xffff, 0x6200, { 10, 10, 6}},
+ {m68k_op_bhi_32 , 0xffff, 0x62ff, { 0, 0, 6}},
+ {m68k_op_bls_16 , 0xffff, 0x6300, { 10, 10, 6}},
+ {m68k_op_bls_32 , 0xffff, 0x63ff, { 0, 0, 6}},
+ {m68k_op_bcc_16 , 0xffff, 0x6400, { 10, 10, 6}},
+ {m68k_op_bcc_32 , 0xffff, 0x64ff, { 0, 0, 6}},
+ {m68k_op_bcs_16 , 0xffff, 0x6500, { 10, 10, 6}},
+ {m68k_op_bcs_32 , 0xffff, 0x65ff, { 0, 0, 6}},
+ {m68k_op_bne_16 , 0xffff, 0x6600, { 10, 10, 6}},
+ {m68k_op_bne_32 , 0xffff, 0x66ff, { 0, 0, 6}},
+ {m68k_op_beq_16 , 0xffff, 0x6700, { 10, 10, 6}},
+ {m68k_op_beq_32 , 0xffff, 0x67ff, { 0, 0, 6}},
+ {m68k_op_bvc_16 , 0xffff, 0x6800, { 10, 10, 6}},
+ {m68k_op_bvc_32 , 0xffff, 0x68ff, { 0, 0, 6}},
+ {m68k_op_bvs_16 , 0xffff, 0x6900, { 10, 10, 6}},
+ {m68k_op_bvs_32 , 0xffff, 0x69ff, { 0, 0, 6}},
+ {m68k_op_bpl_16 , 0xffff, 0x6a00, { 10, 10, 6}},
+ {m68k_op_bpl_32 , 0xffff, 0x6aff, { 0, 0, 6}},
+ {m68k_op_bmi_16 , 0xffff, 0x6b00, { 10, 10, 6}},
+ {m68k_op_bmi_32 , 0xffff, 0x6bff, { 0, 0, 6}},
+ {m68k_op_bge_16 , 0xffff, 0x6c00, { 10, 10, 6}},
+ {m68k_op_bge_32 , 0xffff, 0x6cff, { 0, 0, 6}},
+ {m68k_op_blt_16 , 0xffff, 0x6d00, { 10, 10, 6}},
+ {m68k_op_blt_32 , 0xffff, 0x6dff, { 0, 0, 6}},
+ {m68k_op_bgt_16 , 0xffff, 0x6e00, { 10, 10, 6}},
+ {m68k_op_bgt_32 , 0xffff, 0x6eff, { 0, 0, 6}},
+ {m68k_op_ble_16 , 0xffff, 0x6f00, { 10, 10, 6}},
+ {m68k_op_ble_32 , 0xffff, 0x6fff, { 0, 0, 6}},
+ {m68k_op_sbcd_8_mm_axy7 , 0xffff, 0x8f0f, { 18, 18, 16}},
+ {m68k_op_pack_16_mm_axy7 , 0xffff, 0x8f4f, { 0, 0, 13}},
+ {m68k_op_unpk_16_mm_axy7 , 0xffff, 0x8f8f, { 0, 0, 13}},
+ {m68k_op_subx_8_mm_axy7 , 0xffff, 0x9f0f, { 18, 18, 12}},
+ {m68k_op_cmpm_8_axy7 , 0xffff, 0xbf0f, { 12, 12, 9}},
+ {m68k_op_abcd_8_mm_axy7 , 0xffff, 0xcf0f, { 18, 18, 16}},
+ {m68k_op_addx_8_mm_axy7 , 0xffff, 0xdf0f, { 18, 18, 12}},
+ {m68k_op_asr_16_aw , 0xffff, 0xe0f8, { 16, 16, 9}},
+ {m68k_op_asr_16_al , 0xffff, 0xe0f9, { 20, 20, 9}},
+ {m68k_op_asl_16_aw , 0xffff, 0xe1f8, { 16, 16, 10}},
+ {m68k_op_asl_16_al , 0xffff, 0xe1f9, { 20, 20, 10}},
+ {m68k_op_lsr_16_aw , 0xffff, 0xe2f8, { 16, 16, 9}},
+ {m68k_op_lsr_16_al , 0xffff, 0xe2f9, { 20, 20, 9}},
+ {m68k_op_lsl_16_aw , 0xffff, 0xe3f8, { 16, 16, 9}},
+ {m68k_op_lsl_16_al , 0xffff, 0xe3f9, { 20, 20, 9}},
+ {m68k_op_roxr_16_aw , 0xffff, 0xe4f8, { 16, 16, 9}},
+ {m68k_op_roxr_16_al , 0xffff, 0xe4f9, { 20, 20, 9}},
+ {m68k_op_roxl_16_aw , 0xffff, 0xe5f8, { 16, 16, 9}},
+ {m68k_op_roxl_16_al , 0xffff, 0xe5f9, { 20, 20, 9}},
+ {m68k_op_ror_16_aw , 0xffff, 0xe6f8, { 16, 16, 11}},
+ {m68k_op_ror_16_al , 0xffff, 0xe6f9, { 20, 20, 11}},
+ {m68k_op_rol_16_aw , 0xffff, 0xe7f8, { 16, 16, 11}},
+ {m68k_op_rol_16_al , 0xffff, 0xe7f9, { 20, 20, 11}},
+ {m68k_op_bftst_32_aw , 0xffff, 0xe8f8, { 0, 0, 17}},
+ {m68k_op_bftst_32_al , 0xffff, 0xe8f9, { 0, 0, 17}},
+ {m68k_op_bftst_32_pcdi , 0xffff, 0xe8fa, { 0, 0, 18}},
+ {m68k_op_bftst_32_pcix , 0xffff, 0xe8fb, { 0, 0, 20}},
+ {m68k_op_bfextu_32_aw , 0xffff, 0xe9f8, { 0, 0, 19}},
+ {m68k_op_bfextu_32_al , 0xffff, 0xe9f9, { 0, 0, 19}},
+ {m68k_op_bfextu_32_pcdi , 0xffff, 0xe9fa, { 0, 0, 20}},
+ {m68k_op_bfextu_32_pcix , 0xffff, 0xe9fb, { 0, 0, 22}},
+ {m68k_op_bfchg_32_aw , 0xffff, 0xeaf8, { 0, 0, 24}},
+ {m68k_op_bfchg_32_al , 0xffff, 0xeaf9, { 0, 0, 24}},
+ {m68k_op_bfexts_32_aw , 0xffff, 0xebf8, { 0, 0, 19}},
+ {m68k_op_bfexts_32_al , 0xffff, 0xebf9, { 0, 0, 19}},
+ {m68k_op_bfexts_32_pcdi , 0xffff, 0xebfa, { 0, 0, 20}},
+ {m68k_op_bfexts_32_pcix , 0xffff, 0xebfb, { 0, 0, 22}},
+ {m68k_op_bfclr_32_aw , 0xffff, 0xecf8, { 0, 0, 24}},
+ {m68k_op_bfclr_32_al , 0xffff, 0xecf9, { 0, 0, 24}},
+ {m68k_op_bfffo_32_aw , 0xffff, 0xedf8, { 0, 0, 32}},
+ {m68k_op_bfffo_32_al , 0xffff, 0xedf9, { 0, 0, 32}},
+ {m68k_op_bfffo_32_pcdi , 0xffff, 0xedfa, { 0, 0, 33}},
+ {m68k_op_bfffo_32_pcix , 0xffff, 0xedfb, { 0, 0, 35}},
+ {m68k_op_bfset_32_aw , 0xffff, 0xeef8, { 0, 0, 24}},
+ {m68k_op_bfset_32_al , 0xffff, 0xeef9, { 0, 0, 24}},
+ {m68k_op_bfins_32_aw , 0xffff, 0xeff8, { 0, 0, 21}},
+ {m68k_op_bfins_32_al , 0xffff, 0xeff9, { 0, 0, 21}},
+ {0, 0, 0, {0, 0, 0}}
+};
+
+
+/* Build the opcode handler jump table */
+void m68ki_build_opcode_table(void)
+{
+ opcode_handler_struct *ostruct;
+ int instr;
+ int i;
+ int j;
+ int k;
+
+ for(i = 0; i < 0x10000; i++)
+ {
+ /* default to illegal */
+ m68ki_instruction_jump_table[i] = m68k_op_illegal;
+ for(k=0;kmask != 0xff00)
+ {
+ for(i = 0;i < 0x10000;i++)
+ {
+ if((i & ostruct->mask) == ostruct->match)
+ {
+ m68ki_instruction_jump_table[i] = ostruct->opcode_handler;
+ for(k=0;kcycles[k];
+ }
+ }
+ ostruct++;
+ }
+ while(ostruct->mask == 0xff00)
+ {
+ for(i = 0;i <= 0xff;i++)
+ {
+ m68ki_instruction_jump_table[ostruct->match | i] = ostruct->opcode_handler;
+ for(k=0;kmatch | i] = ostruct->cycles[k];
+ }
+ ostruct++;
+ }
+ while(ostruct->mask == 0xf1f8)
+ {
+ for(i = 0;i < 8;i++)
+ {
+ for(j = 0;j < 8;j++)
+ {
+ instr = ostruct->match | (i << 9) | j;
+ m68ki_instruction_jump_table[instr] = ostruct->opcode_handler;
+ for(k=0;kcycles[k];
+ if((instr & 0xf000) == 0xe000 && (!(instr & 0x20)))
+ m68ki_cycles[0][instr] = m68ki_cycles[1][instr] = ostruct->cycles[k] + ((((j-1)&7)+1)<<1);
+ }
+ }
+ ostruct++;
+ }
+ while(ostruct->mask == 0xfff0)
+ {
+ for(i = 0;i <= 0x0f;i++)
+ {
+ m68ki_instruction_jump_table[ostruct->match | i] = ostruct->opcode_handler;
+ for(k=0;kmatch | i] = ostruct->cycles[k];
+ }
+ ostruct++;
+ }
+ while(ostruct->mask == 0xf1ff)
+ {
+ for(i = 0;i <= 0x07;i++)
+ {
+ m68ki_instruction_jump_table[ostruct->match | (i << 9)] = ostruct->opcode_handler;
+ for(k=0;kmatch | (i << 9)] = ostruct->cycles[k];
+ }
+ ostruct++;
+ }
+ while(ostruct->mask == 0xfff8)
+ {
+ for(i = 0;i <= 0x07;i++)
+ {
+ m68ki_instruction_jump_table[ostruct->match | i] = ostruct->opcode_handler;
+ for(k=0;kmatch | i] = ostruct->cycles[k];
+ }
+ ostruct++;
+ }
+ while(ostruct->mask == 0xffff)
+ {
+ m68ki_instruction_jump_table[ostruct->match] = ostruct->opcode_handler;
+ for(k=0;kmatch] = ostruct->cycles[k];
+ ostruct++;
+ }
+}
+
+
+/* ======================================================================== */
+/* ============================== END OF FILE ============================= */
+/* ======================================================================== */
+
+
diff --git a/Src/CPU/68K/Musashi/generated/m68kops.h b/Src/CPU/68K/Musashi/generated/m68kops.h
new file mode 100644
index 0000000..1bf9ab6
--- /dev/null
+++ b/Src/CPU/68K/Musashi/generated/m68kops.h
@@ -0,0 +1,1984 @@
+#ifndef M68KOPS__HEADER
+#define M68KOPS__HEADER
+
+/* ======================================================================== */
+/* ============================ OPCODE HANDLERS =========================== */
+/* ======================================================================== */
+
+
+void m68k_op_1010(void);
+void m68k_op_1111(void);
+void m68k_op_abcd_8_rr(void);
+void m68k_op_abcd_8_mm_ax7(void);
+void m68k_op_abcd_8_mm_ay7(void);
+void m68k_op_abcd_8_mm_axy7(void);
+void m68k_op_abcd_8_mm(void);
+void m68k_op_add_8_er_d(void);
+void m68k_op_add_8_er_ai(void);
+void m68k_op_add_8_er_pi(void);
+void m68k_op_add_8_er_pi7(void);
+void m68k_op_add_8_er_pd(void);
+void m68k_op_add_8_er_pd7(void);
+void m68k_op_add_8_er_di(void);
+void m68k_op_add_8_er_ix(void);
+void m68k_op_add_8_er_aw(void);
+void m68k_op_add_8_er_al(void);
+void m68k_op_add_8_er_pcdi(void);
+void m68k_op_add_8_er_pcix(void);
+void m68k_op_add_8_er_i(void);
+void m68k_op_add_16_er_d(void);
+void m68k_op_add_16_er_a(void);
+void m68k_op_add_16_er_ai(void);
+void m68k_op_add_16_er_pi(void);
+void m68k_op_add_16_er_pd(void);
+void m68k_op_add_16_er_di(void);
+void m68k_op_add_16_er_ix(void);
+void m68k_op_add_16_er_aw(void);
+void m68k_op_add_16_er_al(void);
+void m68k_op_add_16_er_pcdi(void);
+void m68k_op_add_16_er_pcix(void);
+void m68k_op_add_16_er_i(void);
+void m68k_op_add_32_er_d(void);
+void m68k_op_add_32_er_a(void);
+void m68k_op_add_32_er_ai(void);
+void m68k_op_add_32_er_pi(void);
+void m68k_op_add_32_er_pd(void);
+void m68k_op_add_32_er_di(void);
+void m68k_op_add_32_er_ix(void);
+void m68k_op_add_32_er_aw(void);
+void m68k_op_add_32_er_al(void);
+void m68k_op_add_32_er_pcdi(void);
+void m68k_op_add_32_er_pcix(void);
+void m68k_op_add_32_er_i(void);
+void m68k_op_add_8_re_ai(void);
+void m68k_op_add_8_re_pi(void);
+void m68k_op_add_8_re_pi7(void);
+void m68k_op_add_8_re_pd(void);
+void m68k_op_add_8_re_pd7(void);
+void m68k_op_add_8_re_di(void);
+void m68k_op_add_8_re_ix(void);
+void m68k_op_add_8_re_aw(void);
+void m68k_op_add_8_re_al(void);
+void m68k_op_add_16_re_ai(void);
+void m68k_op_add_16_re_pi(void);
+void m68k_op_add_16_re_pd(void);
+void m68k_op_add_16_re_di(void);
+void m68k_op_add_16_re_ix(void);
+void m68k_op_add_16_re_aw(void);
+void m68k_op_add_16_re_al(void);
+void m68k_op_add_32_re_ai(void);
+void m68k_op_add_32_re_pi(void);
+void m68k_op_add_32_re_pd(void);
+void m68k_op_add_32_re_di(void);
+void m68k_op_add_32_re_ix(void);
+void m68k_op_add_32_re_aw(void);
+void m68k_op_add_32_re_al(void);
+void m68k_op_adda_16_d(void);
+void m68k_op_adda_16_a(void);
+void m68k_op_adda_16_ai(void);
+void m68k_op_adda_16_pi(void);
+void m68k_op_adda_16_pd(void);
+void m68k_op_adda_16_di(void);
+void m68k_op_adda_16_ix(void);
+void m68k_op_adda_16_aw(void);
+void m68k_op_adda_16_al(void);
+void m68k_op_adda_16_pcdi(void);
+void m68k_op_adda_16_pcix(void);
+void m68k_op_adda_16_i(void);
+void m68k_op_adda_32_d(void);
+void m68k_op_adda_32_a(void);
+void m68k_op_adda_32_ai(void);
+void m68k_op_adda_32_pi(void);
+void m68k_op_adda_32_pd(void);
+void m68k_op_adda_32_di(void);
+void m68k_op_adda_32_ix(void);
+void m68k_op_adda_32_aw(void);
+void m68k_op_adda_32_al(void);
+void m68k_op_adda_32_pcdi(void);
+void m68k_op_adda_32_pcix(void);
+void m68k_op_adda_32_i(void);
+void m68k_op_addi_8_d(void);
+void m68k_op_addi_8_ai(void);
+void m68k_op_addi_8_pi(void);
+void m68k_op_addi_8_pi7(void);
+void m68k_op_addi_8_pd(void);
+void m68k_op_addi_8_pd7(void);
+void m68k_op_addi_8_di(void);
+void m68k_op_addi_8_ix(void);
+void m68k_op_addi_8_aw(void);
+void m68k_op_addi_8_al(void);
+void m68k_op_addi_16_d(void);
+void m68k_op_addi_16_ai(void);
+void m68k_op_addi_16_pi(void);
+void m68k_op_addi_16_pd(void);
+void m68k_op_addi_16_di(void);
+void m68k_op_addi_16_ix(void);
+void m68k_op_addi_16_aw(void);
+void m68k_op_addi_16_al(void);
+void m68k_op_addi_32_d(void);
+void m68k_op_addi_32_ai(void);
+void m68k_op_addi_32_pi(void);
+void m68k_op_addi_32_pd(void);
+void m68k_op_addi_32_di(void);
+void m68k_op_addi_32_ix(void);
+void m68k_op_addi_32_aw(void);
+void m68k_op_addi_32_al(void);
+void m68k_op_addq_8_d(void);
+void m68k_op_addq_8_ai(void);
+void m68k_op_addq_8_pi(void);
+void m68k_op_addq_8_pi7(void);
+void m68k_op_addq_8_pd(void);
+void m68k_op_addq_8_pd7(void);
+void m68k_op_addq_8_di(void);
+void m68k_op_addq_8_ix(void);
+void m68k_op_addq_8_aw(void);
+void m68k_op_addq_8_al(void);
+void m68k_op_addq_16_d(void);
+void m68k_op_addq_16_a(void);
+void m68k_op_addq_16_ai(void);
+void m68k_op_addq_16_pi(void);
+void m68k_op_addq_16_pd(void);
+void m68k_op_addq_16_di(void);
+void m68k_op_addq_16_ix(void);
+void m68k_op_addq_16_aw(void);
+void m68k_op_addq_16_al(void);
+void m68k_op_addq_32_d(void);
+void m68k_op_addq_32_a(void);
+void m68k_op_addq_32_ai(void);
+void m68k_op_addq_32_pi(void);
+void m68k_op_addq_32_pd(void);
+void m68k_op_addq_32_di(void);
+void m68k_op_addq_32_ix(void);
+void m68k_op_addq_32_aw(void);
+void m68k_op_addq_32_al(void);
+void m68k_op_addx_8_rr(void);
+void m68k_op_addx_16_rr(void);
+void m68k_op_addx_32_rr(void);
+void m68k_op_addx_8_mm_ax7(void);
+void m68k_op_addx_8_mm_ay7(void);
+void m68k_op_addx_8_mm_axy7(void);
+void m68k_op_addx_8_mm(void);
+void m68k_op_addx_16_mm(void);
+void m68k_op_addx_32_mm(void);
+void m68k_op_and_8_er_d(void);
+void m68k_op_and_8_er_ai(void);
+void m68k_op_and_8_er_pi(void);
+void m68k_op_and_8_er_pi7(void);
+void m68k_op_and_8_er_pd(void);
+void m68k_op_and_8_er_pd7(void);
+void m68k_op_and_8_er_di(void);
+void m68k_op_and_8_er_ix(void);
+void m68k_op_and_8_er_aw(void);
+void m68k_op_and_8_er_al(void);
+void m68k_op_and_8_er_pcdi(void);
+void m68k_op_and_8_er_pcix(void);
+void m68k_op_and_8_er_i(void);
+void m68k_op_and_16_er_d(void);
+void m68k_op_and_16_er_ai(void);
+void m68k_op_and_16_er_pi(void);
+void m68k_op_and_16_er_pd(void);
+void m68k_op_and_16_er_di(void);
+void m68k_op_and_16_er_ix(void);
+void m68k_op_and_16_er_aw(void);
+void m68k_op_and_16_er_al(void);
+void m68k_op_and_16_er_pcdi(void);
+void m68k_op_and_16_er_pcix(void);
+void m68k_op_and_16_er_i(void);
+void m68k_op_and_32_er_d(void);
+void m68k_op_and_32_er_ai(void);
+void m68k_op_and_32_er_pi(void);
+void m68k_op_and_32_er_pd(void);
+void m68k_op_and_32_er_di(void);
+void m68k_op_and_32_er_ix(void);
+void m68k_op_and_32_er_aw(void);
+void m68k_op_and_32_er_al(void);
+void m68k_op_and_32_er_pcdi(void);
+void m68k_op_and_32_er_pcix(void);
+void m68k_op_and_32_er_i(void);
+void m68k_op_and_8_re_ai(void);
+void m68k_op_and_8_re_pi(void);
+void m68k_op_and_8_re_pi7(void);
+void m68k_op_and_8_re_pd(void);
+void m68k_op_and_8_re_pd7(void);
+void m68k_op_and_8_re_di(void);
+void m68k_op_and_8_re_ix(void);
+void m68k_op_and_8_re_aw(void);
+void m68k_op_and_8_re_al(void);
+void m68k_op_and_16_re_ai(void);
+void m68k_op_and_16_re_pi(void);
+void m68k_op_and_16_re_pd(void);
+void m68k_op_and_16_re_di(void);
+void m68k_op_and_16_re_ix(void);
+void m68k_op_and_16_re_aw(void);
+void m68k_op_and_16_re_al(void);
+void m68k_op_and_32_re_ai(void);
+void m68k_op_and_32_re_pi(void);
+void m68k_op_and_32_re_pd(void);
+void m68k_op_and_32_re_di(void);
+void m68k_op_and_32_re_ix(void);
+void m68k_op_and_32_re_aw(void);
+void m68k_op_and_32_re_al(void);
+void m68k_op_andi_8_d(void);
+void m68k_op_andi_8_ai(void);
+void m68k_op_andi_8_pi(void);
+void m68k_op_andi_8_pi7(void);
+void m68k_op_andi_8_pd(void);
+void m68k_op_andi_8_pd7(void);
+void m68k_op_andi_8_di(void);
+void m68k_op_andi_8_ix(void);
+void m68k_op_andi_8_aw(void);
+void m68k_op_andi_8_al(void);
+void m68k_op_andi_16_d(void);
+void m68k_op_andi_16_ai(void);
+void m68k_op_andi_16_pi(void);
+void m68k_op_andi_16_pd(void);
+void m68k_op_andi_16_di(void);
+void m68k_op_andi_16_ix(void);
+void m68k_op_andi_16_aw(void);
+void m68k_op_andi_16_al(void);
+void m68k_op_andi_32_d(void);
+void m68k_op_andi_32_ai(void);
+void m68k_op_andi_32_pi(void);
+void m68k_op_andi_32_pd(void);
+void m68k_op_andi_32_di(void);
+void m68k_op_andi_32_ix(void);
+void m68k_op_andi_32_aw(void);
+void m68k_op_andi_32_al(void);
+void m68k_op_andi_16_toc(void);
+void m68k_op_andi_16_tos(void);
+void m68k_op_asr_8_s(void);
+void m68k_op_asr_16_s(void);
+void m68k_op_asr_32_s(void);
+void m68k_op_asr_8_r(void);
+void m68k_op_asr_16_r(void);
+void m68k_op_asr_32_r(void);
+void m68k_op_asr_16_ai(void);
+void m68k_op_asr_16_pi(void);
+void m68k_op_asr_16_pd(void);
+void m68k_op_asr_16_di(void);
+void m68k_op_asr_16_ix(void);
+void m68k_op_asr_16_aw(void);
+void m68k_op_asr_16_al(void);
+void m68k_op_asl_8_s(void);
+void m68k_op_asl_16_s(void);
+void m68k_op_asl_32_s(void);
+void m68k_op_asl_8_r(void);
+void m68k_op_asl_16_r(void);
+void m68k_op_asl_32_r(void);
+void m68k_op_asl_16_ai(void);
+void m68k_op_asl_16_pi(void);
+void m68k_op_asl_16_pd(void);
+void m68k_op_asl_16_di(void);
+void m68k_op_asl_16_ix(void);
+void m68k_op_asl_16_aw(void);
+void m68k_op_asl_16_al(void);
+void m68k_op_bhi_8(void);
+void m68k_op_bls_8(void);
+void m68k_op_bcc_8(void);
+void m68k_op_bcs_8(void);
+void m68k_op_bne_8(void);
+void m68k_op_beq_8(void);
+void m68k_op_bvc_8(void);
+void m68k_op_bvs_8(void);
+void m68k_op_bpl_8(void);
+void m68k_op_bmi_8(void);
+void m68k_op_bge_8(void);
+void m68k_op_blt_8(void);
+void m68k_op_bgt_8(void);
+void m68k_op_ble_8(void);
+void m68k_op_bhi_16(void);
+void m68k_op_bls_16(void);
+void m68k_op_bcc_16(void);
+void m68k_op_bcs_16(void);
+void m68k_op_bne_16(void);
+void m68k_op_beq_16(void);
+void m68k_op_bvc_16(void);
+void m68k_op_bvs_16(void);
+void m68k_op_bpl_16(void);
+void m68k_op_bmi_16(void);
+void m68k_op_bge_16(void);
+void m68k_op_blt_16(void);
+void m68k_op_bgt_16(void);
+void m68k_op_ble_16(void);
+void m68k_op_bhi_32(void);
+void m68k_op_bls_32(void);
+void m68k_op_bcc_32(void);
+void m68k_op_bcs_32(void);
+void m68k_op_bne_32(void);
+void m68k_op_beq_32(void);
+void m68k_op_bvc_32(void);
+void m68k_op_bvs_32(void);
+void m68k_op_bpl_32(void);
+void m68k_op_bmi_32(void);
+void m68k_op_bge_32(void);
+void m68k_op_blt_32(void);
+void m68k_op_bgt_32(void);
+void m68k_op_ble_32(void);
+void m68k_op_bchg_32_r_d(void);
+void m68k_op_bchg_8_r_ai(void);
+void m68k_op_bchg_8_r_pi(void);
+void m68k_op_bchg_8_r_pi7(void);
+void m68k_op_bchg_8_r_pd(void);
+void m68k_op_bchg_8_r_pd7(void);
+void m68k_op_bchg_8_r_di(void);
+void m68k_op_bchg_8_r_ix(void);
+void m68k_op_bchg_8_r_aw(void);
+void m68k_op_bchg_8_r_al(void);
+void m68k_op_bchg_32_s_d(void);
+void m68k_op_bchg_8_s_ai(void);
+void m68k_op_bchg_8_s_pi(void);
+void m68k_op_bchg_8_s_pi7(void);
+void m68k_op_bchg_8_s_pd(void);
+void m68k_op_bchg_8_s_pd7(void);
+void m68k_op_bchg_8_s_di(void);
+void m68k_op_bchg_8_s_ix(void);
+void m68k_op_bchg_8_s_aw(void);
+void m68k_op_bchg_8_s_al(void);
+void m68k_op_bclr_32_r_d(void);
+void m68k_op_bclr_8_r_ai(void);
+void m68k_op_bclr_8_r_pi(void);
+void m68k_op_bclr_8_r_pi7(void);
+void m68k_op_bclr_8_r_pd(void);
+void m68k_op_bclr_8_r_pd7(void);
+void m68k_op_bclr_8_r_di(void);
+void m68k_op_bclr_8_r_ix(void);
+void m68k_op_bclr_8_r_aw(void);
+void m68k_op_bclr_8_r_al(void);
+void m68k_op_bclr_32_s_d(void);
+void m68k_op_bclr_8_s_ai(void);
+void m68k_op_bclr_8_s_pi(void);
+void m68k_op_bclr_8_s_pi7(void);
+void m68k_op_bclr_8_s_pd(void);
+void m68k_op_bclr_8_s_pd7(void);
+void m68k_op_bclr_8_s_di(void);
+void m68k_op_bclr_8_s_ix(void);
+void m68k_op_bclr_8_s_aw(void);
+void m68k_op_bclr_8_s_al(void);
+void m68k_op_bfchg_32_d(void);
+void m68k_op_bfchg_32_ai(void);
+void m68k_op_bfchg_32_di(void);
+void m68k_op_bfchg_32_ix(void);
+void m68k_op_bfchg_32_aw(void);
+void m68k_op_bfchg_32_al(void);
+void m68k_op_bfclr_32_d(void);
+void m68k_op_bfclr_32_ai(void);
+void m68k_op_bfclr_32_di(void);
+void m68k_op_bfclr_32_ix(void);
+void m68k_op_bfclr_32_aw(void);
+void m68k_op_bfclr_32_al(void);
+void m68k_op_bfexts_32_d(void);
+void m68k_op_bfexts_32_ai(void);
+void m68k_op_bfexts_32_di(void);
+void m68k_op_bfexts_32_ix(void);
+void m68k_op_bfexts_32_aw(void);
+void m68k_op_bfexts_32_al(void);
+void m68k_op_bfexts_32_pcdi(void);
+void m68k_op_bfexts_32_pcix(void);
+void m68k_op_bfextu_32_d(void);
+void m68k_op_bfextu_32_ai(void);
+void m68k_op_bfextu_32_di(void);
+void m68k_op_bfextu_32_ix(void);
+void m68k_op_bfextu_32_aw(void);
+void m68k_op_bfextu_32_al(void);
+void m68k_op_bfextu_32_pcdi(void);
+void m68k_op_bfextu_32_pcix(void);
+void m68k_op_bfffo_32_d(void);
+void m68k_op_bfffo_32_ai(void);
+void m68k_op_bfffo_32_di(void);
+void m68k_op_bfffo_32_ix(void);
+void m68k_op_bfffo_32_aw(void);
+void m68k_op_bfffo_32_al(void);
+void m68k_op_bfffo_32_pcdi(void);
+void m68k_op_bfffo_32_pcix(void);
+void m68k_op_bfins_32_d(void);
+void m68k_op_bfins_32_ai(void);
+void m68k_op_bfins_32_di(void);
+void m68k_op_bfins_32_ix(void);
+void m68k_op_bfins_32_aw(void);
+void m68k_op_bfins_32_al(void);
+void m68k_op_bfset_32_d(void);
+void m68k_op_bfset_32_ai(void);
+void m68k_op_bfset_32_di(void);
+void m68k_op_bfset_32_ix(void);
+void m68k_op_bfset_32_aw(void);
+void m68k_op_bfset_32_al(void);
+void m68k_op_bftst_32_d(void);
+void m68k_op_bftst_32_ai(void);
+void m68k_op_bftst_32_di(void);
+void m68k_op_bftst_32_ix(void);
+void m68k_op_bftst_32_aw(void);
+void m68k_op_bftst_32_al(void);
+void m68k_op_bftst_32_pcdi(void);
+void m68k_op_bftst_32_pcix(void);
+void m68k_op_bkpt(void);
+void m68k_op_bra_8(void);
+void m68k_op_bra_16(void);
+void m68k_op_bra_32(void);
+void m68k_op_bset_32_r_d(void);
+void m68k_op_bset_8_r_ai(void);
+void m68k_op_bset_8_r_pi(void);
+void m68k_op_bset_8_r_pi7(void);
+void m68k_op_bset_8_r_pd(void);
+void m68k_op_bset_8_r_pd7(void);
+void m68k_op_bset_8_r_di(void);
+void m68k_op_bset_8_r_ix(void);
+void m68k_op_bset_8_r_aw(void);
+void m68k_op_bset_8_r_al(void);
+void m68k_op_bset_32_s_d(void);
+void m68k_op_bset_8_s_ai(void);
+void m68k_op_bset_8_s_pi(void);
+void m68k_op_bset_8_s_pi7(void);
+void m68k_op_bset_8_s_pd(void);
+void m68k_op_bset_8_s_pd7(void);
+void m68k_op_bset_8_s_di(void);
+void m68k_op_bset_8_s_ix(void);
+void m68k_op_bset_8_s_aw(void);
+void m68k_op_bset_8_s_al(void);
+void m68k_op_bsr_8(void);
+void m68k_op_bsr_16(void);
+void m68k_op_bsr_32(void);
+void m68k_op_btst_32_r_d(void);
+void m68k_op_btst_8_r_ai(void);
+void m68k_op_btst_8_r_pi(void);
+void m68k_op_btst_8_r_pi7(void);
+void m68k_op_btst_8_r_pd(void);
+void m68k_op_btst_8_r_pd7(void);
+void m68k_op_btst_8_r_di(void);
+void m68k_op_btst_8_r_ix(void);
+void m68k_op_btst_8_r_aw(void);
+void m68k_op_btst_8_r_al(void);
+void m68k_op_btst_8_r_pcdi(void);
+void m68k_op_btst_8_r_pcix(void);
+void m68k_op_btst_8_r_i(void);
+void m68k_op_btst_32_s_d(void);
+void m68k_op_btst_8_s_ai(void);
+void m68k_op_btst_8_s_pi(void);
+void m68k_op_btst_8_s_pi7(void);
+void m68k_op_btst_8_s_pd(void);
+void m68k_op_btst_8_s_pd7(void);
+void m68k_op_btst_8_s_di(void);
+void m68k_op_btst_8_s_ix(void);
+void m68k_op_btst_8_s_aw(void);
+void m68k_op_btst_8_s_al(void);
+void m68k_op_btst_8_s_pcdi(void);
+void m68k_op_btst_8_s_pcix(void);
+void m68k_op_callm_32_ai(void);
+void m68k_op_callm_32_di(void);
+void m68k_op_callm_32_ix(void);
+void m68k_op_callm_32_aw(void);
+void m68k_op_callm_32_al(void);
+void m68k_op_callm_32_pcdi(void);
+void m68k_op_callm_32_pcix(void);
+void m68k_op_cas_8_ai(void);
+void m68k_op_cas_8_pi(void);
+void m68k_op_cas_8_pi7(void);
+void m68k_op_cas_8_pd(void);
+void m68k_op_cas_8_pd7(void);
+void m68k_op_cas_8_di(void);
+void m68k_op_cas_8_ix(void);
+void m68k_op_cas_8_aw(void);
+void m68k_op_cas_8_al(void);
+void m68k_op_cas_16_ai(void);
+void m68k_op_cas_16_pi(void);
+void m68k_op_cas_16_pd(void);
+void m68k_op_cas_16_di(void);
+void m68k_op_cas_16_ix(void);
+void m68k_op_cas_16_aw(void);
+void m68k_op_cas_16_al(void);
+void m68k_op_cas_32_ai(void);
+void m68k_op_cas_32_pi(void);
+void m68k_op_cas_32_pd(void);
+void m68k_op_cas_32_di(void);
+void m68k_op_cas_32_ix(void);
+void m68k_op_cas_32_aw(void);
+void m68k_op_cas_32_al(void);
+void m68k_op_cas2_16(void);
+void m68k_op_cas2_32(void);
+void m68k_op_chk_16_d(void);
+void m68k_op_chk_16_ai(void);
+void m68k_op_chk_16_pi(void);
+void m68k_op_chk_16_pd(void);
+void m68k_op_chk_16_di(void);
+void m68k_op_chk_16_ix(void);
+void m68k_op_chk_16_aw(void);
+void m68k_op_chk_16_al(void);
+void m68k_op_chk_16_pcdi(void);
+void m68k_op_chk_16_pcix(void);
+void m68k_op_chk_16_i(void);
+void m68k_op_chk_32_d(void);
+void m68k_op_chk_32_ai(void);
+void m68k_op_chk_32_pi(void);
+void m68k_op_chk_32_pd(void);
+void m68k_op_chk_32_di(void);
+void m68k_op_chk_32_ix(void);
+void m68k_op_chk_32_aw(void);
+void m68k_op_chk_32_al(void);
+void m68k_op_chk_32_pcdi(void);
+void m68k_op_chk_32_pcix(void);
+void m68k_op_chk_32_i(void);
+void m68k_op_chk2cmp2_8_pcdi(void);
+void m68k_op_chk2cmp2_8_pcix(void);
+void m68k_op_chk2cmp2_8_ai(void);
+void m68k_op_chk2cmp2_8_di(void);
+void m68k_op_chk2cmp2_8_ix(void);
+void m68k_op_chk2cmp2_8_aw(void);
+void m68k_op_chk2cmp2_8_al(void);
+void m68k_op_chk2cmp2_16_pcdi(void);
+void m68k_op_chk2cmp2_16_pcix(void);
+void m68k_op_chk2cmp2_16_ai(void);
+void m68k_op_chk2cmp2_16_di(void);
+void m68k_op_chk2cmp2_16_ix(void);
+void m68k_op_chk2cmp2_16_aw(void);
+void m68k_op_chk2cmp2_16_al(void);
+void m68k_op_chk2cmp2_32_pcdi(void);
+void m68k_op_chk2cmp2_32_pcix(void);
+void m68k_op_chk2cmp2_32_ai(void);
+void m68k_op_chk2cmp2_32_di(void);
+void m68k_op_chk2cmp2_32_ix(void);
+void m68k_op_chk2cmp2_32_aw(void);
+void m68k_op_chk2cmp2_32_al(void);
+void m68k_op_clr_8_d(void);
+void m68k_op_clr_8_ai(void);
+void m68k_op_clr_8_pi(void);
+void m68k_op_clr_8_pi7(void);
+void m68k_op_clr_8_pd(void);
+void m68k_op_clr_8_pd7(void);
+void m68k_op_clr_8_di(void);
+void m68k_op_clr_8_ix(void);
+void m68k_op_clr_8_aw(void);
+void m68k_op_clr_8_al(void);
+void m68k_op_clr_16_d(void);
+void m68k_op_clr_16_ai(void);
+void m68k_op_clr_16_pi(void);
+void m68k_op_clr_16_pd(void);
+void m68k_op_clr_16_di(void);
+void m68k_op_clr_16_ix(void);
+void m68k_op_clr_16_aw(void);
+void m68k_op_clr_16_al(void);
+void m68k_op_clr_32_d(void);
+void m68k_op_clr_32_ai(void);
+void m68k_op_clr_32_pi(void);
+void m68k_op_clr_32_pd(void);
+void m68k_op_clr_32_di(void);
+void m68k_op_clr_32_ix(void);
+void m68k_op_clr_32_aw(void);
+void m68k_op_clr_32_al(void);
+void m68k_op_cmp_8_d(void);
+void m68k_op_cmp_8_ai(void);
+void m68k_op_cmp_8_pi(void);
+void m68k_op_cmp_8_pi7(void);
+void m68k_op_cmp_8_pd(void);
+void m68k_op_cmp_8_pd7(void);
+void m68k_op_cmp_8_di(void);
+void m68k_op_cmp_8_ix(void);
+void m68k_op_cmp_8_aw(void);
+void m68k_op_cmp_8_al(void);
+void m68k_op_cmp_8_pcdi(void);
+void m68k_op_cmp_8_pcix(void);
+void m68k_op_cmp_8_i(void);
+void m68k_op_cmp_16_d(void);
+void m68k_op_cmp_16_a(void);
+void m68k_op_cmp_16_ai(void);
+void m68k_op_cmp_16_pi(void);
+void m68k_op_cmp_16_pd(void);
+void m68k_op_cmp_16_di(void);
+void m68k_op_cmp_16_ix(void);
+void m68k_op_cmp_16_aw(void);
+void m68k_op_cmp_16_al(void);
+void m68k_op_cmp_16_pcdi(void);
+void m68k_op_cmp_16_pcix(void);
+void m68k_op_cmp_16_i(void);
+void m68k_op_cmp_32_d(void);
+void m68k_op_cmp_32_a(void);
+void m68k_op_cmp_32_ai(void);
+void m68k_op_cmp_32_pi(void);
+void m68k_op_cmp_32_pd(void);
+void m68k_op_cmp_32_di(void);
+void m68k_op_cmp_32_ix(void);
+void m68k_op_cmp_32_aw(void);
+void m68k_op_cmp_32_al(void);
+void m68k_op_cmp_32_pcdi(void);
+void m68k_op_cmp_32_pcix(void);
+void m68k_op_cmp_32_i(void);
+void m68k_op_cmpa_16_d(void);
+void m68k_op_cmpa_16_a(void);
+void m68k_op_cmpa_16_ai(void);
+void m68k_op_cmpa_16_pi(void);
+void m68k_op_cmpa_16_pd(void);
+void m68k_op_cmpa_16_di(void);
+void m68k_op_cmpa_16_ix(void);
+void m68k_op_cmpa_16_aw(void);
+void m68k_op_cmpa_16_al(void);
+void m68k_op_cmpa_16_pcdi(void);
+void m68k_op_cmpa_16_pcix(void);
+void m68k_op_cmpa_16_i(void);
+void m68k_op_cmpa_32_d(void);
+void m68k_op_cmpa_32_a(void);
+void m68k_op_cmpa_32_ai(void);
+void m68k_op_cmpa_32_pi(void);
+void m68k_op_cmpa_32_pd(void);
+void m68k_op_cmpa_32_di(void);
+void m68k_op_cmpa_32_ix(void);
+void m68k_op_cmpa_32_aw(void);
+void m68k_op_cmpa_32_al(void);
+void m68k_op_cmpa_32_pcdi(void);
+void m68k_op_cmpa_32_pcix(void);
+void m68k_op_cmpa_32_i(void);
+void m68k_op_cmpi_8_d(void);
+void m68k_op_cmpi_8_ai(void);
+void m68k_op_cmpi_8_pi(void);
+void m68k_op_cmpi_8_pi7(void);
+void m68k_op_cmpi_8_pd(void);
+void m68k_op_cmpi_8_pd7(void);
+void m68k_op_cmpi_8_di(void);
+void m68k_op_cmpi_8_ix(void);
+void m68k_op_cmpi_8_aw(void);
+void m68k_op_cmpi_8_al(void);
+void m68k_op_cmpi_8_pcdi(void);
+void m68k_op_cmpi_8_pcix(void);
+void m68k_op_cmpi_16_d(void);
+void m68k_op_cmpi_16_ai(void);
+void m68k_op_cmpi_16_pi(void);
+void m68k_op_cmpi_16_pd(void);
+void m68k_op_cmpi_16_di(void);
+void m68k_op_cmpi_16_ix(void);
+void m68k_op_cmpi_16_aw(void);
+void m68k_op_cmpi_16_al(void);
+void m68k_op_cmpi_16_pcdi(void);
+void m68k_op_cmpi_16_pcix(void);
+void m68k_op_cmpi_32_d(void);
+void m68k_op_cmpi_32_ai(void);
+void m68k_op_cmpi_32_pi(void);
+void m68k_op_cmpi_32_pd(void);
+void m68k_op_cmpi_32_di(void);
+void m68k_op_cmpi_32_ix(void);
+void m68k_op_cmpi_32_aw(void);
+void m68k_op_cmpi_32_al(void);
+void m68k_op_cmpi_32_pcdi(void);
+void m68k_op_cmpi_32_pcix(void);
+void m68k_op_cmpm_8_ax7(void);
+void m68k_op_cmpm_8_ay7(void);
+void m68k_op_cmpm_8_axy7(void);
+void m68k_op_cmpm_8(void);
+void m68k_op_cmpm_16(void);
+void m68k_op_cmpm_32(void);
+void m68k_op_cpbcc_32(void);
+void m68k_op_cpdbcc_32(void);
+void m68k_op_cpgen_32(void);
+void m68k_op_cpscc_32(void);
+void m68k_op_cptrapcc_32(void);
+void m68k_op_dbt_16(void);
+void m68k_op_dbf_16(void);
+void m68k_op_dbhi_16(void);
+void m68k_op_dbls_16(void);
+void m68k_op_dbcc_16(void);
+void m68k_op_dbcs_16(void);
+void m68k_op_dbne_16(void);
+void m68k_op_dbeq_16(void);
+void m68k_op_dbvc_16(void);
+void m68k_op_dbvs_16(void);
+void m68k_op_dbpl_16(void);
+void m68k_op_dbmi_16(void);
+void m68k_op_dbge_16(void);
+void m68k_op_dblt_16(void);
+void m68k_op_dbgt_16(void);
+void m68k_op_dble_16(void);
+void m68k_op_divs_16_d(void);
+void m68k_op_divs_16_ai(void);
+void m68k_op_divs_16_pi(void);
+void m68k_op_divs_16_pd(void);
+void m68k_op_divs_16_di(void);
+void m68k_op_divs_16_ix(void);
+void m68k_op_divs_16_aw(void);
+void m68k_op_divs_16_al(void);
+void m68k_op_divs_16_pcdi(void);
+void m68k_op_divs_16_pcix(void);
+void m68k_op_divs_16_i(void);
+void m68k_op_divu_16_d(void);
+void m68k_op_divu_16_ai(void);
+void m68k_op_divu_16_pi(void);
+void m68k_op_divu_16_pd(void);
+void m68k_op_divu_16_di(void);
+void m68k_op_divu_16_ix(void);
+void m68k_op_divu_16_aw(void);
+void m68k_op_divu_16_al(void);
+void m68k_op_divu_16_pcdi(void);
+void m68k_op_divu_16_pcix(void);
+void m68k_op_divu_16_i(void);
+void m68k_op_divl_32_d(void);
+void m68k_op_divl_32_ai(void);
+void m68k_op_divl_32_pi(void);
+void m68k_op_divl_32_pd(void);
+void m68k_op_divl_32_di(void);
+void m68k_op_divl_32_ix(void);
+void m68k_op_divl_32_aw(void);
+void m68k_op_divl_32_al(void);
+void m68k_op_divl_32_pcdi(void);
+void m68k_op_divl_32_pcix(void);
+void m68k_op_divl_32_i(void);
+void m68k_op_eor_8_d(void);
+void m68k_op_eor_8_ai(void);
+void m68k_op_eor_8_pi(void);
+void m68k_op_eor_8_pi7(void);
+void m68k_op_eor_8_pd(void);
+void m68k_op_eor_8_pd7(void);
+void m68k_op_eor_8_di(void);
+void m68k_op_eor_8_ix(void);
+void m68k_op_eor_8_aw(void);
+void m68k_op_eor_8_al(void);
+void m68k_op_eor_16_d(void);
+void m68k_op_eor_16_ai(void);
+void m68k_op_eor_16_pi(void);
+void m68k_op_eor_16_pd(void);
+void m68k_op_eor_16_di(void);
+void m68k_op_eor_16_ix(void);
+void m68k_op_eor_16_aw(void);
+void m68k_op_eor_16_al(void);
+void m68k_op_eor_32_d(void);
+void m68k_op_eor_32_ai(void);
+void m68k_op_eor_32_pi(void);
+void m68k_op_eor_32_pd(void);
+void m68k_op_eor_32_di(void);
+void m68k_op_eor_32_ix(void);
+void m68k_op_eor_32_aw(void);
+void m68k_op_eor_32_al(void);
+void m68k_op_eori_8_d(void);
+void m68k_op_eori_8_ai(void);
+void m68k_op_eori_8_pi(void);
+void m68k_op_eori_8_pi7(void);
+void m68k_op_eori_8_pd(void);
+void m68k_op_eori_8_pd7(void);
+void m68k_op_eori_8_di(void);
+void m68k_op_eori_8_ix(void);
+void m68k_op_eori_8_aw(void);
+void m68k_op_eori_8_al(void);
+void m68k_op_eori_16_d(void);
+void m68k_op_eori_16_ai(void);
+void m68k_op_eori_16_pi(void);
+void m68k_op_eori_16_pd(void);
+void m68k_op_eori_16_di(void);
+void m68k_op_eori_16_ix(void);
+void m68k_op_eori_16_aw(void);
+void m68k_op_eori_16_al(void);
+void m68k_op_eori_32_d(void);
+void m68k_op_eori_32_ai(void);
+void m68k_op_eori_32_pi(void);
+void m68k_op_eori_32_pd(void);
+void m68k_op_eori_32_di(void);
+void m68k_op_eori_32_ix(void);
+void m68k_op_eori_32_aw(void);
+void m68k_op_eori_32_al(void);
+void m68k_op_eori_16_toc(void);
+void m68k_op_eori_16_tos(void);
+void m68k_op_exg_32_dd(void);
+void m68k_op_exg_32_aa(void);
+void m68k_op_exg_32_da(void);
+void m68k_op_ext_16(void);
+void m68k_op_ext_32(void);
+void m68k_op_extb_32(void);
+void m68k_op_illegal(void);
+void m68k_op_jmp_32_ai(void);
+void m68k_op_jmp_32_di(void);
+void m68k_op_jmp_32_ix(void);
+void m68k_op_jmp_32_aw(void);
+void m68k_op_jmp_32_al(void);
+void m68k_op_jmp_32_pcdi(void);
+void m68k_op_jmp_32_pcix(void);
+void m68k_op_jsr_32_ai(void);
+void m68k_op_jsr_32_di(void);
+void m68k_op_jsr_32_ix(void);
+void m68k_op_jsr_32_aw(void);
+void m68k_op_jsr_32_al(void);
+void m68k_op_jsr_32_pcdi(void);
+void m68k_op_jsr_32_pcix(void);
+void m68k_op_lea_32_ai(void);
+void m68k_op_lea_32_di(void);
+void m68k_op_lea_32_ix(void);
+void m68k_op_lea_32_aw(void);
+void m68k_op_lea_32_al(void);
+void m68k_op_lea_32_pcdi(void);
+void m68k_op_lea_32_pcix(void);
+void m68k_op_link_16_a7(void);
+void m68k_op_link_16(void);
+void m68k_op_link_32_a7(void);
+void m68k_op_link_32(void);
+void m68k_op_lsr_8_s(void);
+void m68k_op_lsr_16_s(void);
+void m68k_op_lsr_32_s(void);
+void m68k_op_lsr_8_r(void);
+void m68k_op_lsr_16_r(void);
+void m68k_op_lsr_32_r(void);
+void m68k_op_lsr_16_ai(void);
+void m68k_op_lsr_16_pi(void);
+void m68k_op_lsr_16_pd(void);
+void m68k_op_lsr_16_di(void);
+void m68k_op_lsr_16_ix(void);
+void m68k_op_lsr_16_aw(void);
+void m68k_op_lsr_16_al(void);
+void m68k_op_lsl_8_s(void);
+void m68k_op_lsl_16_s(void);
+void m68k_op_lsl_32_s(void);
+void m68k_op_lsl_8_r(void);
+void m68k_op_lsl_16_r(void);
+void m68k_op_lsl_32_r(void);
+void m68k_op_lsl_16_ai(void);
+void m68k_op_lsl_16_pi(void);
+void m68k_op_lsl_16_pd(void);
+void m68k_op_lsl_16_di(void);
+void m68k_op_lsl_16_ix(void);
+void m68k_op_lsl_16_aw(void);
+void m68k_op_lsl_16_al(void);
+void m68k_op_move_8_d_d(void);
+void m68k_op_move_8_d_ai(void);
+void m68k_op_move_8_d_pi(void);
+void m68k_op_move_8_d_pi7(void);
+void m68k_op_move_8_d_pd(void);
+void m68k_op_move_8_d_pd7(void);
+void m68k_op_move_8_d_di(void);
+void m68k_op_move_8_d_ix(void);
+void m68k_op_move_8_d_aw(void);
+void m68k_op_move_8_d_al(void);
+void m68k_op_move_8_d_pcdi(void);
+void m68k_op_move_8_d_pcix(void);
+void m68k_op_move_8_d_i(void);
+void m68k_op_move_8_ai_d(void);
+void m68k_op_move_8_ai_ai(void);
+void m68k_op_move_8_ai_pi(void);
+void m68k_op_move_8_ai_pi7(void);
+void m68k_op_move_8_ai_pd(void);
+void m68k_op_move_8_ai_pd7(void);
+void m68k_op_move_8_ai_di(void);
+void m68k_op_move_8_ai_ix(void);
+void m68k_op_move_8_ai_aw(void);
+void m68k_op_move_8_ai_al(void);
+void m68k_op_move_8_ai_pcdi(void);
+void m68k_op_move_8_ai_pcix(void);
+void m68k_op_move_8_ai_i(void);
+void m68k_op_move_8_pi7_d(void);
+void m68k_op_move_8_pi_d(void);
+void m68k_op_move_8_pi7_ai(void);
+void m68k_op_move_8_pi7_pi(void);
+void m68k_op_move_8_pi7_pi7(void);
+void m68k_op_move_8_pi7_pd(void);
+void m68k_op_move_8_pi7_pd7(void);
+void m68k_op_move_8_pi7_di(void);
+void m68k_op_move_8_pi7_ix(void);
+void m68k_op_move_8_pi7_aw(void);
+void m68k_op_move_8_pi7_al(void);
+void m68k_op_move_8_pi7_pcdi(void);
+void m68k_op_move_8_pi7_pcix(void);
+void m68k_op_move_8_pi7_i(void);
+void m68k_op_move_8_pi_ai(void);
+void m68k_op_move_8_pi_pi(void);
+void m68k_op_move_8_pi_pi7(void);
+void m68k_op_move_8_pi_pd(void);
+void m68k_op_move_8_pi_pd7(void);
+void m68k_op_move_8_pi_di(void);
+void m68k_op_move_8_pi_ix(void);
+void m68k_op_move_8_pi_aw(void);
+void m68k_op_move_8_pi_al(void);
+void m68k_op_move_8_pi_pcdi(void);
+void m68k_op_move_8_pi_pcix(void);
+void m68k_op_move_8_pi_i(void);
+void m68k_op_move_8_pd7_d(void);
+void m68k_op_move_8_pd_d(void);
+void m68k_op_move_8_pd7_ai(void);
+void m68k_op_move_8_pd7_pi(void);
+void m68k_op_move_8_pd7_pi7(void);
+void m68k_op_move_8_pd7_pd(void);
+void m68k_op_move_8_pd7_pd7(void);
+void m68k_op_move_8_pd7_di(void);
+void m68k_op_move_8_pd7_ix(void);
+void m68k_op_move_8_pd7_aw(void);
+void m68k_op_move_8_pd7_al(void);
+void m68k_op_move_8_pd7_pcdi(void);
+void m68k_op_move_8_pd7_pcix(void);
+void m68k_op_move_8_pd7_i(void);
+void m68k_op_move_8_pd_ai(void);
+void m68k_op_move_8_pd_pi(void);
+void m68k_op_move_8_pd_pi7(void);
+void m68k_op_move_8_pd_pd(void);
+void m68k_op_move_8_pd_pd7(void);
+void m68k_op_move_8_pd_di(void);
+void m68k_op_move_8_pd_ix(void);
+void m68k_op_move_8_pd_aw(void);
+void m68k_op_move_8_pd_al(void);
+void m68k_op_move_8_pd_pcdi(void);
+void m68k_op_move_8_pd_pcix(void);
+void m68k_op_move_8_pd_i(void);
+void m68k_op_move_8_di_d(void);
+void m68k_op_move_8_di_ai(void);
+void m68k_op_move_8_di_pi(void);
+void m68k_op_move_8_di_pi7(void);
+void m68k_op_move_8_di_pd(void);
+void m68k_op_move_8_di_pd7(void);
+void m68k_op_move_8_di_di(void);
+void m68k_op_move_8_di_ix(void);
+void m68k_op_move_8_di_aw(void);
+void m68k_op_move_8_di_al(void);
+void m68k_op_move_8_di_pcdi(void);
+void m68k_op_move_8_di_pcix(void);
+void m68k_op_move_8_di_i(void);
+void m68k_op_move_8_ix_d(void);
+void m68k_op_move_8_ix_ai(void);
+void m68k_op_move_8_ix_pi(void);
+void m68k_op_move_8_ix_pi7(void);
+void m68k_op_move_8_ix_pd(void);
+void m68k_op_move_8_ix_pd7(void);
+void m68k_op_move_8_ix_di(void);
+void m68k_op_move_8_ix_ix(void);
+void m68k_op_move_8_ix_aw(void);
+void m68k_op_move_8_ix_al(void);
+void m68k_op_move_8_ix_pcdi(void);
+void m68k_op_move_8_ix_pcix(void);
+void m68k_op_move_8_ix_i(void);
+void m68k_op_move_8_aw_d(void);
+void m68k_op_move_8_aw_ai(void);
+void m68k_op_move_8_aw_pi(void);
+void m68k_op_move_8_aw_pi7(void);
+void m68k_op_move_8_aw_pd(void);
+void m68k_op_move_8_aw_pd7(void);
+void m68k_op_move_8_aw_di(void);
+void m68k_op_move_8_aw_ix(void);
+void m68k_op_move_8_aw_aw(void);
+void m68k_op_move_8_aw_al(void);
+void m68k_op_move_8_aw_pcdi(void);
+void m68k_op_move_8_aw_pcix(void);
+void m68k_op_move_8_aw_i(void);
+void m68k_op_move_8_al_d(void);
+void m68k_op_move_8_al_ai(void);
+void m68k_op_move_8_al_pi(void);
+void m68k_op_move_8_al_pi7(void);
+void m68k_op_move_8_al_pd(void);
+void m68k_op_move_8_al_pd7(void);
+void m68k_op_move_8_al_di(void);
+void m68k_op_move_8_al_ix(void);
+void m68k_op_move_8_al_aw(void);
+void m68k_op_move_8_al_al(void);
+void m68k_op_move_8_al_pcdi(void);
+void m68k_op_move_8_al_pcix(void);
+void m68k_op_move_8_al_i(void);
+void m68k_op_move_16_d_d(void);
+void m68k_op_move_16_d_a(void);
+void m68k_op_move_16_d_ai(void);
+void m68k_op_move_16_d_pi(void);
+void m68k_op_move_16_d_pd(void);
+void m68k_op_move_16_d_di(void);
+void m68k_op_move_16_d_ix(void);
+void m68k_op_move_16_d_aw(void);
+void m68k_op_move_16_d_al(void);
+void m68k_op_move_16_d_pcdi(void);
+void m68k_op_move_16_d_pcix(void);
+void m68k_op_move_16_d_i(void);
+void m68k_op_move_16_ai_d(void);
+void m68k_op_move_16_ai_a(void);
+void m68k_op_move_16_ai_ai(void);
+void m68k_op_move_16_ai_pi(void);
+void m68k_op_move_16_ai_pd(void);
+void m68k_op_move_16_ai_di(void);
+void m68k_op_move_16_ai_ix(void);
+void m68k_op_move_16_ai_aw(void);
+void m68k_op_move_16_ai_al(void);
+void m68k_op_move_16_ai_pcdi(void);
+void m68k_op_move_16_ai_pcix(void);
+void m68k_op_move_16_ai_i(void);
+void m68k_op_move_16_pi_d(void);
+void m68k_op_move_16_pi_a(void);
+void m68k_op_move_16_pi_ai(void);
+void m68k_op_move_16_pi_pi(void);
+void m68k_op_move_16_pi_pd(void);
+void m68k_op_move_16_pi_di(void);
+void m68k_op_move_16_pi_ix(void);
+void m68k_op_move_16_pi_aw(void);
+void m68k_op_move_16_pi_al(void);
+void m68k_op_move_16_pi_pcdi(void);
+void m68k_op_move_16_pi_pcix(void);
+void m68k_op_move_16_pi_i(void);
+void m68k_op_move_16_pd_d(void);
+void m68k_op_move_16_pd_a(void);
+void m68k_op_move_16_pd_ai(void);
+void m68k_op_move_16_pd_pi(void);
+void m68k_op_move_16_pd_pd(void);
+void m68k_op_move_16_pd_di(void);
+void m68k_op_move_16_pd_ix(void);
+void m68k_op_move_16_pd_aw(void);
+void m68k_op_move_16_pd_al(void);
+void m68k_op_move_16_pd_pcdi(void);
+void m68k_op_move_16_pd_pcix(void);
+void m68k_op_move_16_pd_i(void);
+void m68k_op_move_16_di_d(void);
+void m68k_op_move_16_di_a(void);
+void m68k_op_move_16_di_ai(void);
+void m68k_op_move_16_di_pi(void);
+void m68k_op_move_16_di_pd(void);
+void m68k_op_move_16_di_di(void);
+void m68k_op_move_16_di_ix(void);
+void m68k_op_move_16_di_aw(void);
+void m68k_op_move_16_di_al(void);
+void m68k_op_move_16_di_pcdi(void);
+void m68k_op_move_16_di_pcix(void);
+void m68k_op_move_16_di_i(void);
+void m68k_op_move_16_ix_d(void);
+void m68k_op_move_16_ix_a(void);
+void m68k_op_move_16_ix_ai(void);
+void m68k_op_move_16_ix_pi(void);
+void m68k_op_move_16_ix_pd(void);
+void m68k_op_move_16_ix_di(void);
+void m68k_op_move_16_ix_ix(void);
+void m68k_op_move_16_ix_aw(void);
+void m68k_op_move_16_ix_al(void);
+void m68k_op_move_16_ix_pcdi(void);
+void m68k_op_move_16_ix_pcix(void);
+void m68k_op_move_16_ix_i(void);
+void m68k_op_move_16_aw_d(void);
+void m68k_op_move_16_aw_a(void);
+void m68k_op_move_16_aw_ai(void);
+void m68k_op_move_16_aw_pi(void);
+void m68k_op_move_16_aw_pd(void);
+void m68k_op_move_16_aw_di(void);
+void m68k_op_move_16_aw_ix(void);
+void m68k_op_move_16_aw_aw(void);
+void m68k_op_move_16_aw_al(void);
+void m68k_op_move_16_aw_pcdi(void);
+void m68k_op_move_16_aw_pcix(void);
+void m68k_op_move_16_aw_i(void);
+void m68k_op_move_16_al_d(void);
+void m68k_op_move_16_al_a(void);
+void m68k_op_move_16_al_ai(void);
+void m68k_op_move_16_al_pi(void);
+void m68k_op_move_16_al_pd(void);
+void m68k_op_move_16_al_di(void);
+void m68k_op_move_16_al_ix(void);
+void m68k_op_move_16_al_aw(void);
+void m68k_op_move_16_al_al(void);
+void m68k_op_move_16_al_pcdi(void);
+void m68k_op_move_16_al_pcix(void);
+void m68k_op_move_16_al_i(void);
+void m68k_op_move_32_d_d(void);
+void m68k_op_move_32_d_a(void);
+void m68k_op_move_32_d_ai(void);
+void m68k_op_move_32_d_pi(void);
+void m68k_op_move_32_d_pd(void);
+void m68k_op_move_32_d_di(void);
+void m68k_op_move_32_d_ix(void);
+void m68k_op_move_32_d_aw(void);
+void m68k_op_move_32_d_al(void);
+void m68k_op_move_32_d_pcdi(void);
+void m68k_op_move_32_d_pcix(void);
+void m68k_op_move_32_d_i(void);
+void m68k_op_move_32_ai_d(void);
+void m68k_op_move_32_ai_a(void);
+void m68k_op_move_32_ai_ai(void);
+void m68k_op_move_32_ai_pi(void);
+void m68k_op_move_32_ai_pd(void);
+void m68k_op_move_32_ai_di(void);
+void m68k_op_move_32_ai_ix(void);
+void m68k_op_move_32_ai_aw(void);
+void m68k_op_move_32_ai_al(void);
+void m68k_op_move_32_ai_pcdi(void);
+void m68k_op_move_32_ai_pcix(void);
+void m68k_op_move_32_ai_i(void);
+void m68k_op_move_32_pi_d(void);
+void m68k_op_move_32_pi_a(void);
+void m68k_op_move_32_pi_ai(void);
+void m68k_op_move_32_pi_pi(void);
+void m68k_op_move_32_pi_pd(void);
+void m68k_op_move_32_pi_di(void);
+void m68k_op_move_32_pi_ix(void);
+void m68k_op_move_32_pi_aw(void);
+void m68k_op_move_32_pi_al(void);
+void m68k_op_move_32_pi_pcdi(void);
+void m68k_op_move_32_pi_pcix(void);
+void m68k_op_move_32_pi_i(void);
+void m68k_op_move_32_pd_d(void);
+void m68k_op_move_32_pd_a(void);
+void m68k_op_move_32_pd_ai(void);
+void m68k_op_move_32_pd_pi(void);
+void m68k_op_move_32_pd_pd(void);
+void m68k_op_move_32_pd_di(void);
+void m68k_op_move_32_pd_ix(void);
+void m68k_op_move_32_pd_aw(void);
+void m68k_op_move_32_pd_al(void);
+void m68k_op_move_32_pd_pcdi(void);
+void m68k_op_move_32_pd_pcix(void);
+void m68k_op_move_32_pd_i(void);
+void m68k_op_move_32_di_d(void);
+void m68k_op_move_32_di_a(void);
+void m68k_op_move_32_di_ai(void);
+void m68k_op_move_32_di_pi(void);
+void m68k_op_move_32_di_pd(void);
+void m68k_op_move_32_di_di(void);
+void m68k_op_move_32_di_ix(void);
+void m68k_op_move_32_di_aw(void);
+void m68k_op_move_32_di_al(void);
+void m68k_op_move_32_di_pcdi(void);
+void m68k_op_move_32_di_pcix(void);
+void m68k_op_move_32_di_i(void);
+void m68k_op_move_32_ix_d(void);
+void m68k_op_move_32_ix_a(void);
+void m68k_op_move_32_ix_ai(void);
+void m68k_op_move_32_ix_pi(void);
+void m68k_op_move_32_ix_pd(void);
+void m68k_op_move_32_ix_di(void);
+void m68k_op_move_32_ix_ix(void);
+void m68k_op_move_32_ix_aw(void);
+void m68k_op_move_32_ix_al(void);
+void m68k_op_move_32_ix_pcdi(void);
+void m68k_op_move_32_ix_pcix(void);
+void m68k_op_move_32_ix_i(void);
+void m68k_op_move_32_aw_d(void);
+void m68k_op_move_32_aw_a(void);
+void m68k_op_move_32_aw_ai(void);
+void m68k_op_move_32_aw_pi(void);
+void m68k_op_move_32_aw_pd(void);
+void m68k_op_move_32_aw_di(void);
+void m68k_op_move_32_aw_ix(void);
+void m68k_op_move_32_aw_aw(void);
+void m68k_op_move_32_aw_al(void);
+void m68k_op_move_32_aw_pcdi(void);
+void m68k_op_move_32_aw_pcix(void);
+void m68k_op_move_32_aw_i(void);
+void m68k_op_move_32_al_d(void);
+void m68k_op_move_32_al_a(void);
+void m68k_op_move_32_al_ai(void);
+void m68k_op_move_32_al_pi(void);
+void m68k_op_move_32_al_pd(void);
+void m68k_op_move_32_al_di(void);
+void m68k_op_move_32_al_ix(void);
+void m68k_op_move_32_al_aw(void);
+void m68k_op_move_32_al_al(void);
+void m68k_op_move_32_al_pcdi(void);
+void m68k_op_move_32_al_pcix(void);
+void m68k_op_move_32_al_i(void);
+void m68k_op_movea_16_d(void);
+void m68k_op_movea_16_a(void);
+void m68k_op_movea_16_ai(void);
+void m68k_op_movea_16_pi(void);
+void m68k_op_movea_16_pd(void);
+void m68k_op_movea_16_di(void);
+void m68k_op_movea_16_ix(void);
+void m68k_op_movea_16_aw(void);
+void m68k_op_movea_16_al(void);
+void m68k_op_movea_16_pcdi(void);
+void m68k_op_movea_16_pcix(void);
+void m68k_op_movea_16_i(void);
+void m68k_op_movea_32_d(void);
+void m68k_op_movea_32_a(void);
+void m68k_op_movea_32_ai(void);
+void m68k_op_movea_32_pi(void);
+void m68k_op_movea_32_pd(void);
+void m68k_op_movea_32_di(void);
+void m68k_op_movea_32_ix(void);
+void m68k_op_movea_32_aw(void);
+void m68k_op_movea_32_al(void);
+void m68k_op_movea_32_pcdi(void);
+void m68k_op_movea_32_pcix(void);
+void m68k_op_movea_32_i(void);
+void m68k_op_move_16_frc_d(void);
+void m68k_op_move_16_frc_ai(void);
+void m68k_op_move_16_frc_pi(void);
+void m68k_op_move_16_frc_pd(void);
+void m68k_op_move_16_frc_di(void);
+void m68k_op_move_16_frc_ix(void);
+void m68k_op_move_16_frc_aw(void);
+void m68k_op_move_16_frc_al(void);
+void m68k_op_move_16_toc_d(void);
+void m68k_op_move_16_toc_ai(void);
+void m68k_op_move_16_toc_pi(void);
+void m68k_op_move_16_toc_pd(void);
+void m68k_op_move_16_toc_di(void);
+void m68k_op_move_16_toc_ix(void);
+void m68k_op_move_16_toc_aw(void);
+void m68k_op_move_16_toc_al(void);
+void m68k_op_move_16_toc_pcdi(void);
+void m68k_op_move_16_toc_pcix(void);
+void m68k_op_move_16_toc_i(void);
+void m68k_op_move_16_frs_d(void);
+void m68k_op_move_16_frs_ai(void);
+void m68k_op_move_16_frs_pi(void);
+void m68k_op_move_16_frs_pd(void);
+void m68k_op_move_16_frs_di(void);
+void m68k_op_move_16_frs_ix(void);
+void m68k_op_move_16_frs_aw(void);
+void m68k_op_move_16_frs_al(void);
+void m68k_op_move_16_tos_d(void);
+void m68k_op_move_16_tos_ai(void);
+void m68k_op_move_16_tos_pi(void);
+void m68k_op_move_16_tos_pd(void);
+void m68k_op_move_16_tos_di(void);
+void m68k_op_move_16_tos_ix(void);
+void m68k_op_move_16_tos_aw(void);
+void m68k_op_move_16_tos_al(void);
+void m68k_op_move_16_tos_pcdi(void);
+void m68k_op_move_16_tos_pcix(void);
+void m68k_op_move_16_tos_i(void);
+void m68k_op_move_32_fru(void);
+void m68k_op_move_32_tou(void);
+void m68k_op_movec_32_cr(void);
+void m68k_op_movec_32_rc(void);
+void m68k_op_movem_16_re_pd(void);
+void m68k_op_movem_16_re_ai(void);
+void m68k_op_movem_16_re_di(void);
+void m68k_op_movem_16_re_ix(void);
+void m68k_op_movem_16_re_aw(void);
+void m68k_op_movem_16_re_al(void);
+void m68k_op_movem_32_re_pd(void);
+void m68k_op_movem_32_re_ai(void);
+void m68k_op_movem_32_re_di(void);
+void m68k_op_movem_32_re_ix(void);
+void m68k_op_movem_32_re_aw(void);
+void m68k_op_movem_32_re_al(void);
+void m68k_op_movem_16_er_pi(void);
+void m68k_op_movem_16_er_pcdi(void);
+void m68k_op_movem_16_er_pcix(void);
+void m68k_op_movem_16_er_ai(void);
+void m68k_op_movem_16_er_di(void);
+void m68k_op_movem_16_er_ix(void);
+void m68k_op_movem_16_er_aw(void);
+void m68k_op_movem_16_er_al(void);
+void m68k_op_movem_32_er_pi(void);
+void m68k_op_movem_32_er_pcdi(void);
+void m68k_op_movem_32_er_pcix(void);
+void m68k_op_movem_32_er_ai(void);
+void m68k_op_movem_32_er_di(void);
+void m68k_op_movem_32_er_ix(void);
+void m68k_op_movem_32_er_aw(void);
+void m68k_op_movem_32_er_al(void);
+void m68k_op_movep_16_re(void);
+void m68k_op_movep_32_re(void);
+void m68k_op_movep_16_er(void);
+void m68k_op_movep_32_er(void);
+void m68k_op_moves_8_ai(void);
+void m68k_op_moves_8_pi(void);
+void m68k_op_moves_8_pi7(void);
+void m68k_op_moves_8_pd(void);
+void m68k_op_moves_8_pd7(void);
+void m68k_op_moves_8_di(void);
+void m68k_op_moves_8_ix(void);
+void m68k_op_moves_8_aw(void);
+void m68k_op_moves_8_al(void);
+void m68k_op_moves_16_ai(void);
+void m68k_op_moves_16_pi(void);
+void m68k_op_moves_16_pd(void);
+void m68k_op_moves_16_di(void);
+void m68k_op_moves_16_ix(void);
+void m68k_op_moves_16_aw(void);
+void m68k_op_moves_16_al(void);
+void m68k_op_moves_32_ai(void);
+void m68k_op_moves_32_pi(void);
+void m68k_op_moves_32_pd(void);
+void m68k_op_moves_32_di(void);
+void m68k_op_moves_32_ix(void);
+void m68k_op_moves_32_aw(void);
+void m68k_op_moves_32_al(void);
+void m68k_op_moveq_32(void);
+void m68k_op_muls_16_d(void);
+void m68k_op_muls_16_ai(void);
+void m68k_op_muls_16_pi(void);
+void m68k_op_muls_16_pd(void);
+void m68k_op_muls_16_di(void);
+void m68k_op_muls_16_ix(void);
+void m68k_op_muls_16_aw(void);
+void m68k_op_muls_16_al(void);
+void m68k_op_muls_16_pcdi(void);
+void m68k_op_muls_16_pcix(void);
+void m68k_op_muls_16_i(void);
+void m68k_op_mulu_16_d(void);
+void m68k_op_mulu_16_ai(void);
+void m68k_op_mulu_16_pi(void);
+void m68k_op_mulu_16_pd(void);
+void m68k_op_mulu_16_di(void);
+void m68k_op_mulu_16_ix(void);
+void m68k_op_mulu_16_aw(void);
+void m68k_op_mulu_16_al(void);
+void m68k_op_mulu_16_pcdi(void);
+void m68k_op_mulu_16_pcix(void);
+void m68k_op_mulu_16_i(void);
+void m68k_op_mull_32_d(void);
+void m68k_op_mull_32_ai(void);
+void m68k_op_mull_32_pi(void);
+void m68k_op_mull_32_pd(void);
+void m68k_op_mull_32_di(void);
+void m68k_op_mull_32_ix(void);
+void m68k_op_mull_32_aw(void);
+void m68k_op_mull_32_al(void);
+void m68k_op_mull_32_pcdi(void);
+void m68k_op_mull_32_pcix(void);
+void m68k_op_mull_32_i(void);
+void m68k_op_nbcd_8_d(void);
+void m68k_op_nbcd_8_ai(void);
+void m68k_op_nbcd_8_pi(void);
+void m68k_op_nbcd_8_pi7(void);
+void m68k_op_nbcd_8_pd(void);
+void m68k_op_nbcd_8_pd7(void);
+void m68k_op_nbcd_8_di(void);
+void m68k_op_nbcd_8_ix(void);
+void m68k_op_nbcd_8_aw(void);
+void m68k_op_nbcd_8_al(void);
+void m68k_op_neg_8_d(void);
+void m68k_op_neg_8_ai(void);
+void m68k_op_neg_8_pi(void);
+void m68k_op_neg_8_pi7(void);
+void m68k_op_neg_8_pd(void);
+void m68k_op_neg_8_pd7(void);
+void m68k_op_neg_8_di(void);
+void m68k_op_neg_8_ix(void);
+void m68k_op_neg_8_aw(void);
+void m68k_op_neg_8_al(void);
+void m68k_op_neg_16_d(void);
+void m68k_op_neg_16_ai(void);
+void m68k_op_neg_16_pi(void);
+void m68k_op_neg_16_pd(void);
+void m68k_op_neg_16_di(void);
+void m68k_op_neg_16_ix(void);
+void m68k_op_neg_16_aw(void);
+void m68k_op_neg_16_al(void);
+void m68k_op_neg_32_d(void);
+void m68k_op_neg_32_ai(void);
+void m68k_op_neg_32_pi(void);
+void m68k_op_neg_32_pd(void);
+void m68k_op_neg_32_di(void);
+void m68k_op_neg_32_ix(void);
+void m68k_op_neg_32_aw(void);
+void m68k_op_neg_32_al(void);
+void m68k_op_negx_8_d(void);
+void m68k_op_negx_8_ai(void);
+void m68k_op_negx_8_pi(void);
+void m68k_op_negx_8_pi7(void);
+void m68k_op_negx_8_pd(void);
+void m68k_op_negx_8_pd7(void);
+void m68k_op_negx_8_di(void);
+void m68k_op_negx_8_ix(void);
+void m68k_op_negx_8_aw(void);
+void m68k_op_negx_8_al(void);
+void m68k_op_negx_16_d(void);
+void m68k_op_negx_16_ai(void);
+void m68k_op_negx_16_pi(void);
+void m68k_op_negx_16_pd(void);
+void m68k_op_negx_16_di(void);
+void m68k_op_negx_16_ix(void);
+void m68k_op_negx_16_aw(void);
+void m68k_op_negx_16_al(void);
+void m68k_op_negx_32_d(void);
+void m68k_op_negx_32_ai(void);
+void m68k_op_negx_32_pi(void);
+void m68k_op_negx_32_pd(void);
+void m68k_op_negx_32_di(void);
+void m68k_op_negx_32_ix(void);
+void m68k_op_negx_32_aw(void);
+void m68k_op_negx_32_al(void);
+void m68k_op_nop(void);
+void m68k_op_not_8_d(void);
+void m68k_op_not_8_ai(void);
+void m68k_op_not_8_pi(void);
+void m68k_op_not_8_pi7(void);
+void m68k_op_not_8_pd(void);
+void m68k_op_not_8_pd7(void);
+void m68k_op_not_8_di(void);
+void m68k_op_not_8_ix(void);
+void m68k_op_not_8_aw(void);
+void m68k_op_not_8_al(void);
+void m68k_op_not_16_d(void);
+void m68k_op_not_16_ai(void);
+void m68k_op_not_16_pi(void);
+void m68k_op_not_16_pd(void);
+void m68k_op_not_16_di(void);
+void m68k_op_not_16_ix(void);
+void m68k_op_not_16_aw(void);
+void m68k_op_not_16_al(void);
+void m68k_op_not_32_d(void);
+void m68k_op_not_32_ai(void);
+void m68k_op_not_32_pi(void);
+void m68k_op_not_32_pd(void);
+void m68k_op_not_32_di(void);
+void m68k_op_not_32_ix(void);
+void m68k_op_not_32_aw(void);
+void m68k_op_not_32_al(void);
+void m68k_op_or_8_er_d(void);
+void m68k_op_or_8_er_ai(void);
+void m68k_op_or_8_er_pi(void);
+void m68k_op_or_8_er_pi7(void);
+void m68k_op_or_8_er_pd(void);
+void m68k_op_or_8_er_pd7(void);
+void m68k_op_or_8_er_di(void);
+void m68k_op_or_8_er_ix(void);
+void m68k_op_or_8_er_aw(void);
+void m68k_op_or_8_er_al(void);
+void m68k_op_or_8_er_pcdi(void);
+void m68k_op_or_8_er_pcix(void);
+void m68k_op_or_8_er_i(void);
+void m68k_op_or_16_er_d(void);
+void m68k_op_or_16_er_ai(void);
+void m68k_op_or_16_er_pi(void);
+void m68k_op_or_16_er_pd(void);
+void m68k_op_or_16_er_di(void);
+void m68k_op_or_16_er_ix(void);
+void m68k_op_or_16_er_aw(void);
+void m68k_op_or_16_er_al(void);
+void m68k_op_or_16_er_pcdi(void);
+void m68k_op_or_16_er_pcix(void);
+void m68k_op_or_16_er_i(void);
+void m68k_op_or_32_er_d(void);
+void m68k_op_or_32_er_ai(void);
+void m68k_op_or_32_er_pi(void);
+void m68k_op_or_32_er_pd(void);
+void m68k_op_or_32_er_di(void);
+void m68k_op_or_32_er_ix(void);
+void m68k_op_or_32_er_aw(void);
+void m68k_op_or_32_er_al(void);
+void m68k_op_or_32_er_pcdi(void);
+void m68k_op_or_32_er_pcix(void);
+void m68k_op_or_32_er_i(void);
+void m68k_op_or_8_re_ai(void);
+void m68k_op_or_8_re_pi(void);
+void m68k_op_or_8_re_pi7(void);
+void m68k_op_or_8_re_pd(void);
+void m68k_op_or_8_re_pd7(void);
+void m68k_op_or_8_re_di(void);
+void m68k_op_or_8_re_ix(void);
+void m68k_op_or_8_re_aw(void);
+void m68k_op_or_8_re_al(void);
+void m68k_op_or_16_re_ai(void);
+void m68k_op_or_16_re_pi(void);
+void m68k_op_or_16_re_pd(void);
+void m68k_op_or_16_re_di(void);
+void m68k_op_or_16_re_ix(void);
+void m68k_op_or_16_re_aw(void);
+void m68k_op_or_16_re_al(void);
+void m68k_op_or_32_re_ai(void);
+void m68k_op_or_32_re_pi(void);
+void m68k_op_or_32_re_pd(void);
+void m68k_op_or_32_re_di(void);
+void m68k_op_or_32_re_ix(void);
+void m68k_op_or_32_re_aw(void);
+void m68k_op_or_32_re_al(void);
+void m68k_op_ori_8_d(void);
+void m68k_op_ori_8_ai(void);
+void m68k_op_ori_8_pi(void);
+void m68k_op_ori_8_pi7(void);
+void m68k_op_ori_8_pd(void);
+void m68k_op_ori_8_pd7(void);
+void m68k_op_ori_8_di(void);
+void m68k_op_ori_8_ix(void);
+void m68k_op_ori_8_aw(void);
+void m68k_op_ori_8_al(void);
+void m68k_op_ori_16_d(void);
+void m68k_op_ori_16_ai(void);
+void m68k_op_ori_16_pi(void);
+void m68k_op_ori_16_pd(void);
+void m68k_op_ori_16_di(void);
+void m68k_op_ori_16_ix(void);
+void m68k_op_ori_16_aw(void);
+void m68k_op_ori_16_al(void);
+void m68k_op_ori_32_d(void);
+void m68k_op_ori_32_ai(void);
+void m68k_op_ori_32_pi(void);
+void m68k_op_ori_32_pd(void);
+void m68k_op_ori_32_di(void);
+void m68k_op_ori_32_ix(void);
+void m68k_op_ori_32_aw(void);
+void m68k_op_ori_32_al(void);
+void m68k_op_ori_16_toc(void);
+void m68k_op_ori_16_tos(void);
+void m68k_op_pack_16_rr(void);
+void m68k_op_pack_16_mm_ax7(void);
+void m68k_op_pack_16_mm_ay7(void);
+void m68k_op_pack_16_mm_axy7(void);
+void m68k_op_pack_16_mm(void);
+void m68k_op_pea_32_ai(void);
+void m68k_op_pea_32_di(void);
+void m68k_op_pea_32_ix(void);
+void m68k_op_pea_32_aw(void);
+void m68k_op_pea_32_al(void);
+void m68k_op_pea_32_pcdi(void);
+void m68k_op_pea_32_pcix(void);
+void m68k_op_reset(void);
+void m68k_op_ror_8_s(void);
+void m68k_op_ror_16_s(void);
+void m68k_op_ror_32_s(void);
+void m68k_op_ror_8_r(void);
+void m68k_op_ror_16_r(void);
+void m68k_op_ror_32_r(void);
+void m68k_op_ror_16_ai(void);
+void m68k_op_ror_16_pi(void);
+void m68k_op_ror_16_pd(void);
+void m68k_op_ror_16_di(void);
+void m68k_op_ror_16_ix(void);
+void m68k_op_ror_16_aw(void);
+void m68k_op_ror_16_al(void);
+void m68k_op_rol_8_s(void);
+void m68k_op_rol_16_s(void);
+void m68k_op_rol_32_s(void);
+void m68k_op_rol_8_r(void);
+void m68k_op_rol_16_r(void);
+void m68k_op_rol_32_r(void);
+void m68k_op_rol_16_ai(void);
+void m68k_op_rol_16_pi(void);
+void m68k_op_rol_16_pd(void);
+void m68k_op_rol_16_di(void);
+void m68k_op_rol_16_ix(void);
+void m68k_op_rol_16_aw(void);
+void m68k_op_rol_16_al(void);
+void m68k_op_roxr_8_s(void);
+void m68k_op_roxr_16_s(void);
+void m68k_op_roxr_32_s(void);
+void m68k_op_roxr_8_r(void);
+void m68k_op_roxr_16_r(void);
+void m68k_op_roxr_32_r(void);
+void m68k_op_roxr_16_ai(void);
+void m68k_op_roxr_16_pi(void);
+void m68k_op_roxr_16_pd(void);
+void m68k_op_roxr_16_di(void);
+void m68k_op_roxr_16_ix(void);
+void m68k_op_roxr_16_aw(void);
+void m68k_op_roxr_16_al(void);
+void m68k_op_roxl_8_s(void);
+void m68k_op_roxl_16_s(void);
+void m68k_op_roxl_32_s(void);
+void m68k_op_roxl_8_r(void);
+void m68k_op_roxl_16_r(void);
+void m68k_op_roxl_32_r(void);
+void m68k_op_roxl_16_ai(void);
+void m68k_op_roxl_16_pi(void);
+void m68k_op_roxl_16_pd(void);
+void m68k_op_roxl_16_di(void);
+void m68k_op_roxl_16_ix(void);
+void m68k_op_roxl_16_aw(void);
+void m68k_op_roxl_16_al(void);
+void m68k_op_rtd_32(void);
+void m68k_op_rte_32(void);
+void m68k_op_rtm_32(void);
+void m68k_op_rtr_32(void);
+void m68k_op_rts_32(void);
+void m68k_op_sbcd_8_rr(void);
+void m68k_op_sbcd_8_mm_ax7(void);
+void m68k_op_sbcd_8_mm_ay7(void);
+void m68k_op_sbcd_8_mm_axy7(void);
+void m68k_op_sbcd_8_mm(void);
+void m68k_op_st_8_d(void);
+void m68k_op_st_8_ai(void);
+void m68k_op_st_8_pi(void);
+void m68k_op_st_8_pi7(void);
+void m68k_op_st_8_pd(void);
+void m68k_op_st_8_pd7(void);
+void m68k_op_st_8_di(void);
+void m68k_op_st_8_ix(void);
+void m68k_op_st_8_aw(void);
+void m68k_op_st_8_al(void);
+void m68k_op_sf_8_d(void);
+void m68k_op_sf_8_ai(void);
+void m68k_op_sf_8_pi(void);
+void m68k_op_sf_8_pi7(void);
+void m68k_op_sf_8_pd(void);
+void m68k_op_sf_8_pd7(void);
+void m68k_op_sf_8_di(void);
+void m68k_op_sf_8_ix(void);
+void m68k_op_sf_8_aw(void);
+void m68k_op_sf_8_al(void);
+void m68k_op_shi_8_d(void);
+void m68k_op_sls_8_d(void);
+void m68k_op_scc_8_d(void);
+void m68k_op_scs_8_d(void);
+void m68k_op_sne_8_d(void);
+void m68k_op_seq_8_d(void);
+void m68k_op_svc_8_d(void);
+void m68k_op_svs_8_d(void);
+void m68k_op_spl_8_d(void);
+void m68k_op_smi_8_d(void);
+void m68k_op_sge_8_d(void);
+void m68k_op_slt_8_d(void);
+void m68k_op_sgt_8_d(void);
+void m68k_op_sle_8_d(void);
+void m68k_op_shi_8_ai(void);
+void m68k_op_shi_8_pi(void);
+void m68k_op_shi_8_pi7(void);
+void m68k_op_shi_8_pd(void);
+void m68k_op_shi_8_pd7(void);
+void m68k_op_shi_8_di(void);
+void m68k_op_shi_8_ix(void);
+void m68k_op_shi_8_aw(void);
+void m68k_op_shi_8_al(void);
+void m68k_op_sls_8_ai(void);
+void m68k_op_sls_8_pi(void);
+void m68k_op_sls_8_pi7(void);
+void m68k_op_sls_8_pd(void);
+void m68k_op_sls_8_pd7(void);
+void m68k_op_sls_8_di(void);
+void m68k_op_sls_8_ix(void);
+void m68k_op_sls_8_aw(void);
+void m68k_op_sls_8_al(void);
+void m68k_op_scc_8_ai(void);
+void m68k_op_scc_8_pi(void);
+void m68k_op_scc_8_pi7(void);
+void m68k_op_scc_8_pd(void);
+void m68k_op_scc_8_pd7(void);
+void m68k_op_scc_8_di(void);
+void m68k_op_scc_8_ix(void);
+void m68k_op_scc_8_aw(void);
+void m68k_op_scc_8_al(void);
+void m68k_op_scs_8_ai(void);
+void m68k_op_scs_8_pi(void);
+void m68k_op_scs_8_pi7(void);
+void m68k_op_scs_8_pd(void);
+void m68k_op_scs_8_pd7(void);
+void m68k_op_scs_8_di(void);
+void m68k_op_scs_8_ix(void);
+void m68k_op_scs_8_aw(void);
+void m68k_op_scs_8_al(void);
+void m68k_op_sne_8_ai(void);
+void m68k_op_sne_8_pi(void);
+void m68k_op_sne_8_pi7(void);
+void m68k_op_sne_8_pd(void);
+void m68k_op_sne_8_pd7(void);
+void m68k_op_sne_8_di(void);
+void m68k_op_sne_8_ix(void);
+void m68k_op_sne_8_aw(void);
+void m68k_op_sne_8_al(void);
+void m68k_op_seq_8_ai(void);
+void m68k_op_seq_8_pi(void);
+void m68k_op_seq_8_pi7(void);
+void m68k_op_seq_8_pd(void);
+void m68k_op_seq_8_pd7(void);
+void m68k_op_seq_8_di(void);
+void m68k_op_seq_8_ix(void);
+void m68k_op_seq_8_aw(void);
+void m68k_op_seq_8_al(void);
+void m68k_op_svc_8_ai(void);
+void m68k_op_svc_8_pi(void);
+void m68k_op_svc_8_pi7(void);
+void m68k_op_svc_8_pd(void);
+void m68k_op_svc_8_pd7(void);
+void m68k_op_svc_8_di(void);
+void m68k_op_svc_8_ix(void);
+void m68k_op_svc_8_aw(void);
+void m68k_op_svc_8_al(void);
+void m68k_op_svs_8_ai(void);
+void m68k_op_svs_8_pi(void);
+void m68k_op_svs_8_pi7(void);
+void m68k_op_svs_8_pd(void);
+void m68k_op_svs_8_pd7(void);
+void m68k_op_svs_8_di(void);
+void m68k_op_svs_8_ix(void);
+void m68k_op_svs_8_aw(void);
+void m68k_op_svs_8_al(void);
+void m68k_op_spl_8_ai(void);
+void m68k_op_spl_8_pi(void);
+void m68k_op_spl_8_pi7(void);
+void m68k_op_spl_8_pd(void);
+void m68k_op_spl_8_pd7(void);
+void m68k_op_spl_8_di(void);
+void m68k_op_spl_8_ix(void);
+void m68k_op_spl_8_aw(void);
+void m68k_op_spl_8_al(void);
+void m68k_op_smi_8_ai(void);
+void m68k_op_smi_8_pi(void);
+void m68k_op_smi_8_pi7(void);
+void m68k_op_smi_8_pd(void);
+void m68k_op_smi_8_pd7(void);
+void m68k_op_smi_8_di(void);
+void m68k_op_smi_8_ix(void);
+void m68k_op_smi_8_aw(void);
+void m68k_op_smi_8_al(void);
+void m68k_op_sge_8_ai(void);
+void m68k_op_sge_8_pi(void);
+void m68k_op_sge_8_pi7(void);
+void m68k_op_sge_8_pd(void);
+void m68k_op_sge_8_pd7(void);
+void m68k_op_sge_8_di(void);
+void m68k_op_sge_8_ix(void);
+void m68k_op_sge_8_aw(void);
+void m68k_op_sge_8_al(void);
+void m68k_op_slt_8_ai(void);
+void m68k_op_slt_8_pi(void);
+void m68k_op_slt_8_pi7(void);
+void m68k_op_slt_8_pd(void);
+void m68k_op_slt_8_pd7(void);
+void m68k_op_slt_8_di(void);
+void m68k_op_slt_8_ix(void);
+void m68k_op_slt_8_aw(void);
+void m68k_op_slt_8_al(void);
+void m68k_op_sgt_8_ai(void);
+void m68k_op_sgt_8_pi(void);
+void m68k_op_sgt_8_pi7(void);
+void m68k_op_sgt_8_pd(void);
+void m68k_op_sgt_8_pd7(void);
+void m68k_op_sgt_8_di(void);
+void m68k_op_sgt_8_ix(void);
+void m68k_op_sgt_8_aw(void);
+void m68k_op_sgt_8_al(void);
+void m68k_op_sle_8_ai(void);
+void m68k_op_sle_8_pi(void);
+void m68k_op_sle_8_pi7(void);
+void m68k_op_sle_8_pd(void);
+void m68k_op_sle_8_pd7(void);
+void m68k_op_sle_8_di(void);
+void m68k_op_sle_8_ix(void);
+void m68k_op_sle_8_aw(void);
+void m68k_op_sle_8_al(void);
+void m68k_op_stop(void);
+void m68k_op_sub_8_er_d(void);
+void m68k_op_sub_8_er_ai(void);
+void m68k_op_sub_8_er_pi(void);
+void m68k_op_sub_8_er_pi7(void);
+void m68k_op_sub_8_er_pd(void);
+void m68k_op_sub_8_er_pd7(void);
+void m68k_op_sub_8_er_di(void);
+void m68k_op_sub_8_er_ix(void);
+void m68k_op_sub_8_er_aw(void);
+void m68k_op_sub_8_er_al(void);
+void m68k_op_sub_8_er_pcdi(void);
+void m68k_op_sub_8_er_pcix(void);
+void m68k_op_sub_8_er_i(void);
+void m68k_op_sub_16_er_d(void);
+void m68k_op_sub_16_er_a(void);
+void m68k_op_sub_16_er_ai(void);
+void m68k_op_sub_16_er_pi(void);
+void m68k_op_sub_16_er_pd(void);
+void m68k_op_sub_16_er_di(void);
+void m68k_op_sub_16_er_ix(void);
+void m68k_op_sub_16_er_aw(void);
+void m68k_op_sub_16_er_al(void);
+void m68k_op_sub_16_er_pcdi(void);
+void m68k_op_sub_16_er_pcix(void);
+void m68k_op_sub_16_er_i(void);
+void m68k_op_sub_32_er_d(void);
+void m68k_op_sub_32_er_a(void);
+void m68k_op_sub_32_er_ai(void);
+void m68k_op_sub_32_er_pi(void);
+void m68k_op_sub_32_er_pd(void);
+void m68k_op_sub_32_er_di(void);
+void m68k_op_sub_32_er_ix(void);
+void m68k_op_sub_32_er_aw(void);
+void m68k_op_sub_32_er_al(void);
+void m68k_op_sub_32_er_pcdi(void);
+void m68k_op_sub_32_er_pcix(void);
+void m68k_op_sub_32_er_i(void);
+void m68k_op_sub_8_re_ai(void);
+void m68k_op_sub_8_re_pi(void);
+void m68k_op_sub_8_re_pi7(void);
+void m68k_op_sub_8_re_pd(void);
+void m68k_op_sub_8_re_pd7(void);
+void m68k_op_sub_8_re_di(void);
+void m68k_op_sub_8_re_ix(void);
+void m68k_op_sub_8_re_aw(void);
+void m68k_op_sub_8_re_al(void);
+void m68k_op_sub_16_re_ai(void);
+void m68k_op_sub_16_re_pi(void);
+void m68k_op_sub_16_re_pd(void);
+void m68k_op_sub_16_re_di(void);
+void m68k_op_sub_16_re_ix(void);
+void m68k_op_sub_16_re_aw(void);
+void m68k_op_sub_16_re_al(void);
+void m68k_op_sub_32_re_ai(void);
+void m68k_op_sub_32_re_pi(void);
+void m68k_op_sub_32_re_pd(void);
+void m68k_op_sub_32_re_di(void);
+void m68k_op_sub_32_re_ix(void);
+void m68k_op_sub_32_re_aw(void);
+void m68k_op_sub_32_re_al(void);
+void m68k_op_suba_16_d(void);
+void m68k_op_suba_16_a(void);
+void m68k_op_suba_16_ai(void);
+void m68k_op_suba_16_pi(void);
+void m68k_op_suba_16_pd(void);
+void m68k_op_suba_16_di(void);
+void m68k_op_suba_16_ix(void);
+void m68k_op_suba_16_aw(void);
+void m68k_op_suba_16_al(void);
+void m68k_op_suba_16_pcdi(void);
+void m68k_op_suba_16_pcix(void);
+void m68k_op_suba_16_i(void);
+void m68k_op_suba_32_d(void);
+void m68k_op_suba_32_a(void);
+void m68k_op_suba_32_ai(void);
+void m68k_op_suba_32_pi(void);
+void m68k_op_suba_32_pd(void);
+void m68k_op_suba_32_di(void);
+void m68k_op_suba_32_ix(void);
+void m68k_op_suba_32_aw(void);
+void m68k_op_suba_32_al(void);
+void m68k_op_suba_32_pcdi(void);
+void m68k_op_suba_32_pcix(void);
+void m68k_op_suba_32_i(void);
+void m68k_op_subi_8_d(void);
+void m68k_op_subi_8_ai(void);
+void m68k_op_subi_8_pi(void);
+void m68k_op_subi_8_pi7(void);
+void m68k_op_subi_8_pd(void);
+void m68k_op_subi_8_pd7(void);
+void m68k_op_subi_8_di(void);
+void m68k_op_subi_8_ix(void);
+void m68k_op_subi_8_aw(void);
+void m68k_op_subi_8_al(void);
+void m68k_op_subi_16_d(void);
+void m68k_op_subi_16_ai(void);
+void m68k_op_subi_16_pi(void);
+void m68k_op_subi_16_pd(void);
+void m68k_op_subi_16_di(void);
+void m68k_op_subi_16_ix(void);
+void m68k_op_subi_16_aw(void);
+void m68k_op_subi_16_al(void);
+void m68k_op_subi_32_d(void);
+void m68k_op_subi_32_ai(void);
+void m68k_op_subi_32_pi(void);
+void m68k_op_subi_32_pd(void);
+void m68k_op_subi_32_di(void);
+void m68k_op_subi_32_ix(void);
+void m68k_op_subi_32_aw(void);
+void m68k_op_subi_32_al(void);
+void m68k_op_subq_8_d(void);
+void m68k_op_subq_8_ai(void);
+void m68k_op_subq_8_pi(void);
+void m68k_op_subq_8_pi7(void);
+void m68k_op_subq_8_pd(void);
+void m68k_op_subq_8_pd7(void);
+void m68k_op_subq_8_di(void);
+void m68k_op_subq_8_ix(void);
+void m68k_op_subq_8_aw(void);
+void m68k_op_subq_8_al(void);
+void m68k_op_subq_16_d(void);
+void m68k_op_subq_16_a(void);
+void m68k_op_subq_16_ai(void);
+void m68k_op_subq_16_pi(void);
+void m68k_op_subq_16_pd(void);
+void m68k_op_subq_16_di(void);
+void m68k_op_subq_16_ix(void);
+void m68k_op_subq_16_aw(void);
+void m68k_op_subq_16_al(void);
+void m68k_op_subq_32_d(void);
+void m68k_op_subq_32_a(void);
+void m68k_op_subq_32_ai(void);
+void m68k_op_subq_32_pi(void);
+void m68k_op_subq_32_pd(void);
+void m68k_op_subq_32_di(void);
+void m68k_op_subq_32_ix(void);
+void m68k_op_subq_32_aw(void);
+void m68k_op_subq_32_al(void);
+void m68k_op_subx_8_rr(void);
+void m68k_op_subx_16_rr(void);
+void m68k_op_subx_32_rr(void);
+void m68k_op_subx_8_mm_ax7(void);
+void m68k_op_subx_8_mm_ay7(void);
+void m68k_op_subx_8_mm_axy7(void);
+void m68k_op_subx_8_mm(void);
+void m68k_op_subx_16_mm(void);
+void m68k_op_subx_32_mm(void);
+void m68k_op_swap_32(void);
+void m68k_op_tas_8_d(void);
+void m68k_op_tas_8_ai(void);
+void m68k_op_tas_8_pi(void);
+void m68k_op_tas_8_pi7(void);
+void m68k_op_tas_8_pd(void);
+void m68k_op_tas_8_pd7(void);
+void m68k_op_tas_8_di(void);
+void m68k_op_tas_8_ix(void);
+void m68k_op_tas_8_aw(void);
+void m68k_op_tas_8_al(void);
+void m68k_op_trap(void);
+void m68k_op_trapt(void);
+void m68k_op_trapt_16(void);
+void m68k_op_trapt_32(void);
+void m68k_op_trapf(void);
+void m68k_op_trapf_16(void);
+void m68k_op_trapf_32(void);
+void m68k_op_traphi(void);
+void m68k_op_trapls(void);
+void m68k_op_trapcc(void);
+void m68k_op_trapcs(void);
+void m68k_op_trapne(void);
+void m68k_op_trapeq(void);
+void m68k_op_trapvc(void);
+void m68k_op_trapvs(void);
+void m68k_op_trappl(void);
+void m68k_op_trapmi(void);
+void m68k_op_trapge(void);
+void m68k_op_traplt(void);
+void m68k_op_trapgt(void);
+void m68k_op_traple(void);
+void m68k_op_traphi_16(void);
+void m68k_op_trapls_16(void);
+void m68k_op_trapcc_16(void);
+void m68k_op_trapcs_16(void);
+void m68k_op_trapne_16(void);
+void m68k_op_trapeq_16(void);
+void m68k_op_trapvc_16(void);
+void m68k_op_trapvs_16(void);
+void m68k_op_trappl_16(void);
+void m68k_op_trapmi_16(void);
+void m68k_op_trapge_16(void);
+void m68k_op_traplt_16(void);
+void m68k_op_trapgt_16(void);
+void m68k_op_traple_16(void);
+void m68k_op_traphi_32(void);
+void m68k_op_trapls_32(void);
+void m68k_op_trapcc_32(void);
+void m68k_op_trapcs_32(void);
+void m68k_op_trapne_32(void);
+void m68k_op_trapeq_32(void);
+void m68k_op_trapvc_32(void);
+void m68k_op_trapvs_32(void);
+void m68k_op_trappl_32(void);
+void m68k_op_trapmi_32(void);
+void m68k_op_trapge_32(void);
+void m68k_op_traplt_32(void);
+void m68k_op_trapgt_32(void);
+void m68k_op_traple_32(void);
+void m68k_op_trapv(void);
+void m68k_op_tst_8_d(void);
+void m68k_op_tst_8_ai(void);
+void m68k_op_tst_8_pi(void);
+void m68k_op_tst_8_pi7(void);
+void m68k_op_tst_8_pd(void);
+void m68k_op_tst_8_pd7(void);
+void m68k_op_tst_8_di(void);
+void m68k_op_tst_8_ix(void);
+void m68k_op_tst_8_aw(void);
+void m68k_op_tst_8_al(void);
+void m68k_op_tst_8_pcdi(void);
+void m68k_op_tst_8_pcix(void);
+void m68k_op_tst_8_i(void);
+void m68k_op_tst_16_d(void);
+void m68k_op_tst_16_a(void);
+void m68k_op_tst_16_ai(void);
+void m68k_op_tst_16_pi(void);
+void m68k_op_tst_16_pd(void);
+void m68k_op_tst_16_di(void);
+void m68k_op_tst_16_ix(void);
+void m68k_op_tst_16_aw(void);
+void m68k_op_tst_16_al(void);
+void m68k_op_tst_16_pcdi(void);
+void m68k_op_tst_16_pcix(void);
+void m68k_op_tst_16_i(void);
+void m68k_op_tst_32_d(void);
+void m68k_op_tst_32_a(void);
+void m68k_op_tst_32_ai(void);
+void m68k_op_tst_32_pi(void);
+void m68k_op_tst_32_pd(void);
+void m68k_op_tst_32_di(void);
+void m68k_op_tst_32_ix(void);
+void m68k_op_tst_32_aw(void);
+void m68k_op_tst_32_al(void);
+void m68k_op_tst_32_pcdi(void);
+void m68k_op_tst_32_pcix(void);
+void m68k_op_tst_32_i(void);
+void m68k_op_unlk_32_a7(void);
+void m68k_op_unlk_32(void);
+void m68k_op_unpk_16_rr(void);
+void m68k_op_unpk_16_mm_ax7(void);
+void m68k_op_unpk_16_mm_ay7(void);
+void m68k_op_unpk_16_mm_axy7(void);
+void m68k_op_unpk_16_mm(void);
+/* Build the opcode handler table */
+void m68ki_build_opcode_table(void);
+
+extern void (*m68ki_instruction_jump_table[0x10000])(void); /* opcode handler jump table */
+extern unsigned char m68ki_cycles[][0x10000];
+
+
+/* ======================================================================== */
+/* ============================== END OF FILE ============================= */
+/* ======================================================================== */
+
+#endif /* M68KOPS__HEADER */
+
+
diff --git a/Src/CPU/68K/Musashi/generated/m68kops.o b/Src/CPU/68K/Musashi/generated/m68kops.o
new file mode 100644
index 0000000..45c84c9
Binary files /dev/null and b/Src/CPU/68K/Musashi/generated/m68kops.o differ
diff --git a/Src/CPU/68K/Musashi/m68k.h b/Src/CPU/68K/Musashi/m68k.h
new file mode 100644
index 0000000..3f31ff0
--- /dev/null
+++ b/Src/CPU/68K/Musashi/m68k.h
@@ -0,0 +1,395 @@
+/**
+ ** Supermodel
+ ** A Sega Model 3 Arcade Emulator.
+ ** Copyright 2011 Bart Trzynadlowski, Nik Henson
+ **
+ ** This file is part of Supermodel.
+ **
+ ** Supermodel is free software: you can redistribute it and/or modify it under
+ ** the terms of the GNU General Public License as published by the Free
+ ** Software Foundation, either version 3 of the License, or (at your option)
+ ** any later version.
+ **
+ ** Supermodel is distributed in the hope that it will be useful, but WITHOUT
+ ** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ ** FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ ** more details.
+ **
+ ** You should have received a copy of the GNU General Public License along
+ ** with Supermodel. If not, see .
+ **/
+
+/*
+ * m68k.h
+ *
+ * Header file for the Musashi 68K emulator.
+ *
+ * Permission was obtained from Karl Stenerud to apply the GPL license to this
+ * code.
+ */
+
+#ifndef M68K__HEADER
+#define M68K__HEADER
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* ======================================================================== */
+/* ========================= LICENSING & COPYRIGHT ======================== */
+/* ======================================================================== */
+/*
+ * MUSASHI
+ * Version 3.3
+ *
+ * A portable Motorola M680x0 processor emulation engine.
+ * Copyright 1998-2001 Karl Stenerud. All rights reserved.
+ *
+ * This code may be freely used for non-commercial purposes as long as this
+ * copyright notice remains unaltered in the source code and any binary files
+ * containing this code in compiled form.
+ *
+ * All other lisencing terms must be negotiated with the author
+ * (Karl Stenerud).
+ *
+ * The latest version of this code can be obtained at:
+ * http://kstenerud.cjb.net
+ */
+
+/* ======================================================================== */
+/* ============================ GENERAL DEFINES =========================== */
+
+/* ======================================================================== */
+
+/* There are 7 levels of interrupt to the 68K.
+ * A transition from < 7 to 7 will cause a non-maskable interrupt (NMI).
+ */
+#define M68K_IRQ_NONE 0
+#define M68K_IRQ_1 1
+#define M68K_IRQ_2 2
+#define M68K_IRQ_3 3
+#define M68K_IRQ_4 4
+#define M68K_IRQ_5 5
+#define M68K_IRQ_6 6
+#define M68K_IRQ_7 7
+
+
+/* Special interrupt acknowledge values.
+ * Use these as special returns from the interrupt acknowledge callback
+ * (specified later in this header).
+ */
+
+/* Causes an interrupt autovector (0x18 + interrupt level) to be taken.
+ * This happens in a real 68K if VPA or AVEC is asserted during an interrupt
+ * acknowledge cycle instead of DTACK.
+ */
+#define M68K_INT_ACK_AUTOVECTOR 0xffffffff
+
+/* Causes the spurious interrupt vector (0x18) to be taken
+ * This happens in a real 68K if BERR is asserted during the interrupt
+ * acknowledge cycle (i.e. no devices responded to the acknowledge).
+ */
+#define M68K_INT_ACK_SPURIOUS 0xfffffffe
+
+
+/* CPU types for use in m68k_set_cpu_type() */
+enum
+{
+ M68K_CPU_TYPE_INVALID,
+ M68K_CPU_TYPE_68000,
+ M68K_CPU_TYPE_68008,
+ M68K_CPU_TYPE_68010,
+ M68K_CPU_TYPE_68EC020,
+ M68K_CPU_TYPE_68020,
+ M68K_CPU_TYPE_68030, /* Supported by disassembler ONLY */
+ M68K_CPU_TYPE_68040 /* Supported by disassembler ONLY */
+};
+
+/* Registers used by m68k_get_reg() and m68k_set_reg() */
+typedef enum
+{
+ /* Real registers */
+ M68K_REG_D0, /* Data registers */
+ M68K_REG_D1,
+ M68K_REG_D2,
+ M68K_REG_D3,
+ M68K_REG_D4,
+ M68K_REG_D5,
+ M68K_REG_D6,
+ M68K_REG_D7,
+ M68K_REG_A0, /* Address registers */
+ M68K_REG_A1,
+ M68K_REG_A2,
+ M68K_REG_A3,
+ M68K_REG_A4,
+ M68K_REG_A5,
+ M68K_REG_A6,
+ M68K_REG_A7,
+ M68K_REG_PC, /* Program Counter */
+ M68K_REG_SR, /* Status Register */
+ M68K_REG_SP, /* The current Stack Pointer (located in A7) */
+ M68K_REG_USP, /* User Stack Pointer */
+ M68K_REG_ISP, /* Interrupt Stack Pointer */
+ M68K_REG_MSP, /* Master Stack Pointer */
+ M68K_REG_SFC, /* Source Function Code */
+ M68K_REG_DFC, /* Destination Function Code */
+ M68K_REG_VBR, /* Vector Base Register */
+ M68K_REG_CACR, /* Cache Control Register */
+ M68K_REG_CAAR, /* Cache Address Register */
+
+ /* Assumed registers */
+ /* These are cheat registers which emulate the 1-longword prefetch
+ * present in the 68000 and 68010.
+ */
+ M68K_REG_PREF_ADDR, /* Last prefetch address */
+ M68K_REG_PREF_DATA, /* Last prefetch data */
+
+ /* Convenience registers */
+ M68K_REG_PPC, /* Previous value in the program counter */
+ M68K_REG_IR, /* Instruction register */
+ M68K_REG_CPU_TYPE /* Type of CPU being run */
+} m68k_register_t;
+
+/* ======================================================================== */
+/* ====================== FUNCTIONS CALLED BY THE CPU ===================== */
+/* ======================================================================== */
+
+/* You will have to implement these functions */
+
+/* read/write functions called by the CPU to access memory.
+ * while values used are 32 bits, only the appropriate number
+ * of bits are relevant (i.e. in write_memory_8, only the lower 8 bits
+ * of value should be written to memory).
+ *
+ * NOTE: I have separated the immediate and PC-relative memory fetches
+ * from the other memory fetches because some systems require
+ * differentiation between PROGRAM and DATA fetches (usually
+ * for security setups such as encryption).
+ * This separation can either be achieved by setting
+ * M68K_SEPARATE_READS in m68kconf.h and defining
+ * the read functions, or by setting M68K_EMULATE_FC and
+ * making a function code callback function.
+ * Using the callback offers better emulation coverage
+ * because you can also monitor whether the CPU is in SYSTEM or
+ * USER mode, but it is also slower.
+ */
+
+/* Read from anywhere */
+unsigned int m68k_read_memory_8(unsigned int address);
+unsigned int m68k_read_memory_16(unsigned int address);
+unsigned int m68k_read_memory_32(unsigned int address);
+
+/* Read data immediately following the PC */
+unsigned int m68k_read_immediate_16(unsigned int address);
+unsigned int m68k_read_immediate_32(unsigned int address);
+
+/* Read data relative to the PC */
+unsigned int m68k_read_pcrelative_8(unsigned int address);
+unsigned int m68k_read_pcrelative_16(unsigned int address);
+unsigned int m68k_read_pcrelative_32(unsigned int address);
+
+/* Memory access for the disassembler */
+unsigned int m68k_read_disassembler_8 (unsigned int address);
+unsigned int m68k_read_disassembler_16 (unsigned int address);
+unsigned int m68k_read_disassembler_32 (unsigned int address);
+
+/* Write to anywhere */
+void m68k_write_memory_8(unsigned int address, unsigned int value);
+void m68k_write_memory_16(unsigned int address, unsigned int value);
+void m68k_write_memory_32(unsigned int address, unsigned int value);
+
+/* Special call to simulate undocumented 68k behavior when move.l with a
+ * predecrement destination mode is executed.
+ * To simulate real 68k behavior, first write the high word to
+ * [address+2], and then write the low word to [address].
+ *
+ * Enable this functionality with M68K_SIMULATE_PD_WRITES in m68kconf.h.
+ */
+void m68k_write_memory_32_pd(unsigned int address, unsigned int value);
+
+
+
+/* ======================================================================== */
+/* ============================== CALLBACKS =============================== */
+/* ======================================================================== */
+
+/* These functions allow you to set callbacks to the host when specific events
+ * occur. Note that you must enable the corresponding value in m68kconf.h
+ * in order for these to do anything useful.
+ * Note: I have defined default callbacks which are used if you have enabled
+ * the corresponding #define in m68kconf.h but either haven't assigned a
+ * callback or have assigned a callback of NULL.
+ */
+
+/* Set the callback for an interrupt acknowledge.
+ * You must enable M68K_EMULATE_INT_ACK in m68kconf.h.
+ * The CPU will call the callback with the interrupt level being acknowledged.
+ * The host program must return either a vector from 0x02-0xff, or one of the
+ * special interrupt acknowledge values specified earlier in this header.
+ * If this is not implemented, the CPU will always assume an autovectored
+ * interrupt, and will automatically clear the interrupt request when it
+ * services the interrupt.
+ * Default behavior: return M68K_INT_ACK_AUTOVECTOR.
+ */
+void m68k_set_int_ack_callback(int (*callback)(int int_level));
+
+
+/* Set the callback for a breakpoint acknowledge (68010+).
+ * You must enable M68K_EMULATE_BKPT_ACK in m68kconf.h.
+ * The CPU will call the callback with whatever was in the data field of the
+ * BKPT instruction for 68020+, or 0 for 68010.
+ * Default behavior: do nothing.
+ */
+void m68k_set_bkpt_ack_callback(void (*callback)(unsigned int data));
+
+
+/* Set the callback for the RESET instruction.
+ * You must enable M68K_EMULATE_RESET in m68kconf.h.
+ * The CPU calls this callback every time it encounters a RESET instruction.
+ * Default behavior: do nothing.
+ */
+void m68k_set_reset_instr_callback(void (*callback)(void));
+
+
+/* Set the callback for the CMPI.L #v, Dn instruction.
+ * You must enable M68K_CMPILD_HAS_CALLBACK in m68kconf.h.
+ * The CPU calls this callback every time it encounters a CMPI.L #v, Dn instruction.
+ * Default behavior: do nothing.
+ */
+void m68k_set_cmpild_instr_callback(void (*callback)(unsigned int val, int reg));
+
+
+/* Set the callback for the RTE instruction.
+ * You must enable M68K_RTE_HAS_CALLBACK in m68kconf.h.
+ * The CPU calls this callback every time it encounters a RTE instruction.
+ * Default behavior: do nothing.
+ */
+void m68k_set_rte_instr_callback(void (*callback)(void));
+
+
+/* Set the callback for informing of a large PC change.
+ * You must enable M68K_MONITOR_PC in m68kconf.h.
+ * The CPU calls this callback with the new PC value every time the PC changes
+ * by a large value (currently set for changes by longwords).
+ * Default behavior: do nothing.
+ */
+void m68k_set_pc_changed_callback(void (*callback)(unsigned int new_pc));
+
+
+/* Set the callback for CPU function code changes.
+ * You must enable M68K_EMULATE_FC in m68kconf.h.
+ * The CPU calls this callback with the function code before every memory
+ * access to set the CPU's function code according to what kind of memory
+ * access it is (supervisor/user, program/data and such).
+ * Default behavior: do nothing.
+ */
+void m68k_set_fc_callback(void (*callback)(unsigned int new_fc));
+
+
+/* Set a callback for the instruction cycle of the CPU.
+ * You must enable M68K_INSTRUCTION_HOOK in m68kconf.h.
+ * The CPU calls this callback just before fetching the opcode in the
+ * instruction cycle.
+ * Default behavior: do nothing.
+ */
+void m68k_set_instr_hook_callback(void (*callback)(void));
+
+
+
+/* ======================================================================== */
+/* ====================== FUNCTIONS TO ACCESS THE CPU ===================== */
+/* ======================================================================== */
+
+/* Use this function to set the CPU type you want to emulate.
+ * Currently supported types are: M68K_CPU_TYPE_68000, M68K_CPU_TYPE_68008,
+ * M68K_CPU_TYPE_68010, M68K_CPU_TYPE_EC020, and M68K_CPU_TYPE_68020.
+ */
+void m68k_set_cpu_type(unsigned int cpu_type);
+
+/* Do whatever initialisations the core requires. Should be called
+ * at least once at init time.
+ */
+void m68k_init(void);
+
+/* Pulse the RESET pin on the CPU.
+ * You *MUST* reset the CPU at least once to initialize the emulation
+ * Note: If you didn't call m68k_set_cpu_type() before resetting
+ * the CPU for the first time, the CPU will be set to
+ * M68K_CPU_TYPE_68000.
+ */
+void m68k_pulse_reset(void);
+
+/* execute num_cycles worth of instructions. returns number of cycles used */
+int m68k_execute(int num_cycles);
+
+/* These functions let you read/write/modify the number of cycles left to run
+ * while m68k_execute() is running.
+ * These are useful if the 68k accesses a memory-mapped port on another device
+ * that requires immediate processing by another CPU.
+ */
+int m68k_cycles_run(void); /* Number of cycles run so far */
+int m68k_cycles_remaining(void); /* Number of cycles left */
+void m68k_modify_timeslice(int cycles); /* Modify cycles left */
+void m68k_end_timeslice(void); /* End timeslice now */
+
+/* Set the IPL0-IPL2 pins on the CPU (IRQ).
+ * A transition from < 7 to 7 will cause a non-maskable interrupt (NMI).
+ * Setting IRQ to 0 will clear an interrupt request.
+ */
+void m68k_set_irq(unsigned int int_level);
+
+
+/* Halt the CPU as if you pulsed the HALT pin. */
+void m68k_pulse_halt(void);
+
+
+/* Context switching to allow multiple CPUs */
+
+/* Get the size of the cpu context in bytes */
+unsigned int m68k_context_size(void);
+
+/* Get a cpu context */
+unsigned int m68k_get_context(void* dst);
+
+/* set the current cpu context */
+void m68k_set_context(void* dst);
+
+/* Register the CPU state information */
+void m68k_state_register(const char *type);
+
+
+/* Peek at the internals of a CPU context. This can either be a context
+ * retrieved using m68k_get_context() or the currently running context.
+ * If context is NULL, the currently running CPU context will be used.
+ */
+unsigned int m68k_get_reg(void* context, m68k_register_t reg);
+
+/* Poke values into the internals of the currently running CPU context */
+void m68k_set_reg(m68k_register_t reg, unsigned int value);
+
+/* Check if an instruction is valid for the specified CPU type */
+unsigned int m68k_is_valid_instruction(unsigned int instruction, unsigned int cpu_type);
+
+/* Disassemble 1 instruction using the epecified CPU type at pc. Stores
+ * disassembly in str_buff and returns the size of the instruction in bytes.
+ */
+unsigned int m68k_disassemble(char* str_buff, unsigned int pc, unsigned int cpu_type);
+
+
+/* ======================================================================== */
+/* ============================= CONFIGURATION ============================ */
+/* ======================================================================== */
+
+/* Import the configuration for this build */
+#include "m68kconf.h"
+
+
+/* ======================================================================== */
+/* ============================== END OF FILE ============================= */
+/* ======================================================================== */
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* M68K__HEADER */
diff --git a/Src/CPU/68K/Musashi/m68k_in.c b/Src/CPU/68K/Musashi/m68k_in.c
new file mode 100644
index 0000000..da8a863
--- /dev/null
+++ b/Src/CPU/68K/Musashi/m68k_in.c
@@ -0,0 +1,10489 @@
+/**
+ ** Supermodel
+ ** A Sega Model 3 Arcade Emulator.
+ ** Copyright 2011 Bart Trzynadlowski, Nik Henson
+ **
+ ** This file is part of Supermodel.
+ **
+ ** Supermodel is free software: you can redistribute it and/or modify it under
+ ** the terms of the GNU General Public License as published by the Free
+ ** Software Foundation, either version 3 of the License, or (at your option)
+ ** any later version.
+ **
+ ** Supermodel is distributed in the hope that it will be useful, but WITHOUT
+ ** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ ** FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ ** more details.
+ **
+ ** You should have received a copy of the GNU General Public License along
+ ** with Supermodel. If not, see .
+ **/
+
+/*
+ * m68k_in.c
+ *
+ * Input file to m68kmake, the Musashi code generator.
+ *
+ * Permission was obtained from Karl Stenerud to apply the GPL license to this
+ * code.
+ */
+
+/*
+must fix:
+ callm
+ chk
+*/
+/* ======================================================================== */
+/* ========================= LICENSING & COPYRIGHT ======================== */
+/* ======================================================================== */
+/*
+ * MUSASHI
+ * Version 3.3
+ *
+ * A portable Motorola M680x0 processor emulation engine.
+ * Copyright 1998-2001 Karl Stenerud. All rights reserved.
+ *
+ * This code may be freely used for non-commercial purposes as long as this
+ * copyright notice remains unaltered in the source code and any binary files
+ * containing this code in compiled form.
+ *
+ * All other lisencing terms must be negotiated with the author
+ * (Karl Stenerud).
+ *
+ * The latest version of this code can be obtained at:
+ * http://kstenerud.cjb.net
+ */
+
+/* Special thanks to Bart Trzynadlowski for his insight into the
+ * undocumented features of this chip:
+ *
+ * http://dynarec.com/~bart/files/68knotes.txt
+ */
+
+
+/* Input file for m68kmake
+ * -----------------------
+ *
+ * All sections begin with 80 X's in a row followed by an end-of-line
+ * sequence.
+ * After this, m68kmake will expect to find one of the following section
+ * identifiers:
+ * M68KMAKE_PROTOTYPE_HEADER - header for opcode handler prototypes
+ * M68KMAKE_PROTOTYPE_FOOTER - footer for opcode handler prototypes
+ * M68KMAKE_TABLE_HEADER - header for opcode handler jumptable
+ * M68KMAKE_TABLE_FOOTER - footer for opcode handler jumptable
+ * M68KMAKE_TABLE_BODY - the table itself
+ * M68KMAKE_OPCODE_HANDLER_HEADER - header for opcode handler implementation
+ * M68KMAKE_OPCODE_HANDLER_FOOTER - footer for opcode handler implementation
+ * M68KMAKE_OPCODE_HANDLER_BODY - body section for opcode handler implementation
+ *
+ * NOTE: M68KMAKE_OPCODE_HANDLER_BODY must be last in the file and
+ * M68KMAKE_TABLE_BODY must be second last in the file.
+ *
+ * The M68KMAKE_OPHANDLER_BODY section contains the opcode handler
+ * primitives themselves. Each opcode handler begins with:
+ * M68KMAKE_OP(A, B, C, D)
+ *
+ * where A is the opcode handler name, B is the size of the operation,
+ * C denotes any special processing mode, and D denotes a specific
+ * addressing mode.
+ * For C and D where nothing is specified, use "."
+ *
+ * Example:
+ * M68KMAKE_OP(abcd, 8, rr, .) abcd, size 8, register to register, default EA
+ * M68KMAKE_OP(abcd, 8, mm, ax7) abcd, size 8, memory to memory, register X is A7
+ * M68KMAKE_OP(tst, 16, ., pcix) tst, size 16, PCIX addressing
+ *
+ * All opcode handler primitives end with a closing curly brace "}" at column 1
+ *
+ * NOTE: Do not place a M68KMAKE_OP() directive inside the opcode handler,
+ * and do not put a closing curly brace at column 1 unless it is
+ * marking the end of the handler!
+ *
+ * Inside the handler, m68kmake will recognize M68KMAKE_GET_OPER_xx_xx,
+ * M68KMAKE_GET_EA_xx_xx, and M68KMAKE_CC directives, and create multiple
+ * opcode handlers to handle variations in the opcode handler.
+ * Note: M68KMAKE_CC will only be interpreted in condition code opcodes.
+ * As well, M68KMAKE_GET_EA_xx_xx and M68KMAKE_GET_OPER_xx_xx will only
+ * be interpreted on instructions where the corresponding table entry
+ * specifies multiple effective addressing modes.
+ * Example:
+ * clr 32 . . 0100001010...... A+-DXWL... U U U 12 6 4
+ *
+ * This table entry says that the clr.l opcde has 7 variations (A+-DXWL).
+ * It is run in user or supervisor mode for all CPUs, and uses 12 cycles for
+ * 68000, 6 cycles for 68010, and 4 cycles for 68020.
+ */
+
+XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
+M68KMAKE_PROTOTYPE_HEADER
+
+#ifndef M68KOPS__HEADER
+#define M68KOPS__HEADER
+
+/* ======================================================================== */
+/* ============================ OPCODE HANDLERS =========================== */
+/* ======================================================================== */
+
+
+
+XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
+M68KMAKE_PROTOTYPE_FOOTER
+
+
+/* Build the opcode handler table */
+void m68ki_build_opcode_table(void);
+
+extern void (*m68ki_instruction_jump_table[0x10000])(void); /* opcode handler jump table */
+extern unsigned char m68ki_cycles[][0x10000];
+
+
+/* ======================================================================== */
+/* ============================== END OF FILE ============================= */
+/* ======================================================================== */
+
+#endif /* M68KOPS__HEADER */
+
+
+
+XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
+M68KMAKE_TABLE_HEADER
+
+/* ======================================================================== */
+/* ========================= OPCODE TABLE BUILDER ========================= */
+/* ======================================================================== */
+
+#include "m68kops.h"
+
+#define NUM_CPU_TYPES 3
+
+void (*m68ki_instruction_jump_table[0x10000])(void); /* opcode handler jump table */
+unsigned char m68ki_cycles[NUM_CPU_TYPES][0x10000]; /* Cycles used by CPU type */
+
+/* This is used to generate the opcode handler jump table */
+typedef struct
+{
+ void (*opcode_handler)(void); /* handler function */
+ unsigned int mask; /* mask on opcode */
+ unsigned int match; /* what to match after masking */
+ unsigned char cycles[NUM_CPU_TYPES]; /* cycles each cpu type takes */
+} opcode_handler_struct;
+
+
+/* Opcode handler table */
+static opcode_handler_struct m68k_opcode_handler_table[] =
+{
+/* function mask match 000 010 020 */
+
+
+
+XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
+M68KMAKE_TABLE_FOOTER
+
+ {0, 0, 0, {0, 0, 0}}
+};
+
+
+/* Build the opcode handler jump table */
+void m68ki_build_opcode_table(void)
+{
+ opcode_handler_struct *ostruct;
+ int instr;
+ int i;
+ int j;
+ int k;
+
+ for(i = 0; i < 0x10000; i++)
+ {
+ /* default to illegal */
+ m68ki_instruction_jump_table[i] = m68k_op_illegal;
+ for(k=0;kmask != 0xff00)
+ {
+ for(i = 0;i < 0x10000;i++)
+ {
+ if((i & ostruct->mask) == ostruct->match)
+ {
+ m68ki_instruction_jump_table[i] = ostruct->opcode_handler;
+ for(k=0;kcycles[k];
+ }
+ }
+ ostruct++;
+ }
+ while(ostruct->mask == 0xff00)
+ {
+ for(i = 0;i <= 0xff;i++)
+ {
+ m68ki_instruction_jump_table[ostruct->match | i] = ostruct->opcode_handler;
+ for(k=0;kmatch | i] = ostruct->cycles[k];
+ }
+ ostruct++;
+ }
+ while(ostruct->mask == 0xf1f8)
+ {
+ for(i = 0;i < 8;i++)
+ {
+ for(j = 0;j < 8;j++)
+ {
+ instr = ostruct->match | (i << 9) | j;
+ m68ki_instruction_jump_table[instr] = ostruct->opcode_handler;
+ for(k=0;kcycles[k];
+ if((instr & 0xf000) == 0xe000 && (!(instr & 0x20)))
+ m68ki_cycles[0][instr] = m68ki_cycles[1][instr] = ostruct->cycles[k] + ((((j-1)&7)+1)<<1);
+ }
+ }
+ ostruct++;
+ }
+ while(ostruct->mask == 0xfff0)
+ {
+ for(i = 0;i <= 0x0f;i++)
+ {
+ m68ki_instruction_jump_table[ostruct->match | i] = ostruct->opcode_handler;
+ for(k=0;kmatch | i] = ostruct->cycles[k];
+ }
+ ostruct++;
+ }
+ while(ostruct->mask == 0xf1ff)
+ {
+ for(i = 0;i <= 0x07;i++)
+ {
+ m68ki_instruction_jump_table[ostruct->match | (i << 9)] = ostruct->opcode_handler;
+ for(k=0;kmatch | (i << 9)] = ostruct->cycles[k];
+ }
+ ostruct++;
+ }
+ while(ostruct->mask == 0xfff8)
+ {
+ for(i = 0;i <= 0x07;i++)
+ {
+ m68ki_instruction_jump_table[ostruct->match | i] = ostruct->opcode_handler;
+ for(k=0;kmatch | i] = ostruct->cycles[k];
+ }
+ ostruct++;
+ }
+ while(ostruct->mask == 0xffff)
+ {
+ m68ki_instruction_jump_table[ostruct->match] = ostruct->opcode_handler;
+ for(k=0;kmatch] = ostruct->cycles[k];
+ ostruct++;
+ }
+}
+
+
+/* ======================================================================== */
+/* ============================== END OF FILE ============================= */
+/* ======================================================================== */
+
+
+
+XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
+M68KMAKE_OPCODE_HANDLER_HEADER
+
+#include "m68kcpu.h"
+
+/* ======================================================================== */
+/* ========================= INSTRUCTION HANDLERS ========================= */
+/* ======================================================================== */
+
+
+
+XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
+M68KMAKE_OPCODE_HANDLER_FOOTER
+
+/* ======================================================================== */
+/* ============================== END OF FILE ============================= */
+/* ======================================================================== */
+
+
+
+XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
+M68KMAKE_TABLE_BODY
+
+The following table is arranged as follows:
+
+name: Opcode mnemonic
+
+size: Operation size
+
+spec proc: Special processing mode:
+ .: normal
+ s: static operand
+ r: register operand
+ rr: register to register
+ mm: memory to memory
+ er: effective address to register
+ re: register to effective address
+ dd: data register to data register
+ da: data register to address register
+ aa: address register to address register
+ cr: control register to register
+ rc: register to control register
+ toc: to condition code register
+ tos: to status register
+ tou: to user stack pointer
+ frc: from condition code register
+ frs: from status register
+ fru: from user stack pointer
+ * for move.x, the special processing mode is a specific
+ destination effective addressing mode.
+
+spec ea: Specific effective addressing mode:
+ .: normal
+ i: immediate
+ d: data register
+ a: address register
+ ai: address register indirect
+ pi: address register indirect with postincrement
+ pd: address register indirect with predecrement
+ di: address register indirect with displacement
+ ix: address register indirect with index
+ aw: absolute word address
+ al: absolute long address
+ pcdi: program counter relative with displacement
+ pcix: program counter relative with index
+ a7: register specified in instruction is A7
+ ax7: register field X of instruction is A7
+ ay7: register field Y of instruction is A7
+ axy7: register fields X and Y of instruction are A7
+
+bit pattern: Pattern to recognize this opcode. "." means don't care.
+
+allowed ea: List of allowed addressing modes:
+ .: not present
+ A: address register indirect
+ +: ARI (address register indirect) with postincrement
+ -: ARI with predecrement
+ D: ARI with displacement
+ X: ARI with index
+ W: absolute word address
+ L: absolute long address
+ d: program counter indirect with displacement
+ x: program counter indirect with index
+ I: immediate
+mode: CPU operating mode for each cpu type. U = user or supervisor,
+ S = supervisor only, "." = opcode not present.
+
+cpu cycles: Base number of cycles required to execute this opcode on the
+ specified CPU type.
+ Use "." if CPU does not have this opcode.
+
+
+
+ spec spec allowed ea mode cpu cycles
+name size proc ea bit pattern A+-DXWLdxI 0 1 2 000 010 020 comments
+====== ==== ==== ==== ================ ========== = = = === === === =============
+M68KMAKE_TABLE_START
+1010 0 . . 1010............ .......... U U U 4 4 4
+1111 0 . . 1111............ .......... U U U 4 4 4
+abcd 8 rr . 1100...100000... .......... U U U 6 6 4
+abcd 8 mm ax7 1100111100001... .......... U U U 18 18 16
+abcd 8 mm ay7 1100...100001111 .......... U U U 18 18 16
+abcd 8 mm axy7 1100111100001111 .......... U U U 18 18 16
+abcd 8 mm . 1100...100001... .......... U U U 18 18 16
+add 8 er d 1101...000000... .......... U U U 4 4 2
+add 8 er . 1101...000...... A+-DXWLdxI U U U 4 4 2
+add 16 er d 1101...001000... .......... U U U 4 4 2
+add 16 er a 1101...001001... .......... U U U 4 4 2
+add 16 er . 1101...001...... A+-DXWLdxI U U U 4 4 2
+add 32 er d 1101...010000... .......... U U U 6 6 2
+add 32 er a 1101...010001... .......... U U U 6 6 2
+add 32 er . 1101...010...... A+-DXWLdxI U U U 6 6 2
+add 8 re . 1101...100...... A+-DXWL... U U U 8 8 4
+add 16 re . 1101...101...... A+-DXWL... U U U 8 8 4
+add 32 re . 1101...110...... A+-DXWL... U U U 12 12 4
+adda 16 . d 1101...011000... .......... U U U 8 8 2
+adda 16 . a 1101...011001... .......... U U U 8 8 2
+adda 16 . . 1101...011...... A+-DXWLdxI U U U 8 8 2
+adda 32 . d 1101...111000... .......... U U U 6 6 2
+adda 32 . a 1101...111001... .......... U U U 6 6 2
+adda 32 . . 1101...111...... A+-DXWLdxI U U U 6 6 2
+addi 8 . d 0000011000000... .......... U U U 8 8 2
+addi 8 . . 0000011000...... A+-DXWL... U U U 12 12 4
+addi 16 . d 0000011001000... .......... U U U 8 8 2
+addi 16 . . 0000011001...... A+-DXWL... U U U 12 12 4
+addi 32 . d 0000011010000... .......... U U U 16 14 2
+addi 32 . . 0000011010...... A+-DXWL... U U U 20 20 4
+addq 8 . d 0101...000000... .......... U U U 4 4 2
+addq 8 . . 0101...000...... A+-DXWL... U U U 8 8 4
+addq 16 . d 0101...001000... .......... U U U 4 4 2
+addq 16 . a 0101...001001... .......... U U U 4 4 2
+addq 16 . . 0101...001...... A+-DXWL... U U U 8 8 4
+addq 32 . d 0101...010000... .......... U U U 8 8 2
+addq 32 . a 0101...010001... .......... U U U 8 8 2
+addq 32 . . 0101...010...... A+-DXWL... U U U 12 12 4
+addx 8 rr . 1101...100000... .......... U U U 4 4 2
+addx 16 rr . 1101...101000... .......... U U U 4 4 2
+addx 32 rr . 1101...110000... .......... U U U 8 6 2
+addx 8 mm ax7 1101111100001... .......... U U U 18 18 12
+addx 8 mm ay7 1101...100001111 .......... U U U 18 18 12
+addx 8 mm axy7 1101111100001111 .......... U U U 18 18 12
+addx 8 mm . 1101...100001... .......... U U U 18 18 12
+addx 16 mm . 1101...101001... .......... U U U 18 18 12
+addx 32 mm . 1101...110001... .......... U U U 30 30 12
+and 8 er d 1100...000000... .......... U U U 4 4 2
+and 8 er . 1100...000...... A+-DXWLdxI U U U 4 4 2
+and 16 er d 1100...001000... .......... U U U 4 4 2
+and 16 er . 1100...001...... A+-DXWLdxI U U U 4 4 2
+and 32 er d 1100...010000... .......... U U U 6 6 2
+and 32 er . 1100...010...... A+-DXWLdxI U U U 6 6 2
+and 8 re . 1100...100...... A+-DXWL... U U U 8 8 4
+and 16 re . 1100...101...... A+-DXWL... U U U 8 8 4
+and 32 re . 1100...110...... A+-DXWL... U U U 12 12 4
+andi 16 toc . 0000001000111100 .......... U U U 20 16 12
+andi 16 tos . 0000001001111100 .......... S S S 20 16 12
+andi 8 . d 0000001000000... .......... U U U 8 8 2
+andi 8 . . 0000001000...... A+-DXWL... U U U 12 12 4
+andi 16 . d 0000001001000... .......... U U U 8 8 2
+andi 16 . . 0000001001...... A+-DXWL... U U U 12 12 4
+andi 32 . d 0000001010000... .......... U U U 14 14 2
+andi 32 . . 0000001010...... A+-DXWL... U U U 20 20 4
+asr 8 s . 1110...000000... .......... U U U 6 6 6
+asr 16 s . 1110...001000... .......... U U U 6 6 6
+asr 32 s . 1110...010000... .......... U U U 8 8 6
+asr 8 r . 1110...000100... .......... U U U 6 6 6
+asr 16 r . 1110...001100... .......... U U U 6 6 6
+asr 32 r . 1110...010100... .......... U U U 8 8 6
+asr 16 . . 1110000011...... A+-DXWL... U U U 8 8 5
+asl 8 s . 1110...100000... .......... U U U 6 6 8
+asl 16 s . 1110...101000... .......... U U U 6 6 8
+asl 32 s . 1110...110000... .......... U U U 8 8 8
+asl 8 r . 1110...100100... .......... U U U 6 6 8
+asl 16 r . 1110...101100... .......... U U U 6 6 8
+asl 32 r . 1110...110100... .......... U U U 8 8 8
+asl 16 . . 1110000111...... A+-DXWL... U U U 8 8 6
+bcc 8 . . 0110............ .......... U U U 8 8 6
+bcc 16 . . 0110....00000000 .......... U U U 10 10 6
+bcc 32 . . 0110....11111111 .......... . . U . . 6
+bchg 8 r . 0000...101...... A+-DXWL... U U U 8 8 4
+bchg 32 r d 0000...101000... .......... U U U 8 8 4
+bchg 8 s . 0000100001...... A+-DXWL... U U U 12 12 4
+bchg 32 s d 0000100001000... .......... U U U 12 12 4
+bclr 8 r . 0000...110...... A+-DXWL... U U U 8 10 4
+bclr 32 r d 0000...110000... .......... U U U 10 10 4
+bclr 8 s . 0000100010...... A+-DXWL... U U U 12 12 4
+bclr 32 s d 0000100010000... .......... U U U 14 14 4
+bfchg 32 . d 1110101011000... .......... . . U . . 12 timing not quite correct
+bfchg 32 . . 1110101011...... A..DXWL... . . U . . 20
+bfclr 32 . d 1110110011000... .......... . . U . . 12
+bfclr 32 . . 1110110011...... A..DXWL... . . U . . 20
+bfexts 32 . d 1110101111000... .......... . . U . . 8
+bfexts 32 . . 1110101111...... A..DXWLdx. . . U . . 15
+bfextu 32 . d 1110100111000... .......... . . U . . 8
+bfextu 32 . . 1110100111...... A..DXWLdx. . . U . . 15
+bfffo 32 . d 1110110111000... .......... . . U . . 18
+bfffo 32 . . 1110110111...... A..DXWLdx. . . U . . 28
+bfins 32 . d 1110111111000... .......... . . U . . 10
+bfins 32 . . 1110111111...... A..DXWL... . . U . . 17
+bfset 32 . d 1110111011000... .......... . . U . . 12
+bfset 32 . . 1110111011...... A..DXWL... . . U . . 20
+bftst 32 . d 1110100011000... .......... . . U . . 6
+bftst 32 . . 1110100011...... A..DXWLdx. . . U . . 13
+bkpt 0 . . 0100100001001... .......... . U U . 10 10
+bra 8 . . 01100000........ .......... U U U 10 10 10
+bra 16 . . 0110000000000000 .......... U U U 10 10 10
+bra 32 . . 0110000011111111 .......... U U U . . 10
+bset 32 r d 0000...111000... .......... U U U 8 8 4
+bset 8 r . 0000...111...... A+-DXWL... U U U 8 8 4
+bset 8 s . 0000100011...... A+-DXWL... U U U 12 12 4
+bset 32 s d 0000100011000... .......... U U U 12 12 4
+bsr 8 . . 01100001........ .......... U U U 18 18 7
+bsr 16 . . 0110000100000000 .......... U U U 18 18 7
+bsr 32 . . 0110000111111111 .......... . . U . . 7
+btst 8 r . 0000...100...... A+-DXWLdxI U U U 4 4 4
+btst 32 r d 0000...100000... .......... U U U 6 6 4
+btst 8 s . 0000100000...... A+-DXWLdx. U U U 8 8 4
+btst 32 s d 0000100000000... .......... U U U 10 10 4
+callm 32 . . 0000011011...... A..DXWLdx. . . U . . 60 not properly emulated
+cas 8 . . 0000101011...... A+-DXWL... . . U . . 12
+cas 16 . . 0000110011...... A+-DXWL... . . U . . 12
+cas 32 . . 0000111011...... A+-DXWL... . . U . . 12
+cas2 16 . . 0000110011111100 .......... . . U . . 12
+cas2 32 . . 0000111011111100 .......... . . U . . 12
+chk 16 . d 0100...110000... .......... U U U 10 8 8
+chk 16 . . 0100...110...... A+-DXWLdxI U U U 10 8 8
+chk 32 . d 0100...100000... .......... . . U . . 8
+chk 32 . . 0100...100...... A+-DXWLdxI . . U . . 8
+chk2cmp2 8 . pcdi 0000000011111010 .......... . . U . . 23
+chk2cmp2 8 . pcix 0000000011111011 .......... . . U . . 23
+chk2cmp2 8 . . 0000000011...... A..DXWL... . . U . . 18
+chk2cmp2 16 . pcdi 0000001011111010 .......... . . U . . 23
+chk2cmp2 16 . pcix 0000001011111011 .......... . . U . . 23
+chk2cmp2 16 . . 0000001011...... A..DXWL... . . U . . 18
+chk2cmp2 32 . pcdi 0000010011111010 .......... . . U . . 23
+chk2cmp2 32 . pcix 0000010011111011 .......... . . U . . 23
+chk2cmp2 32 . . 0000010011...... A..DXWL... . . U . . 18
+clr 8 . d 0100001000000... .......... U U U 4 4 2
+clr 8 . . 0100001000...... A+-DXWL... U U U 8 4 4
+clr 16 . d 0100001001000... .......... U U U 4 4 2
+clr 16 . . 0100001001...... A+-DXWL... U U U 8 4 4
+clr 32 . d 0100001010000... .......... U U U 6 6 2
+clr 32 . . 0100001010...... A+-DXWL... U U U 12 6 4
+cmp 8 . d 1011...000000... .......... U U U 4 4 2
+cmp 8 . . 1011...000...... A+-DXWLdxI U U U 4 4 2
+cmp 16 . d 1011...001000... .......... U U U 4 4 2
+cmp 16 . a 1011...001001... .......... U U U 4 4 2
+cmp 16 . . 1011...001...... A+-DXWLdxI U U U 4 4 2
+cmp 32 . d 1011...010000... .......... U U U 6 6 2
+cmp 32 . a 1011...010001... .......... U U U 6 6 2
+cmp 32 . . 1011...010...... A+-DXWLdxI U U U 6 6 2
+cmpa 16 . d 1011...011000... .......... U U U 6 6 4
+cmpa 16 . a 1011...011001... .......... U U U 6 6 4
+cmpa 16 . . 1011...011...... A+-DXWLdxI U U U 6 6 4
+cmpa 32 . d 1011...111000... .......... U U U 6 6 4
+cmpa 32 . a 1011...111001... .......... U U U 6 6 4
+cmpa 32 . . 1011...111...... A+-DXWLdxI U U U 6 6 4
+cmpi 8 . d 0000110000000... .......... U U U 8 8 2
+cmpi 8 . . 0000110000...... A+-DXWL... U U U 8 8 2
+cmpi 8 . pcdi 0000110000111010 .......... . . U . . 7
+cmpi 8 . pcix 0000110000111011 .......... . . U . . 9
+cmpi 16 . d 0000110001000... .......... U U U 8 8 2
+cmpi 16 . . 0000110001...... A+-DXWL... U U U 8 8 2
+cmpi 16 . pcdi 0000110001111010 .......... . . U . . 7
+cmpi 16 . pcix 0000110001111011 .......... . . U . . 9
+cmpi 32 . d 0000110010000... .......... U U U 14 12 2
+cmpi 32 . . 0000110010...... A+-DXWL... U U U 12 12 2
+cmpi 32 . pcdi 0000110010111010 .......... . . U . . 7
+cmpi 32 . pcix 0000110010111011 .......... . . U . . 9
+cmpm 8 . ax7 1011111100001... .......... U U U 12 12 9
+cmpm 8 . ay7 1011...100001111 .......... U U U 12 12 9
+cmpm 8 . axy7 1011111100001111 .......... U U U 12 12 9
+cmpm 8 . . 1011...100001... .......... U U U 12 12 9
+cmpm 16 . . 1011...101001... .......... U U U 12 12 9
+cmpm 32 . . 1011...110001... .......... U U U 20 20 9
+cpbcc 32 . . 1111...01....... .......... . . U . . 4 unemulated
+cpdbcc 32 . . 1111...001001... .......... . . U . . 4 unemulated
+cpgen 32 . . 1111...000...... .......... . . U . . 4 unemulated
+cpscc 32 . . 1111...001...... .......... . . U . . 4 unemulated
+cptrapcc 32 . . 1111...001111... .......... . . U . . 4 unemulated
+dbt 16 . . 0101000011001... .......... U U U 12 12 6
+dbf 16 . . 0101000111001... .......... U U U 14 14 6
+dbcc 16 . . 0101....11001... .......... U U U 12 12 6
+divs 16 . d 1000...111000... .......... U U U 158 122 56
+divs 16 . . 1000...111...... A+-DXWLdxI U U U 158 122 56
+divu 16 . d 1000...011000... .......... U U U 140 108 44
+divu 16 . . 1000...011...... A+-DXWLdxI U U U 140 108 44
+divl 32 . d 0100110001000... .......... . . U . . 84
+divl 32 . . 0100110001...... A+-DXWLdxI . . U . . 84
+eor 8 . d 1011...100000... .......... U U U 4 4 2
+eor 8 . . 1011...100...... A+-DXWL... U U U 8 8 4
+eor 16 . d 1011...101000... .......... U U U 4 4 2
+eor 16 . . 1011...101...... A+-DXWL... U U U 8 8 4
+eor 32 . d 1011...110000... .......... U U U 8 6 2
+eor 32 . . 1011...110...... A+-DXWL... U U U 12 12 4
+eori 16 toc . 0000101000111100 .......... U U U 20 16 12
+eori 16 tos . 0000101001111100 .......... S S S 20 16 12
+eori 8 . d 0000101000000... .......... U U U 8 8 2
+eori 8 . . 0000101000...... A+-DXWL... U U U 12 12 4
+eori 16 . d 0000101001000... .......... U U U 8 8 2
+eori 16 . . 0000101001...... A+-DXWL... U U U 12 12 4
+eori 32 . d 0000101010000... .......... U U U 16 14 2
+eori 32 . . 0000101010...... A+-DXWL... U U U 20 20 4
+exg 32 dd . 1100...101000... .......... U U U 6 6 2
+exg 32 aa . 1100...101001... .......... U U U 6 6 2
+exg 32 da . 1100...110001... .......... U U U 6 6 2
+ext 16 . . 0100100010000... .......... U U U 4 4 4
+ext 32 . . 0100100011000... .......... U U U 4 4 4
+extb 32 . . 0100100111000... .......... . . U . . 4
+illegal 0 . . 0100101011111100 .......... U U U 4 4 4
+jmp 32 . . 0100111011...... A..DXWLdx. U U U 4 4 0
+jsr 32 . . 0100111010...... A..DXWLdx. U U U 12 12 0
+lea 32 . . 0100...111...... A..DXWLdx. U U U 0 0 2
+link 16 . a7 0100111001010111 .......... U U U 16 16 5
+link 16 . . 0100111001010... .......... U U U 16 16 5
+link 32 . a7 0100100000001111 .......... . . U . . 6
+link 32 . . 0100100000001... .......... . . U . . 6
+lsr 8 s . 1110...000001... .......... U U U 6 6 4
+lsr 16 s . 1110...001001... .......... U U U 6 6 4
+lsr 32 s . 1110...010001... .......... U U U 8 8 4
+lsr 8 r . 1110...000101... .......... U U U 6 6 6
+lsr 16 r . 1110...001101... .......... U U U 6 6 6
+lsr 32 r . 1110...010101... .......... U U U 8 8 6
+lsr 16 . . 1110001011...... A+-DXWL... U U U 8 8 5
+lsl 8 s . 1110...100001... .......... U U U 6 6 4
+lsl 16 s . 1110...101001... .......... U U U 6 6 4
+lsl 32 s . 1110...110001... .......... U U U 8 8 4
+lsl 8 r . 1110...100101... .......... U U U 6 6 6
+lsl 16 r . 1110...101101... .......... U U U 6 6 6
+lsl 32 r . 1110...110101... .......... U U U 8 8 6
+lsl 16 . . 1110001111...... A+-DXWL... U U U 8 8 5
+move 8 d d 0001...000000... .......... U U U 4 4 2
+move 8 d . 0001...000...... A+-DXWLdxI U U U 4 4 2
+move 8 ai d 0001...010000... .......... U U U 8 8 4
+move 8 ai . 0001...010...... A+-DXWLdxI U U U 8 8 4
+move 8 pi d 0001...011000... .......... U U U 8 8 4
+move 8 pi . 0001...011...... A+-DXWLdxI U U U 8 8 4
+move 8 pi7 d 0001111011000... .......... U U U 8 8 4
+move 8 pi7 . 0001111011...... A+-DXWLdxI U U U 8 8 4
+move 8 pd d 0001...100000... .......... U U U 8 8 5
+move 8 pd . 0001...100...... A+-DXWLdxI U U U 8 8 5
+move 8 pd7 d 0001111100000... .......... U U U 8 8 5
+move 8 pd7 . 0001111100...... A+-DXWLdxI U U U 8 8 5
+move 8 di d 0001...101000... .......... U U U 12 12 5
+move 8 di . 0001...101...... A+-DXWLdxI U U U 12 12 5
+move 8 ix d 0001...110000... .......... U U U 14 14 7
+move 8 ix . 0001...110...... A+-DXWLdxI U U U 14 14 7
+move 8 aw d 0001000111000... .......... U U U 12 12 4
+move 8 aw . 0001000111...... A+-DXWLdxI U U U 12 12 4
+move 8 al d 0001001111000... .......... U U U 16 16 6
+move 8 al . 0001001111...... A+-DXWLdxI U U U 16 16 6
+move 16 d d 0011...000000... .......... U U U 4 4 2
+move 16 d a 0011...000001... .......... U U U 4 4 2
+move 16 d . 0011...000...... A+-DXWLdxI U U U 4 4 2
+move 16 ai d 0011...010000... .......... U U U 8 8 4
+move 16 ai a 0011...010001... .......... U U U 8 8 4
+move 16 ai . 0011...010...... A+-DXWLdxI U U U 8 8 4
+move 16 pi d 0011...011000... .......... U U U 8 8 4
+move 16 pi a 0011...011001... .......... U U U 8 8 4
+move 16 pi . 0011...011...... A+-DXWLdxI U U U 8 8 4
+move 16 pd d 0011...100000... .......... U U U 8 8 5
+move 16 pd a 0011...100001... .......... U U U 8 8 5
+move 16 pd . 0011...100...... A+-DXWLdxI U U U 8 8 5
+move 16 di d 0011...101000... .......... U U U 12 12 5
+move 16 di a 0011...101001... .......... U U U 12 12 5
+move 16 di . 0011...101...... A+-DXWLdxI U U U 12 12 5
+move 16 ix d 0011...110000... .......... U U U 14 14 7
+move 16 ix a 0011...110001... .......... U U U 14 14 7
+move 16 ix . 0011...110...... A+-DXWLdxI U U U 14 14 7
+move 16 aw d 0011000111000... .......... U U U 12 12 4
+move 16 aw a 0011000111001... .......... U U U 12 12 4
+move 16 aw . 0011000111...... A+-DXWLdxI U U U 12 12 4
+move 16 al d 0011001111000... .......... U U U 16 16 6
+move 16 al a 0011001111001... .......... U U U 16 16 6
+move 16 al . 0011001111...... A+-DXWLdxI U U U 16 16 6
+move 32 d d 0010...000000... .......... U U U 4 4 2
+move 32 d a 0010...000001... .......... U U U 4 4 2
+move 32 d . 0010...000...... A+-DXWLdxI U U U 4 4 2
+move 32 ai d 0010...010000... .......... U U U 12 12 4
+move 32 ai a 0010...010001... .......... U U U 12 12 4
+move 32 ai . 0010...010...... A+-DXWLdxI U U U 12 12 4
+move 32 pi d 0010...011000... .......... U U U 12 12 4
+move 32 pi a 0010...011001... .......... U U U 12 12 4
+move 32 pi . 0010...011...... A+-DXWLdxI U U U 12 12 4
+move 32 pd d 0010...100000... .......... U U U 12 14 5
+move 32 pd a 0010...100001... .......... U U U 12 14 5
+move 32 pd . 0010...100...... A+-DXWLdxI U U U 12 14 5
+move 32 di d 0010...101000... .......... U U U 16 16 5
+move 32 di a 0010...101001... .......... U U U 16 16 5
+move 32 di . 0010...101...... A+-DXWLdxI U U U 16 16 5
+move 32 ix d 0010...110000... .......... U U U 18 18 7
+move 32 ix a 0010...110001... .......... U U U 18 18 7
+move 32 ix . 0010...110...... A+-DXWLdxI U U U 18 18 7
+move 32 aw d 0010000111000... .......... U U U 16 16 4
+move 32 aw a 0010000111001... .......... U U U 16 16 4
+move 32 aw . 0010000111...... A+-DXWLdxI U U U 16 16 4
+move 32 al d 0010001111000... .......... U U U 20 20 6
+move 32 al a 0010001111001... .......... U U U 20 20 6
+move 32 al . 0010001111...... A+-DXWLdxI U U U 20 20 6
+movea 16 . d 0011...001000... .......... U U U 4 4 2
+movea 16 . a 0011...001001... .......... U U U 4 4 2
+movea 16 . . 0011...001...... A+-DXWLdxI U U U 4 4 2
+movea 32 . d 0010...001000... .......... U U U 4 4 2
+movea 32 . a 0010...001001... .......... U U U 4 4 2
+movea 32 . . 0010...001...... A+-DXWLdxI U U U 4 4 2
+move 16 frc d 0100001011000... .......... . U U . 4 4
+move 16 frc . 0100001011...... A+-DXWL... . U U . 8 4
+move 16 toc d 0100010011000... .......... U U U 12 12 4
+move 16 toc . 0100010011...... A+-DXWLdxI U U U 12 12 4
+move 16 frs d 0100000011000... .......... U S S 6 4 8 U only for 000
+move 16 frs . 0100000011...... A+-DXWL... U S S 8 8 8 U only for 000
+move 16 tos d 0100011011000... .......... S S S 12 12 8
+move 16 tos . 0100011011...... A+-DXWLdxI S S S 12 12 8
+move 32 fru . 0100111001101... .......... S S S 4 6 2
+move 32 tou . 0100111001100... .......... S S S 4 6 2
+movec 32 cr . 0100111001111010 .......... . S S . 12 6
+movec 32 rc . 0100111001111011 .......... . S S . 10 12
+movem 16 re pd 0100100010100... .......... U U U 8 8 4
+movem 16 re . 0100100010...... A..DXWL... U U U 8 8 4
+movem 32 re pd 0100100011100... .......... U U U 8 8 4
+movem 32 re . 0100100011...... A..DXWL... U U U 8 8 4
+movem 16 er pi 0100110010011... .......... U U U 12 12 8
+movem 16 er pcdi 0100110010111010 .......... U U U 16 16 9
+movem 16 er pcix 0100110010111011 .......... U U U 18 18 11
+movem 16 er . 0100110010...... A..DXWL... U U U 12 12 8
+movem 32 er pi 0100110011011... .......... U U U 12 12 8
+movem 32 er pcdi 0100110011111010 .......... U U U 16 16 9
+movem 32 er pcix 0100110011111011 .......... U U U 18 18 11
+movem 32 er . 0100110011...... A..DXWL... U U U 12 12 8
+movep 16 er . 0000...100001... .......... U U U 16 16 12
+movep 32 er . 0000...101001... .......... U U U 24 24 18
+movep 16 re . 0000...110001... .......... U U U 16 16 11
+movep 32 re . 0000...111001... .......... U U U 24 24 17
+moveq 32 . . 0111...0........ .......... U U U 4 4 2
+moves 8 . . 0000111000...... A+-DXWL... . S S . 14 5
+moves 16 . . 0000111001...... A+-DXWL... . S S . 14 5
+moves 32 . . 0000111010...... A+-DXWL... . S S . 16 5
+muls 16 . d 1100...111000... .......... U U U 54 32 27
+muls 16 . . 1100...111...... A+-DXWLdxI U U U 54 32 27
+mulu 16 . d 1100...011000... .......... U U U 54 30 27
+mulu 16 . . 1100...011...... A+-DXWLdxI U U U 54 30 27
+mull 32 . d 0100110000000... .......... . . U . . 43
+mull 32 . . 0100110000...... A+-DXWLdxI . . U . . 43
+nbcd 8 . d 0100100000000... .......... U U U 6 6 6
+nbcd 8 . . 0100100000...... A+-DXWL... U U U 8 8 6
+neg 8 . d 0100010000000... .......... U U U 4 4 2
+neg 8 . . 0100010000...... A+-DXWL... U U U 8 8 4
+neg 16 . d 0100010001000... .......... U U U 4 4 2
+neg 16 . . 0100010001...... A+-DXWL... U U U 8 8 4
+neg 32 . d 0100010010000... .......... U U U 6 6 2
+neg 32 . . 0100010010...... A+-DXWL... U U U 12 12 4
+negx 8 . d 0100000000000... .......... U U U 4 4 2
+negx 8 . . 0100000000...... A+-DXWL... U U U 8 8 4
+negx 16 . d 0100000001000... .......... U U U 4 4 2
+negx 16 . . 0100000001...... A+-DXWL... U U U 8 8 4
+negx 32 . d 0100000010000... .......... U U U 6 6 2
+negx 32 . . 0100000010...... A+-DXWL... U U U 12 12 4
+nop 0 . . 0100111001110001 .......... U U U 4 4 2
+not 8 . d 0100011000000... .......... U U U 4 4 2
+not 8 . . 0100011000...... A+-DXWL... U U U 8 8 4
+not 16 . d 0100011001000... .......... U U U 4 4 2
+not 16 . . 0100011001...... A+-DXWL... U U U 8 8 4
+not 32 . d 0100011010000... .......... U U U 6 6 2
+not 32 . . 0100011010...... A+-DXWL... U U U 12 12 4
+or 8 er d 1000...000000... .......... U U U 4 4 2
+or 8 er . 1000...000...... A+-DXWLdxI U U U 4 4 2
+or 16 er d 1000...001000... .......... U U U 4 4 2
+or 16 er . 1000...001...... A+-DXWLdxI U U U 4 4 2
+or 32 er d 1000...010000... .......... U U U 6 6 2
+or 32 er . 1000...010...... A+-DXWLdxI U U U 6 6 2
+or 8 re . 1000...100...... A+-DXWL... U U U 8 8 4
+or 16 re . 1000...101...... A+-DXWL... U U U 8 8 4
+or 32 re . 1000...110...... A+-DXWL... U U U 12 12 4
+ori 16 toc . 0000000000111100 .......... U U U 20 16 12
+ori 16 tos . 0000000001111100 .......... S S S 20 16 12
+ori 8 . d 0000000000000... .......... U U U 8 8 2
+ori 8 . . 0000000000...... A+-DXWL... U U U 12 12 4
+ori 16 . d 0000000001000... .......... U U U 8 8 2
+ori 16 . . 0000000001...... A+-DXWL... U U U 12 12 4
+ori 32 . d 0000000010000... .......... U U U 16 14 2
+ori 32 . . 0000000010...... A+-DXWL... U U U 20 20 4
+pack 16 rr . 1000...101000... .......... . . U . . 6
+pack 16 mm ax7 1000111101001... .......... . . U . . 13
+pack 16 mm ay7 1000...101001111 .......... . . U . . 13
+pack 16 mm axy7 1000111101001111 .......... . . U . . 13
+pack 16 mm . 1000...101001... .......... . . U . . 13
+pea 32 . . 0100100001...... A..DXWLdx. U U U 6 6 5
+reset 0 . . 0100111001110000 .......... S S S 0 0 0
+ror 8 s . 1110...000011... .......... U U U 6 6 8
+ror 16 s . 1110...001011... .......... U U U 6 6 8
+ror 32 s . 1110...010011... .......... U U U 8 8 8
+ror 8 r . 1110...000111... .......... U U U 6 6 8
+ror 16 r . 1110...001111... .......... U U U 6 6 8
+ror 32 r . 1110...010111... .......... U U U 8 8 8
+ror 16 . . 1110011011...... A+-DXWL... U U U 8 8 7
+rol 8 s . 1110...100011... .......... U U U 6 6 8
+rol 16 s . 1110...101011... .......... U U U 6 6 8
+rol 32 s . 1110...110011... .......... U U U 8 8 8
+rol 8 r . 1110...100111... .......... U U U 6 6 8
+rol 16 r . 1110...101111... .......... U U U 6 6 8
+rol 32 r . 1110...110111... .......... U U U 8 8 8
+rol 16 . . 1110011111...... A+-DXWL... U U U 8 8 7
+roxr 8 s . 1110...000010... .......... U U U 6 6 12
+roxr 16 s . 1110...001010... .......... U U U 6 6 12
+roxr 32 s . 1110...010010... .......... U U U 8 8 12
+roxr 8 r . 1110...000110... .......... U U U 6 6 12
+roxr 16 r . 1110...001110... .......... U U U 6 6 12
+roxr 32 r . 1110...010110... .......... U U U 8 8 12
+roxr 16 . . 1110010011...... A+-DXWL... U U U 8 8 5
+roxl 8 s . 1110...100010... .......... U U U 6 6 12
+roxl 16 s . 1110...101010... .......... U U U 6 6 12
+roxl 32 s . 1110...110010... .......... U U U 8 8 12
+roxl 8 r . 1110...100110... .......... U U U 6 6 12
+roxl 16 r . 1110...101110... .......... U U U 6 6 12
+roxl 32 r . 1110...110110... .......... U U U 8 8 12
+roxl 16 . . 1110010111...... A+-DXWL... U U U 8 8 5
+rtd 32 . . 0100111001110100 .......... . U U . 16 10
+rte 32 . . 0100111001110011 .......... S S S 20 24 20 bus fault not emulated
+rtm 32 . . 000001101100.... .......... . . U . . 19 not properly emulated
+rtr 32 . . 0100111001110111 .......... U U U 20 20 14
+rts 32 . . 0100111001110101 .......... U U U 16 16 10
+sbcd 8 rr . 1000...100000... .......... U U U 6 6 4
+sbcd 8 mm ax7 1000111100001... .......... U U U 18 18 16
+sbcd 8 mm ay7 1000...100001111 .......... U U U 18 18 16
+sbcd 8 mm axy7 1000111100001111 .......... U U U 18 18 16
+sbcd 8 mm . 1000...100001... .......... U U U 18 18 16
+st 8 . d 0101000011000... .......... U U U 6 4 4
+st 8 . . 0101000011...... A+-DXWL... U U U 8 8 6
+sf 8 . d 0101000111000... .......... U U U 4 4 4
+sf 8 . . 0101000111...... A+-DXWL... U U U 8 8 6
+scc 8 . d 0101....11000... .......... U U U 4 4 4
+scc 8 . . 0101....11...... A+-DXWL... U U U 8 8 6
+stop 0 . . 0100111001110010 .......... S S S 4 4 8
+sub 8 er d 1001...000000... .......... U U U 4 4 2
+sub 8 er . 1001...000...... A+-DXWLdxI U U U 4 4 2
+sub 16 er d 1001...001000... .......... U U U 4 4 2
+sub 16 er a 1001...001001... .......... U U U 4 4 2
+sub 16 er . 1001...001...... A+-DXWLdxI U U U 4 4 2
+sub 32 er d 1001...010000... .......... U U U 6 6 2
+sub 32 er a 1001...010001... .......... U U U 6 6 2
+sub 32 er . 1001...010...... A+-DXWLdxI U U U 6 6 2
+sub 8 re . 1001...100...... A+-DXWL... U U U 8 8 4
+sub 16 re . 1001...101...... A+-DXWL... U U U 8 8 4
+sub 32 re . 1001...110...... A+-DXWL... U U U 12 12 4
+suba 16 . d 1001...011000... .......... U U U 8 8 2
+suba 16 . a 1001...011001... .......... U U U 8 8 2
+suba 16 . . 1001...011...... A+-DXWLdxI U U U 8 8 2
+suba 32 . d 1001...111000... .......... U U U 6 6 2
+suba 32 . a 1001...111001... .......... U U U 6 6 2
+suba 32 . . 1001...111...... A+-DXWLdxI U U U 6 6 2
+subi 8 . d 0000010000000... .......... U U U 8 8 2
+subi 8 . . 0000010000...... A+-DXWL... U U U 12 12 4
+subi 16 . d 0000010001000... .......... U U U 8 8 2
+subi 16 . . 0000010001...... A+-DXWL... U U U 12 12 4
+subi 32 . d 0000010010000... .......... U U U 16 14 2
+subi 32 . . 0000010010...... A+-DXWL... U U U 20 20 4
+subq 8 . d 0101...100000... .......... U U U 4 4 2
+subq 8 . . 0101...100...... A+-DXWL... U U U 8 8 4
+subq 16 . d 0101...101000... .......... U U U 4 4 2
+subq 16 . a 0101...101001... .......... U U U 8 4 2
+subq 16 . . 0101...101...... A+-DXWL... U U U 8 8 4
+subq 32 . d 0101...110000... .......... U U U 8 8 2
+subq 32 . a 0101...110001... .......... U U U 8 8 2
+subq 32 . . 0101...110...... A+-DXWL... U U U 12 12 4
+subx 8 rr . 1001...100000... .......... U U U 4 4 2
+subx 16 rr . 1001...101000... .......... U U U 4 4 2
+subx 32 rr . 1001...110000... .......... U U U 8 6 2
+subx 8 mm ax7 1001111100001... .......... U U U 18 18 12
+subx 8 mm ay7 1001...100001111 .......... U U U 18 18 12
+subx 8 mm axy7 1001111100001111 .......... U U U 18 18 12
+subx 8 mm . 1001...100001... .......... U U U 18 18 12
+subx 16 mm . 1001...101001... .......... U U U 18 18 12
+subx 32 mm . 1001...110001... .......... U U U 30 30 12
+swap 32 . . 0100100001000... .......... U U U 4 4 4
+tas 8 . d 0100101011000... .......... U U U 4 4 4
+tas 8 . . 0100101011...... A+-DXWL... U U U 14 14 12
+trap 0 . . 010011100100.... .......... U U U 4 4 4
+trapt 0 . . 0101000011111100 .......... . . U . . 4
+trapt 16 . . 0101000011111010 .......... . . U . . 6
+trapt 32 . . 0101000011111011 .......... . . U . . 8
+trapf 0 . . 0101000111111100 .......... . . U . . 4
+trapf 16 . . 0101000111111010 .......... . . U . . 6
+trapf 32 . . 0101000111111011 .......... . . U . . 8
+trapcc 0 . . 0101....11111100 .......... . . U . . 4
+trapcc 16 . . 0101....11111010 .......... . . U . . 6
+trapcc 32 . . 0101....11111011 .......... . . U . . 8
+trapv 0 . . 0100111001110110 .......... U U U 4 4 4
+tst 8 . d 0100101000000... .......... U U U 4 4 2
+tst 8 . . 0100101000...... A+-DXWL... U U U 4 4 2
+tst 8 . pcdi 0100101000111010 .......... . . U . . 7
+tst 8 . pcix 0100101000111011 .......... . . U . . 9
+tst 8 . i 0100101000111100 .......... . . U . . 6
+tst 16 . d 0100101001000... .......... U U U 4 4 2
+tst 16 . a 0100101001001... .......... . . U . . 2
+tst 16 . . 0100101001...... A+-DXWL... U U U 4 4 2
+tst 16 . pcdi 0100101001111010 .......... . . U . . 7
+tst 16 . pcix 0100101001111011 .......... . . U . . 9
+tst 16 . i 0100101001111100 .......... . . U . . 6
+tst 32 . d 0100101010000... .......... U U U 4 4 2
+tst 32 . a 0100101010001... .......... . . U . . 2
+tst 32 . . 0100101010...... A+-DXWL... U U U 4 4 2
+tst 32 . pcdi 0100101010111010 .......... . . U . . 7
+tst 32 . pcix 0100101010111011 .......... . . U . . 9
+tst 32 . i 0100101010111100 .......... . . U . . 6
+unlk 32 . a7 0100111001011111 .......... U U U 12 12 6
+unlk 32 . . 0100111001011... .......... U U U 12 12 6
+unpk 16 rr . 1000...110000... .......... . . U . . 8
+unpk 16 mm ax7 1000111110001... .......... . . U . . 13
+unpk 16 mm ay7 1000...110001111 .......... . . U . . 13
+unpk 16 mm axy7 1000111110001111 .......... . . U . . 13
+unpk 16 mm . 1000...110001... .......... . . U . . 13
+
+
+
+XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
+M68KMAKE_OPCODE_HANDLER_BODY
+
+M68KMAKE_OP(1010, 0, ., .)
+{
+ m68ki_exception_1010();
+}
+
+
+M68KMAKE_OP(1111, 0, ., .)
+{
+ m68ki_exception_1111();
+}
+
+
+M68KMAKE_OP(abcd, 8, rr, .)
+{
+ uint* r_dst = &DX;
+ uint src = DY;
+ uint dst = *r_dst;
+ uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
+
+ FLAG_V = ~res; /* Undefined V behavior */
+
+ if(res > 9)
+ res += 6;
+ res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
+ FLAG_X = FLAG_C = (res > 0x99) << 8;
+ if(FLAG_C)
+ res -= 0xa0;
+
+ FLAG_V &= res; /* Undefined V behavior part II */
+ FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+}
+
+
+M68KMAKE_OP(abcd, 8, mm, ax7)
+{
+ uint src = OPER_AY_PD_8();
+ uint ea = EA_A7_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
+
+ FLAG_V = ~res; /* Undefined V behavior */
+
+ if(res > 9)
+ res += 6;
+ res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
+ FLAG_X = FLAG_C = (res > 0x99) << 8;
+ if(FLAG_C)
+ res -= 0xa0;
+
+ FLAG_V &= res; /* Undefined V behavior part II */
+ FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+M68KMAKE_OP(abcd, 8, mm, ay7)
+{
+ uint src = OPER_A7_PD_8();
+ uint ea = EA_AX_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
+
+ FLAG_V = ~res; /* Undefined V behavior */
+
+ if(res > 9)
+ res += 6;
+ res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
+ FLAG_X = FLAG_C = (res > 0x99) << 8;
+ if(FLAG_C)
+ res -= 0xa0;
+
+ FLAG_V &= res; /* Undefined V behavior part II */
+ FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+M68KMAKE_OP(abcd, 8, mm, axy7)
+{
+ uint src = OPER_A7_PD_8();
+ uint ea = EA_A7_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
+
+ FLAG_V = ~res; /* Undefined V behavior */
+
+ if(res > 9)
+ res += 6;
+ res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
+ FLAG_X = FLAG_C = (res > 0x99) << 8;
+ if(FLAG_C)
+ res -= 0xa0;
+
+ FLAG_V &= res; /* Undefined V behavior part II */
+ FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+M68KMAKE_OP(abcd, 8, mm, .)
+{
+ uint src = OPER_AY_PD_8();
+ uint ea = EA_AX_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
+
+ FLAG_V = ~res; /* Undefined V behavior */
+
+ if(res > 9)
+ res += 6;
+ res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
+ FLAG_X = FLAG_C = (res > 0x99) << 8;
+ if(FLAG_C)
+ res -= 0xa0;
+
+ FLAG_V &= res; /* Undefined V behavior part II */
+ FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+M68KMAKE_OP(add, 8, er, d)
+{
+ uint* r_dst = &DX;
+ uint src = MASK_OUT_ABOVE_8(DY);
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+M68KMAKE_OP(add, 8, er, .)
+{
+ uint* r_dst = &DX;
+ uint src = M68KMAKE_GET_OPER_AY_8;
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+M68KMAKE_OP(add, 16, er, d)
+{
+ uint* r_dst = &DX;
+ uint src = MASK_OUT_ABOVE_16(DY);
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+M68KMAKE_OP(add, 16, er, a)
+{
+ uint* r_dst = &DX;
+ uint src = MASK_OUT_ABOVE_16(AY);
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+M68KMAKE_OP(add, 16, er, .)
+{
+ uint* r_dst = &DX;
+ uint src = M68KMAKE_GET_OPER_AY_16;
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+M68KMAKE_OP(add, 32, er, d)
+{
+ uint* r_dst = &DX;
+ uint src = DY;
+ uint dst = *r_dst;
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+M68KMAKE_OP(add, 32, er, a)
+{
+ uint* r_dst = &DX;
+ uint src = AY;
+ uint dst = *r_dst;
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+M68KMAKE_OP(add, 32, er, .)
+{
+ uint* r_dst = &DX;
+ uint src = M68KMAKE_GET_OPER_AY_32;
+ uint dst = *r_dst;
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+M68KMAKE_OP(add, 8, re, .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint src = MASK_OUT_ABOVE_8(DX);
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+M68KMAKE_OP(add, 16, re, .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ uint src = MASK_OUT_ABOVE_16(DX);
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+M68KMAKE_OP(add, 32, re, .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_32;
+ uint src = DX;
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+M68KMAKE_OP(adda, 16, ., d)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(DY));
+}
+
+
+M68KMAKE_OP(adda, 16, ., a)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(AY));
+}
+
+
+M68KMAKE_OP(adda, 16, ., .)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(M68KMAKE_GET_OPER_AY_16));
+}
+
+
+M68KMAKE_OP(adda, 32, ., d)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + DY);
+}
+
+
+M68KMAKE_OP(adda, 32, ., a)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + AY);
+}
+
+
+M68KMAKE_OP(adda, 32, ., .)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + M68KMAKE_GET_OPER_AY_32);
+}
+
+
+M68KMAKE_OP(addi, 8, ., d)
+{
+ uint* r_dst = &DY;
+ uint src = OPER_I_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+M68KMAKE_OP(addi, 8, ., .)
+{
+ uint src = OPER_I_8();
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+M68KMAKE_OP(addi, 16, ., d)
+{
+ uint* r_dst = &DY;
+ uint src = OPER_I_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+M68KMAKE_OP(addi, 16, ., .)
+{
+ uint src = OPER_I_16();
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+M68KMAKE_OP(addi, 32, ., d)
+{
+ uint* r_dst = &DY;
+ uint src = OPER_I_32();
+ uint dst = *r_dst;
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+M68KMAKE_OP(addi, 32, ., .)
+{
+ uint src = OPER_I_32();
+ uint ea = M68KMAKE_GET_EA_AY_32;
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+M68KMAKE_OP(addq, 8, ., d)
+{
+ uint* r_dst = &DY;
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+M68KMAKE_OP(addq, 8, ., .)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+M68KMAKE_OP(addq, 16, ., d)
+{
+ uint* r_dst = &DY;
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+M68KMAKE_OP(addq, 16, ., a)
+{
+ uint* r_dst = &AY;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + (((REG_IR >> 9) - 1) & 7) + 1);
+}
+
+
+M68KMAKE_OP(addq, 16, ., .)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+M68KMAKE_OP(addq, 32, ., d)
+{
+ uint* r_dst = &DY;
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint dst = *r_dst;
+ uint res = src + dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+M68KMAKE_OP(addq, 32, ., a)
+{
+ uint* r_dst = &AY;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + (((REG_IR >> 9) - 1) & 7) + 1);
+}
+
+
+M68KMAKE_OP(addq, 32, ., .)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = M68KMAKE_GET_EA_AY_32;
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst;
+
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+M68KMAKE_OP(addx, 8, rr, .)
+{
+ uint* r_dst = &DX;
+ uint src = MASK_OUT_ABOVE_8(DY);
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src + dst + XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+}
+
+
+M68KMAKE_OP(addx, 16, rr, .)
+{
+ uint* r_dst = &DX;
+ uint src = MASK_OUT_ABOVE_16(DY);
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src + dst + XFLAG_AS_1();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+
+ res = MASK_OUT_ABOVE_16(res);
+ FLAG_Z |= res;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+}
+
+
+M68KMAKE_OP(addx, 32, rr, .)
+{
+ uint* r_dst = &DX;
+ uint src = DY;
+ uint dst = *r_dst;
+ uint res = src + dst + XFLAG_AS_1();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+
+ res = MASK_OUT_ABOVE_32(res);
+ FLAG_Z |= res;
+
+ *r_dst = res;
+}
+
+
+M68KMAKE_OP(addx, 8, mm, ax7)
+{
+ uint src = OPER_AY_PD_8();
+ uint ea = EA_A7_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst + XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+M68KMAKE_OP(addx, 8, mm, ay7)
+{
+ uint src = OPER_A7_PD_8();
+ uint ea = EA_AX_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst + XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+M68KMAKE_OP(addx, 8, mm, axy7)
+{
+ uint src = OPER_A7_PD_8();
+ uint ea = EA_A7_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst + XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+M68KMAKE_OP(addx, 8, mm, .)
+{
+ uint src = OPER_AY_PD_8();
+ uint ea = EA_AX_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = src + dst + XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_V = VFLAG_ADD_8(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+M68KMAKE_OP(addx, 16, mm, .)
+{
+ uint src = OPER_AY_PD_16();
+ uint ea = EA_AX_PD_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = src + dst + XFLAG_AS_1();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_V = VFLAG_ADD_16(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+
+ res = MASK_OUT_ABOVE_16(res);
+ FLAG_Z |= res;
+
+ m68ki_write_16(ea, res);
+}
+
+
+M68KMAKE_OP(addx, 32, mm, .)
+{
+ uint src = OPER_AY_PD_32();
+ uint ea = EA_AX_PD_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = src + dst + XFLAG_AS_1();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_ADD_32(src, dst, res);
+ FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
+
+ res = MASK_OUT_ABOVE_32(res);
+ FLAG_Z |= res;
+
+ m68ki_write_32(ea, res);
+}
+
+
+M68KMAKE_OP(and, 8, er, d)
+{
+ FLAG_Z = MASK_OUT_ABOVE_8(DX &= (DY | 0xffffff00));
+
+ FLAG_N = NFLAG_8(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(and, 8, er, .)
+{
+ FLAG_Z = MASK_OUT_ABOVE_8(DX &= (M68KMAKE_GET_OPER_AY_8 | 0xffffff00));
+
+ FLAG_N = NFLAG_8(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(and, 16, er, d)
+{
+ FLAG_Z = MASK_OUT_ABOVE_16(DX &= (DY | 0xffff0000));
+
+ FLAG_N = NFLAG_16(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(and, 16, er, .)
+{
+ FLAG_Z = MASK_OUT_ABOVE_16(DX &= (M68KMAKE_GET_OPER_AY_16 | 0xffff0000));
+
+ FLAG_N = NFLAG_16(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(and, 32, er, d)
+{
+ FLAG_Z = DX &= DY;
+
+ FLAG_N = NFLAG_32(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(and, 32, er, .)
+{
+ FLAG_Z = DX &= M68KMAKE_GET_OPER_AY_32;
+
+ FLAG_N = NFLAG_32(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(and, 8, re, .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint res = DX & m68ki_read_8(ea);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+M68KMAKE_OP(and, 16, re, .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ uint res = DX & m68ki_read_16(ea);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+M68KMAKE_OP(and, 32, re, .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_32;
+ uint res = DX & m68ki_read_32(ea);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_32(ea, res);
+}
+
+
+M68KMAKE_OP(andi, 8, ., d)
+{
+ FLAG_Z = MASK_OUT_ABOVE_8(DY &= (OPER_I_8() | 0xffffff00));
+
+ FLAG_N = NFLAG_8(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(andi, 8, ., .)
+{
+ uint src = OPER_I_8();
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint res = src & m68ki_read_8(ea);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_8(ea, res);
+}
+
+
+M68KMAKE_OP(andi, 16, ., d)
+{
+ FLAG_Z = MASK_OUT_ABOVE_16(DY &= (OPER_I_16() | 0xffff0000));
+
+ FLAG_N = NFLAG_16(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(andi, 16, ., .)
+{
+ uint src = OPER_I_16();
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ uint res = src & m68ki_read_16(ea);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_16(ea, res);
+}
+
+
+M68KMAKE_OP(andi, 32, ., d)
+{
+ FLAG_Z = DY &= (OPER_I_32());
+
+ FLAG_N = NFLAG_32(FLAG_Z);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(andi, 32, ., .)
+{
+ uint src = OPER_I_32();
+ uint ea = M68KMAKE_GET_EA_AY_32;
+ uint res = src & m68ki_read_32(ea);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+
+ m68ki_write_32(ea, res);
+}
+
+
+M68KMAKE_OP(andi, 16, toc, .)
+{
+ m68ki_set_ccr(m68ki_get_ccr() & OPER_I_16());
+}
+
+
+M68KMAKE_OP(andi, 16, tos, .)
+{
+ if(FLAG_S)
+ {
+ uint src = OPER_I_16();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_set_sr(m68ki_get_sr() & src);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+M68KMAKE_OP(asr, 8, s, .)
+{
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src >> shift;
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src >> shift;
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 9) - 1) & 7) + 1;
+ uint src = *r_dst;
+ uint res = src >> shift;
+
+ if(shift != 0)
+ USE_CYCLES(shift<> shift;
+
+ if(shift != 0)
+ {
+ USE_CYCLES(shift<> shift;
+
+ if(shift != 0)
+ {
+ USE_CYCLES(shift<> (shift - 1))<<8;
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ if(GET_MSB_16(src))
+ {
+ *r_dst |= 0xffff;
+ FLAG_C = CFLAG_SET;
+ FLAG_X = XFLAG_SET;
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ *r_dst &= 0xffff0000;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_X = XFLAG_CLEAR;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_16(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(asr, 32, r, .)
+{
+ uint* r_dst = &DY;
+ uint shift = DX & 0x3f;
+ uint src = *r_dst;
+ uint res = src >> shift;
+
+ if(shift != 0)
+ {
+ USE_CYCLES(shift<> (shift - 1))<<8;
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ if(GET_MSB_32(src))
+ {
+ *r_dst = 0xffffffff;
+ FLAG_C = CFLAG_SET;
+ FLAG_X = XFLAG_SET;
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ *r_dst = 0;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_X = XFLAG_CLEAR;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_32(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(asr, 16, ., .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ uint src = m68ki_read_16(ea);
+ uint res = src >> 1;
+
+ if(GET_MSB_16(src))
+ res |= 0x8000;
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = FLAG_X = src << 8;
+}
+
+
+M68KMAKE_OP(asl, 8, s, .)
+{
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = MASK_OUT_ABOVE_8(src << shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = MASK_OUT_ABOVE_16(src << shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> (8-shift);
+ src &= m68ki_shift_16_table[shift + 1];
+ FLAG_V = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7;
+}
+
+
+M68KMAKE_OP(asl, 32, s, .)
+{
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint src = *r_dst;
+ uint res = MASK_OUT_ABOVE_32(src << shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> (24-shift);
+ src &= m68ki_shift_32_table[shift + 1];
+ FLAG_V = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7;
+}
+
+
+M68KMAKE_OP(asl, 8, r, .)
+{
+ uint* r_dst = &DY;
+ uint shift = DX & 0x3f;
+ uint src = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = MASK_OUT_ABOVE_8(src << shift);
+
+ if(shift != 0)
+ {
+ USE_CYCLES(shift<> 8;
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ src &= m68ki_shift_16_table[shift + 1];
+ FLAG_V = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7;
+ return;
+ }
+
+ *r_dst &= 0xffff0000;
+ FLAG_X = FLAG_C = ((shift == 16 ? src & 1 : 0))<<8;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+ FLAG_V = (!(src == 0))<<7;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_16(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(asl, 32, r, .)
+{
+ uint* r_dst = &DY;
+ uint shift = DX & 0x3f;
+ uint src = *r_dst;
+ uint res = MASK_OUT_ABOVE_32(src << shift);
+
+ if(shift != 0)
+ {
+ USE_CYCLES(shift<> (32 - shift)) << 8;
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ src &= m68ki_shift_32_table[shift + 1];
+ FLAG_V = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7;
+ return;
+ }
+
+ *r_dst = 0;
+ FLAG_X = FLAG_C = ((shift == 32 ? src & 1 : 0))<<8;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+ FLAG_V = (!(src == 0))<<7;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_32(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(asl, 16, ., .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(src << 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_X = FLAG_C = src >> 7;
+ src &= 0xc000;
+ FLAG_V = (!(src == 0 || src == 0xc000))<<7;
+}
+
+
+M68KMAKE_OP(bcc, 8, ., .)
+{
+ if(M68KMAKE_CC)
+ {
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
+ return;
+ }
+ USE_CYCLES(CYC_BCC_NOTAKE_B);
+}
+
+
+M68KMAKE_OP(bcc, 16, ., .)
+{
+ if(M68KMAKE_CC)
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_BCC_NOTAKE_W);
+}
+
+
+M68KMAKE_OP(bcc, 32, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(M68KMAKE_CC)
+ {
+ uint offset = OPER_I_32();
+ REG_PC -= 4;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_32(offset);
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(bchg, 32, r, d)
+{
+ uint* r_dst = &DY;
+ uint mask = 1 << (DX & 0x1f);
+
+ FLAG_Z = *r_dst & mask;
+ *r_dst ^= mask;
+}
+
+
+M68KMAKE_OP(bchg, 8, r, .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src ^ mask);
+}
+
+
+M68KMAKE_OP(bchg, 32, s, d)
+{
+ uint* r_dst = &DY;
+ uint mask = 1 << (OPER_I_8() & 0x1f);
+
+ FLAG_Z = *r_dst & mask;
+ *r_dst ^= mask;
+}
+
+
+M68KMAKE_OP(bchg, 8, s, .)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src ^ mask);
+}
+
+
+M68KMAKE_OP(bclr, 32, r, d)
+{
+ uint* r_dst = &DY;
+ uint mask = 1 << (DX & 0x1f);
+
+ FLAG_Z = *r_dst & mask;
+ *r_dst &= ~mask;
+}
+
+
+M68KMAKE_OP(bclr, 8, r, .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src & ~mask);
+}
+
+
+M68KMAKE_OP(bclr, 32, s, d)
+{
+ uint* r_dst = &DY;
+ uint mask = 1 << (OPER_I_8() & 0x1f);
+
+ FLAG_Z = *r_dst & mask;
+ *r_dst &= ~mask;
+}
+
+
+M68KMAKE_OP(bclr, 8, s, .)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src & ~mask);
+}
+
+
+M68KMAKE_OP(bfchg, 32, ., d)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint offset = (word2>>6)&31;
+ uint width = word2;
+ uint* data = &DY;
+ uint64 mask;
+
+
+ if(BIT_B(word2))
+ offset = REG_D[offset&7];
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ offset &= 31;
+ width = ((width-1) & 31) + 1;
+
+ mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask = ROR_32(mask, offset);
+
+ FLAG_N = NFLAG_32(*data<>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = M68KMAKE_GET_EA_AY_8;
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = NFLAG_32(data_long << offset);
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, data_long ^ mask_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, data_byte ^ mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(bfclr, 32, ., d)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint offset = (word2>>6)&31;
+ uint width = word2;
+ uint* data = &DY;
+ uint64 mask;
+
+
+ if(BIT_B(word2))
+ offset = REG_D[offset&7];
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+
+ offset &= 31;
+ width = ((width-1) & 31) + 1;
+
+
+ mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask = ROR_32(mask, offset);
+
+ FLAG_N = NFLAG_32(*data<>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = M68KMAKE_GET_EA_AY_8;
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = NFLAG_32(data_long << offset);
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, data_long & ~mask_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, data_byte & ~mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(bfexts, 32, ., d)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint offset = (word2>>6)&31;
+ uint width = word2;
+ uint64 data = DY;
+
+
+ if(BIT_B(word2))
+ offset = REG_D[offset&7];
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ offset &= 31;
+ width = ((width-1) & 31) + 1;
+
+ data = ROL_32(data, offset);
+ FLAG_N = NFLAG_32(data);
+ data = MAKE_INT_32(data) >> (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ REG_D[(word2>>12)&7] = data;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(bfexts, 32, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint data;
+ uint ea = M68KMAKE_GET_EA_AY_8;
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data = MAKE_INT_32(data) >> (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ REG_D[(word2 >> 12) & 7] = data;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(bfextu, 32, ., d)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint offset = (word2>>6)&31;
+ uint width = word2;
+ uint64 data = DY;
+
+
+ if(BIT_B(word2))
+ offset = REG_D[offset&7];
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ offset &= 31;
+ width = ((width-1) & 31) + 1;
+
+ data = ROL_32(data, offset);
+ FLAG_N = NFLAG_32(data);
+ data >>= 32 - width;
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ REG_D[(word2>>12)&7] = data;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(bfextu, 32, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint data;
+ uint ea = M68KMAKE_GET_EA_AY_8;
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data >>= (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ REG_D[(word2 >> 12) & 7] = data;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(bfffo, 32, ., d)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint offset = (word2>>6)&31;
+ uint width = word2;
+ uint64 data = DY;
+ uint bit;
+
+
+ if(BIT_B(word2))
+ offset = REG_D[offset&7];
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ offset &= 31;
+ width = ((width-1) & 31) + 1;
+
+ data = ROL_32(data, offset);
+ FLAG_N = NFLAG_32(data);
+ data >>= 32 - width;
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)
+ offset++;
+
+ REG_D[(word2>>12)&7] = offset;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(bfffo, 32, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ sint local_offset;
+ uint width = word2;
+ uint data;
+ uint bit;
+ uint ea = M68KMAKE_GET_EA_AY_8;
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ local_offset = offset % 8;
+ if(local_offset < 0)
+ {
+ local_offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ data = m68ki_read_32(ea);
+ data = MASK_OUT_ABOVE_32(data< 32)
+ data |= (m68ki_read_8(ea+4) << local_offset) >> 8;
+
+ FLAG_N = NFLAG_32(data);
+ data >>= (32 - width);
+
+ FLAG_Z = data;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)
+ offset++;
+
+ REG_D[(word2>>12)&7] = offset;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(bfins, 32, ., d)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint offset = (word2>>6)&31;
+ uint width = word2;
+ uint* data = &DY;
+ uint64 mask;
+ uint64 insert = REG_D[(word2>>12)&7];
+
+
+ if(BIT_B(word2))
+ offset = REG_D[offset&7];
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+
+ offset &= 31;
+ width = ((width-1) & 31) + 1;
+
+
+ mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask = ROR_32(mask, offset);
+
+ insert = MASK_OUT_ABOVE_32(insert << (32 - width));
+ FLAG_N = NFLAG_32(insert);
+ FLAG_Z = insert;
+ insert = ROR_32(insert, offset);
+
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ *data &= ~mask;
+ *data |= insert;
+
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(bfins, 32, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ sint offset = (word2>>6)&31;
+ uint width = word2;
+ uint insert_base = REG_D[(word2>>12)&7];
+ uint insert_long;
+ uint insert_byte;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = M68KMAKE_GET_EA_AY_8;
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ insert_base = MASK_OUT_ABOVE_32(insert_base << (32 - width));
+ FLAG_N = NFLAG_32(insert_base);
+ FLAG_Z = insert_base;
+ insert_long = insert_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, (data_long & ~mask_long) | insert_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ insert_byte = MASK_OUT_ABOVE_8(insert_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, (data_byte & ~mask_byte) | insert_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(bfset, 32, ., d)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint offset = (word2>>6)&31;
+ uint width = word2;
+ uint* data = &DY;
+ uint64 mask;
+
+
+ if(BIT_B(word2))
+ offset = REG_D[offset&7];
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+
+ offset &= 31;
+ width = ((width-1) & 31) + 1;
+
+
+ mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask = ROR_32(mask, offset);
+
+ FLAG_N = NFLAG_32(*data<>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = M68KMAKE_GET_EA_AY_8;
+
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = NFLAG_32(data_long << offset);
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ m68ki_write_32(ea, data_long | mask_long);
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, data_byte | mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(bftst, 32, ., d)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint offset = (word2>>6)&31;
+ uint width = word2;
+ uint* data = &DY;
+ uint64 mask;
+
+
+ if(BIT_B(word2))
+ offset = REG_D[offset&7];
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+
+ offset &= 31;
+ width = ((width-1) & 31) + 1;
+
+
+ mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask = ROR_32(mask, offset);
+
+ FLAG_N = NFLAG_32(*data<>6)&31;
+ uint width = word2;
+ uint mask_base;
+ uint data_long;
+ uint mask_long;
+ uint data_byte = 0;
+ uint mask_byte = 0;
+ uint ea = M68KMAKE_GET_EA_AY_8;
+
+ if(BIT_B(word2))
+ offset = MAKE_INT_32(REG_D[offset&7]);
+ if(BIT_5(word2))
+ width = REG_D[width&7];
+
+ /* Offset is signed so we have to use ugly math =( */
+ ea += offset / 8;
+ offset %= 8;
+ if(offset < 0)
+ {
+ offset += 8;
+ ea--;
+ }
+ width = ((width-1) & 31) + 1;
+
+
+ mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
+ mask_long = mask_base >> offset;
+
+ data_long = m68ki_read_32(ea);
+ FLAG_N = ((data_long & (0x80000000 >> offset))<>24;
+ FLAG_Z = data_long & mask_long;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+
+ if((width + offset) > 32)
+ {
+ mask_byte = MASK_OUT_ABOVE_8(mask_base);
+ data_byte = m68ki_read_8(ea+4);
+ FLAG_Z |= (data_byte & mask_byte);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(bkpt, 0, ., .)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ m68ki_bkpt_ack(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE) ? REG_IR & 7 : 0); /* auto-disable (see m68kcpu.h) */
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(bra, 8, ., .)
+{
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
+ if(REG_PC == REG_PPC)
+ USE_ALL_CYCLES();
+}
+
+
+M68KMAKE_OP(bra, 16, ., .)
+{
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ if(REG_PC == REG_PPC)
+ USE_ALL_CYCLES();
+}
+
+
+M68KMAKE_OP(bra, 32, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint offset = OPER_I_32();
+ REG_PC -= 4;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_32(offset);
+ if(REG_PC == REG_PPC)
+ USE_ALL_CYCLES();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(bset, 32, r, d)
+{
+ uint* r_dst = &DY;
+ uint mask = 1 << (DX & 0x1f);
+
+ FLAG_Z = *r_dst & mask;
+ *r_dst |= mask;
+}
+
+
+M68KMAKE_OP(bset, 8, r, .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint src = m68ki_read_8(ea);
+ uint mask = 1 << (DX & 7);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src | mask);
+}
+
+
+M68KMAKE_OP(bset, 32, s, d)
+{
+ uint* r_dst = &DY;
+ uint mask = 1 << (OPER_I_8() & 0x1f);
+
+ FLAG_Z = *r_dst & mask;
+ *r_dst |= mask;
+}
+
+
+M68KMAKE_OP(bset, 8, s, .)
+{
+ uint mask = 1 << (OPER_I_8() & 7);
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint src = m68ki_read_8(ea);
+
+ FLAG_Z = src & mask;
+ m68ki_write_8(ea, src | mask);
+}
+
+
+M68KMAKE_OP(bsr, 8, ., .)
+{
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_push_32(REG_PC);
+ m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
+}
+
+
+M68KMAKE_OP(bsr, 16, ., .)
+{
+ uint offset = OPER_I_16();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_push_32(REG_PC);
+ REG_PC -= 2;
+ m68ki_branch_16(offset);
+}
+
+
+M68KMAKE_OP(bsr, 32, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint offset = OPER_I_32();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_push_32(REG_PC);
+ REG_PC -= 4;
+ m68ki_branch_32(offset);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(btst, 32, r, d)
+{
+ FLAG_Z = DY & (1 << (DX & 0x1f));
+}
+
+
+M68KMAKE_OP(btst, 8, r, .)
+{
+ FLAG_Z = M68KMAKE_GET_OPER_AY_8 & (1 << (DX & 7));
+}
+
+
+M68KMAKE_OP(btst, 32, s, d)
+{
+ FLAG_Z = DY & (1 << (OPER_I_8() & 0x1f));
+}
+
+
+M68KMAKE_OP(btst, 8, s, .)
+{
+ uint bit = OPER_I_8() & 7;
+
+ FLAG_Z = M68KMAKE_GET_OPER_AY_8 & (1 << bit);
+}
+
+
+M68KMAKE_OP(callm, 32, ., .)
+{
+ /* note: watch out for pcrelative modes */
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ {
+ uint ea = M68KMAKE_GET_EA_AY_32;
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ REG_PC += 2;
+(void)ea; /* just to avoid an 'unused variable' warning */
+ M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
+ m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(cas, 8, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint dest = m68ki_read_8(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - MASK_OUT_ABOVE_8(*compare);
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(*compare, dest, res);
+ FLAG_C = CFLAG_8(res);
+
+ if(COND_NE())
+ *compare = MASK_OUT_BELOW_8(*compare) | dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7]));
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(cas, 16, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ uint dest = m68ki_read_16(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - MASK_OUT_ABOVE_16(*compare);
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(*compare, dest, res);
+ FLAG_C = CFLAG_16(res);
+
+ if(COND_NE())
+ *compare = MASK_OUT_BELOW_16(*compare) | dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7]));
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(cas, 32, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint ea = M68KMAKE_GET_EA_AY_32;
+ uint dest = m68ki_read_32(ea);
+ uint* compare = ®_D[word2 & 7];
+ uint res = dest - *compare;
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(*compare, dest, res);
+ FLAG_C = CFLAG_SUB_32(*compare, dest, res);
+
+ if(COND_NE())
+ *compare = dest;
+ else
+ {
+ USE_CYCLES(3);
+ m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]);
+ }
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(cas2, 16, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_32();
+ uint* compare1 = ®_D[(word2 >> 16) & 7];
+ uint ea1 = REG_DA[(word2 >> 28) & 15];
+ uint dest1 = m68ki_read_16(ea1);
+ uint res1 = dest1 - MASK_OUT_ABOVE_16(*compare1);
+ uint* compare2 = ®_D[word2 & 7];
+ uint ea2 = REG_DA[(word2 >> 12) & 15];
+ uint dest2 = m68ki_read_16(ea2);
+ uint res2;
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_16(res1);
+ FLAG_Z = MASK_OUT_ABOVE_16(res1);
+ FLAG_V = VFLAG_SUB_16(*compare1, dest1, res1);
+ FLAG_C = CFLAG_16(res1);
+
+ if(COND_EQ())
+ {
+ res2 = dest2 - MASK_OUT_ABOVE_16(*compare2);
+
+ FLAG_N = NFLAG_16(res2);
+ FLAG_Z = MASK_OUT_ABOVE_16(res2);
+ FLAG_V = VFLAG_SUB_16(*compare2, dest2, res2);
+ FLAG_C = CFLAG_16(res2);
+
+ if(COND_EQ())
+ {
+ USE_CYCLES(3);
+ m68ki_write_16(ea1, REG_D[(word2 >> 22) & 7]);
+ m68ki_write_16(ea2, REG_D[(word2 >> 6) & 7]);
+ return;
+ }
+ }
+ *compare1 = BIT_1F(word2) ? MAKE_INT_16(dest1) : MASK_OUT_BELOW_16(*compare1) | dest1;
+ *compare2 = BIT_F(word2) ? MAKE_INT_16(dest2) : MASK_OUT_BELOW_16(*compare2) | dest2;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(cas2, 32, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_32();
+ uint* compare1 = ®_D[(word2 >> 16) & 7];
+ uint ea1 = REG_DA[(word2 >> 28) & 15];
+ uint dest1 = m68ki_read_32(ea1);
+ uint res1 = dest1 - *compare1;
+ uint* compare2 = ®_D[word2 & 7];
+ uint ea2 = REG_DA[(word2 >> 12) & 15];
+ uint dest2 = m68ki_read_32(ea2);
+ uint res2;
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ FLAG_N = NFLAG_32(res1);
+ FLAG_Z = MASK_OUT_ABOVE_32(res1);
+ FLAG_V = VFLAG_SUB_32(*compare1, dest1, res1);
+ FLAG_C = CFLAG_SUB_32(*compare1, dest1, res1);
+
+ if(COND_EQ())
+ {
+ res2 = dest2 - *compare2;
+
+ FLAG_N = NFLAG_32(res2);
+ FLAG_Z = MASK_OUT_ABOVE_32(res2);
+ FLAG_V = VFLAG_SUB_32(*compare2, dest2, res2);
+ FLAG_C = CFLAG_SUB_32(*compare2, dest2, res2);
+
+ if(COND_EQ())
+ {
+ USE_CYCLES(3);
+ m68ki_write_32(ea1, REG_D[(word2 >> 22) & 7]);
+ m68ki_write_32(ea2, REG_D[(word2 >> 6) & 7]);
+ return;
+ }
+ }
+ *compare1 = dest1;
+ *compare2 = dest2;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(chk, 16, ., d)
+{
+ sint src = MAKE_INT_16(DX);
+ sint bound = MAKE_INT_16(DY);
+
+ FLAG_Z = ZFLAG_16(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+}
+
+
+M68KMAKE_OP(chk, 16, ., .)
+{
+ sint src = MAKE_INT_16(DX);
+ sint bound = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
+
+ FLAG_Z = ZFLAG_16(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+}
+
+
+M68KMAKE_OP(chk, 32, ., d)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ sint src = MAKE_INT_32(DX);
+ sint bound = MAKE_INT_32(DY);
+
+ FLAG_Z = ZFLAG_32(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(chk, 32, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ sint src = MAKE_INT_32(DX);
+ sint bound = MAKE_INT_32(M68KMAKE_GET_OPER_AY_32);
+
+ FLAG_Z = ZFLAG_32(src); /* Undocumented */
+ FLAG_V = VFLAG_CLEAR; /* Undocumented */
+ FLAG_C = CFLAG_CLEAR; /* Undocumented */
+
+ if(src >= 0 && src <= bound)
+ {
+ return;
+ }
+ FLAG_N = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(chk2cmp2, 8, ., pcdi)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15]&0xff;
+ uint ea = EA_PCDI_8();
+ uint lower_bound = m68ki_read_pcrel_8(ea);
+ uint upper_bound = m68ki_read_pcrel_8(ea + 1);
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);
+ else
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ FLAG_C = upper_bound - compare;
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(chk2cmp2, 8, ., pcix)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15]&0xff;
+ uint ea = EA_PCIX_8();
+ uint lower_bound = m68ki_read_pcrel_8(ea);
+ uint upper_bound = m68ki_read_pcrel_8(ea + 1);
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);
+ else
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ FLAG_C = upper_bound - compare;
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(chk2cmp2, 8, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15]&0xff;
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint lower_bound = m68ki_read_8(ea);
+ uint upper_bound = m68ki_read_8(ea + 1);
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);
+ else
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ FLAG_C = upper_bound - compare;
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(chk2cmp2, 16, ., pcdi)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15]&0xffff;
+ uint ea = EA_PCDI_16();
+ uint lower_bound = m68ki_read_pcrel_16(ea);
+ uint upper_bound = m68ki_read_pcrel_16(ea + 2);
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);
+ else
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ FLAG_C = CFLAG_16(FLAG_C);
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);
+ else
+ FLAG_C = upper_bound - compare;
+ FLAG_C = CFLAG_16(FLAG_C);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(chk2cmp2, 16, ., pcix)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15]&0xffff;
+ uint ea = EA_PCIX_16();
+ uint lower_bound = m68ki_read_pcrel_16(ea);
+ uint upper_bound = m68ki_read_pcrel_16(ea + 2);
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);
+ else
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ FLAG_C = CFLAG_16(FLAG_C);
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);
+ else
+ FLAG_C = upper_bound - compare;
+ FLAG_C = CFLAG_16(FLAG_C);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(chk2cmp2, 16, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15]&0xffff;
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ uint lower_bound = m68ki_read_16(ea);
+ uint upper_bound = m68ki_read_16(ea + 2);
+
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);
+ else
+ FLAG_C = compare - lower_bound;
+
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ FLAG_C = CFLAG_16(FLAG_C);
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ if(!BIT_F(word2))
+ FLAG_C = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);
+ else
+ FLAG_C = upper_bound - compare;
+
+ FLAG_C = CFLAG_16(FLAG_C);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(chk2cmp2, 32, ., pcdi)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15];
+ uint ea = EA_PCDI_32();
+ uint lower_bound = m68ki_read_pcrel_32(ea);
+ uint upper_bound = m68ki_read_pcrel_32(ea + 4);
+
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C);
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ FLAG_C = upper_bound - compare;
+ FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(chk2cmp2, 32, ., pcix)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15];
+ uint ea = EA_PCIX_32();
+ uint lower_bound = m68ki_read_pcrel_32(ea);
+ uint upper_bound = m68ki_read_pcrel_32(ea + 4);
+
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C);
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ FLAG_C = upper_bound - compare;
+ FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(chk2cmp2, 32, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint compare = REG_DA[(word2 >> 12) & 15];
+ uint ea = M68KMAKE_GET_EA_AY_32;
+ uint lower_bound = m68ki_read_32(ea);
+ uint upper_bound = m68ki_read_32(ea + 4);
+
+ FLAG_C = compare - lower_bound;
+ FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
+ FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C);
+ if(COND_CS())
+ {
+ if(BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+
+ FLAG_C = upper_bound - compare;
+ FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(clr, 8, ., d)
+{
+ DY &= 0xffffff00;
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+M68KMAKE_OP(clr, 8, ., .)
+{
+ m68ki_write_8(M68KMAKE_GET_EA_AY_8, 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+M68KMAKE_OP(clr, 16, ., d)
+{
+ DY &= 0xffff0000;
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+M68KMAKE_OP(clr, 16, ., .)
+{
+ m68ki_write_16(M68KMAKE_GET_EA_AY_16, 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+M68KMAKE_OP(clr, 32, ., d)
+{
+ DY = 0;
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+M68KMAKE_OP(clr, 32, ., .)
+{
+ m68ki_write_32(M68KMAKE_GET_EA_AY_32, 0);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+}
+
+
+M68KMAKE_OP(cmp, 8, ., d)
+{
+ uint src = MASK_OUT_ABOVE_8(DY);
+ uint dst = MASK_OUT_ABOVE_8(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+M68KMAKE_OP(cmp, 8, ., .)
+{
+ uint src = M68KMAKE_GET_OPER_AY_8;
+ uint dst = MASK_OUT_ABOVE_8(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+M68KMAKE_OP(cmp, 16, ., d)
+{
+ uint src = MASK_OUT_ABOVE_16(DY);
+ uint dst = MASK_OUT_ABOVE_16(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+M68KMAKE_OP(cmp, 16, ., a)
+{
+ uint src = MASK_OUT_ABOVE_16(AY);
+ uint dst = MASK_OUT_ABOVE_16(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+M68KMAKE_OP(cmp, 16, ., .)
+{
+ uint src = M68KMAKE_GET_OPER_AY_16;
+ uint dst = MASK_OUT_ABOVE_16(DX);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+M68KMAKE_OP(cmp, 32, ., d)
+{
+ uint src = DY;
+ uint dst = DX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+M68KMAKE_OP(cmp, 32, ., a)
+{
+ uint src = AY;
+ uint dst = DX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+M68KMAKE_OP(cmp, 32, ., .)
+{
+ uint src = M68KMAKE_GET_OPER_AY_32;
+ uint dst = DX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+M68KMAKE_OP(cmpa, 16, ., d)
+{
+ uint src = MAKE_INT_16(DY);
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+M68KMAKE_OP(cmpa, 16, ., a)
+{
+ uint src = MAKE_INT_16(AY);
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+M68KMAKE_OP(cmpa, 16, ., .)
+{
+ uint src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+M68KMAKE_OP(cmpa, 32, ., d)
+{
+ uint src = DY;
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+M68KMAKE_OP(cmpa, 32, ., a)
+{
+ uint src = AY;
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+M68KMAKE_OP(cmpa, 32, ., .)
+{
+ uint src = M68KMAKE_GET_OPER_AY_32;
+ uint dst = AX;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+M68KMAKE_OP(cmpi, 8, ., d)
+{
+ uint src = OPER_I_8();
+ uint dst = MASK_OUT_ABOVE_8(DY);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+M68KMAKE_OP(cmpi, 8, ., .)
+{
+ uint src = OPER_I_8();
+ uint dst = M68KMAKE_GET_OPER_AY_8;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+M68KMAKE_OP(cmpi, 8, ., pcdi)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint src = OPER_I_8();
+ uint dst = OPER_PCDI_8();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(cmpi, 8, ., pcix)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint src = OPER_I_8();
+ uint dst = OPER_PCIX_8();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(cmpi, 16, ., d)
+{
+ uint src = OPER_I_16();
+ uint dst = MASK_OUT_ABOVE_16(DY);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+M68KMAKE_OP(cmpi, 16, ., .)
+{
+ uint src = OPER_I_16();
+ uint dst = M68KMAKE_GET_OPER_AY_16;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+M68KMAKE_OP(cmpi, 16, ., pcdi)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint src = OPER_I_16();
+ uint dst = OPER_PCDI_16();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(cmpi, 16, ., pcix)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint src = OPER_I_16();
+ uint dst = OPER_PCIX_16();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(cmpi, 32, ., d)
+{
+ uint src = OPER_I_32();
+ uint dst = DY;
+ uint res = dst - src;
+
+ m68ki_cmpild_callback(src, REG_IR & 7); /* auto-disable (see m68kcpu.h) */
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+M68KMAKE_OP(cmpi, 32, ., .)
+{
+ uint src = OPER_I_32();
+ uint dst = M68KMAKE_GET_OPER_AY_32;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+M68KMAKE_OP(cmpi, 32, ., pcdi)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint src = OPER_I_32();
+ uint dst = OPER_PCDI_32();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(cmpi, 32, ., pcix)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint src = OPER_I_32();
+ uint dst = OPER_PCIX_32();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(cmpm, 8, ., ax7)
+{
+ uint src = OPER_AY_PI_8();
+ uint dst = OPER_A7_PI_8();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+M68KMAKE_OP(cmpm, 8, ., ay7)
+{
+ uint src = OPER_A7_PI_8();
+ uint dst = OPER_AX_PI_8();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+M68KMAKE_OP(cmpm, 8, ., axy7)
+{
+ uint src = OPER_A7_PI_8();
+ uint dst = OPER_A7_PI_8();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+M68KMAKE_OP(cmpm, 8, ., .)
+{
+ uint src = OPER_AY_PI_8();
+ uint dst = OPER_AX_PI_8();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_C = CFLAG_8(res);
+}
+
+
+M68KMAKE_OP(cmpm, 16, ., .)
+{
+ uint src = OPER_AY_PI_16();
+ uint dst = OPER_AX_PI_16();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_C = CFLAG_16(res);
+}
+
+
+M68KMAKE_OP(cmpm, 32, ., .)
+{
+ uint src = OPER_AY_PI_32();
+ uint dst = OPER_AX_PI_32();
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_C = CFLAG_SUB_32(src, dst, res);
+}
+
+
+M68KMAKE_OP(cpbcc, 32, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
+ m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
+ return;
+ }
+ m68ki_exception_1111();
+}
+
+
+M68KMAKE_OP(cpdbcc, 32, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
+ m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
+ return;
+ }
+ m68ki_exception_1111();
+}
+
+
+M68KMAKE_OP(cpgen, 32, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
+ m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
+ return;
+ }
+ m68ki_exception_1111();
+}
+
+
+M68KMAKE_OP(cpscc, 32, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
+ m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
+ return;
+ }
+ m68ki_exception_1111();
+}
+
+
+M68KMAKE_OP(cptrapcc, 32, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
+ m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
+ return;
+ }
+ m68ki_exception_1111();
+}
+
+
+M68KMAKE_OP(dbt, 16, ., .)
+{
+ REG_PC += 2;
+}
+
+
+M68KMAKE_OP(dbf, 16, ., .)
+{
+ uint* r_dst = &DY;
+ uint res = MASK_OUT_ABOVE_16(*r_dst - 1);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+ if(res != 0xffff)
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ return;
+ }
+ REG_PC += 2;
+}
+
+
+M68KMAKE_OP(dbcc, 16, ., .)
+{
+ if(M68KMAKE_NOT_CC)
+ {
+ uint* r_dst = &DY;
+ uint res = MASK_OUT_ABOVE_16(*r_dst - 1);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+ if(res != 0xffff)
+ {
+ uint offset = OPER_I_16();
+ REG_PC -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ USE_CYCLES(CYC_DBCC_F_NOEXP);
+ return;
+ }
+ REG_PC += 2;
+ USE_CYCLES(CYC_DBCC_F_EXP);
+ return;
+ }
+ REG_PC += 2;
+}
+
+
+M68KMAKE_OP(divs, 16, ., d)
+{
+ uint* r_dst = &DX;
+ sint src = MAKE_INT_16(DY);
+ sint quotient;
+ sint remainder;
+
+ if(src != 0)
+ {
+ if((uint32)*r_dst == 0x80000000 && src == -1)
+ {
+ FLAG_Z = 0;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = 0;
+ return;
+ }
+
+ quotient = MAKE_INT_32(*r_dst) / src;
+ remainder = MAKE_INT_32(*r_dst) % src;
+
+ if(quotient == MAKE_INT_16(quotient))
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+M68KMAKE_OP(divs, 16, ., .)
+{
+ uint* r_dst = &DX;
+ sint src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
+ sint quotient;
+ sint remainder;
+
+ if(src != 0)
+ {
+ if((uint32)*r_dst == 0x80000000 && src == -1)
+ {
+ FLAG_Z = 0;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = 0;
+ return;
+ }
+
+ quotient = MAKE_INT_32(*r_dst) / src;
+ remainder = MAKE_INT_32(*r_dst) % src;
+
+ if(quotient == MAKE_INT_16(quotient))
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+M68KMAKE_OP(divu, 16, ., d)
+{
+ uint* r_dst = &DX;
+ uint src = MASK_OUT_ABOVE_16(DY);
+
+ if(src != 0)
+ {
+ uint quotient = *r_dst / src;
+ uint remainder = *r_dst % src;
+
+ if(quotient < 0x10000)
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+M68KMAKE_OP(divu, 16, ., .)
+{
+ uint* r_dst = &DX;
+ uint src = M68KMAKE_GET_OPER_AY_16;
+
+ if(src != 0)
+ {
+ uint quotient = *r_dst / src;
+ uint remainder = *r_dst % src;
+
+ if(quotient < 0x10000)
+ {
+ FLAG_Z = quotient;
+ FLAG_N = NFLAG_16(quotient);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
+ return;
+ }
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+}
+
+
+M68KMAKE_OP(divl, 32, ., d)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 divisor = DY;
+ uint64 dividend = 0;
+ uint64 quotient = 0;
+ uint64 remainder = 0;
+
+ if(divisor != 0)
+ {
+ if(BIT_A(word2)) /* 64 bit */
+ {
+ dividend = REG_D[word2 & 7];
+ dividend <<= 32;
+ dividend |= REG_D[(word2 >> 12) & 7];
+
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));
+ if((sint64)quotient != (sint64)((sint32)quotient))
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ if(quotient > 0xffffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ remainder = dividend % divisor;
+ }
+ }
+ else /* 32 bit */
+ {
+ dividend = REG_D[(word2 >> 12) & 7];
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ remainder = dividend % divisor;
+ }
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint divisor = DY;
+ uint dividend_hi = REG_D[word2 & 7];
+ uint dividend_lo = REG_D[(word2 >> 12) & 7];
+ uint quotient = 0;
+ uint remainder = 0;
+ uint dividend_neg = 0;
+ uint divisor_neg = 0;
+ sint i;
+ uint overflow;
+
+ if(divisor != 0)
+ {
+ /* quad / long : long quotient, long remainder */
+ if(BIT_A(word2))
+ {
+ if(BIT_B(word2)) /* signed */
+ {
+ /* special case in signed divide */
+ if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ REG_D[word2 & 7] = 0;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ if(GET_MSB_32(dividend_hi))
+ {
+ dividend_neg = 1;
+ dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));
+ dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);
+ }
+ if(GET_MSB_32(divisor))
+ {
+ divisor_neg = 1;
+ divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);
+
+ }
+ }
+
+ /* if the upper long is greater than the divisor, we're overflowing. */
+ if(dividend_hi >= divisor)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ remainder = (remainder << 1) + ((dividend_hi >> i) & 1);
+ if(remainder >= divisor)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ overflow = GET_MSB_32(remainder);
+ remainder = (remainder << 1) + ((dividend_lo >> i) & 1);
+ if(remainder >= divisor || overflow)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(quotient > 0x7fffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ if(dividend_neg)
+ {
+ remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+ if(divisor_neg)
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+
+ /* long / long: long quotient, maybe long remainder */
+ if(BIT_B(word2)) /* signed */
+ {
+ /* Special case in divide */
+ if(dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+ REG_D[word2 & 7] = 0;
+ return;
+ }
+ REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);
+ }
+ else
+ {
+ REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);
+ }
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+M68KMAKE_OP(divl, 32, ., .)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 divisor = M68KMAKE_GET_OPER_AY_32;
+ uint64 dividend = 0;
+ uint64 quotient = 0;
+ uint64 remainder = 0;
+
+ if(divisor != 0)
+ {
+ if(BIT_A(word2)) /* 64 bit */
+ {
+ dividend = REG_D[word2 & 7];
+ dividend <<= 32;
+ dividend |= REG_D[(word2 >> 12) & 7];
+
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));
+ if((sint64)quotient != (sint64)((sint32)quotient))
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ if(quotient > 0xffffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ remainder = dividend % divisor;
+ }
+ }
+ else /* 32 bit */
+ {
+ dividend = REG_D[(word2 >> 12) & 7];
+ if(BIT_B(word2)) /* signed */
+ {
+ quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));
+ remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));
+ }
+ else /* unsigned */
+ {
+ quotient = dividend / divisor;
+ remainder = dividend % divisor;
+ }
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint divisor = M68KMAKE_GET_OPER_AY_32;
+ uint dividend_hi = REG_D[word2 & 7];
+ uint dividend_lo = REG_D[(word2 >> 12) & 7];
+ uint quotient = 0;
+ uint remainder = 0;
+ uint dividend_neg = 0;
+ uint divisor_neg = 0;
+ sint i;
+ uint overflow;
+
+ if(divisor != 0)
+ {
+ /* quad / long : long quotient, long remainder */
+ if(BIT_A(word2))
+ {
+ if(BIT_B(word2)) /* signed */
+ {
+ /* special case in signed divide */
+ if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ REG_D[word2 & 7] = 0;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ if(GET_MSB_32(dividend_hi))
+ {
+ dividend_neg = 1;
+ dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));
+ dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);
+ }
+ if(GET_MSB_32(divisor))
+ {
+ divisor_neg = 1;
+ divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);
+
+ }
+ }
+
+ /* if the upper long is greater than the divisor, we're overflowing. */
+ if(dividend_hi >= divisor)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ remainder = (remainder << 1) + ((dividend_hi >> i) & 1);
+ if(remainder >= divisor)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+ for(i = 31; i >= 0; i--)
+ {
+ quotient <<= 1;
+ overflow = GET_MSB_32(remainder);
+ remainder = (remainder << 1) + ((dividend_lo >> i) & 1);
+ if(remainder >= divisor || overflow)
+ {
+ remainder -= divisor;
+ quotient++;
+ }
+ }
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(quotient > 0x7fffffff)
+ {
+ FLAG_V = VFLAG_SET;
+ return;
+ }
+ if(dividend_neg)
+ {
+ remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+ if(divisor_neg)
+ quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
+ }
+
+ REG_D[word2 & 7] = remainder;
+ REG_D[(word2 >> 12) & 7] = quotient;
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+
+ /* long / long: long quotient, maybe long remainder */
+ if(BIT_B(word2)) /* signed */
+ {
+ /* Special case in divide */
+ if(dividend_lo == 0x80000000 && divisor == 0xffffffff)
+ {
+ FLAG_N = NFLAG_SET;
+ FLAG_Z = ZFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ REG_D[(word2 >> 12) & 7] = 0x80000000;
+ REG_D[word2 & 7] = 0;
+ return;
+ }
+ REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);
+ }
+ else
+ {
+ REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);
+ quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);
+ }
+
+ FLAG_N = NFLAG_32(quotient);
+ FLAG_Z = quotient;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+M68KMAKE_OP(eor, 8, ., d)
+{
+ uint res = MASK_OUT_ABOVE_8(DY ^= MASK_OUT_ABOVE_8(DX));
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(eor, 8, ., .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(eor, 16, ., d)
+{
+ uint res = MASK_OUT_ABOVE_16(DY ^= MASK_OUT_ABOVE_16(DX));
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(eor, 16, ., .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(eor, 32, ., d)
+{
+ uint res = DY ^= DX;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(eor, 32, ., .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_32;
+ uint res = DX ^ m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(eori, 8, ., d)
+{
+ uint res = MASK_OUT_ABOVE_8(DY ^= OPER_I_8());
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(eori, 8, ., .)
+{
+ uint src = OPER_I_8();
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint res = src ^ m68ki_read_8(ea);
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(eori, 16, ., d)
+{
+ uint res = MASK_OUT_ABOVE_16(DY ^= OPER_I_16());
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(eori, 16, ., .)
+{
+ uint src = OPER_I_16();
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ uint res = src ^ m68ki_read_16(ea);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(eori, 32, ., d)
+{
+ uint res = DY ^= OPER_I_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(eori, 32, ., .)
+{
+ uint src = OPER_I_32();
+ uint ea = M68KMAKE_GET_EA_AY_32;
+ uint res = src ^ m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(eori, 16, toc, .)
+{
+ m68ki_set_ccr(m68ki_get_ccr() ^ OPER_I_16());
+}
+
+
+M68KMAKE_OP(eori, 16, tos, .)
+{
+ if(FLAG_S)
+ {
+ uint src = OPER_I_16();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_set_sr(m68ki_get_sr() ^ src);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+M68KMAKE_OP(exg, 32, dd, .)
+{
+ uint* reg_a = &DX;
+ uint* reg_b = &DY;
+ uint tmp = *reg_a;
+ *reg_a = *reg_b;
+ *reg_b = tmp;
+}
+
+
+M68KMAKE_OP(exg, 32, aa, .)
+{
+ uint* reg_a = &AX;
+ uint* reg_b = &AY;
+ uint tmp = *reg_a;
+ *reg_a = *reg_b;
+ *reg_b = tmp;
+}
+
+
+M68KMAKE_OP(exg, 32, da, .)
+{
+ uint* reg_a = &DX;
+ uint* reg_b = &AY;
+ uint tmp = *reg_a;
+ *reg_a = *reg_b;
+ *reg_b = tmp;
+}
+
+
+M68KMAKE_OP(ext, 16, ., .)
+{
+ uint* r_dst = &DY;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xff00 : 0);
+
+ FLAG_N = NFLAG_16(*r_dst);
+ FLAG_Z = MASK_OUT_ABOVE_16(*r_dst);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(ext, 32, ., .)
+{
+ uint* r_dst = &DY;
+
+ *r_dst = MASK_OUT_ABOVE_16(*r_dst) | (GET_MSB_16(*r_dst) ? 0xffff0000 : 0);
+
+ FLAG_N = NFLAG_32(*r_dst);
+ FLAG_Z = *r_dst;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(extb, 32, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint* r_dst = &DY;
+
+ *r_dst = MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xffffff00 : 0);
+
+ FLAG_N = NFLAG_32(*r_dst);
+ FLAG_Z = *r_dst;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(illegal, 0, ., .)
+{
+ m68ki_exception_illegal();
+}
+
+M68KMAKE_OP(jmp, 32, ., .)
+{
+ m68ki_jump(M68KMAKE_GET_EA_AY_32);
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(REG_PC == REG_PPC)
+ USE_ALL_CYCLES();
+}
+
+
+M68KMAKE_OP(jsr, 32, ., .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_32;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_push_32(REG_PC);
+ m68ki_jump(ea);
+}
+
+
+M68KMAKE_OP(lea, 32, ., .)
+{
+ AX = M68KMAKE_GET_EA_AY_32;
+}
+
+
+M68KMAKE_OP(link, 16, ., a7)
+{
+ REG_A[7] -= 4;
+ m68ki_write_32(REG_A[7], REG_A[7]);
+ REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16()));
+}
+
+
+M68KMAKE_OP(link, 16, ., .)
+{
+ uint* r_dst = &AY;
+
+ m68ki_push_32(*r_dst);
+ *r_dst = REG_A[7];
+ REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16()));
+}
+
+
+M68KMAKE_OP(link, 32, ., a7)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ REG_A[7] -= 4;
+ m68ki_write_32(REG_A[7], REG_A[7]);
+ REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32());
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(link, 32, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint* r_dst = &AY;
+
+ m68ki_push_32(*r_dst);
+ *r_dst = REG_A[7];
+ REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32());
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(lsr, 8, s, .)
+{
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = src >> shift;
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = src >> shift;
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 9) - 1) & 7) + 1;
+ uint src = *r_dst;
+ uint res = src >> shift;
+
+ if(shift != 0)
+ USE_CYCLES(shift<> shift;
+
+ if(shift != 0)
+ {
+ USE_CYCLES(shift<> shift;
+
+ if(shift != 0)
+ {
+ USE_CYCLES(shift<> (shift - 1))<<8;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ *r_dst &= 0xffff0000;
+ FLAG_X = XFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_16(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(lsr, 32, r, .)
+{
+ uint* r_dst = &DY;
+ uint shift = DX & 0x3f;
+ uint src = *r_dst;
+ uint res = src >> shift;
+
+ if(shift != 0)
+ {
+ USE_CYCLES(shift<> (shift - 1))<<8;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ *r_dst = 0;
+ FLAG_X = FLAG_C = (shift == 32 ? GET_MSB_32(src)>>23 : 0);
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_32(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(lsr, 16, ., .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ uint src = m68ki_read_16(ea);
+ uint res = src >> 1;
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = res;
+ FLAG_C = FLAG_X = src << 8;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(lsl, 8, s, .)
+{
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = MASK_OUT_ABOVE_8(src << shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = MASK_OUT_ABOVE_16(src << shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> (8-shift);
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(lsl, 32, s, .)
+{
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint src = *r_dst;
+ uint res = MASK_OUT_ABOVE_32(src << shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> (24-shift);
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(lsl, 8, r, .)
+{
+ uint* r_dst = &DY;
+ uint shift = DX & 0x3f;
+ uint src = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = MASK_OUT_ABOVE_8(src << shift);
+
+ if(shift != 0)
+ {
+ USE_CYCLES(shift<> 8;
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ *r_dst &= 0xffff0000;
+ FLAG_X = XFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_16(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(lsl, 32, r, .)
+{
+ uint* r_dst = &DY;
+ uint shift = DX & 0x3f;
+ uint src = *r_dst;
+ uint res = MASK_OUT_ABOVE_32(src << shift);
+
+ if(shift != 0)
+ {
+ USE_CYCLES(shift<> (32 - shift)) << 8;
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ *r_dst = 0;
+ FLAG_X = FLAG_C = ((shift == 32 ? src & 1 : 0))<<8;
+ FLAG_N = NFLAG_CLEAR;
+ FLAG_Z = ZFLAG_SET;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_32(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(lsl, 16, ., .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(src << 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_X = FLAG_C = src >> 7;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 8, d, d)
+{
+ uint res = MASK_OUT_ABOVE_8(DY);
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 8, d, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_8;
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 8, ai, d)
+{
+ uint res = MASK_OUT_ABOVE_8(DY);
+ uint ea = EA_AX_AI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 8, ai, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_8;
+ uint ea = EA_AX_AI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 8, pi7, d)
+{
+ uint res = MASK_OUT_ABOVE_8(DY);
+ uint ea = EA_A7_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 8, pi, d)
+{
+ uint res = MASK_OUT_ABOVE_8(DY);
+ uint ea = EA_AX_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 8, pi7, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_8;
+ uint ea = EA_A7_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 8, pi, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_8;
+ uint ea = EA_AX_PI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 8, pd7, d)
+{
+ uint res = MASK_OUT_ABOVE_8(DY);
+ uint ea = EA_A7_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 8, pd, d)
+{
+ uint res = MASK_OUT_ABOVE_8(DY);
+ uint ea = EA_AX_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 8, pd7, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_8;
+ uint ea = EA_A7_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 8, pd, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_8;
+ uint ea = EA_AX_PD_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 8, di, d)
+{
+ uint res = MASK_OUT_ABOVE_8(DY);
+ uint ea = EA_AX_DI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 8, di, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_8;
+ uint ea = EA_AX_DI_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 8, ix, d)
+{
+ uint res = MASK_OUT_ABOVE_8(DY);
+ uint ea = EA_AX_IX_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 8, ix, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_8;
+ uint ea = EA_AX_IX_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 8, aw, d)
+{
+ uint res = MASK_OUT_ABOVE_8(DY);
+ uint ea = EA_AW_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 8, aw, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_8;
+ uint ea = EA_AW_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 8, al, d)
+{
+ uint res = MASK_OUT_ABOVE_8(DY);
+ uint ea = EA_AL_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 8, al, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_8;
+ uint ea = EA_AL_8();
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, d, d)
+{
+ uint res = MASK_OUT_ABOVE_16(DY);
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, d, a)
+{
+ uint res = MASK_OUT_ABOVE_16(AY);
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, d, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_16;
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, ai, d)
+{
+ uint res = MASK_OUT_ABOVE_16(DY);
+ uint ea = EA_AX_AI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, ai, a)
+{
+ uint res = MASK_OUT_ABOVE_16(AY);
+ uint ea = EA_AX_AI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, ai, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_16;
+ uint ea = EA_AX_AI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, pi, d)
+{
+ uint res = MASK_OUT_ABOVE_16(DY);
+ uint ea = EA_AX_PI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, pi, a)
+{
+ uint res = MASK_OUT_ABOVE_16(AY);
+ uint ea = EA_AX_PI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, pi, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_16;
+ uint ea = EA_AX_PI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, pd, d)
+{
+ uint res = MASK_OUT_ABOVE_16(DY);
+ uint ea = EA_AX_PD_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, pd, a)
+{
+ uint res = MASK_OUT_ABOVE_16(AY);
+ uint ea = EA_AX_PD_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, pd, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_16;
+ uint ea = EA_AX_PD_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, di, d)
+{
+ uint res = MASK_OUT_ABOVE_16(DY);
+ uint ea = EA_AX_DI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, di, a)
+{
+ uint res = MASK_OUT_ABOVE_16(AY);
+ uint ea = EA_AX_DI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, di, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_16;
+ uint ea = EA_AX_DI_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, ix, d)
+{
+ uint res = MASK_OUT_ABOVE_16(DY);
+ uint ea = EA_AX_IX_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, ix, a)
+{
+ uint res = MASK_OUT_ABOVE_16(AY);
+ uint ea = EA_AX_IX_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, ix, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_16;
+ uint ea = EA_AX_IX_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, aw, d)
+{
+ uint res = MASK_OUT_ABOVE_16(DY);
+ uint ea = EA_AW_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, aw, a)
+{
+ uint res = MASK_OUT_ABOVE_16(AY);
+ uint ea = EA_AW_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, aw, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_16;
+ uint ea = EA_AW_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, al, d)
+{
+ uint res = MASK_OUT_ABOVE_16(DY);
+ uint ea = EA_AL_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, al, a)
+{
+ uint res = MASK_OUT_ABOVE_16(AY);
+ uint ea = EA_AL_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 16, al, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_16;
+ uint ea = EA_AL_16();
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, d, d)
+{
+ uint res = DY;
+ uint* r_dst = &DX;
+
+ *r_dst = res;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, d, a)
+{
+ uint res = AY;
+ uint* r_dst = &DX;
+
+ *r_dst = res;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, d, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_32;
+ uint* r_dst = &DX;
+
+ *r_dst = res;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, ai, d)
+{
+ uint res = DY;
+ uint ea = EA_AX_AI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, ai, a)
+{
+ uint res = AY;
+ uint ea = EA_AX_AI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, ai, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_32;
+ uint ea = EA_AX_AI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, pi, d)
+{
+ uint res = DY;
+ uint ea = EA_AX_PI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, pi, a)
+{
+ uint res = AY;
+ uint ea = EA_AX_PI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, pi, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_32;
+ uint ea = EA_AX_PI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, pd, d)
+{
+ uint res = DY;
+ uint ea = EA_AX_PD_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, pd, a)
+{
+ uint res = AY;
+ uint ea = EA_AX_PD_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, pd, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_32;
+ uint ea = EA_AX_PD_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, di, d)
+{
+ uint res = DY;
+ uint ea = EA_AX_DI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, di, a)
+{
+ uint res = AY;
+ uint ea = EA_AX_DI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, di, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_32;
+ uint ea = EA_AX_DI_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, ix, d)
+{
+ uint res = DY;
+ uint ea = EA_AX_IX_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, ix, a)
+{
+ uint res = AY;
+ uint ea = EA_AX_IX_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, ix, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_32;
+ uint ea = EA_AX_IX_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, aw, d)
+{
+ uint res = DY;
+ uint ea = EA_AW_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, aw, a)
+{
+ uint res = AY;
+ uint ea = EA_AW_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, aw, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_32;
+ uint ea = EA_AW_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, al, d)
+{
+ uint res = DY;
+ uint ea = EA_AL_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, al, a)
+{
+ uint res = AY;
+ uint ea = EA_AL_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(move, 32, al, .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_32;
+ uint ea = EA_AL_32();
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(movea, 16, ., d)
+{
+ AX = MAKE_INT_16(DY);
+}
+
+
+M68KMAKE_OP(movea, 16, ., a)
+{
+ AX = MAKE_INT_16(AY);
+}
+
+
+M68KMAKE_OP(movea, 16, ., .)
+{
+ AX = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
+}
+
+
+M68KMAKE_OP(movea, 32, ., d)
+{
+ AX = DY;
+}
+
+
+M68KMAKE_OP(movea, 32, ., a)
+{
+ AX = AY;
+}
+
+
+M68KMAKE_OP(movea, 32, ., .)
+{
+ AX = M68KMAKE_GET_OPER_AY_32;
+}
+
+
+M68KMAKE_OP(move, 16, frc, d)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ DY = MASK_OUT_BELOW_16(DY) | m68ki_get_ccr();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(move, 16, frc, .)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ m68ki_write_16(M68KMAKE_GET_EA_AY_16, m68ki_get_ccr());
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(move, 16, toc, d)
+{
+ m68ki_set_ccr(DY);
+}
+
+
+M68KMAKE_OP(move, 16, toc, .)
+{
+ m68ki_set_ccr(M68KMAKE_GET_OPER_AY_16);
+}
+
+
+M68KMAKE_OP(move, 16, frs, d)
+{
+ if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */
+ {
+ DY = MASK_OUT_BELOW_16(DY) | m68ki_get_sr();
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+M68KMAKE_OP(move, 16, frs, .)
+{
+ if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */
+ {
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ m68ki_write_16(ea, m68ki_get_sr());
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+M68KMAKE_OP(move, 16, tos, d)
+{
+ if(FLAG_S)
+ {
+ m68ki_set_sr(DY);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+M68KMAKE_OP(move, 16, tos, .)
+{
+ if(FLAG_S)
+ {
+ uint new_sr = M68KMAKE_GET_OPER_AY_16;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_set_sr(new_sr);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+M68KMAKE_OP(move, 32, fru, .)
+{
+ if(FLAG_S)
+ {
+ AY = REG_USP;
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+M68KMAKE_OP(move, 32, tou, .)
+{
+ if(FLAG_S)
+ {
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ REG_USP = AY;
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+M68KMAKE_OP(movec, 32, cr, .)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ switch (word2 & 0xfff)
+ {
+ case 0x000: /* SFC */
+ REG_DA[(word2 >> 12) & 15] = REG_SFC;
+ return;
+ case 0x001: /* DFC */
+ REG_DA[(word2 >> 12) & 15] = REG_DFC;
+ return;
+ case 0x002: /* CACR */
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ REG_DA[(word2 >> 12) & 15] = REG_CACR;
+ return;
+ }
+ return;
+ case 0x800: /* USP */
+ REG_DA[(word2 >> 12) & 15] = REG_USP;
+ return;
+ case 0x801: /* VBR */
+ REG_DA[(word2 >> 12) & 15] = REG_VBR;
+ return;
+ case 0x802: /* CAAR */
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ REG_DA[(word2 >> 12) & 15] = REG_CAAR;
+ return;
+ }
+ m68ki_exception_illegal();
+ break;
+ case 0x803: /* MSP */
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ REG_DA[(word2 >> 12) & 15] = FLAG_M ? REG_SP : REG_MSP;
+ return;
+ }
+ m68ki_exception_illegal();
+ return;
+ case 0x804: /* ISP */
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ REG_DA[(word2 >> 12) & 15] = FLAG_M ? REG_ISP : REG_SP;
+ return;
+ }
+ m68ki_exception_illegal();
+ return;
+ default:
+ m68ki_exception_illegal();
+ return;
+ }
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(movec, 32, rc, .)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ switch (word2 & 0xfff)
+ {
+ case 0x000: /* SFC */
+ REG_SFC = REG_DA[(word2 >> 12) & 15] & 7;
+ return;
+ case 0x001: /* DFC */
+ REG_DFC = REG_DA[(word2 >> 12) & 15] & 7;
+ return;
+ case 0x002: /* CACR */
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ REG_CACR = REG_DA[(word2 >> 12) & 15];
+ return;
+ }
+ m68ki_exception_illegal();
+ return;
+ case 0x800: /* USP */
+ REG_USP = REG_DA[(word2 >> 12) & 15];
+ return;
+ case 0x801: /* VBR */
+ REG_VBR = REG_DA[(word2 >> 12) & 15];
+ return;
+ case 0x802: /* CAAR */
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ REG_CAAR = REG_DA[(word2 >> 12) & 15];
+ return;
+ }
+ m68ki_exception_illegal();
+ return;
+ case 0x803: /* MSP */
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ /* we are in supervisor mode so just check for M flag */
+ if(!FLAG_M)
+ {
+ REG_MSP = REG_DA[(word2 >> 12) & 15];
+ return;
+ }
+ REG_SP = REG_DA[(word2 >> 12) & 15];
+ return;
+ }
+ m68ki_exception_illegal();
+ return;
+ case 0x804: /* ISP */
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(!FLAG_M)
+ {
+ REG_SP = REG_DA[(word2 >> 12) & 15];
+ return;
+ }
+ REG_ISP = REG_DA[(word2 >> 12) & 15];
+ return;
+ }
+ m68ki_exception_illegal();
+ return;
+ default:
+ m68ki_exception_illegal();
+ return;
+ }
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(movem, 16, re, pd)
+{
+ uint i = 0;
+ uint register_list = OPER_I_16();
+ uint ea = AY;
+ uint count = 0;
+
+ for(; i < 16; i++)
+ if(register_list & (1 << i))
+ {
+ ea -= 2;
+ m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[15-i]));
+ count++;
+ }
+ AY = ea;
+
+ USE_CYCLES(count<> 8));
+ m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src));
+}
+
+
+M68KMAKE_OP(movep, 32, re, .)
+{
+ uint ea = EA_AY_DI_32();
+ uint src = DX;
+
+ m68ki_write_8(ea, MASK_OUT_ABOVE_8(src >> 24));
+ m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src >> 16));
+ m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src >> 8));
+ m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src));
+}
+
+
+M68KMAKE_OP(movep, 16, er, .)
+{
+ uint ea = EA_AY_DI_16();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | ((m68ki_read_8(ea) << 8) + m68ki_read_8(ea + 2));
+}
+
+
+M68KMAKE_OP(movep, 32, er, .)
+{
+ uint ea = EA_AY_DI_32();
+
+ DX = (m68ki_read_8(ea) << 24) + (m68ki_read_8(ea + 2) << 16)
+ + (m68ki_read_8(ea + 4) << 8) + m68ki_read_8(ea + 6);
+}
+
+
+M68KMAKE_OP(moves, 8, ., .)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = M68KMAKE_GET_EA_AY_8;
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15]));
+ return;
+ }
+ if(BIT_F(word2)) /* Memory to address register */
+ {
+ REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC));
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to data register */
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(moves, 16, ., .)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = M68KMAKE_GET_EA_AY_16;
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15]));
+ return;
+ }
+ if(BIT_F(word2)) /* Memory to address register */
+ {
+ REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC));
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to data register */
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(moves, 32, ., .)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ if(FLAG_S)
+ {
+ uint word2 = OPER_I_16();
+ uint ea = M68KMAKE_GET_EA_AY_32;
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
+ {
+ m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ /* Memory to register */
+ REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC);
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ USE_CYCLES(2);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(moveq, 32, ., .)
+{
+ uint res = DX = MAKE_INT_8(MASK_OUT_ABOVE_8(REG_IR));
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(muls, 16, ., d)
+{
+ uint* r_dst = &DX;
+ uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(DY) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(muls, 16, ., .)
+{
+ uint* r_dst = &DX;
+ uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(M68KMAKE_GET_OPER_AY_16) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(mulu, 16, ., d)
+{
+ uint* r_dst = &DX;
+ uint res = MASK_OUT_ABOVE_16(DY) * MASK_OUT_ABOVE_16(*r_dst);
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(mulu, 16, ., .)
+{
+ uint* r_dst = &DX;
+ uint res = M68KMAKE_GET_OPER_AY_16 * MASK_OUT_ABOVE_16(*r_dst);
+
+ *r_dst = res;
+
+ FLAG_Z = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(mull, 32, ., d)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 src = DY;
+ uint64 dst = REG_D[(word2 >> 12) & 7];
+ uint64 res;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ res = (sint64)((sint32)src) * (sint64)((sint32)dst);
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = ((sint64)res != (sint32)res)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+
+ res = src * dst;
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = (res > 0xffffffff)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint src = DY;
+ uint dst = REG_D[(word2 >> 12) & 7];
+ uint neg = GET_MSB_32(src ^ dst);
+ uint src1;
+ uint src2;
+ uint dst1;
+ uint dst2;
+ uint r1;
+ uint r2;
+ uint r3;
+ uint r4;
+ uint lo;
+ uint hi;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(GET_MSB_32(src))
+ src = (uint)MASK_OUT_ABOVE_32(-(sint)src);
+ if(GET_MSB_32(dst))
+ dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);
+ }
+
+ src1 = MASK_OUT_ABOVE_16(src);
+ src2 = src>>16;
+ dst1 = MASK_OUT_ABOVE_16(dst);
+ dst2 = dst>>16;
+
+
+ r1 = src1 * dst1;
+ r2 = src1 * dst2;
+ r3 = src2 * dst1;
+ r4 = src2 * dst2;
+
+ lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);
+ hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);
+
+ if(BIT_B(word2) && neg)
+ {
+ hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));
+ lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);
+ }
+
+ if(BIT_A(word2))
+ {
+ REG_D[word2 & 7] = hi;
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(hi);
+ FLAG_Z = hi | lo;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(lo);
+ FLAG_Z = lo;
+ if(BIT_B(word2))
+ FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;
+ else
+ FLAG_V = (hi != 0) << 7;
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+M68KMAKE_OP(mull, 32, ., .)
+{
+#if M68K_USE_64_BIT
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint64 src = M68KMAKE_GET_OPER_AY_32;
+ uint64 dst = REG_D[(word2 >> 12) & 7];
+ uint64 res;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ res = (sint64)((sint32)src) * (sint64)((sint32)dst);
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = ((sint64)res != (sint32)res)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+
+ res = src * dst;
+ if(!BIT_A(word2))
+ {
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_N = NFLAG_32(res);
+ FLAG_V = (res > 0xffffffff)<<7;
+ REG_D[(word2 >> 12) & 7] = FLAG_Z;
+ return;
+ }
+ FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
+ FLAG_N = NFLAG_64(res);
+ FLAG_V = VFLAG_CLEAR;
+ REG_D[word2 & 7] = (res >> 32);
+ REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
+ return;
+ }
+ m68ki_exception_illegal();
+
+#else
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint word2 = OPER_I_16();
+ uint src = M68KMAKE_GET_OPER_AY_32;
+ uint dst = REG_D[(word2 >> 12) & 7];
+ uint neg = GET_MSB_32(src ^ dst);
+ uint src1;
+ uint src2;
+ uint dst1;
+ uint dst2;
+ uint r1;
+ uint r2;
+ uint r3;
+ uint r4;
+ uint lo;
+ uint hi;
+
+ FLAG_C = CFLAG_CLEAR;
+
+ if(BIT_B(word2)) /* signed */
+ {
+ if(GET_MSB_32(src))
+ src = (uint)MASK_OUT_ABOVE_32(-(sint)src);
+ if(GET_MSB_32(dst))
+ dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);
+ }
+
+ src1 = MASK_OUT_ABOVE_16(src);
+ src2 = src>>16;
+ dst1 = MASK_OUT_ABOVE_16(dst);
+ dst2 = dst>>16;
+
+
+ r1 = src1 * dst1;
+ r2 = src1 * dst2;
+ r3 = src2 * dst1;
+ r4 = src2 * dst2;
+
+ lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);
+ hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);
+
+ if(BIT_B(word2) && neg)
+ {
+ hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));
+ lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);
+ }
+
+ if(BIT_A(word2))
+ {
+ REG_D[word2 & 7] = hi;
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(hi);
+ FLAG_Z = hi | lo;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ REG_D[(word2 >> 12) & 7] = lo;
+ FLAG_N = NFLAG_32(lo);
+ FLAG_Z = lo;
+ if(BIT_B(word2))
+ FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;
+ else
+ FLAG_V = (hi != 0) << 7;
+ return;
+ }
+ m68ki_exception_illegal();
+
+#endif
+}
+
+
+M68KMAKE_OP(nbcd, 8, ., d)
+{
+ uint* r_dst = &DY;
+ uint dst = *r_dst;
+ uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
+
+ if(res != 0x9a)
+ {
+ FLAG_V = ~res; /* Undefined V behavior */
+
+ if((res & 0x0f) == 0xa)
+ res = (res & 0xf0) + 0x10;
+
+ res = MASK_OUT_ABOVE_8(res);
+
+ FLAG_V &= res; /* Undefined V behavior part II */
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+
+ FLAG_Z |= res;
+ FLAG_C = CFLAG_SET;
+ FLAG_X = XFLAG_SET;
+ }
+ else
+ {
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_X = XFLAG_CLEAR;
+ }
+ FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+}
+
+
+M68KMAKE_OP(nbcd, 8, ., .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint dst = m68ki_read_8(ea);
+ uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
+
+ if(res != 0x9a)
+ {
+ FLAG_V = ~res; /* Undefined V behavior */
+
+ if((res & 0x0f) == 0xa)
+ res = (res & 0xf0) + 0x10;
+
+ res = MASK_OUT_ABOVE_8(res);
+
+ FLAG_V &= res; /* Undefined V behavior part II */
+
+ m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));
+
+ FLAG_Z |= res;
+ FLAG_C = CFLAG_SET;
+ FLAG_X = XFLAG_SET;
+ }
+ else
+ {
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_X = XFLAG_CLEAR;
+ }
+ FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+}
+
+
+M68KMAKE_OP(neg, 8, ., d)
+{
+ uint* r_dst = &DY;
+ uint res = 0 - MASK_OUT_ABOVE_8(*r_dst);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_C = FLAG_X = CFLAG_8(res);
+ FLAG_V = *r_dst & res;
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+M68KMAKE_OP(neg, 8, ., .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint src = m68ki_read_8(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_C = FLAG_X = CFLAG_8(res);
+ FLAG_V = src & res;
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+M68KMAKE_OP(neg, 16, ., d)
+{
+ uint* r_dst = &DY;
+ uint res = 0 - MASK_OUT_ABOVE_16(*r_dst);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_C = FLAG_X = CFLAG_16(res);
+ FLAG_V = (*r_dst & res)>>8;
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+M68KMAKE_OP(neg, 16, ., .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ uint src = m68ki_read_16(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_C = FLAG_X = CFLAG_16(res);
+ FLAG_V = (src & res)>>8;
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+M68KMAKE_OP(neg, 32, ., d)
+{
+ uint* r_dst = &DY;
+ uint res = 0 - *r_dst;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_C = FLAG_X = CFLAG_SUB_32(*r_dst, 0, res);
+ FLAG_V = (*r_dst & res)>>24;
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+M68KMAKE_OP(neg, 32, ., .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_32;
+ uint src = m68ki_read_32(ea);
+ uint res = 0 - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res);
+ FLAG_V = (src & res)>>24;
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+M68KMAKE_OP(negx, 8, ., d)
+{
+ uint* r_dst = &DY;
+ uint res = 0 - MASK_OUT_ABOVE_8(*r_dst) - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = *r_dst & res;
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+}
+
+
+M68KMAKE_OP(negx, 8, ., .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint src = m68ki_read_8(ea);
+ uint res = 0 - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = src & res;
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+M68KMAKE_OP(negx, 16, ., d)
+{
+ uint* r_dst = &DY;
+ uint res = 0 - MASK_OUT_ABOVE_16(*r_dst) - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = (*r_dst & res)>>8;
+
+ res = MASK_OUT_ABOVE_16(res);
+ FLAG_Z |= res;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+}
+
+
+M68KMAKE_OP(negx, 16, ., .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ uint src = m68ki_read_16(ea);
+ uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = (src & res)>>8;
+
+ res = MASK_OUT_ABOVE_16(res);
+ FLAG_Z |= res;
+
+ m68ki_write_16(ea, res);
+}
+
+
+M68KMAKE_OP(negx, 32, ., d)
+{
+ uint* r_dst = &DY;
+ uint res = 0 - MASK_OUT_ABOVE_32(*r_dst) - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(*r_dst, 0, res);
+ FLAG_V = (*r_dst & res)>>24;
+
+ res = MASK_OUT_ABOVE_32(res);
+ FLAG_Z |= res;
+
+ *r_dst = res;
+}
+
+
+M68KMAKE_OP(negx, 32, ., .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_32;
+ uint src = m68ki_read_32(ea);
+ uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res);
+ FLAG_V = (src & res)>>24;
+
+ res = MASK_OUT_ABOVE_32(res);
+ FLAG_Z |= res;
+
+ m68ki_write_32(ea, res);
+}
+
+
+M68KMAKE_OP(nop, 0, ., .)
+{
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+}
+
+
+M68KMAKE_OP(not, 8, ., d)
+{
+ uint* r_dst = &DY;
+ uint res = MASK_OUT_ABOVE_8(~*r_dst);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(not, 8, ., .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(not, 16, ., d)
+{
+ uint* r_dst = &DY;
+ uint res = MASK_OUT_ABOVE_16(~*r_dst);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(not, 16, ., .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(not, 32, ., d)
+{
+ uint* r_dst = &DY;
+ uint res = *r_dst = MASK_OUT_ABOVE_32(~*r_dst);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(not, 32, ., .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_32;
+ uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea));
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(or, 8, er, d)
+{
+ uint res = MASK_OUT_ABOVE_8((DX |= MASK_OUT_ABOVE_8(DY)));
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(or, 8, er, .)
+{
+ uint res = MASK_OUT_ABOVE_8((DX |= M68KMAKE_GET_OPER_AY_8));
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(or, 16, er, d)
+{
+ uint res = MASK_OUT_ABOVE_16((DX |= MASK_OUT_ABOVE_16(DY)));
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(or, 16, er, .)
+{
+ uint res = MASK_OUT_ABOVE_16((DX |= M68KMAKE_GET_OPER_AY_16));
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(or, 32, er, d)
+{
+ uint res = DX |= DY;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(or, 32, er, .)
+{
+ uint res = DX |= M68KMAKE_GET_OPER_AY_32;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(or, 8, re, .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(or, 16, re, .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(or, 32, re, .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_32;
+ uint res = DX | m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(ori, 8, ., d)
+{
+ uint res = MASK_OUT_ABOVE_8((DY |= OPER_I_8()));
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(ori, 8, ., .)
+{
+ uint src = OPER_I_8();
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea));
+
+ m68ki_write_8(ea, res);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(ori, 16, ., d)
+{
+ uint res = MASK_OUT_ABOVE_16(DY |= OPER_I_16());
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(ori, 16, ., .)
+{
+ uint src = OPER_I_16();
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(ori, 32, ., d)
+{
+ uint res = DY |= OPER_I_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(ori, 32, ., .)
+{
+ uint src = OPER_I_32();
+ uint ea = M68KMAKE_GET_EA_AY_32;
+ uint res = src | m68ki_read_32(ea);
+
+ m68ki_write_32(ea, res);
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(ori, 16, toc, .)
+{
+ m68ki_set_ccr(m68ki_get_ccr() | OPER_I_16());
+}
+
+
+M68KMAKE_OP(ori, 16, tos, .)
+{
+ if(FLAG_S)
+ {
+ uint src = OPER_I_16();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_set_sr(m68ki_get_sr() | src);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+M68KMAKE_OP(pack, 16, rr, .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ /* Note: DX and DY are reversed in Motorola's docs */
+ uint src = DY + OPER_I_16();
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | ((src >> 4) & 0x00f0) | (src & 0x000f);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(pack, 16, mm, ax7)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ /* Note: AX and AY are reversed in Motorola's docs */
+ uint ea_src = EA_AY_PD_8();
+ uint src = m68ki_read_8(ea_src);
+ ea_src = EA_AY_PD_8();
+ src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();
+
+ m68ki_write_8(EA_A7_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(pack, 16, mm, ay7)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ /* Note: AX and AY are reversed in Motorola's docs */
+ uint ea_src = EA_A7_PD_8();
+ uint src = m68ki_read_8(ea_src);
+ ea_src = EA_A7_PD_8();
+ src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();
+
+ m68ki_write_8(EA_AX_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(pack, 16, mm, axy7)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint ea_src = EA_A7_PD_8();
+ uint src = m68ki_read_8(ea_src);
+ ea_src = EA_A7_PD_8();
+ src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();
+
+ m68ki_write_8(EA_A7_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(pack, 16, mm, .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ /* Note: AX and AY are reversed in Motorola's docs */
+ uint ea_src = EA_AY_PD_8();
+ uint src = m68ki_read_8(ea_src);
+ ea_src = EA_AY_PD_8();
+ src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();
+
+ m68ki_write_8(EA_AX_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(pea, 32, ., .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_32;
+
+ m68ki_push_32(ea);
+}
+
+
+M68KMAKE_OP(reset, 0, ., .)
+{
+ if(FLAG_S)
+ {
+ m68ki_output_reset(); /* auto-disable (see m68kcpu.h) */
+ USE_CYCLES(CYC_RESET);
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+M68KMAKE_OP(ror, 8, s, .)
+{
+ uint* r_dst = &DY;
+ uint orig_shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint shift = orig_shift & 7;
+ uint src = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = ROR_8(src, shift);
+
+ if(orig_shift != 0)
+ USE_CYCLES(orig_shift<> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = ROR_16(src, shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 9) - 1) & 7) + 1;
+ uint64 src = *r_dst;
+ uint res = ROR_32(src, shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> ((shift - 1) & 15)) << 8;
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_16(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(ror, 32, r, .)
+{
+ uint* r_dst = &DY;
+ uint orig_shift = DX & 0x3f;
+ uint shift = orig_shift & 31;
+ uint64 src = *r_dst;
+ uint res = ROR_32(src, shift);
+
+ if(orig_shift != 0)
+ {
+ USE_CYCLES(orig_shift<> ((shift - 1) & 31)) << 8;
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_32(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(ror, 16, ., .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ uint src = m68ki_read_16(ea);
+ uint res = ROR_16(src, 1);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = src << 8;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(rol, 8, s, .)
+{
+ uint* r_dst = &DY;
+ uint orig_shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint shift = orig_shift & 7;
+ uint src = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = ROL_8(src, shift);
+
+ if(orig_shift != 0)
+ USE_CYCLES(orig_shift<> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = ROL_16(src, shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> (8-shift);
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(rol, 32, s, .)
+{
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint64 src = *r_dst;
+ uint res = ROL_32(src, shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> (24-shift);
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(rol, 8, r, .)
+{
+ uint* r_dst = &DY;
+ uint orig_shift = DX & 0x3f;
+ uint shift = orig_shift & 7;
+ uint src = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = ROL_8(src, shift);
+
+ if(orig_shift != 0)
+ {
+ USE_CYCLES(orig_shift<> 8;
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+ FLAG_C = (src & 1)<<8;
+ FLAG_N = NFLAG_16(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_16(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(rol, 32, r, .)
+{
+ uint* r_dst = &DY;
+ uint orig_shift = DX & 0x3f;
+ uint shift = orig_shift & 31;
+ uint64 src = *r_dst;
+ uint res = ROL_32(src, shift);
+
+ if(orig_shift != 0)
+ {
+ USE_CYCLES(orig_shift<> (32 - shift)) << 8;
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_N = NFLAG_32(src);
+ FLAG_Z = src;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(rol, 16, ., .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ uint src = m68ki_read_16(ea);
+ uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1));
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_C = src >> 7;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(roxr, 8, s, .)
+{
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = ROR_9(src | (XFLAG_AS_1() << 8), shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = ROR_17(src | (XFLAG_AS_1() << 16), shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(roxr, 32, s, .)
+{
+#if M68K_USE_64_BIT
+
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint64 src = *r_dst;
+ uint64 res = src | (((uint64)XFLAG_AS_1()) << 32);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 24;
+ res = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = res;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+
+#else
+
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint src = *r_dst;
+ uint res = MASK_OUT_ABOVE_32((ROR_33(src, shift) & ~(1 << (32 - shift))) | (XFLAG_AS_1() << (32 - shift)));
+ uint new_x_flag = src & (1 << (shift - 1));
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = FLAG_X;
+ FLAG_N = NFLAG_16(*r_dst);
+ FLAG_Z = MASK_OUT_ABOVE_16(*r_dst);
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(roxr, 32, r, .)
+{
+#if M68K_USE_64_BIT
+
+ uint* r_dst = &DY;
+ uint orig_shift = DX & 0x3f;
+
+ if(orig_shift != 0)
+ {
+ uint shift = orig_shift % 33;
+ uint64 src = *r_dst;
+ uint64 res = src | (((uint64)XFLAG_AS_1()) << 32);
+
+ res = ROR_33_64(res, shift);
+
+ USE_CYCLES(orig_shift<> 24;
+ res = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = FLAG_X;
+ FLAG_N = NFLAG_32(*r_dst);
+ FLAG_Z = *r_dst;
+ FLAG_V = VFLAG_CLEAR;
+
+#else
+
+ uint* r_dst = &DY;
+ uint orig_shift = DX & 0x3f;
+ uint shift = orig_shift % 33;
+ uint src = *r_dst;
+ uint res = MASK_OUT_ABOVE_32((ROR_33(src, shift) & ~(1 << (32 - shift))) | (XFLAG_AS_1() << (32 - shift)));
+ uint new_x_flag = src & (1 << (shift - 1));
+
+ if(orig_shift != 0)
+ USE_CYCLES(orig_shift<> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(roxl, 8, s, .)
+{
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = ROL_9(src | (XFLAG_AS_1() << 8), shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 9) - 1) & 7) + 1;
+ uint src = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = ROL_17(src | (XFLAG_AS_1() << 16), shift);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(roxl, 32, s, .)
+{
+#if M68K_USE_64_BIT
+
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint64 src = *r_dst;
+ uint64 res = src | (((uint64)XFLAG_AS_1()) << 32);
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 24;
+ res = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = res;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+
+#else
+
+ uint* r_dst = &DY;
+ uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint src = *r_dst;
+ uint res = MASK_OUT_ABOVE_32((ROL_33(src, shift) & ~(1 << (shift - 1))) | (XFLAG_AS_1() << (shift - 1)));
+ uint new_x_flag = src & (1 << (32 - shift));
+
+ if(shift != 0)
+ USE_CYCLES(shift<> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = FLAG_X;
+ FLAG_N = NFLAG_16(*r_dst);
+ FLAG_Z = MASK_OUT_ABOVE_16(*r_dst);
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(roxl, 32, r, .)
+{
+#if M68K_USE_64_BIT
+
+ uint* r_dst = &DY;
+ uint orig_shift = DX & 0x3f;
+
+ if(orig_shift != 0)
+ {
+ uint shift = orig_shift % 33;
+ uint64 src = *r_dst;
+ uint64 res = src | (((uint64)XFLAG_AS_1()) << 32);
+
+ res = ROL_33_64(res, shift);
+
+ USE_CYCLES(orig_shift<> 24;
+ res = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = res;
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ return;
+ }
+
+ FLAG_C = FLAG_X;
+ FLAG_N = NFLAG_32(*r_dst);
+ FLAG_Z = *r_dst;
+ FLAG_V = VFLAG_CLEAR;
+
+#else
+
+ uint* r_dst = &DY;
+ uint orig_shift = DX & 0x3f;
+ uint shift = orig_shift % 33;
+ uint src = *r_dst;
+ uint res = MASK_OUT_ABOVE_32((ROL_33(src, shift) & ~(1 << (shift - 1))) | (XFLAG_AS_1() << (shift - 1)));
+ uint new_x_flag = src & (1 << (32 - shift));
+
+ if(orig_shift != 0)
+ USE_CYCLES(orig_shift<> 8;
+ res = MASK_OUT_ABOVE_16(res);
+
+ m68ki_write_16(ea, res);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(rtd, 32, ., .)
+{
+ if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
+ {
+ uint new_pc = m68ki_pull_32();
+
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16()));
+ m68ki_jump(new_pc);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(rte, 32, ., .)
+{
+ if(FLAG_S)
+ {
+ uint new_sr;
+ uint new_pc;
+ uint format_word;
+
+ m68ki_rte_callback(); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+
+ if(CPU_TYPE_IS_000(CPU_TYPE))
+ {
+ new_sr = m68ki_pull_16();
+ new_pc = m68ki_pull_32();
+ m68ki_jump(new_pc);
+ m68ki_set_sr(new_sr);
+
+ CPU_INSTR_MODE = INSTRUCTION_YES;
+ CPU_RUN_MODE = RUN_MODE_NORMAL;
+
+ return;
+ }
+
+ if(CPU_TYPE_IS_010(CPU_TYPE))
+ {
+ format_word = m68ki_read_16(REG_A[7]+6) >> 12;
+ if(format_word == 0)
+ {
+ new_sr = m68ki_pull_16();
+ new_pc = m68ki_pull_32();
+ m68ki_fake_pull_16(); /* format word */
+ m68ki_jump(new_pc);
+ m68ki_set_sr(new_sr);
+ CPU_INSTR_MODE = INSTRUCTION_YES;
+ CPU_RUN_MODE = RUN_MODE_NORMAL;
+ return;
+ }
+ CPU_INSTR_MODE = INSTRUCTION_YES;
+ CPU_RUN_MODE = RUN_MODE_NORMAL;
+ /* Not handling bus fault (9) */
+ m68ki_exception_format_error();
+ return;
+ }
+
+ /* Otherwise it's 020 */
+rte_loop:
+ format_word = m68ki_read_16(REG_A[7]+6) >> 12;
+ switch(format_word)
+ {
+ case 0: /* Normal */
+ new_sr = m68ki_pull_16();
+ new_pc = m68ki_pull_32();
+ m68ki_fake_pull_16(); /* format word */
+ m68ki_jump(new_pc);
+ m68ki_set_sr(new_sr);
+ CPU_INSTR_MODE = INSTRUCTION_YES;
+ CPU_RUN_MODE = RUN_MODE_NORMAL;
+ return;
+ case 1: /* Throwaway */
+ new_sr = m68ki_pull_16();
+ m68ki_fake_pull_32(); /* program counter */
+ m68ki_fake_pull_16(); /* format word */
+ m68ki_set_sr_noint(new_sr);
+ goto rte_loop;
+ case 2: /* Trap */
+ new_sr = m68ki_pull_16();
+ new_pc = m68ki_pull_32();
+ m68ki_fake_pull_16(); /* format word */
+ m68ki_fake_pull_32(); /* address */
+ m68ki_jump(new_pc);
+ m68ki_set_sr(new_sr);
+ CPU_INSTR_MODE = INSTRUCTION_YES;
+ CPU_RUN_MODE = RUN_MODE_NORMAL;
+ return;
+ }
+ /* Not handling long or short bus fault */
+ CPU_INSTR_MODE = INSTRUCTION_YES;
+ CPU_RUN_MODE = RUN_MODE_NORMAL;
+ m68ki_exception_format_error();
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+M68KMAKE_OP(rtm, 32, ., .)
+{
+ if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
+ {
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
+ m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(rtr, 32, ., .)
+{
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_set_ccr(m68ki_pull_16());
+ m68ki_jump(m68ki_pull_32());
+}
+
+
+M68KMAKE_OP(rts, 32, ., .)
+{
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_jump(m68ki_pull_32());
+}
+
+
+M68KMAKE_OP(sbcd, 8, rr, .)
+{
+ uint* r_dst = &DX;
+ uint src = DY;
+ uint dst = *r_dst;
+ uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
+
+// FLAG_V = ~res; /* Undefined V behavior */
+ FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to assume cleared. */
+
+ if(res > 9)
+ res -= 6;
+ res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
+ if(res > 0x99)
+ {
+ res += 0xa0;
+ FLAG_X = FLAG_C = CFLAG_SET;
+ FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
+ }
+ else
+ FLAG_N = FLAG_X = FLAG_C = 0;
+
+ res = MASK_OUT_ABOVE_8(res);
+
+// FLAG_V &= res; /* Undefined V behavior part II */
+// FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+ FLAG_Z |= res;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+}
+
+
+M68KMAKE_OP(sbcd, 8, mm, ax7)
+{
+ uint src = OPER_AY_PD_8();
+ uint ea = EA_A7_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
+
+// FLAG_V = ~res; /* Undefined V behavior */
+ FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
+
+ if(res > 9)
+ res -= 6;
+ res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
+ if(res > 0x99)
+ {
+ res += 0xa0;
+ FLAG_X = FLAG_C = CFLAG_SET;
+ FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
+ }
+ else
+ FLAG_N = FLAG_X = FLAG_C = 0;
+
+ res = MASK_OUT_ABOVE_8(res);
+
+// FLAG_V &= res; /* Undefined V behavior part II */
+// FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+M68KMAKE_OP(sbcd, 8, mm, ay7)
+{
+ uint src = OPER_A7_PD_8();
+ uint ea = EA_AX_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
+
+// FLAG_V = ~res; /* Undefined V behavior */
+ FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
+
+ if(res > 9)
+ res -= 6;
+ res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
+ if(res > 0x99)
+ {
+ res += 0xa0;
+ FLAG_X = FLAG_C = CFLAG_SET;
+ FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
+ }
+ else
+ FLAG_N = FLAG_X = FLAG_C = 0;
+
+ res = MASK_OUT_ABOVE_8(res);
+
+// FLAG_V &= res; /* Undefined V behavior part II */
+// FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+M68KMAKE_OP(sbcd, 8, mm, axy7)
+{
+ uint src = OPER_A7_PD_8();
+ uint ea = EA_A7_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
+
+// FLAG_V = ~res; /* Undefined V behavior */
+ FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
+
+ if(res > 9)
+ res -= 6;
+ res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
+ if(res > 0x99)
+ {
+ res += 0xa0;
+ FLAG_X = FLAG_C = CFLAG_SET;
+ FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
+ }
+ else
+ FLAG_N = FLAG_X = FLAG_C = 0;
+
+ res = MASK_OUT_ABOVE_8(res);
+
+// FLAG_V &= res; /* Undefined V behavior part II */
+// FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+M68KMAKE_OP(sbcd, 8, mm, .)
+{
+ uint src = OPER_AY_PD_8();
+ uint ea = EA_AX_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
+
+// FLAG_V = ~res; /* Undefined V behavior */
+ FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
+
+ if(res > 9)
+ res -= 6;
+ res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
+ if(res > 0x99)
+ {
+ res += 0xa0;
+ FLAG_X = FLAG_C = CFLAG_SET;
+ FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
+ }
+ else
+ FLAG_N = FLAG_X = FLAG_C = 0;
+
+ res = MASK_OUT_ABOVE_8(res);
+
+// FLAG_V &= res; /* Undefined V behavior part II */
+// FLAG_N = NFLAG_8(res); /* Undefined N behavior */
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+M68KMAKE_OP(st, 8, ., d)
+{
+ DY |= 0xff;
+}
+
+
+M68KMAKE_OP(st, 8, ., .)
+{
+ m68ki_write_8(M68KMAKE_GET_EA_AY_8, 0xff);
+}
+
+
+M68KMAKE_OP(sf, 8, ., d)
+{
+ DY &= 0xffffff00;
+}
+
+
+M68KMAKE_OP(sf, 8, ., .)
+{
+ m68ki_write_8(M68KMAKE_GET_EA_AY_8, 0);
+}
+
+
+M68KMAKE_OP(scc, 8, ., d)
+{
+ if(M68KMAKE_CC)
+ {
+ DY |= 0xff;
+ USE_CYCLES(CYC_SCC_R_TRUE);
+ return;
+ }
+ DY &= 0xffffff00;
+}
+
+
+M68KMAKE_OP(scc, 8, ., .)
+{
+ m68ki_write_8(M68KMAKE_GET_EA_AY_8, M68KMAKE_CC ? 0xff : 0);
+}
+
+
+M68KMAKE_OP(stop, 0, ., .)
+{
+ if(FLAG_S)
+ {
+ uint new_sr = OPER_I_16();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ CPU_STOPPED |= STOP_LEVEL_STOP;
+ m68ki_set_sr(new_sr);
+ m68ki_remaining_cycles = 0;
+ return;
+ }
+ m68ki_exception_privilege_violation();
+}
+
+
+M68KMAKE_OP(sub, 8, er, d)
+{
+ uint* r_dst = &DX;
+ uint src = MASK_OUT_ABOVE_8(DY);
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+M68KMAKE_OP(sub, 8, er, .)
+{
+ uint* r_dst = &DX;
+ uint src = M68KMAKE_GET_OPER_AY_8;
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+M68KMAKE_OP(sub, 16, er, d)
+{
+ uint* r_dst = &DX;
+ uint src = MASK_OUT_ABOVE_16(DY);
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+M68KMAKE_OP(sub, 16, er, a)
+{
+ uint* r_dst = &DX;
+ uint src = MASK_OUT_ABOVE_16(AY);
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+M68KMAKE_OP(sub, 16, er, .)
+{
+ uint* r_dst = &DX;
+ uint src = M68KMAKE_GET_OPER_AY_16;
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+M68KMAKE_OP(sub, 32, er, d)
+{
+ uint* r_dst = &DX;
+ uint src = DY;
+ uint dst = *r_dst;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+M68KMAKE_OP(sub, 32, er, a)
+{
+ uint* r_dst = &DX;
+ uint src = AY;
+ uint dst = *r_dst;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+M68KMAKE_OP(sub, 32, er, .)
+{
+ uint* r_dst = &DX;
+ uint src = M68KMAKE_GET_OPER_AY_32;
+ uint dst = *r_dst;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+M68KMAKE_OP(sub, 8, re, .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint src = MASK_OUT_ABOVE_8(DX);
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+M68KMAKE_OP(sub, 16, re, .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ uint src = MASK_OUT_ABOVE_16(DX);
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+M68KMAKE_OP(sub, 32, re, .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_32;
+ uint src = DX;
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+M68KMAKE_OP(suba, 16, ., d)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(DY));
+}
+
+
+M68KMAKE_OP(suba, 16, ., a)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(AY));
+}
+
+
+M68KMAKE_OP(suba, 16, ., .)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(M68KMAKE_GET_OPER_AY_16));
+}
+
+
+M68KMAKE_OP(suba, 32, ., d)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - DY);
+}
+
+
+M68KMAKE_OP(suba, 32, ., a)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - AY);
+}
+
+
+M68KMAKE_OP(suba, 32, ., .)
+{
+ uint* r_dst = &AX;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - M68KMAKE_GET_OPER_AY_32);
+}
+
+
+M68KMAKE_OP(subi, 8, ., d)
+{
+ uint* r_dst = &DY;
+ uint src = OPER_I_8();
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+M68KMAKE_OP(subi, 8, ., .)
+{
+ uint src = OPER_I_8();
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+M68KMAKE_OP(subi, 16, ., d)
+{
+ uint* r_dst = &DY;
+ uint src = OPER_I_16();
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+M68KMAKE_OP(subi, 16, ., .)
+{
+ uint src = OPER_I_16();
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+M68KMAKE_OP(subi, 32, ., d)
+{
+ uint* r_dst = &DY;
+ uint src = OPER_I_32();
+ uint dst = *r_dst;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+M68KMAKE_OP(subi, 32, ., .)
+{
+ uint src = OPER_I_32();
+ uint ea = M68KMAKE_GET_EA_AY_32;
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+M68KMAKE_OP(subq, 8, ., d)
+{
+ uint* r_dst = &DY;
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
+}
+
+
+M68KMAKE_OP(subq, 8, ., .)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = MASK_OUT_ABOVE_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ m68ki_write_8(ea, FLAG_Z);
+}
+
+
+M68KMAKE_OP(subq, 16, ., d)
+{
+ uint* r_dst = &DY;
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
+}
+
+
+M68KMAKE_OP(subq, 16, ., a)
+{
+ uint* r_dst = &AY;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - ((((REG_IR >> 9) - 1) & 7) + 1));
+}
+
+
+M68KMAKE_OP(subq, 16, ., .)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = M68KMAKE_GET_EA_AY_16;
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = MASK_OUT_ABOVE_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ m68ki_write_16(ea, FLAG_Z);
+}
+
+
+M68KMAKE_OP(subq, 32, ., d)
+{
+ uint* r_dst = &DY;
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint dst = *r_dst;
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ *r_dst = FLAG_Z;
+}
+
+
+M68KMAKE_OP(subq, 32, ., a)
+{
+ uint* r_dst = &AY;
+
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst - ((((REG_IR >> 9) - 1) & 7) + 1));
+}
+
+
+M68KMAKE_OP(subq, 32, ., .)
+{
+ uint src = (((REG_IR >> 9) - 1) & 7) + 1;
+ uint ea = M68KMAKE_GET_EA_AY_32;
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = MASK_OUT_ABOVE_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ m68ki_write_32(ea, FLAG_Z);
+}
+
+
+M68KMAKE_OP(subx, 8, rr, .)
+{
+ uint* r_dst = &DX;
+ uint src = MASK_OUT_ABOVE_8(DY);
+ uint dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint res = dst - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
+}
+
+
+M68KMAKE_OP(subx, 16, rr, .)
+{
+ uint* r_dst = &DX;
+ uint src = MASK_OUT_ABOVE_16(DY);
+ uint dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint res = dst - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ res = MASK_OUT_ABOVE_16(res);
+ FLAG_Z |= res;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
+}
+
+
+M68KMAKE_OP(subx, 32, rr, .)
+{
+ uint* r_dst = &DX;
+ uint src = DY;
+ uint dst = *r_dst;
+ uint res = dst - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ res = MASK_OUT_ABOVE_32(res);
+ FLAG_Z |= res;
+
+ *r_dst = res;
+}
+
+
+M68KMAKE_OP(subx, 8, mm, ax7)
+{
+ uint src = OPER_AY_PD_8();
+ uint ea = EA_A7_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+M68KMAKE_OP(subx, 8, mm, ay7)
+{
+ uint src = OPER_A7_PD_8();
+ uint ea = EA_AX_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+M68KMAKE_OP(subx, 8, mm, axy7)
+{
+ uint src = OPER_A7_PD_8();
+ uint ea = EA_A7_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+M68KMAKE_OP(subx, 8, mm, .)
+{
+ uint src = OPER_AY_PD_8();
+ uint ea = EA_AX_PD_8();
+ uint dst = m68ki_read_8(ea);
+ uint res = dst - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_X = FLAG_C = CFLAG_8(res);
+ FLAG_V = VFLAG_SUB_8(src, dst, res);
+
+ res = MASK_OUT_ABOVE_8(res);
+ FLAG_Z |= res;
+
+ m68ki_write_8(ea, res);
+}
+
+
+M68KMAKE_OP(subx, 16, mm, .)
+{
+ uint src = OPER_AY_PD_16();
+ uint ea = EA_AX_PD_16();
+ uint dst = m68ki_read_16(ea);
+ uint res = dst - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_X = FLAG_C = CFLAG_16(res);
+ FLAG_V = VFLAG_SUB_16(src, dst, res);
+
+ res = MASK_OUT_ABOVE_16(res);
+ FLAG_Z |= res;
+
+ m68ki_write_16(ea, res);
+}
+
+
+M68KMAKE_OP(subx, 32, mm, .)
+{
+ uint src = OPER_AY_PD_32();
+ uint ea = EA_AX_PD_32();
+ uint dst = m68ki_read_32(ea);
+ uint res = dst - src - XFLAG_AS_1();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
+ FLAG_V = VFLAG_SUB_32(src, dst, res);
+
+ res = MASK_OUT_ABOVE_32(res);
+ FLAG_Z |= res;
+
+ m68ki_write_32(ea, res);
+}
+
+
+M68KMAKE_OP(swap, 32, ., .)
+{
+ uint* r_dst = &DY;
+
+ FLAG_Z = MASK_OUT_ABOVE_32(*r_dst<<16);
+ *r_dst = (*r_dst>>16) | FLAG_Z;
+
+ FLAG_Z = *r_dst;
+ FLAG_N = NFLAG_32(*r_dst);
+ FLAG_C = CFLAG_CLEAR;
+ FLAG_V = VFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(tas, 8, ., d)
+{
+ uint* r_dst = &DY;
+
+ FLAG_Z = MASK_OUT_ABOVE_8(*r_dst);
+ FLAG_N = NFLAG_8(*r_dst);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ *r_dst |= 0x80;
+}
+
+
+M68KMAKE_OP(tas, 8, ., .)
+{
+ uint ea = M68KMAKE_GET_EA_AY_8;
+ uint dst = m68ki_read_8(ea);
+
+ FLAG_Z = dst;
+ FLAG_N = NFLAG_8(dst);
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ m68ki_write_8(ea, dst | 0x80);
+}
+
+
+M68KMAKE_OP(trap, 0, ., .)
+{
+ /* Trap#n stacks exception frame type 0 */
+ m68ki_exception_trapN(EXCEPTION_TRAP_BASE + (REG_IR & 0xf)); /* HJB 990403 */
+}
+
+
+M68KMAKE_OP(trapt, 0, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(trapt, 16, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(trapt, 32, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(trapf, 0, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(trapf, 16, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ REG_PC += 2;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(trapf, 32, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(trapcc, 0, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(M68KMAKE_CC)
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(trapcc, 16, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(M68KMAKE_CC)
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 2;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(trapcc, 32, ., .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ if(M68KMAKE_CC)
+ {
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+ return;
+ }
+ REG_PC += 4;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(trapv, 0, ., .)
+{
+ if(COND_VC())
+ {
+ return;
+ }
+ m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
+}
+
+
+M68KMAKE_OP(tst, 8, ., d)
+{
+ uint res = MASK_OUT_ABOVE_8(DY);
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(tst, 8, ., .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_8;
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(tst, 8, ., pcdi)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint res = OPER_PCDI_8();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(tst, 8, ., pcix)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint res = OPER_PCIX_8();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(tst, 8, ., i)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint res = OPER_I_8();
+
+ FLAG_N = NFLAG_8(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(tst, 16, ., d)
+{
+ uint res = MASK_OUT_ABOVE_16(DY);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(tst, 16, ., a)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint res = MAKE_INT_16(AY);
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(tst, 16, ., .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_16;
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(tst, 16, ., pcdi)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint res = OPER_PCDI_16();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(tst, 16, ., pcix)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint res = OPER_PCIX_16();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(tst, 16, ., i)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint res = OPER_I_16();
+
+ FLAG_N = NFLAG_16(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(tst, 32, ., d)
+{
+ uint res = DY;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(tst, 32, ., a)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint res = AY;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(tst, 32, ., .)
+{
+ uint res = M68KMAKE_GET_OPER_AY_32;
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+}
+
+
+M68KMAKE_OP(tst, 32, ., pcdi)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint res = OPER_PCDI_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(tst, 32, ., pcix)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint res = OPER_PCIX_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(tst, 32, ., i)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint res = OPER_I_32();
+
+ FLAG_N = NFLAG_32(res);
+ FLAG_Z = res;
+ FLAG_V = VFLAG_CLEAR;
+ FLAG_C = CFLAG_CLEAR;
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(unlk, 32, ., a7)
+{
+ REG_A[7] = m68ki_read_32(REG_A[7]);
+}
+
+
+M68KMAKE_OP(unlk, 32, ., .)
+{
+ uint* r_dst = &AY;
+
+ REG_A[7] = *r_dst;
+ *r_dst = m68ki_pull_32();
+}
+
+
+M68KMAKE_OP(unpk, 16, rr, .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ /* Note: DX and DY are reversed in Motorola's docs */
+ uint src = DY;
+ uint* r_dst = &DX;
+
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | (((((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16()) & 0xffff);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(unpk, 16, mm, ax7)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ /* Note: AX and AY are reversed in Motorola's docs */
+ uint src = OPER_AY_PD_8();
+ uint ea_dst;
+
+ src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
+ ea_dst = EA_A7_PD_8();
+ m68ki_write_8(ea_dst, (src >> 8) & 0xff);
+ ea_dst = EA_A7_PD_8();
+ m68ki_write_8(ea_dst, src & 0xff);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(unpk, 16, mm, ay7)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ /* Note: AX and AY are reversed in Motorola's docs */
+ uint src = OPER_A7_PD_8();
+ uint ea_dst;
+
+ src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
+ ea_dst = EA_AX_PD_8();
+ m68ki_write_8(ea_dst, (src >> 8) & 0xff);
+ ea_dst = EA_AX_PD_8();
+ m68ki_write_8(ea_dst, src & 0xff);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(unpk, 16, mm, axy7)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ uint src = OPER_A7_PD_8();
+ uint ea_dst;
+
+ src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
+ ea_dst = EA_A7_PD_8();
+ m68ki_write_8(ea_dst, (src >> 8) & 0xff);
+ ea_dst = EA_A7_PD_8();
+ m68ki_write_8(ea_dst, src & 0xff);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+M68KMAKE_OP(unpk, 16, mm, .)
+{
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ /* Note: AX and AY are reversed in Motorola's docs */
+ uint src = OPER_AY_PD_8();
+ uint ea_dst;
+
+ src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
+ ea_dst = EA_AX_PD_8();
+ m68ki_write_8(ea_dst, (src >> 8) & 0xff);
+ ea_dst = EA_AX_PD_8();
+ m68ki_write_8(ea_dst, src & 0xff);
+ return;
+ }
+ m68ki_exception_illegal();
+}
+
+
+
+XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
+M68KMAKE_END
diff --git a/Src/CPU/68K/Musashi/m68kconf.h b/Src/CPU/68K/Musashi/m68kconf.h
new file mode 100644
index 0000000..c6963e6
--- /dev/null
+++ b/Src/CPU/68K/Musashi/m68kconf.h
@@ -0,0 +1,254 @@
+/**
+ ** Supermodel
+ ** A Sega Model 3 Arcade Emulator.
+ ** Copyright 2011 Bart Trzynadlowski, Nik Henson
+ **
+ ** This file is part of Supermodel.
+ **
+ ** Supermodel is free software: you can redistribute it and/or modify it under
+ ** the terms of the GNU General Public License as published by the Free
+ ** Software Foundation, either version 3 of the License, or (at your option)
+ ** any later version.
+ **
+ ** Supermodel is distributed in the hope that it will be useful, but WITHOUT
+ ** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ ** FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ ** more details.
+ **
+ ** You should have received a copy of the GNU General Public License along
+ ** with Supermodel. If not, see .
+ **/
+
+/*
+ * m68kconf.h
+ *
+ * Musashi configuration.
+ *
+ * Permission was obtained from Karl Stenerud to apply the GPL license to this
+ * code.
+ */
+
+/* ======================================================================== */
+/* ========================= LICENSING & COPYRIGHT ======================== */
+/* ======================================================================== */
+/*
+ * MUSASHI
+ * Version 3.3
+ *
+ * A portable Motorola M680x0 processor emulation engine.
+ * Copyright 1998-2001 Karl Stenerud. All rights reserved.
+ *
+ * This code may be freely used for non-commercial purposes as long as this
+ * copyright notice remains unaltered in the source code and any binary files
+ * containing this code in compiled form.
+ *
+ * All other lisencing terms must be negotiated with the author
+ * (Karl Stenerud).
+ *
+ * The latest version of this code can be obtained at:
+ * http://kstenerud.cjb.net
+ */
+
+
+
+#ifndef M68KCONF__HEADER
+#define M68KCONF__HEADER
+
+#define M68K_COMPILE_FOR_MAME OPT_OFF
+
+/* Configuration switches.
+ * Use OPT_SPECIFY_HANDLER for configuration options that allow callbacks.
+ * OPT_SPECIFY_HANDLER causes the core to link directly to the function
+ * or macro you specify, rather than using callback functions whose pointer
+ * must be passed in using m68k_set_xxx_callback().
+ */
+#define OPT_OFF 0
+#define OPT_ON 1
+#define OPT_SPECIFY_HANDLER 2
+
+
+/* ======================================================================== */
+/* ============================= CONFIGURATION ============================ */
+/* ======================================================================== */
+
+/* Turn ON if you want to use the following M68K variants */
+#define M68K_EMULATE_008 OPT_OFF
+#define M68K_EMULATE_010 OPT_OFF
+#define M68K_EMULATE_EC020 OPT_OFF
+#define M68K_EMULATE_020 OPT_OFF
+
+
+/* If ON, the CPU will call m68k_read_immediate_xx() for immediate addressing
+ * and m68k_read_pcrelative_xx() for PC-relative addressing.
+ * If off, all read requests from the CPU will be redirected to m68k_read_xx()
+ */
+#define M68K_SEPARATE_READS OPT_ON // fixes Supermodel compilation on MacOS
+
+/* If ON, the CPU will call m68k_write_32_pd() when it executes move.l with a
+ * predecrement destination EA mode instead of m68k_write_32().
+ * To simulate real 68k behavior, m68k_write_32_pd() must first write the high
+ * word to [address+2], and then write the low word to [address].
+ */
+#define M68K_SIMULATE_PD_WRITES OPT_OFF
+
+/* If ON, CPU will call the interrupt acknowledge callback when it services an
+ * interrupt.
+ * If off, all interrupts will be autovectored and all interrupt requests will
+ * auto-clear when the interrupt is serviced.
+ */
+#define M68K_EMULATE_INT_ACK OPT_SPECIFY_HANDLER
+#define M68K_INT_ACK_CALLBACK(A) M68KIRQCallback(A)
+
+
+/* If ON, CPU will call the breakpoint acknowledge callback when it encounters
+ * a breakpoint instruction and it is running a 68010+.
+ */
+#define M68K_EMULATE_BKPT_ACK OPT_OFF
+#define M68K_BKPT_ACK_CALLBACK() your_bkpt_ack_handler_function()
+
+
+/* If ON, the CPU will monitor the trace flags and take trace exceptions
+ */
+#define M68K_EMULATE_TRACE OPT_OFF
+
+
+/* If ON, CPU will call the output reset callback when it encounters a reset
+ * instruction.
+ */
+#define M68K_EMULATE_RESET OPT_OFF
+#define M68K_RESET_CALLBACK() M68KResetCallback()
+
+
+/* If ON, CPU will call the callback when it encounters a cmpi.l #v, dn
+ * instruction.
+ */
+#define M68K_CMPILD_HAS_CALLBACK OPT_OFF
+#define M68K_CMPILD_CALLBACK(v,r) your_cmpild_handler_function(v,r)
+
+/* If ON, CPU will call the callback when it encounters a rte
+ * instruction.
+ */
+#define M68K_RTE_HAS_CALLBACK OPT_OFF
+#define M68K_RTE_CALLBACK() your_rte_handler_function()
+
+
+/* If ON, CPU will call the set fc callback on every memory access to
+ * differentiate between user/supervisor, program/data access like a real
+ * 68000 would. This should be enabled and the callback should be set if you
+ * want to properly emulate the m68010 or higher. (moves uses function codes
+ * to read/write data from different address spaces)
+ */
+#define M68K_EMULATE_FC OPT_OFF
+#define M68K_SET_FC_CALLBACK(A) your_set_fc_handler_function(A)
+
+
+/* If ON, CPU will call the pc changed callback when it changes the PC by a
+ * large value. This allows host programs to be nicer when it comes to
+ * fetching immediate data and instructions on a banked memory system.
+ */
+#define M68K_MONITOR_PC OPT_OFF
+#define M68K_SET_PC_CALLBACK(A) your_pc_changed_handler_function(A)
+
+
+/* If ON, CPU will call the instruction hook callback before every
+ * instruction.
+ */
+#ifdef SUPERMODEL_DEBUGGER
+#define M68K_INSTRUCTION_HOOK OPT_SPECIFY_HANDLER
+#define M68K_INSTRUCTION_CALLBACK() M68KDebugCallback()
+#else
+#define M68K_INSTRUCTION_HOOK OPT_OFF
+#define M68K_INSTRUCTION_CALLBACK() your_instruction_hook_function()
+#endif // SUPERMODEL_DEBUGGER
+
+/* If ON, the CPU will emulate the 4-byte prefetch queue of a real 68000 */
+#define M68K_EMULATE_PREFETCH OPT_OFF
+
+
+/* If ON, the CPU will generate address error exceptions if it tries to
+ * access a word or longword at an odd address.
+ * NOTE: This is only emulated properly for 68000 mode.
+ */
+#define M68K_EMULATE_ADDRESS_ERROR OPT_OFF
+
+
+/* Turn ON to enable logging of illegal instruction calls.
+ * M68K_LOG_FILEHANDLE must be #defined to a stdio file stream.
+ * Turn on M68K_LOG_1010_1111 to log all 1010 and 1111 calls.
+ */
+#define M68K_LOG_ENABLE OPT_OFF
+#define M68K_LOG_1010_1111 OPT_OFF
+#define M68K_LOG_FILEHANDLE some_file_handle
+
+
+/* ----------------------------- COMPATIBILITY ---------------------------- */
+
+/* The following options set optimizations that violate the current ANSI
+ * standard, but will be compliant under the forthcoming C9X standard.
+ */
+
+
+/* If ON, the enulation core will use 64-bit integers to speed up some
+ * operations.
+*/
+#define M68K_USE_64_BIT OPT_ON
+
+
+/* Set to your compiler's static inline keyword to enable it, or
+ * set it to blank to disable it.
+ * If you define INLINE in the makefile, it will override this value.
+ * NOTE: not enabling inline functions will SEVERELY slow down emulation.
+ */
+#ifndef INLINE
+#define INLINE static __inline__ // defined for GCC; if using MSVC, pass INLINE as "static __inline" from Makefile
+#endif /* INLINE */
+
+/******************************************************************************
+ Supermodel Interface
+******************************************************************************/
+
+// Supermodel 68K interface (these functions defined in CPU/68K.cpp)
+//#ifndef FASTCALL (this doesn't work for now (needs to be added to the prototypes in m68k.h for m68k_read_memory*)
+ #undef FASTCALL
+ #define FASTCALL
+//#endif
+unsigned int FASTCALL M68KFetch8(unsigned int a);
+unsigned int FASTCALL M68KFetch16(unsigned int a);
+unsigned int FASTCALL M68KFetch32(unsigned int a);
+unsigned int FASTCALL M68KRead8(unsigned int a);
+unsigned int FASTCALL M68KRead16(unsigned int a);
+unsigned int FASTCALL M68KRead32(unsigned int a);
+void FASTCALL M68KWrite8(unsigned int a, unsigned int d);
+void FASTCALL M68KWrite16(unsigned int a, unsigned int d);
+void FASTCALL M68KWrite32(unsigned int a, unsigned int d);
+
+/* Read data relative to the PC */
+#define m68k_read_pcrelative_8(address) M68KFetch8(address)
+#define m68k_read_pcrelative_16(address) M68KFetch16(address)
+#define m68k_read_pcrelative_32(address) M68KFetch32(address)
+
+/* Read data immediately following the PC */
+#define m68k_read_immediate_16(address) M68KFetch16(address)
+#define m68k_read_immediate_32(address) M68KFetch32(address)
+
+/* Memory access for the disassembler */
+#define m68k_read_disassembler_8(address) M68KRead8(address)
+#define m68k_read_disassembler_16(address) M68KRead16(address)
+#define m68k_read_disassembler_32(address) M68KRead32(address)
+
+/* Read from anywhere */
+#define m68k_read_memory_8(address) M68KRead8(address)
+#define m68k_read_memory_16(address) M68KRead16(address)
+#define m68k_read_memory_32(address) M68KRead32(address)
+
+/* Write to anywhere */
+#define m68k_write_memory_8(address, value) M68KWrite8(address, value)
+#define m68k_write_memory_16(address, value) M68KWrite16(address, value)
+#define m68k_write_memory_32(address, value) M68KWrite32(address, value)
+
+
+/* ======================================================================== */
+/* ============================== END OF FILE ============================= */
+/* ======================================================================== */
+
+#endif /* M68KCONF__HEADER */
diff --git a/Src/CPU/68K/Musashi/m68kcpu.c b/Src/CPU/68K/Musashi/m68kcpu.c
new file mode 100644
index 0000000..c1edb14
--- /dev/null
+++ b/Src/CPU/68K/Musashi/m68kcpu.c
@@ -0,0 +1,957 @@
+/**
+ ** Supermodel
+ ** A Sega Model 3 Arcade Emulator.
+ ** Copyright 2011 Bart Trzynadlowski, Nik Henson
+ **
+ ** This file is part of Supermodel.
+ **
+ ** Supermodel is free software: you can redistribute it and/or modify it under
+ ** the terms of the GNU General Public License as published by the Free
+ ** Software Foundation, either version 3 of the License, or (at your option)
+ ** any later version.
+ **
+ ** Supermodel is distributed in the hope that it will be useful, but WITHOUT
+ ** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ ** FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ ** more details.
+ **
+ ** You should have received a copy of the GNU General Public License along
+ ** with Supermodel. If not, see .
+ **/
+
+/*
+ * m68kcpu.c
+ *
+ * Musashi core functions and interface.
+ *
+ * Permission was obtained from Karl Stenerud to apply the GPL license to this
+ * code.
+ *
+ * NOTE: The internal CPU context is initialized to all zeros here. If setting
+ * an external context for the first time, make sure it is cleared first,
+ * otherwise interrupts may appear pending and other nasty problems.
+ */
+
+/* ======================================================================== */
+/* ========================= LICENSING & COPYRIGHT ======================== */
+/* ======================================================================== */
+
+#if 1
+static const char* copyright_notice =
+"MUSASHI\n"
+"Version 3.3 (2001-01-29)\n"
+"A portable Motorola M680x0 processor emulation engine.\n"
+"Copyright 1998-2001 Karl Stenerud. All rights reserved.\n"
+"\n"
+"This code may be freely used for non-commercial purpooses as long as this\n"
+"copyright notice remains unaltered in the source code and any binary files\n"
+"containing this code in compiled form.\n"
+"\n"
+"All other lisencing terms must be negotiated with the author\n"
+"(Karl Stenerud).\n"
+"\n"
+"The latest version of this code can be obtained at:\n"
+"http://kstenerud.cjb.net\n"
+;
+#endif
+
+
+/* ======================================================================== */
+/* ================================= NOTES ================================ */
+/* ======================================================================== */
+
+
+
+/* ======================================================================== */
+/* ================================ INCLUDES ============================== */
+/* ======================================================================== */
+
+#include "m68kops.h"
+#include "m68kcpu.h"
+
+/* ======================================================================== */
+/* ================================= DATA ================================= */
+/* ======================================================================== */
+
+int m68ki_initial_cycles;
+int m68ki_remaining_cycles = 0; /* Number of clocks remaining */
+uint m68ki_tracing = 0;
+uint m68ki_address_space;
+
+#ifdef M68K_LOG_ENABLE
+const char* m68ki_cpu_names[] =
+{
+ "Invalid CPU",
+ "M68000",
+ "M68008",
+ "Invalid CPU",
+ "M68010",
+ "Invalid CPU",
+ "Invalid CPU",
+ "Invalid CPU",
+ "M68EC020",
+ "Invalid CPU",
+ "Invalid CPU",
+ "Invalid CPU",
+ "Invalid CPU",
+ "Invalid CPU",
+ "Invalid CPU",
+ "Invalid CPU",
+ "M68020"
+};
+#endif /* M68K_LOG_ENABLE */
+
+/* The CPU core */
+m68ki_cpu_core m68ki_cpu = {0};
+
+#if M68K_EMULATE_ADDRESS_ERROR
+jmp_buf m68ki_aerr_trap;
+#endif /* M68K_EMULATE_ADDRESS_ERROR */
+
+uint m68ki_aerr_address;
+uint m68ki_aerr_write_mode;
+uint m68ki_aerr_fc;
+
+/* Used by shift & rotate instructions */
+uint8 m68ki_shift_8_table[65] =
+{
+ 0x00, 0x80, 0xc0, 0xe0, 0xf0, 0xf8, 0xfc, 0xfe, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff
+};
+uint16 m68ki_shift_16_table[65] =
+{
+ 0x0000, 0x8000, 0xc000, 0xe000, 0xf000, 0xf800, 0xfc00, 0xfe00, 0xff00,
+ 0xff80, 0xffc0, 0xffe0, 0xfff0, 0xfff8, 0xfffc, 0xfffe, 0xffff, 0xffff,
+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
+ 0xffff, 0xffff
+};
+uint m68ki_shift_32_table[65] =
+{
+ 0x00000000, 0x80000000, 0xc0000000, 0xe0000000, 0xf0000000, 0xf8000000,
+ 0xfc000000, 0xfe000000, 0xff000000, 0xff800000, 0xffc00000, 0xffe00000,
+ 0xfff00000, 0xfff80000, 0xfffc0000, 0xfffe0000, 0xffff0000, 0xffff8000,
+ 0xffffc000, 0xffffe000, 0xfffff000, 0xfffff800, 0xfffffc00, 0xfffffe00,
+ 0xffffff00, 0xffffff80, 0xffffffc0, 0xffffffe0, 0xfffffff0, 0xfffffff8,
+ 0xfffffffc, 0xfffffffe, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
+};
+
+
+/* Number of clock cycles to use for exception processing.
+ * I used 4 for any vectors that are undocumented for processing times.
+ */
+uint8 m68ki_exception_cycle_table[3][256] =
+{
+ { /* 000 */
+ 4, /* 0: Reset - Initial Stack Pointer */
+ 4, /* 1: Reset - Initial Program Counter */
+ 50, /* 2: Bus Error (unemulated) */
+ 50, /* 3: Address Error (unemulated) */
+ 34, /* 4: Illegal Instruction */
+ 38, /* 5: Divide by Zero -- ASG: changed from 42 */
+ 40, /* 6: CHK -- ASG: chanaged from 44 */
+ 34, /* 7: TRAPV */
+ 34, /* 8: Privilege Violation */
+ 34, /* 9: Trace */
+ 4, /* 10: 1010 */
+ 4, /* 11: 1111 */
+ 4, /* 12: RESERVED */
+ 4, /* 13: Coprocessor Protocol Violation (unemulated) */
+ 4, /* 14: Format Error */
+ 44, /* 15: Uninitialized Interrupt */
+ 4, /* 16: RESERVED */
+ 4, /* 17: RESERVED */
+ 4, /* 18: RESERVED */
+ 4, /* 19: RESERVED */
+ 4, /* 20: RESERVED */
+ 4, /* 21: RESERVED */
+ 4, /* 22: RESERVED */
+ 4, /* 23: RESERVED */
+ 44, /* 24: Spurious Interrupt */
+ 44, /* 25: Level 1 Interrupt Autovector */
+ 44, /* 26: Level 2 Interrupt Autovector */
+ 44, /* 27: Level 3 Interrupt Autovector */
+ 44, /* 28: Level 4 Interrupt Autovector */
+ 44, /* 29: Level 5 Interrupt Autovector */
+ 44, /* 30: Level 6 Interrupt Autovector */
+ 44, /* 31: Level 7 Interrupt Autovector */
+ 34, /* 32: TRAP #0 -- ASG: chanaged from 38 */
+ 34, /* 33: TRAP #1 */
+ 34, /* 34: TRAP #2 */
+ 34, /* 35: TRAP #3 */
+ 34, /* 36: TRAP #4 */
+ 34, /* 37: TRAP #5 */
+ 34, /* 38: TRAP #6 */
+ 34, /* 39: TRAP #7 */
+ 34, /* 40: TRAP #8 */
+ 34, /* 41: TRAP #9 */
+ 34, /* 42: TRAP #10 */
+ 34, /* 43: TRAP #11 */
+ 34, /* 44: TRAP #12 */
+ 34, /* 45: TRAP #13 */
+ 34, /* 46: TRAP #14 */
+ 34, /* 47: TRAP #15 */
+ 4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
+ 4, /* 49: FP Inexact Result (unemulated) */
+ 4, /* 50: FP Divide by Zero (unemulated) */
+ 4, /* 51: FP Underflow (unemulated) */
+ 4, /* 52: FP Operand Error (unemulated) */
+ 4, /* 53: FP Overflow (unemulated) */
+ 4, /* 54: FP Signaling NAN (unemulated) */
+ 4, /* 55: FP Unimplemented Data Type (unemulated) */
+ 4, /* 56: MMU Configuration Error (unemulated) */
+ 4, /* 57: MMU Illegal Operation Error (unemulated) */
+ 4, /* 58: MMU Access Level Violation Error (unemulated) */
+ 4, /* 59: RESERVED */
+ 4, /* 60: RESERVED */
+ 4, /* 61: RESERVED */
+ 4, /* 62: RESERVED */
+ 4, /* 63: RESERVED */
+ /* 64-255: User Defined */
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
+ },
+ { /* 010 */
+ 4, /* 0: Reset - Initial Stack Pointer */
+ 4, /* 1: Reset - Initial Program Counter */
+ 126, /* 2: Bus Error (unemulated) */
+ 126, /* 3: Address Error (unemulated) */
+ 38, /* 4: Illegal Instruction */
+ 44, /* 5: Divide by Zero */
+ 44, /* 6: CHK */
+ 34, /* 7: TRAPV */
+ 38, /* 8: Privilege Violation */
+ 38, /* 9: Trace */
+ 4, /* 10: 1010 */
+ 4, /* 11: 1111 */
+ 4, /* 12: RESERVED */
+ 4, /* 13: Coprocessor Protocol Violation (unemulated) */
+ 4, /* 14: Format Error */
+ 44, /* 15: Uninitialized Interrupt */
+ 4, /* 16: RESERVED */
+ 4, /* 17: RESERVED */
+ 4, /* 18: RESERVED */
+ 4, /* 19: RESERVED */
+ 4, /* 20: RESERVED */
+ 4, /* 21: RESERVED */
+ 4, /* 22: RESERVED */
+ 4, /* 23: RESERVED */
+ 46, /* 24: Spurious Interrupt */
+ 46, /* 25: Level 1 Interrupt Autovector */
+ 46, /* 26: Level 2 Interrupt Autovector */
+ 46, /* 27: Level 3 Interrupt Autovector */
+ 46, /* 28: Level 4 Interrupt Autovector */
+ 46, /* 29: Level 5 Interrupt Autovector */
+ 46, /* 30: Level 6 Interrupt Autovector */
+ 46, /* 31: Level 7 Interrupt Autovector */
+ 38, /* 32: TRAP #0 */
+ 38, /* 33: TRAP #1 */
+ 38, /* 34: TRAP #2 */
+ 38, /* 35: TRAP #3 */
+ 38, /* 36: TRAP #4 */
+ 38, /* 37: TRAP #5 */
+ 38, /* 38: TRAP #6 */
+ 38, /* 39: TRAP #7 */
+ 38, /* 40: TRAP #8 */
+ 38, /* 41: TRAP #9 */
+ 38, /* 42: TRAP #10 */
+ 38, /* 43: TRAP #11 */
+ 38, /* 44: TRAP #12 */
+ 38, /* 45: TRAP #13 */
+ 38, /* 46: TRAP #14 */
+ 38, /* 47: TRAP #15 */
+ 4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
+ 4, /* 49: FP Inexact Result (unemulated) */
+ 4, /* 50: FP Divide by Zero (unemulated) */
+ 4, /* 51: FP Underflow (unemulated) */
+ 4, /* 52: FP Operand Error (unemulated) */
+ 4, /* 53: FP Overflow (unemulated) */
+ 4, /* 54: FP Signaling NAN (unemulated) */
+ 4, /* 55: FP Unimplemented Data Type (unemulated) */
+ 4, /* 56: MMU Configuration Error (unemulated) */
+ 4, /* 57: MMU Illegal Operation Error (unemulated) */
+ 4, /* 58: MMU Access Level Violation Error (unemulated) */
+ 4, /* 59: RESERVED */
+ 4, /* 60: RESERVED */
+ 4, /* 61: RESERVED */
+ 4, /* 62: RESERVED */
+ 4, /* 63: RESERVED */
+ /* 64-255: User Defined */
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
+ },
+ { /* 020 */
+ 4, /* 0: Reset - Initial Stack Pointer */
+ 4, /* 1: Reset - Initial Program Counter */
+ 50, /* 2: Bus Error (unemulated) */
+ 50, /* 3: Address Error (unemulated) */
+ 20, /* 4: Illegal Instruction */
+ 38, /* 5: Divide by Zero */
+ 40, /* 6: CHK */
+ 20, /* 7: TRAPV */
+ 34, /* 8: Privilege Violation */
+ 25, /* 9: Trace */
+ 20, /* 10: 1010 */
+ 20, /* 11: 1111 */
+ 4, /* 12: RESERVED */
+ 4, /* 13: Coprocessor Protocol Violation (unemulated) */
+ 4, /* 14: Format Error */
+ 30, /* 15: Uninitialized Interrupt */
+ 4, /* 16: RESERVED */
+ 4, /* 17: RESERVED */
+ 4, /* 18: RESERVED */
+ 4, /* 19: RESERVED */
+ 4, /* 20: RESERVED */
+ 4, /* 21: RESERVED */
+ 4, /* 22: RESERVED */
+ 4, /* 23: RESERVED */
+ 30, /* 24: Spurious Interrupt */
+ 30, /* 25: Level 1 Interrupt Autovector */
+ 30, /* 26: Level 2 Interrupt Autovector */
+ 30, /* 27: Level 3 Interrupt Autovector */
+ 30, /* 28: Level 4 Interrupt Autovector */
+ 30, /* 29: Level 5 Interrupt Autovector */
+ 30, /* 30: Level 6 Interrupt Autovector */
+ 30, /* 31: Level 7 Interrupt Autovector */
+ 20, /* 32: TRAP #0 */
+ 20, /* 33: TRAP #1 */
+ 20, /* 34: TRAP #2 */
+ 20, /* 35: TRAP #3 */
+ 20, /* 36: TRAP #4 */
+ 20, /* 37: TRAP #5 */
+ 20, /* 38: TRAP #6 */
+ 20, /* 39: TRAP #7 */
+ 20, /* 40: TRAP #8 */
+ 20, /* 41: TRAP #9 */
+ 20, /* 42: TRAP #10 */
+ 20, /* 43: TRAP #11 */
+ 20, /* 44: TRAP #12 */
+ 20, /* 45: TRAP #13 */
+ 20, /* 46: TRAP #14 */
+ 20, /* 47: TRAP #15 */
+ 4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
+ 4, /* 49: FP Inexact Result (unemulated) */
+ 4, /* 50: FP Divide by Zero (unemulated) */
+ 4, /* 51: FP Underflow (unemulated) */
+ 4, /* 52: FP Operand Error (unemulated) */
+ 4, /* 53: FP Overflow (unemulated) */
+ 4, /* 54: FP Signaling NAN (unemulated) */
+ 4, /* 55: FP Unimplemented Data Type (unemulated) */
+ 4, /* 56: MMU Configuration Error (unemulated) */
+ 4, /* 57: MMU Illegal Operation Error (unemulated) */
+ 4, /* 58: MMU Access Level Violation Error (unemulated) */
+ 4, /* 59: RESERVED */
+ 4, /* 60: RESERVED */
+ 4, /* 61: RESERVED */
+ 4, /* 62: RESERVED */
+ 4, /* 63: RESERVED */
+ /* 64-255: User Defined */
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
+ }
+};
+
+uint8 m68ki_ea_idx_cycle_table[64] =
+{
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, /* ..01.000 no memory indirect, base NULL */
+ 5, /* ..01..01 memory indirect, base NULL, outer NULL */
+ 7, /* ..01..10 memory indirect, base NULL, outer 16 */
+ 7, /* ..01..11 memory indirect, base NULL, outer 32 */
+ 0, 5, 7, 7, 0, 5, 7, 7, 0, 5, 7, 7,
+ 2, /* ..10.000 no memory indirect, base 16 */
+ 7, /* ..10..01 memory indirect, base 16, outer NULL */
+ 9, /* ..10..10 memory indirect, base 16, outer 16 */
+ 9, /* ..10..11 memory indirect, base 16, outer 32 */
+ 0, 7, 9, 9, 0, 7, 9, 9, 0, 7, 9, 9,
+ 6, /* ..11.000 no memory indirect, base 32 */
+ 11, /* ..11..01 memory indirect, base 32, outer NULL */
+ 13, /* ..11..10 memory indirect, base 32, outer 16 */
+ 13, /* ..11..11 memory indirect, base 32, outer 32 */
+ 0, 11, 13, 13, 0, 11, 13, 13, 0, 11, 13, 13
+};
+
+
+
+/* ======================================================================== */
+/* =============================== CALLBACKS ============================== */
+/* ======================================================================== */
+
+/* Default callbacks used if the callback hasn't been set yet, or if the
+ * callback is set to NULL
+ */
+
+/* Interrupt acknowledge */
+static int default_int_ack_callback_data;
+static int default_int_ack_callback(int int_level)
+{
+ default_int_ack_callback_data = int_level;
+ CPU_INT_LEVEL = 0;
+ return M68K_INT_ACK_AUTOVECTOR;
+}
+
+/* Breakpoint acknowledge */
+static unsigned int default_bkpt_ack_callback_data;
+static void default_bkpt_ack_callback(unsigned int data)
+{
+ default_bkpt_ack_callback_data = data;
+}
+
+/* Called when a reset instruction is executed */
+static void default_reset_instr_callback(void)
+{
+}
+
+/* Called when a cmpi.l #v, dn instruction is executed */
+static void default_cmpild_instr_callback(unsigned int val, int reg)
+{
+}
+
+/* Called when a rte instruction is executed */
+static void default_rte_instr_callback(void)
+{
+}
+
+/* Called when the program counter changed by a large value */
+static unsigned int default_pc_changed_callback_data;
+static void default_pc_changed_callback(unsigned int new_pc)
+{
+ default_pc_changed_callback_data = new_pc;
+}
+
+/* Called every time there's bus activity (read/write to/from memory */
+static unsigned int default_set_fc_callback_data;
+static void default_set_fc_callback(unsigned int new_fc)
+{
+ default_set_fc_callback_data = new_fc;
+}
+
+/* Called every instruction cycle prior to execution */
+static void default_instr_hook_callback(void)
+{
+}
+
+
+#if M68K_EMULATE_ADDRESS_ERROR
+ #include
+ jmp_buf m68ki_aerr_trap;
+#endif /* M68K_EMULATE_ADDRESS_ERROR */
+
+
+/* ======================================================================== */
+/* ================================= API ================================== */
+/* ======================================================================== */
+
+/* Access the internals of the CPU */
+unsigned int m68k_get_reg(void* context, m68k_register_t regnum)
+{
+ m68ki_cpu_core* cpu = context != NULL ?(m68ki_cpu_core*)context : &m68ki_cpu;
+
+ switch(regnum)
+ {
+ case M68K_REG_D0: return cpu->dar[0];
+ case M68K_REG_D1: return cpu->dar[1];
+ case M68K_REG_D2: return cpu->dar[2];
+ case M68K_REG_D3: return cpu->dar[3];
+ case M68K_REG_D4: return cpu->dar[4];
+ case M68K_REG_D5: return cpu->dar[5];
+ case M68K_REG_D6: return cpu->dar[6];
+ case M68K_REG_D7: return cpu->dar[7];
+ case M68K_REG_A0: return cpu->dar[8];
+ case M68K_REG_A1: return cpu->dar[9];
+ case M68K_REG_A2: return cpu->dar[10];
+ case M68K_REG_A3: return cpu->dar[11];
+ case M68K_REG_A4: return cpu->dar[12];
+ case M68K_REG_A5: return cpu->dar[13];
+ case M68K_REG_A6: return cpu->dar[14];
+ case M68K_REG_A7: return cpu->dar[15];
+ case M68K_REG_PC: return MASK_OUT_ABOVE_32(cpu->pc);
+ case M68K_REG_SR: return cpu->t1_flag |
+ cpu->t0_flag |
+ (cpu->s_flag << 11) |
+ (cpu->m_flag << 11) |
+ cpu->int_mask |
+ ((cpu->x_flag & XFLAG_SET) >> 4) |
+ ((cpu->n_flag & NFLAG_SET) >> 4) |
+ ((!cpu->not_z_flag) << 2) |
+ ((cpu->v_flag & VFLAG_SET) >> 6) |
+ ((cpu->c_flag & CFLAG_SET) >> 8);
+ case M68K_REG_SP: return cpu->dar[15];
+ case M68K_REG_USP: return cpu->s_flag ? cpu->sp[0] : cpu->dar[15];
+ case M68K_REG_ISP: return cpu->s_flag && !cpu->m_flag ? cpu->dar[15] : cpu->sp[4];
+ case M68K_REG_MSP: return cpu->s_flag && cpu->m_flag ? cpu->dar[15] : cpu->sp[6];
+ case M68K_REG_SFC: return cpu->sfc;
+ case M68K_REG_DFC: return cpu->dfc;
+ case M68K_REG_VBR: return cpu->vbr;
+ case M68K_REG_CACR: return cpu->cacr;
+ case M68K_REG_CAAR: return cpu->caar;
+ case M68K_REG_PREF_ADDR: return cpu->pref_addr;
+ case M68K_REG_PREF_DATA: return cpu->pref_data;
+ case M68K_REG_PPC: return MASK_OUT_ABOVE_32(cpu->ppc);
+ case M68K_REG_IR: return cpu->ir;
+ case M68K_REG_CPU_TYPE:
+ switch(cpu->cpu_type)
+ {
+ case CPU_TYPE_000: return (unsigned int)M68K_CPU_TYPE_68000;
+ case CPU_TYPE_008: return (unsigned int)M68K_CPU_TYPE_68008;
+ case CPU_TYPE_010: return (unsigned int)M68K_CPU_TYPE_68010;
+ case CPU_TYPE_EC020: return (unsigned int)M68K_CPU_TYPE_68EC020;
+ case CPU_TYPE_020: return (unsigned int)M68K_CPU_TYPE_68020;
+ }
+ return M68K_CPU_TYPE_INVALID;
+ default: return 0;
+ }
+ return 0;
+}
+
+void m68k_set_reg(m68k_register_t regnum, unsigned int value)
+{
+ switch(regnum)
+ {
+ case M68K_REG_D0: REG_D[0] = MASK_OUT_ABOVE_32(value); return;
+ case M68K_REG_D1: REG_D[1] = MASK_OUT_ABOVE_32(value); return;
+ case M68K_REG_D2: REG_D[2] = MASK_OUT_ABOVE_32(value); return;
+ case M68K_REG_D3: REG_D[3] = MASK_OUT_ABOVE_32(value); return;
+ case M68K_REG_D4: REG_D[4] = MASK_OUT_ABOVE_32(value); return;
+ case M68K_REG_D5: REG_D[5] = MASK_OUT_ABOVE_32(value); return;
+ case M68K_REG_D6: REG_D[6] = MASK_OUT_ABOVE_32(value); return;
+ case M68K_REG_D7: REG_D[7] = MASK_OUT_ABOVE_32(value); return;
+ case M68K_REG_A0: REG_A[0] = MASK_OUT_ABOVE_32(value); return;
+ case M68K_REG_A1: REG_A[1] = MASK_OUT_ABOVE_32(value); return;
+ case M68K_REG_A2: REG_A[2] = MASK_OUT_ABOVE_32(value); return;
+ case M68K_REG_A3: REG_A[3] = MASK_OUT_ABOVE_32(value); return;
+ case M68K_REG_A4: REG_A[4] = MASK_OUT_ABOVE_32(value); return;
+ case M68K_REG_A5: REG_A[5] = MASK_OUT_ABOVE_32(value); return;
+ case M68K_REG_A6: REG_A[6] = MASK_OUT_ABOVE_32(value); return;
+ case M68K_REG_A7: REG_A[7] = MASK_OUT_ABOVE_32(value); return;
+ case M68K_REG_PC: m68ki_jump(MASK_OUT_ABOVE_32(value)); return;
+ case M68K_REG_SR: m68ki_set_sr(value); return;
+ case M68K_REG_SP: REG_SP = MASK_OUT_ABOVE_32(value); return;
+ case M68K_REG_USP: if(FLAG_S)
+ REG_USP = MASK_OUT_ABOVE_32(value);
+ else
+ REG_SP = MASK_OUT_ABOVE_32(value);
+ return;
+ case M68K_REG_ISP: if(FLAG_S && !FLAG_M)
+ REG_SP = MASK_OUT_ABOVE_32(value);
+ else
+ REG_ISP = MASK_OUT_ABOVE_32(value);
+ return;
+ case M68K_REG_MSP: if(FLAG_S && FLAG_M)
+ REG_SP = MASK_OUT_ABOVE_32(value);
+ else
+ REG_MSP = MASK_OUT_ABOVE_32(value);
+ return;
+ case M68K_REG_VBR: REG_VBR = MASK_OUT_ABOVE_32(value); return;
+ case M68K_REG_SFC: REG_SFC = value & 7; return;
+ case M68K_REG_DFC: REG_DFC = value & 7; return;
+ case M68K_REG_CACR: REG_CACR = MASK_OUT_ABOVE_32(value); return;
+ case M68K_REG_CAAR: REG_CAAR = MASK_OUT_ABOVE_32(value); return;
+ case M68K_REG_PPC: REG_PPC = MASK_OUT_ABOVE_32(value); return;
+ case M68K_REG_IR: REG_IR = MASK_OUT_ABOVE_16(value); return;
+ case M68K_REG_PREF_ADDR: CPU_PREF_ADDR = MASK_OUT_ABOVE_32(value); return;
+ case M68K_REG_CPU_TYPE: m68k_set_cpu_type(value); return;
+ default: return;
+ }
+}
+
+/* Set the callbacks */
+void m68k_set_int_ack_callback(int (*callback)(int int_level))
+{
+ CALLBACK_INT_ACK = callback ? callback : default_int_ack_callback;
+}
+
+void m68k_set_bkpt_ack_callback(void (*callback)(unsigned int data))
+{
+ CALLBACK_BKPT_ACK = callback ? callback : default_bkpt_ack_callback;
+}
+
+void m68k_set_reset_instr_callback(void (*callback)(void))
+{
+ CALLBACK_RESET_INSTR = callback ? callback : default_reset_instr_callback;
+}
+
+void m68k_set_cmpild_instr_callback(void (*callback)(unsigned int, int))
+{
+ CALLBACK_CMPILD_INSTR = callback ? callback : default_cmpild_instr_callback;
+}
+
+void m68k_set_rte_instr_callback(void (*callback)(void))
+{
+ CALLBACK_RTE_INSTR = callback ? callback : default_rte_instr_callback;
+}
+
+void m68k_set_pc_changed_callback(void (*callback)(unsigned int new_pc))
+{
+ CALLBACK_PC_CHANGED = callback ? callback : default_pc_changed_callback;
+}
+
+void m68k_set_fc_callback(void (*callback)(unsigned int new_fc))
+{
+ CALLBACK_SET_FC = callback ? callback : default_set_fc_callback;
+}
+
+void m68k_set_instr_hook_callback(void (*callback)(void))
+{
+ CALLBACK_INSTR_HOOK = callback ? callback : default_instr_hook_callback;
+}
+
+#include
+/* Set the CPU type. */
+void m68k_set_cpu_type(unsigned int cpu_type)
+{
+ switch(cpu_type)
+ {
+ case M68K_CPU_TYPE_68000:
+ CPU_TYPE = CPU_TYPE_000;
+ CPU_ADDRESS_MASK = 0x00ffffff;
+ CPU_SR_MASK = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */
+ CYC_INSTRUCTION = m68ki_cycles[0];
+ CYC_EXCEPTION = m68ki_exception_cycle_table[0];
+ CYC_BCC_NOTAKE_B = -2;
+ CYC_BCC_NOTAKE_W = 2;
+ CYC_DBCC_F_NOEXP = -2;
+ CYC_DBCC_F_EXP = 2;
+ CYC_SCC_R_TRUE = 2;
+ CYC_MOVEM_W = 2;
+ CYC_MOVEM_L = 3;
+ CYC_SHIFT = 1;
+ CYC_RESET = 132;
+ return;
+ case M68K_CPU_TYPE_68008:
+ CPU_TYPE = CPU_TYPE_008;
+ CPU_ADDRESS_MASK = 0x003fffff;
+ CPU_SR_MASK = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */
+ CYC_INSTRUCTION = m68ki_cycles[0];
+ CYC_EXCEPTION = m68ki_exception_cycle_table[0];
+ CYC_BCC_NOTAKE_B = -2;
+ CYC_BCC_NOTAKE_W = 2;
+ CYC_DBCC_F_NOEXP = -2;
+ CYC_DBCC_F_EXP = 2;
+ CYC_SCC_R_TRUE = 2;
+ CYC_MOVEM_W = 2;
+ CYC_MOVEM_L = 3;
+ CYC_SHIFT = 1;
+ CYC_RESET = 132;
+ return;
+ case M68K_CPU_TYPE_68010:
+ CPU_TYPE = CPU_TYPE_010;
+ CPU_ADDRESS_MASK = 0x00ffffff;
+ CPU_SR_MASK = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */
+ CYC_INSTRUCTION = m68ki_cycles[1];
+ CYC_EXCEPTION = m68ki_exception_cycle_table[1];
+ CYC_BCC_NOTAKE_B = -4;
+ CYC_BCC_NOTAKE_W = 0;
+ CYC_DBCC_F_NOEXP = 0;
+ CYC_DBCC_F_EXP = 6;
+ CYC_SCC_R_TRUE = 0;
+ CYC_MOVEM_W = 2;
+ CYC_MOVEM_L = 3;
+ CYC_SHIFT = 1;
+ CYC_RESET = 130;
+ return;
+ case M68K_CPU_TYPE_68EC020:
+ CPU_TYPE = CPU_TYPE_EC020;
+ CPU_ADDRESS_MASK = 0x00ffffff;
+ CPU_SR_MASK = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
+ CYC_INSTRUCTION = m68ki_cycles[2];
+ CYC_EXCEPTION = m68ki_exception_cycle_table[2];
+ CYC_BCC_NOTAKE_B = -2;
+ CYC_BCC_NOTAKE_W = 0;
+ CYC_DBCC_F_NOEXP = 0;
+ CYC_DBCC_F_EXP = 4;
+ CYC_SCC_R_TRUE = 0;
+ CYC_MOVEM_W = 2;
+ CYC_MOVEM_L = 2;
+ CYC_SHIFT = 0;
+ CYC_RESET = 518;
+ return;
+ case M68K_CPU_TYPE_68020:
+ CPU_TYPE = CPU_TYPE_020;
+ CPU_ADDRESS_MASK = 0xffffffff;
+ CPU_SR_MASK = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
+ CYC_INSTRUCTION = m68ki_cycles[2];
+ CYC_EXCEPTION = m68ki_exception_cycle_table[2];
+ CYC_BCC_NOTAKE_B = -2;
+ CYC_BCC_NOTAKE_W = 0;
+ CYC_DBCC_F_NOEXP = 0;
+ CYC_DBCC_F_EXP = 4;
+ CYC_SCC_R_TRUE = 0;
+ CYC_MOVEM_W = 2;
+ CYC_MOVEM_L = 2;
+ CYC_SHIFT = 0;
+ CYC_RESET = 518;
+ return;
+ }
+}
+
+/* Execute some instructions until we use up num_cycles clock cycles */
+/* ASG: removed per-instruction interrupt checks */
+int m68k_execute(int num_cycles)
+{
+ /* Make sure we're not stopped */
+ if(!CPU_STOPPED)
+ {
+ /* Set our pool of clock cycles available */
+ SET_CYCLES(num_cycles);
+ m68ki_initial_cycles = num_cycles;
+
+ /* ASG: update cycles */
+ USE_CYCLES(CPU_INT_CYCLES);
+ CPU_INT_CYCLES = 0;
+
+ /* Return point if we had an address error */
+ m68ki_set_address_error_trap(); /* auto-disable (see m68kcpu.h) */
+
+ /* Main loop. Keep going until we run out of clock cycles */
+ do
+ {
+ /* Set tracing accodring to T1. (T0 is done inside instruction) */
+ m68ki_trace_t1(); /* auto-disable (see m68kcpu.h) */
+
+ /* Set the address space for reads */
+ m68ki_use_data_space(); /* auto-disable (see m68kcpu.h) */
+
+ /* Call external hook to peek at CPU */
+ m68ki_instr_hook(); /* auto-disable (see m68kcpu.h) */
+
+ /* Record previous program counter */
+ REG_PPC = REG_PC;
+
+ /* Read an instruction and call its handler */
+ REG_IR = m68ki_read_imm_16();
+ m68ki_instruction_jump_table[REG_IR]();
+ USE_CYCLES(CYC_INSTRUCTION[REG_IR]);
+
+ /* Trace m68k_exception, if necessary */
+ m68ki_exception_if_trace(); /* auto-disable (see m68kcpu.h) */
+ } while(GET_CYCLES() > 0);
+
+ /* set previous PC to current PC for the next entry into the loop */
+ REG_PPC = REG_PC;
+
+ /* ASG: update cycles */
+ USE_CYCLES(CPU_INT_CYCLES);
+ CPU_INT_CYCLES = 0;
+
+ /* return how many clocks we used */
+ return m68ki_initial_cycles - GET_CYCLES();
+ }
+
+ /* We get here if the CPU is stopped or halted */
+ SET_CYCLES(0);
+ CPU_INT_CYCLES = 0;
+
+ return num_cycles;
+}
+
+
+int m68k_cycles_run(void)
+{
+ return m68ki_initial_cycles - GET_CYCLES();
+}
+
+int m68k_cycles_remaining(void)
+{
+ return GET_CYCLES();
+}
+
+/* Change the timeslice */
+void m68k_modify_timeslice(int cycles)
+{
+ m68ki_initial_cycles += cycles;
+ ADD_CYCLES(cycles);
+}
+
+
+void m68k_end_timeslice(void)
+{
+ m68ki_initial_cycles -= GET_CYCLES();
+ SET_CYCLES(0);
+}
+
+
+/* ASG: rewrote so that the int_level is a mask of the IPL0/IPL1/IPL2 bits */
+/* KS: Modified so that IPL* bits match with mask positions in the SR
+ * and cleaned out remenants of the interrupt controller.
+ */
+void m68k_set_irq(unsigned int int_level)
+{
+ uint old_level = CPU_INT_LEVEL;
+ CPU_INT_LEVEL = int_level << 8;
+
+ /* A transition from < 7 to 7 always interrupts (NMI) */
+ /* Note: Level 7 can also level trigger like a normal IRQ */
+ if(old_level != 0x0700 && CPU_INT_LEVEL == 0x0700)
+ m68ki_exception_interrupt(7); /* Edge triggered level 7 (NMI) */
+ else
+ m68ki_check_interrupts(); /* Level triggered (IRQ) */
+}
+
+void m68k_init(void)
+{
+ static uint emulation_initialized = 0;
+
+ /* The first call to this function initializes the opcode handler jump table */
+ if(!emulation_initialized)
+ {
+ m68ki_build_opcode_table();
+ emulation_initialized = 1;
+ }
+
+ m68k_set_int_ack_callback(NULL);
+ m68k_set_bkpt_ack_callback(NULL);
+ m68k_set_reset_instr_callback(NULL);
+ m68k_set_cmpild_instr_callback(NULL);
+ m68k_set_rte_instr_callback(NULL);
+ m68k_set_pc_changed_callback(NULL);
+ m68k_set_fc_callback(NULL);
+ m68k_set_instr_hook_callback(NULL);
+}
+
+/* Pulse the RESET line on the CPU */
+void m68k_pulse_reset(void)
+{
+ /* Clear all stop levels and eat up all remaining cycles */
+ CPU_STOPPED = 0;
+ SET_CYCLES(0);
+
+ CPU_RUN_MODE = RUN_MODE_BERR_AERR_RESET;
+
+ /* Turn off tracing */
+ FLAG_T1 = FLAG_T0 = 0;
+ m68ki_clear_trace();
+ /* Interrupt mask to level 7 */
+ FLAG_INT_MASK = 0x0700;
+ /* Reset VBR */
+ REG_VBR = 0;
+ /* Go to supervisor mode */
+ m68ki_set_sm_flag(SFLAG_SET | MFLAG_CLEAR);
+
+ /* Invalidate the prefetch queue */
+#if M68K_EMULATE_PREFETCH
+ /* Set to arbitrary number since our first fetch is from 0 */
+ CPU_PREF_ADDR = 0x1000;
+#endif /* M68K_EMULATE_PREFETCH */
+
+ /* Read the initial stack pointer and program counter */
+ m68ki_jump(0);
+ REG_SP = m68ki_read_imm_32();
+ REG_PC = m68ki_read_imm_32();
+ m68ki_jump(REG_PC);
+
+ CPU_RUN_MODE = RUN_MODE_NORMAL;
+}
+
+/* Pulse the HALT line on the CPU */
+void m68k_pulse_halt(void)
+{
+ CPU_STOPPED |= STOP_LEVEL_HALT;
+}
+
+
+/* Get and set the current CPU context */
+/* This is to allow for multiple CPUs */
+unsigned int m68k_context_size()
+{
+ return sizeof(m68ki_cpu_core);
+}
+
+unsigned int m68k_get_context(void* dst)
+{
+ if(dst) *(m68ki_cpu_core*)dst = m68ki_cpu;
+ return sizeof(m68ki_cpu_core);
+}
+
+void m68k_set_context(void* src)
+{
+ if(src) m68ki_cpu = *(m68ki_cpu_core*)src;
+}
+
+
+
+/* ======================================================================== */
+/* ============================== MAME STUFF ============================== */
+/* ======================================================================== */
+
+#if M68K_COMPILE_FOR_MAME == OPT_ON
+
+#include "state.h"
+
+static struct {
+ UINT16 sr;
+ int stopped;
+ int halted;
+} m68k_substate;
+
+static void m68k_prepare_substate(void)
+{
+ m68k_substate.sr = m68ki_get_sr();
+ m68k_substate.stopped = (CPU_STOPPED & STOP_LEVEL_STOP) != 0;
+ m68k_substate.halted = (CPU_STOPPED & STOP_LEVEL_HALT) != 0;
+}
+
+static void m68k_post_load(void)
+{
+ m68ki_set_sr_noint_nosp(m68k_substate.sr);
+ CPU_STOPPED = m68k_substate.stopped ? STOP_LEVEL_STOP : 0
+ | m68k_substate.halted ? STOP_LEVEL_HALT : 0;
+ m68ki_jump(REG_PC);
+}
+
+void m68k_state_register(const char *type)
+{
+ int cpu = cpu_getactivecpu();
+
+ state_save_register_UINT32(type, cpu, "D" , REG_D, 8);
+ state_save_register_UINT32(type, cpu, "A" , REG_A, 8);
+ state_save_register_UINT32(type, cpu, "PPC" , ®_PPC, 1);
+ state_save_register_UINT32(type, cpu, "PC" , ®_PC, 1);
+ state_save_register_UINT32(type, cpu, "USP" , ®_USP, 1);
+ state_save_register_UINT32(type, cpu, "ISP" , ®_ISP, 1);
+ state_save_register_UINT32(type, cpu, "MSP" , ®_MSP, 1);
+ state_save_register_UINT32(type, cpu, "VBR" , ®_VBR, 1);
+ state_save_register_UINT32(type, cpu, "SFC" , ®_SFC, 1);
+ state_save_register_UINT32(type, cpu, "DFC" , ®_DFC, 1);
+ state_save_register_UINT32(type, cpu, "CACR" , ®_CACR, 1);
+ state_save_register_UINT32(type, cpu, "CAAR" , ®_CAAR, 1);
+ state_save_register_UINT16(type, cpu, "SR" , &m68k_substate.sr, 1);
+ state_save_register_UINT32(type, cpu, "INT_LEVEL" , &CPU_INT_LEVEL, 1);
+ state_save_register_UINT32(type, cpu, "INT_CYCLES", &CPU_INT_CYCLES, 1);
+ state_save_register_int (type, cpu, "STOPPED" , &m68k_substate.stopped);
+ state_save_register_int (type, cpu, "HALTED" , &m68k_substate.halted);
+ state_save_register_UINT32(type, cpu, "PREF_ADDR" , &CPU_PREF_ADDR, 1);
+ state_save_register_UINT32(type, cpu, "PREF_DATA" , &CPU_PREF_DATA, 1);
+ state_save_register_func_presave(m68k_prepare_substate);
+ state_save_register_func_postload(m68k_post_load);
+}
+
+#endif /* M68K_COMPILE_FOR_MAME */
+
+/* ======================================================================== */
+/* ============================== END OF FILE ============================= */
+/* ======================================================================== */
diff --git a/Src/CPU/68K/Musashi/m68kcpu.h b/Src/CPU/68K/Musashi/m68kcpu.h
new file mode 100644
index 0000000..1066251
--- /dev/null
+++ b/Src/CPU/68K/Musashi/m68kcpu.h
@@ -0,0 +1,1968 @@
+/**
+ ** Supermodel
+ ** A Sega Model 3 Arcade Emulator.
+ ** Copyright 2011 Bart Trzynadlowski, Nik Henson
+ **
+ ** This file is part of Supermodel.
+ **
+ ** Supermodel is free software: you can redistribute it and/or modify it under
+ ** the terms of the GNU General Public License as published by the Free
+ ** Software Foundation, either version 3 of the License, or (at your option)
+ ** any later version.
+ **
+ ** Supermodel is distributed in the hope that it will be useful, but WITHOUT
+ ** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ ** FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ ** more details.
+ **
+ ** You should have received a copy of the GNU General Public License along
+ ** with Supermodel. If not, see .
+ **/
+
+/*
+ * m68kcpu.h
+ *
+ * Musashi internal header file.
+ *
+ * Permission was obtained from Karl Stenerud to apply the GPL license to this
+ * code.
+ */
+
+/* ======================================================================== */
+/* ========================= LICENSING & COPYRIGHT ======================== */
+/* ======================================================================== */
+/*
+ * MUSASHI
+ * Version 3.3
+ *
+ * A portable Motorola M680x0 processor emulation engine.
+ * Copyright 1998-2001 Karl Stenerud. All rights reserved.
+ *
+ * This code may be freely used for non-commercial purposes as long as this
+ * copyright notice remains unaltered in the source code and any binary files
+ * containing this code in compiled form.
+ *
+ * All other lisencing terms must be negotiated with the author
+ * (Karl Stenerud).
+ *
+ * The latest version of this code can be obtained at:
+ * http://kstenerud.cjb.net
+ */
+
+
+
+
+#ifndef M68KCPU__HEADER
+#define M68KCPU__HEADER
+
+#include "m68k.h"
+#include
+
+#if M68K_EMULATE_ADDRESS_ERROR
+#include
+#endif /* M68K_EMULATE_ADDRESS_ERROR */
+
+/* ======================================================================== */
+/* ==================== ARCHITECTURE-DEPENDANT DEFINES ==================== */
+/* ======================================================================== */
+
+/* Check for > 32bit sizes */
+#if UINT_MAX > 0xffffffff
+ #define M68K_INT_GT_32_BIT 1
+#else
+ #define M68K_INT_GT_32_BIT 0
+#endif
+
+/* Data types used in this emulation core */
+#undef sint8
+#undef sint16
+#undef sint32
+#undef sint64
+#undef uint8
+#undef uint16
+#undef uint32
+#undef uint64
+#undef sint
+#undef uint
+
+#define sint8 signed char /* ASG: changed from char to signed char */
+#define sint16 signed short
+#define sint32 signed long
+#define uint8 unsigned char
+#define uint16 unsigned short
+#define uint32 unsigned int
+
+/* signed and unsigned int must be at least 32 bits wide */
+#define sint signed int
+#define uint unsigned int
+
+
+#if M68K_USE_64_BIT
+#define sint64 signed long long
+#define uint64 unsigned long long
+#else
+#define sint64 sint32
+#define uint64 uint32
+#endif /* M68K_USE_64_BIT */
+
+
+
+/* Allow for architectures that don't have 8-bit sizes */
+#if UCHAR_MAX == 0xff
+ #define MAKE_INT_8(A) (sint8)(A)
+#else
+ #undef sint8
+ #define sint8 signed int
+ #undef uint8
+ #define uint8 unsigned int
+ INLINE sint MAKE_INT_8(uint value)
+ {
+ return (value & 0x80) ? value | ~0xff : value & 0xff;
+ }
+#endif /* UCHAR_MAX == 0xff */
+
+
+/* Allow for architectures that don't have 16-bit sizes */
+#if USHRT_MAX == 0xffff
+ #define MAKE_INT_16(A) (sint16)(A)
+#else
+ #undef sint16
+ #define sint16 signed int
+ #undef uint16
+ #define uint16 unsigned int
+ INLINE sint MAKE_INT_16(uint value)
+ {
+ return (value & 0x8000) ? value | ~0xffff : value & 0xffff;
+ }
+#endif /* USHRT_MAX == 0xffff */
+
+
+/* Allow for architectures that don't have 32-bit sizes */
+#if ULONG_MAX == 0xffffffff
+ #define MAKE_INT_32(A) (sint32)(A)
+#else
+ #undef sint32
+ #define sint32 signed int
+ #undef uint32
+ #define uint32 unsigned int
+ INLINE sint MAKE_INT_32(uint value)
+ {
+ return (value & 0x80000000) ? value | ~0xffffffff : value & 0xffffffff;
+ }
+#endif /* ULONG_MAX == 0xffffffff */
+
+
+
+
+/* ======================================================================== */
+/* ============================ GENERAL DEFINES =========================== */
+/* ======================================================================== */
+
+/* Exception Vectors handled by emulation */
+#define EXCEPTION_BUS_ERROR 2 /* This one is not emulated! */
+#define EXCEPTION_ADDRESS_ERROR 3 /* This one is partially emulated (doesn't stack a proper frame yet) */
+#define EXCEPTION_ILLEGAL_INSTRUCTION 4
+#define EXCEPTION_ZERO_DIVIDE 5
+#define EXCEPTION_CHK 6
+#define EXCEPTION_TRAPV 7
+#define EXCEPTION_PRIVILEGE_VIOLATION 8
+#define EXCEPTION_TRACE 9
+#define EXCEPTION_1010 10
+#define EXCEPTION_1111 11
+#define EXCEPTION_FORMAT_ERROR 14
+#define EXCEPTION_UNINITIALIZED_INTERRUPT 15
+#define EXCEPTION_SPURIOUS_INTERRUPT 24
+#define EXCEPTION_INTERRUPT_AUTOVECTOR 24
+#define EXCEPTION_TRAP_BASE 32
+
+/* Function codes set by CPU during data/address bus activity */
+#define FUNCTION_CODE_USER_DATA 1
+#define FUNCTION_CODE_USER_PROGRAM 2
+#define FUNCTION_CODE_SUPERVISOR_DATA 5
+#define FUNCTION_CODE_SUPERVISOR_PROGRAM 6
+#define FUNCTION_CODE_CPU_SPACE 7
+
+/* CPU types for deciding what to emulate */
+#define CPU_TYPE_000 1
+#define CPU_TYPE_008 2
+#define CPU_TYPE_010 4
+#define CPU_TYPE_EC020 8
+#define CPU_TYPE_020 16
+
+/* Different ways to stop the CPU */
+#define STOP_LEVEL_STOP 1
+#define STOP_LEVEL_HALT 2
+
+/* Used for 68000 address error processing */
+#define INSTRUCTION_YES 0
+#define INSTRUCTION_NO 0x08
+#define MODE_READ 0x10
+#define MODE_WRITE 0
+
+#define RUN_MODE_NORMAL 0
+#define RUN_MODE_BERR_AERR_RESET 1
+
+#ifndef NULL
+#define NULL ((void*)0)
+#endif
+
+/* ======================================================================== */
+/* ================================ MACROS ================================ */
+/* ======================================================================== */
+
+
+/* ---------------------------- General Macros ---------------------------- */
+
+/* Bit Isolation Macros */
+#define BIT_0(A) ((A) & 0x00000001)
+#define BIT_1(A) ((A) & 0x00000002)
+#define BIT_2(A) ((A) & 0x00000004)
+#define BIT_3(A) ((A) & 0x00000008)
+#define BIT_4(A) ((A) & 0x00000010)
+#define BIT_5(A) ((A) & 0x00000020)
+#define BIT_6(A) ((A) & 0x00000040)
+#define BIT_7(A) ((A) & 0x00000080)
+#define BIT_8(A) ((A) & 0x00000100)
+#define BIT_9(A) ((A) & 0x00000200)
+#define BIT_A(A) ((A) & 0x00000400)
+#define BIT_B(A) ((A) & 0x00000800)
+#define BIT_C(A) ((A) & 0x00001000)
+#define BIT_D(A) ((A) & 0x00002000)
+#define BIT_E(A) ((A) & 0x00004000)
+#define BIT_F(A) ((A) & 0x00008000)
+#define BIT_10(A) ((A) & 0x00010000)
+#define BIT_11(A) ((A) & 0x00020000)
+#define BIT_12(A) ((A) & 0x00040000)
+#define BIT_13(A) ((A) & 0x00080000)
+#define BIT_14(A) ((A) & 0x00100000)
+#define BIT_15(A) ((A) & 0x00200000)
+#define BIT_16(A) ((A) & 0x00400000)
+#define BIT_17(A) ((A) & 0x00800000)
+#define BIT_18(A) ((A) & 0x01000000)
+#define BIT_19(A) ((A) & 0x02000000)
+#define BIT_1A(A) ((A) & 0x04000000)
+#define BIT_1B(A) ((A) & 0x08000000)
+#define BIT_1C(A) ((A) & 0x10000000)
+#define BIT_1D(A) ((A) & 0x20000000)
+#define BIT_1E(A) ((A) & 0x40000000)
+#define BIT_1F(A) ((A) & 0x80000000)
+
+/* Get the most significant bit for specific sizes */
+#define GET_MSB_8(A) ((A) & 0x80)
+#define GET_MSB_9(A) ((A) & 0x100)
+#define GET_MSB_16(A) ((A) & 0x8000)
+#define GET_MSB_17(A) ((A) & 0x10000)
+#define GET_MSB_32(A) ((A) & 0x80000000)
+#if M68K_USE_64_BIT
+#define GET_MSB_33(A) ((A) & 0x100000000)
+#endif /* M68K_USE_64_BIT */
+
+/* Isolate nibbles */
+#define LOW_NIBBLE(A) ((A) & 0x0f)
+#define HIGH_NIBBLE(A) ((A) & 0xf0)
+
+/* These are used to isolate 8, 16, and 32 bit sizes */
+#define MASK_OUT_ABOVE_2(A) ((A) & 3)
+#define MASK_OUT_ABOVE_8(A) ((A) & 0xff)
+#define MASK_OUT_ABOVE_16(A) ((A) & 0xffff)
+#define MASK_OUT_BELOW_2(A) ((A) & ~3)
+#define MASK_OUT_BELOW_8(A) ((A) & ~0xff)
+#define MASK_OUT_BELOW_16(A) ((A) & ~0xffff)
+
+/* No need to mask if we are 32 bit */
+#if M68K_INT_GT_32_BIT || M68K_USE_64_BIT
+ #define MASK_OUT_ABOVE_32(A) ((A) & 0xffffffff)
+ #define MASK_OUT_BELOW_32(A) ((A) & ~0xffffffff)
+#else
+ #define MASK_OUT_ABOVE_32(A) (A)
+ #define MASK_OUT_BELOW_32(A) 0
+#endif /* M68K_INT_GT_32_BIT || M68K_USE_64_BIT */
+
+/* Simulate address lines of 68k family */
+#define ADDRESS_68K(A) ((A)&CPU_ADDRESS_MASK)
+
+
+/* Shift & Rotate Macros. */
+#define LSL(A, C) ((A) << (C))
+#define LSR(A, C) ((A) >> (C))
+
+/* Some > 32-bit optimizations */
+#if M68K_INT_GT_32_BIT
+ /* Shift left and right */
+ #define LSR_32(A, C) ((A) >> (C))
+ #define LSL_32(A, C) ((A) << (C))
+#else
+ /* We have to do this because the morons at ANSI decided that shifts
+ * by >= data size are undefined.
+ */
+ #define LSR_32(A, C) ((C) < 32 ? (A) >> (C) : 0)
+ #define LSL_32(A, C) ((C) < 32 ? (A) << (C) : 0)
+#endif /* M68K_INT_GT_32_BIT */
+
+#if M68K_USE_64_BIT
+ #define LSL_32_64(A, C) ((A) << (C))
+ #define LSR_32_64(A, C) ((A) >> (C))
+ #define ROL_33_64(A, C) (LSL_32_64(A, C) | LSR_32_64(A, 33-(C)))
+ #define ROR_33_64(A, C) (LSR_32_64(A, C) | LSL_32_64(A, 33-(C)))
+#endif /* M68K_USE_64_BIT */
+
+#define ROL_8(A, C) MASK_OUT_ABOVE_8(LSL(A, C) | LSR(A, 8-(C)))
+#define ROL_9(A, C) (LSL(A, C) | LSR(A, 9-(C)))
+#define ROL_16(A, C) MASK_OUT_ABOVE_16(LSL(A, C) | LSR(A, 16-(C)))
+#define ROL_17(A, C) (LSL(A, C) | LSR(A, 17-(C)))
+#define ROL_32(A, C) MASK_OUT_ABOVE_32(LSL_32(A, C) | LSR_32(A, 32-(C)))
+#define ROL_33(A, C) (LSL_32(A, C) | LSR_32(A, 33-(C)))
+
+#define ROR_8(A, C) MASK_OUT_ABOVE_8(LSR(A, C) | LSL(A, 8-(C)))
+#define ROR_9(A, C) (LSR(A, C) | LSL(A, 9-(C)))
+#define ROR_16(A, C) MASK_OUT_ABOVE_16(LSR(A, C) | LSL(A, 16-(C)))
+#define ROR_17(A, C) (LSR(A, C) | LSL(A, 17-(C)))
+#define ROR_32(A, C) MASK_OUT_ABOVE_32(LSR_32(A, C) | LSL_32(A, 32-(C)))
+#define ROR_33(A, C) (LSR_32(A, C) | LSL_32(A, 33-(C)))
+
+
+
+/* ------------------------------ CPU Access ------------------------------ */
+
+/* Access the CPU registers */
+#define CPU_TYPE m68ki_cpu.cpu_type
+
+#define REG_DA m68ki_cpu.dar /* easy access to data and address regs */
+#define REG_D m68ki_cpu.dar
+#define REG_A (m68ki_cpu.dar+8)
+#define REG_PPC m68ki_cpu.ppc
+#define REG_PC m68ki_cpu.pc
+#define REG_SP_BASE m68ki_cpu.sp
+#define REG_USP m68ki_cpu.sp[0]
+#define REG_ISP m68ki_cpu.sp[4]
+#define REG_MSP m68ki_cpu.sp[6]
+#define REG_SP m68ki_cpu.dar[15]
+#define REG_VBR m68ki_cpu.vbr
+#define REG_SFC m68ki_cpu.sfc
+#define REG_DFC m68ki_cpu.dfc
+#define REG_CACR m68ki_cpu.cacr
+#define REG_CAAR m68ki_cpu.caar
+#define REG_IR m68ki_cpu.ir
+
+#define FLAG_T1 m68ki_cpu.t1_flag
+#define FLAG_T0 m68ki_cpu.t0_flag
+#define FLAG_S m68ki_cpu.s_flag
+#define FLAG_M m68ki_cpu.m_flag
+#define FLAG_X m68ki_cpu.x_flag
+#define FLAG_N m68ki_cpu.n_flag
+#define FLAG_Z m68ki_cpu.not_z_flag
+#define FLAG_V m68ki_cpu.v_flag
+#define FLAG_C m68ki_cpu.c_flag
+#define FLAG_INT_MASK m68ki_cpu.int_mask
+
+#define CPU_INT_LEVEL m68ki_cpu.int_level /* ASG: changed from CPU_INTS_PENDING */
+#define CPU_INT_CYCLES m68ki_cpu.int_cycles /* ASG */
+#define CPU_STOPPED m68ki_cpu.stopped
+#define CPU_PREF_ADDR m68ki_cpu.pref_addr
+#define CPU_PREF_DATA m68ki_cpu.pref_data
+#define CPU_ADDRESS_MASK m68ki_cpu.address_mask
+#define CPU_SR_MASK m68ki_cpu.sr_mask
+#define CPU_INSTR_MODE m68ki_cpu.instr_mode
+#define CPU_RUN_MODE m68ki_cpu.run_mode
+
+#define CYC_INSTRUCTION m68ki_cpu.cyc_instruction
+#define CYC_EXCEPTION m68ki_cpu.cyc_exception
+#define CYC_BCC_NOTAKE_B m68ki_cpu.cyc_bcc_notake_b
+#define CYC_BCC_NOTAKE_W m68ki_cpu.cyc_bcc_notake_w
+#define CYC_DBCC_F_NOEXP m68ki_cpu.cyc_dbcc_f_noexp
+#define CYC_DBCC_F_EXP m68ki_cpu.cyc_dbcc_f_exp
+#define CYC_SCC_R_TRUE m68ki_cpu.cyc_scc_r_true
+#define CYC_MOVEM_W m68ki_cpu.cyc_movem_w
+#define CYC_MOVEM_L m68ki_cpu.cyc_movem_l
+#define CYC_SHIFT m68ki_cpu.cyc_shift
+#define CYC_RESET m68ki_cpu.cyc_reset
+
+
+#define CALLBACK_INT_ACK m68ki_cpu.int_ack_callback
+#define CALLBACK_BKPT_ACK m68ki_cpu.bkpt_ack_callback
+#define CALLBACK_RESET_INSTR m68ki_cpu.reset_instr_callback
+#define CALLBACK_CMPILD_INSTR m68ki_cpu.cmpild_instr_callback
+#define CALLBACK_RTE_INSTR m68ki_cpu.rte_instr_callback
+#define CALLBACK_PC_CHANGED m68ki_cpu.pc_changed_callback
+#define CALLBACK_SET_FC m68ki_cpu.set_fc_callback
+#define CALLBACK_INSTR_HOOK m68ki_cpu.instr_hook_callback
+
+
+
+/* ----------------------------- Configuration ---------------------------- */
+
+/* These defines are dependant on the configuration defines in m68kconf.h */
+
+/* Disable certain comparisons if we're not using all CPU types */
+#if M68K_EMULATE_020
+ #define CPU_TYPE_IS_020_PLUS(A) ((A) & CPU_TYPE_020)
+ #define CPU_TYPE_IS_020_LESS(A) 1
+#else
+ #define CPU_TYPE_IS_020_PLUS(A) 0
+ #define CPU_TYPE_IS_020_LESS(A) 1
+#endif
+
+#if M68K_EMULATE_EC020
+ #define CPU_TYPE_IS_EC020_PLUS(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020))
+ #define CPU_TYPE_IS_EC020_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020))
+#else
+ #define CPU_TYPE_IS_EC020_PLUS(A) CPU_TYPE_IS_020_PLUS(A)
+ #define CPU_TYPE_IS_EC020_LESS(A) CPU_TYPE_IS_020_LESS(A)
+#endif
+
+#if M68K_EMULATE_010
+ #define CPU_TYPE_IS_010(A) ((A) == CPU_TYPE_010)
+ #define CPU_TYPE_IS_010_PLUS(A) ((A) & (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020))
+ #define CPU_TYPE_IS_010_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010))
+#else
+ #define CPU_TYPE_IS_010(A) 0
+ #define CPU_TYPE_IS_010_PLUS(A) CPU_TYPE_IS_EC020_PLUS(A)
+ #define CPU_TYPE_IS_010_LESS(A) CPU_TYPE_IS_EC020_LESS(A)
+#endif
+
+#if M68K_EMULATE_020 || M68K_EMULATE_EC020
+ #define CPU_TYPE_IS_020_VARIANT(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020))
+#else
+ #define CPU_TYPE_IS_020_VARIANT(A) 0
+#endif
+
+#if M68K_EMULATE_020 || M68K_EMULATE_EC020 || M68K_EMULATE_010
+ #define CPU_TYPE_IS_000(A) ((A) == CPU_TYPE_000 || (A) == CPU_TYPE_008)
+#else
+ #define CPU_TYPE_IS_000(A) 1
+#endif
+
+
+#if !M68K_SEPARATE_READS
+#define m68k_read_immediate_16(A) m68ki_read_program_16(A)
+#define m68k_read_immediate_32(A) m68ki_read_program_32(A)
+
+#define m68k_read_pcrelative_8(A) m68ki_read_program_8(A)
+#define m68k_read_pcrelative_16(A) m68ki_read_program_16(A)
+#define m68k_read_pcrelative_32(A) m68ki_read_program_32(A)
+#endif /* M68K_SEPARATE_READS */
+
+
+/* Enable or disable callback functions */
+#if M68K_EMULATE_INT_ACK
+ #if M68K_EMULATE_INT_ACK == OPT_SPECIFY_HANDLER
+ #define m68ki_int_ack(A) M68K_INT_ACK_CALLBACK(A)
+ #else
+ #define m68ki_int_ack(A) CALLBACK_INT_ACK(A)
+ #endif
+#else
+ /* Default action is to used autovector mode, which is most common */
+ #define m68ki_int_ack(A) M68K_INT_ACK_AUTOVECTOR
+#endif /* M68K_EMULATE_INT_ACK */
+
+#if M68K_EMULATE_BKPT_ACK
+ #if M68K_EMULATE_BKPT_ACK == OPT_SPECIFY_HANDLER
+ #define m68ki_bkpt_ack(A) M68K_BKPT_ACK_CALLBACK(A)
+ #else
+ #define m68ki_bkpt_ack(A) CALLBACK_BKPT_ACK(A)
+ #endif
+#else
+ #define m68ki_bkpt_ack(A)
+#endif /* M68K_EMULATE_BKPT_ACK */
+
+#if M68K_EMULATE_RESET
+ #if M68K_EMULATE_RESET == OPT_SPECIFY_HANDLER
+ #define m68ki_output_reset() M68K_RESET_CALLBACK()
+ #else
+ #define m68ki_output_reset() CALLBACK_RESET_INSTR()
+ #endif
+#else
+ #define m68ki_output_reset()
+#endif /* M68K_EMULATE_RESET */
+
+#if M68K_CMPILD_HAS_CALLBACK
+ #if M68K_CMPILD_HAS_CALLBACK == OPT_SPECIFY_HANDLER
+ #define m68ki_cmpild_callback(v,r) M68K_CMPILD_CALLBACK(v,r)
+ #else
+ #define m68ki_cmpild_callback(v,r) CALLBACK_CMPILD_INSTR(v,r)
+ #endif
+#else
+ #define m68ki_cmpild_callback(v,r)
+#endif /* M68K_CMPILD_HAS_CALLBACK */
+
+#if M68K_RTE_HAS_CALLBACK
+ #if M68K_RTE_HAS_CALLBACK == OPT_SPECIFY_HANDLER
+ #define m68ki_rte_callback() M68K_RTE_CALLBACK()
+ #else
+ #define m68ki_rte_callback() CALLBACK_RTE_INSTR()
+ #endif
+#else
+ #define m68ki_rte_callback()
+#endif /* M68K_RTE_HAS_CALLBACK */
+
+#if M68K_INSTRUCTION_HOOK
+ #if M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER
+ #define m68ki_instr_hook() M68K_INSTRUCTION_CALLBACK()
+ #else
+ #define m68ki_instr_hook() CALLBACK_INSTR_HOOK()
+ #endif
+#else
+ #define m68ki_instr_hook()
+#endif /* M68K_INSTRUCTION_HOOK */
+
+#if M68K_MONITOR_PC
+ #if M68K_MONITOR_PC == OPT_SPECIFY_HANDLER
+ #define m68ki_pc_changed(A) M68K_SET_PC_CALLBACK(ADDRESS_68K(A))
+ #else
+ #define m68ki_pc_changed(A) CALLBACK_PC_CHANGED(ADDRESS_68K(A))
+ #endif
+#else
+ #define m68ki_pc_changed(A)
+#endif /* M68K_MONITOR_PC */
+
+
+/* Enable or disable function code emulation */
+#if M68K_EMULATE_FC
+ #if M68K_EMULATE_FC == OPT_SPECIFY_HANDLER
+ #define m68ki_set_fc(A) M68K_SET_FC_CALLBACK(A)
+ #else
+ #define m68ki_set_fc(A) CALLBACK_SET_FC(A)
+ #endif
+ #define m68ki_use_data_space() m68ki_address_space = FUNCTION_CODE_USER_DATA
+ #define m68ki_use_program_space() m68ki_address_space = FUNCTION_CODE_USER_PROGRAM
+ #define m68ki_get_address_space() m68ki_address_space
+#else
+ #define m68ki_set_fc(A)
+ #define m68ki_use_data_space()
+ #define m68ki_use_program_space()
+ #define m68ki_get_address_space() FUNCTION_CODE_USER_DATA
+#endif /* M68K_EMULATE_FC */
+
+
+/* Enable or disable trace emulation */
+#if M68K_EMULATE_TRACE
+ /* Initiates trace checking before each instruction (t1) */
+ #define m68ki_trace_t1() m68ki_tracing = FLAG_T1
+ /* adds t0 to trace checking if we encounter change of flow */
+ #define m68ki_trace_t0() m68ki_tracing |= FLAG_T0
+ /* Clear all tracing */
+ #define m68ki_clear_trace() m68ki_tracing = 0
+ /* Cause a trace exception if we are tracing */
+ #define m68ki_exception_if_trace() if(m68ki_tracing) m68ki_exception_trace()
+#else
+ #define m68ki_trace_t1()
+ #define m68ki_trace_t0()
+ #define m68ki_clear_trace()
+ #define m68ki_exception_if_trace()
+#endif /* M68K_EMULATE_TRACE */
+
+
+
+/* Address error */
+#if M68K_EMULATE_ADDRESS_ERROR
+ #include
+ extern jmp_buf m68ki_aerr_trap;
+
+ #define m68ki_set_address_error_trap() \
+ if(setjmp(m68ki_aerr_trap) != 0) \
+ { \
+ m68ki_exception_address_error(); \
+ if(CPU_STOPPED) \
+ { \
+ SET_CYCLES(0); \
+ CPU_INT_CYCLES = 0; \
+ return m68ki_initial_cycles; \
+ } \
+ }
+
+ #define m68ki_check_address_error(ADDR, WRITE_MODE, FC) \
+ if((ADDR)&1) \
+ { \
+ m68ki_aerr_address = ADDR; \
+ m68ki_aerr_write_mode = WRITE_MODE; \
+ m68ki_aerr_fc = FC; \
+ longjmp(m68ki_aerr_trap, 1); \
+ }
+#else
+ #define m68ki_set_address_error_trap()
+ #define m68ki_check_address_error(ADDR, WRITE_MODE, FC)
+#endif /* M68K_ADDRESS_ERROR */
+
+/* Logging */
+#if M68K_LOG_ENABLE
+ #include
+ extern FILE* M68K_LOG_FILEHANDLE
+ extern char* m68ki_cpu_names[];
+
+ #define M68K_DO_LOG(A) if(M68K_LOG_FILEHANDLE) fprintf A
+ #if M68K_LOG_1010_1111
+ #define M68K_DO_LOG_EMU(A) if(M68K_LOG_FILEHANDLE) fprintf A
+ #else
+ #define M68K_DO_LOG_EMU(A)
+ #endif
+#else
+ #define M68K_DO_LOG(A)
+ #define M68K_DO_LOG_EMU(A)
+#endif
+
+
+
+/* -------------------------- EA / Operand Access ------------------------- */
+
+/*
+ * The general instruction format follows this pattern:
+ * .... XXX. .... .YYY
+ * where XXX is register X and YYY is register Y
+ */
+/* Data Register Isolation */
+#define DX (REG_D[(REG_IR >> 9) & 7])
+#define DY (REG_D[REG_IR & 7])
+/* Address Register Isolation */
+#define AX (REG_A[(REG_IR >> 9) & 7])
+#define AY (REG_A[REG_IR & 7])
+
+
+/* Effective Address Calculations */
+#define EA_AY_AI_8() AY /* address register indirect */
+#define EA_AY_AI_16() EA_AY_AI_8()
+#define EA_AY_AI_32() EA_AY_AI_8()
+#define EA_AY_PI_8() (AY++) /* postincrement (size = byte) */
+#define EA_AY_PI_16() ((AY+=2)-2) /* postincrement (size = word) */
+#define EA_AY_PI_32() ((AY+=4)-4) /* postincrement (size = long) */
+#define EA_AY_PD_8() (--AY) /* predecrement (size = byte) */
+#define EA_AY_PD_16() (AY-=2) /* predecrement (size = word) */
+#define EA_AY_PD_32() (AY-=4) /* predecrement (size = long) */
+#define EA_AY_DI_8() (AY+MAKE_INT_16(m68ki_read_imm_16())) /* displacement */
+#define EA_AY_DI_16() EA_AY_DI_8()
+#define EA_AY_DI_32() EA_AY_DI_8()
+#define EA_AY_IX_8() m68ki_get_ea_ix(AY) /* indirect + index */
+#define EA_AY_IX_16() EA_AY_IX_8()
+#define EA_AY_IX_32() EA_AY_IX_8()
+
+#define EA_AX_AI_8() AX
+#define EA_AX_AI_16() EA_AX_AI_8()
+#define EA_AX_AI_32() EA_AX_AI_8()
+#define EA_AX_PI_8() (AX++)
+#define EA_AX_PI_16() ((AX+=2)-2)
+#define EA_AX_PI_32() ((AX+=4)-4)
+#define EA_AX_PD_8() (--AX)
+#define EA_AX_PD_16() (AX-=2)
+#define EA_AX_PD_32() (AX-=4)
+#define EA_AX_DI_8() (AX+MAKE_INT_16(m68ki_read_imm_16()))
+#define EA_AX_DI_16() EA_AX_DI_8()
+#define EA_AX_DI_32() EA_AX_DI_8()
+#define EA_AX_IX_8() m68ki_get_ea_ix(AX)
+#define EA_AX_IX_16() EA_AX_IX_8()
+#define EA_AX_IX_32() EA_AX_IX_8()
+
+#define EA_A7_PI_8() ((REG_A[7]+=2)-2)
+#define EA_A7_PD_8() (REG_A[7]-=2)
+
+#define EA_AW_8() MAKE_INT_16(m68ki_read_imm_16()) /* absolute word */
+#define EA_AW_16() EA_AW_8()
+#define EA_AW_32() EA_AW_8()
+#define EA_AL_8() m68ki_read_imm_32() /* absolute long */
+#define EA_AL_16() EA_AL_8()
+#define EA_AL_32() EA_AL_8()
+#define EA_PCDI_8() m68ki_get_ea_pcdi() /* pc indirect + displacement */
+#define EA_PCDI_16() EA_PCDI_8()
+#define EA_PCDI_32() EA_PCDI_8()
+#define EA_PCIX_8() m68ki_get_ea_pcix() /* pc indirect + index */
+#define EA_PCIX_16() EA_PCIX_8()
+#define EA_PCIX_32() EA_PCIX_8()
+
+
+#define OPER_I_8() m68ki_read_imm_8()
+#define OPER_I_16() m68ki_read_imm_16()
+#define OPER_I_32() m68ki_read_imm_32()
+
+
+
+/* --------------------------- Status Register ---------------------------- */
+
+/* Flag Calculation Macros */
+#define CFLAG_8(A) (A)
+#define CFLAG_16(A) ((A)>>8)
+
+#if M68K_INT_GT_32_BIT
+ #define CFLAG_ADD_32(S, D, R) ((R)>>24)
+ #define CFLAG_SUB_32(S, D, R) ((R)>>24)
+#else
+ #define CFLAG_ADD_32(S, D, R) (((S & D) | (~R & (S | D)))>>23)
+ #define CFLAG_SUB_32(S, D, R) (((S & R) | (~D & (S | R)))>>23)
+#endif /* M68K_INT_GT_32_BIT */
+
+#define VFLAG_ADD_8(S, D, R) ((S^R) & (D^R))
+#define VFLAG_ADD_16(S, D, R) (((S^R) & (D^R))>>8)
+#define VFLAG_ADD_32(S, D, R) (((S^R) & (D^R))>>24)
+
+#define VFLAG_SUB_8(S, D, R) ((S^D) & (R^D))
+#define VFLAG_SUB_16(S, D, R) (((S^D) & (R^D))>>8)
+#define VFLAG_SUB_32(S, D, R) (((S^D) & (R^D))>>24)
+
+#define NFLAG_8(A) (A)
+#define NFLAG_16(A) ((A)>>8)
+#define NFLAG_32(A) ((A)>>24)
+#define NFLAG_64(A) ((A)>>56)
+
+#define ZFLAG_8(A) MASK_OUT_ABOVE_8(A)
+#define ZFLAG_16(A) MASK_OUT_ABOVE_16(A)
+#define ZFLAG_32(A) MASK_OUT_ABOVE_32(A)
+
+
+/* Flag values */
+#define NFLAG_SET 0x80
+#define NFLAG_CLEAR 0
+#define CFLAG_SET 0x100
+#define CFLAG_CLEAR 0
+#define XFLAG_SET 0x100
+#define XFLAG_CLEAR 0
+#define VFLAG_SET 0x80
+#define VFLAG_CLEAR 0
+#define ZFLAG_SET 0
+#define ZFLAG_CLEAR 0xffffffff
+
+#define SFLAG_SET 4
+#define SFLAG_CLEAR 0
+#define MFLAG_SET 2
+#define MFLAG_CLEAR 0
+
+/* Turn flag values into 1 or 0 */
+#define XFLAG_AS_1() ((FLAG_X>>8)&1)
+#define NFLAG_AS_1() ((FLAG_N>>7)&1)
+#define VFLAG_AS_1() ((FLAG_V>>7)&1)
+#define ZFLAG_AS_1() (!FLAG_Z)
+#define CFLAG_AS_1() ((FLAG_C>>8)&1)
+
+
+/* Conditions */
+#define COND_CS() (FLAG_C&0x100)
+#define COND_CC() (!COND_CS())
+#define COND_VS() (FLAG_V&0x80)
+#define COND_VC() (!COND_VS())
+#define COND_NE() FLAG_Z
+#define COND_EQ() (!COND_NE())
+#define COND_MI() (FLAG_N&0x80)
+#define COND_PL() (!COND_MI())
+#define COND_LT() ((FLAG_N^FLAG_V)&0x80)
+#define COND_GE() (!COND_LT())
+#define COND_HI() (COND_CC() && COND_NE())
+#define COND_LS() (COND_CS() || COND_EQ())
+#define COND_GT() (COND_GE() && COND_NE())
+#define COND_LE() (COND_LT() || COND_EQ())
+
+/* Reversed conditions */
+#define COND_NOT_CS() COND_CC()
+#define COND_NOT_CC() COND_CS()
+#define COND_NOT_VS() COND_VC()
+#define COND_NOT_VC() COND_VS()
+#define COND_NOT_NE() COND_EQ()
+#define COND_NOT_EQ() COND_NE()
+#define COND_NOT_MI() COND_PL()
+#define COND_NOT_PL() COND_MI()
+#define COND_NOT_LT() COND_GE()
+#define COND_NOT_GE() COND_LT()
+#define COND_NOT_HI() COND_LS()
+#define COND_NOT_LS() COND_HI()
+#define COND_NOT_GT() COND_LE()
+#define COND_NOT_LE() COND_GT()
+
+/* Not real conditions, but here for convenience */
+#define COND_XS() (FLAG_X&0x100)
+#define COND_XC() (!COND_XS)
+
+
+/* Get the condition code register */
+#define m68ki_get_ccr() ((COND_XS() >> 4) | \
+ (COND_MI() >> 4) | \
+ (COND_EQ() << 2) | \
+ (COND_VS() >> 6) | \
+ (COND_CS() >> 8))
+
+/* Get the status register */
+#define m68ki_get_sr() ( FLAG_T1 | \
+ FLAG_T0 | \
+ (FLAG_S << 11) | \
+ (FLAG_M << 11) | \
+ FLAG_INT_MASK | \
+ m68ki_get_ccr())
+
+
+
+/* ---------------------------- Cycle Counting ---------------------------- */
+
+#define ADD_CYCLES(A) m68ki_remaining_cycles += (A)
+#define USE_CYCLES(A) m68ki_remaining_cycles -= (A)
+#define SET_CYCLES(A) m68ki_remaining_cycles = A
+#define GET_CYCLES() m68ki_remaining_cycles
+#define USE_ALL_CYCLES() m68ki_remaining_cycles = 0
+
+
+
+/* ----------------------------- Read / Write ----------------------------- */
+
+/* Read from the current address space */
+#define m68ki_read_8(A) m68ki_read_8_fc (A, FLAG_S | m68ki_get_address_space())
+#define m68ki_read_16(A) m68ki_read_16_fc(A, FLAG_S | m68ki_get_address_space())
+#define m68ki_read_32(A) m68ki_read_32_fc(A, FLAG_S | m68ki_get_address_space())
+
+/* Write to the current data space */
+#define m68ki_write_8(A, V) m68ki_write_8_fc (A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
+#define m68ki_write_16(A, V) m68ki_write_16_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
+#define m68ki_write_32(A, V) m68ki_write_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
+
+#if M68K_SIMULATE_PD_WRITES
+#define m68ki_write_32_pd(A, V) m68ki_write_32_pd_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
+#else
+#define m68ki_write_32_pd(A, V) m68ki_write_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
+#endif
+
+/* map read immediate 8 to read immediate 16 */
+#define m68ki_read_imm_8() MASK_OUT_ABOVE_8(m68ki_read_imm_16())
+
+/* Map PC-relative reads */
+#define m68ki_read_pcrel_8(A) m68k_read_pcrelative_8(A)
+#define m68ki_read_pcrel_16(A) m68k_read_pcrelative_16(A)
+#define m68ki_read_pcrel_32(A) m68k_read_pcrelative_32(A)
+
+/* Read from the program space */
+#define m68ki_read_program_8(A) m68ki_read_8_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
+#define m68ki_read_program_16(A) m68ki_read_16_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
+#define m68ki_read_program_32(A) m68ki_read_32_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
+
+/* Read from the data space */
+#define m68ki_read_data_8(A) m68ki_read_8_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
+#define m68ki_read_data_16(A) m68ki_read_16_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
+#define m68ki_read_data_32(A) m68ki_read_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
+
+
+
+/* ======================================================================== */
+/* =============================== PROTOTYPES ============================= */
+/* ======================================================================== */
+
+#include "m68kctx.h"
+
+
+extern m68ki_cpu_core m68ki_cpu;
+extern sint m68ki_remaining_cycles;
+extern uint m68ki_tracing;
+extern uint8 m68ki_shift_8_table[];
+extern uint16 m68ki_shift_16_table[];
+extern uint m68ki_shift_32_table[];
+extern uint8 m68ki_exception_cycle_table[][256];
+extern uint m68ki_address_space;
+extern uint8 m68ki_ea_idx_cycle_table[];
+
+extern uint m68ki_aerr_address;
+extern uint m68ki_aerr_write_mode;
+extern uint m68ki_aerr_fc;
+
+/* Read data immediately after the program counter */
+INLINE uint m68ki_read_imm_16(void);
+INLINE uint m68ki_read_imm_32(void);
+
+/* Read data with specific function code */
+INLINE uint m68ki_read_8_fc (uint address, uint fc);
+INLINE uint m68ki_read_16_fc (uint address, uint fc);
+INLINE uint m68ki_read_32_fc (uint address, uint fc);
+
+/* Write data with specific function code */
+INLINE void m68ki_write_8_fc (uint address, uint fc, uint value);
+INLINE void m68ki_write_16_fc(uint address, uint fc, uint value);
+INLINE void m68ki_write_32_fc(uint address, uint fc, uint value);
+#if M68K_SIMULATE_PD_WRITES
+INLINE void m68ki_write_32_pd_fc(uint address, uint fc, uint value);
+#endif /* M68K_SIMULATE_PD_WRITES */
+
+/* Indexed and PC-relative ea fetching */
+INLINE uint m68ki_get_ea_pcdi(void);
+INLINE uint m68ki_get_ea_pcix(void);
+INLINE uint m68ki_get_ea_ix(uint An);
+
+/* Operand fetching */
+INLINE uint OPER_AY_AI_8(void);
+INLINE uint OPER_AY_AI_16(void);
+INLINE uint OPER_AY_AI_32(void);
+INLINE uint OPER_AY_PI_8(void);
+INLINE uint OPER_AY_PI_16(void);
+INLINE uint OPER_AY_PI_32(void);
+INLINE uint OPER_AY_PD_8(void);
+INLINE uint OPER_AY_PD_16(void);
+INLINE uint OPER_AY_PD_32(void);
+INLINE uint OPER_AY_DI_8(void);
+INLINE uint OPER_AY_DI_16(void);
+INLINE uint OPER_AY_DI_32(void);
+INLINE uint OPER_AY_IX_8(void);
+INLINE uint OPER_AY_IX_16(void);
+INLINE uint OPER_AY_IX_32(void);
+
+INLINE uint OPER_AX_AI_8(void);
+INLINE uint OPER_AX_AI_16(void);
+INLINE uint OPER_AX_AI_32(void);
+INLINE uint OPER_AX_PI_8(void);
+INLINE uint OPER_AX_PI_16(void);
+INLINE uint OPER_AX_PI_32(void);
+INLINE uint OPER_AX_PD_8(void);
+INLINE uint OPER_AX_PD_16(void);
+INLINE uint OPER_AX_PD_32(void);
+INLINE uint OPER_AX_DI_8(void);
+INLINE uint OPER_AX_DI_16(void);
+INLINE uint OPER_AX_DI_32(void);
+INLINE uint OPER_AX_IX_8(void);
+INLINE uint OPER_AX_IX_16(void);
+INLINE uint OPER_AX_IX_32(void);
+
+INLINE uint OPER_A7_PI_8(void);
+INLINE uint OPER_A7_PD_8(void);
+
+INLINE uint OPER_AW_8(void);
+INLINE uint OPER_AW_16(void);
+INLINE uint OPER_AW_32(void);
+INLINE uint OPER_AL_8(void);
+INLINE uint OPER_AL_16(void);
+INLINE uint OPER_AL_32(void);
+INLINE uint OPER_PCDI_8(void);
+INLINE uint OPER_PCDI_16(void);
+INLINE uint OPER_PCDI_32(void);
+INLINE uint OPER_PCIX_8(void);
+INLINE uint OPER_PCIX_16(void);
+INLINE uint OPER_PCIX_32(void);
+
+/* Stack operations */
+INLINE void m68ki_push_16(uint value);
+INLINE void m68ki_push_32(uint value);
+INLINE uint m68ki_pull_16(void);
+INLINE uint m68ki_pull_32(void);
+
+/* Program flow operations */
+INLINE void m68ki_jump(uint new_pc);
+INLINE void m68ki_jump_vector(uint vector);
+INLINE void m68ki_branch_8(uint offset);
+INLINE void m68ki_branch_16(uint offset);
+INLINE void m68ki_branch_32(uint offset);
+
+/* Status register operations. */
+INLINE void m68ki_set_s_flag(uint value); /* Only bit 2 of value should be set (i.e. 4 or 0) */
+INLINE void m68ki_set_sm_flag(uint value); /* only bits 1 and 2 of value should be set */
+INLINE void m68ki_set_ccr(uint value); /* set the condition code register */
+INLINE void m68ki_set_sr(uint value); /* set the status register */
+INLINE void m68ki_set_sr_noint(uint value); /* set the status register */
+
+/* Exception processing */
+INLINE uint m68ki_init_exception(void); /* Initial exception processing */
+
+INLINE void m68ki_stack_frame_3word(uint pc, uint sr); /* Stack various frame types */
+INLINE void m68ki_stack_frame_buserr(uint sr);
+
+INLINE void m68ki_stack_frame_0000(uint pc, uint sr, uint vector);
+INLINE void m68ki_stack_frame_0001(uint pc, uint sr, uint vector);
+INLINE void m68ki_stack_frame_0010(uint sr, uint vector);
+INLINE void m68ki_stack_frame_1000(uint pc, uint sr, uint vector);
+INLINE void m68ki_stack_frame_1010(uint sr, uint vector, uint pc);
+INLINE void m68ki_stack_frame_1011(uint sr, uint vector, uint pc);
+
+INLINE void m68ki_exception_trap(uint vector);
+INLINE void m68ki_exception_trapN(uint vector);
+INLINE void m68ki_exception_trace(void);
+INLINE void m68ki_exception_privilege_violation(void);
+INLINE void m68ki_exception_1010(void);
+INLINE void m68ki_exception_1111(void);
+INLINE void m68ki_exception_illegal(void);
+INLINE void m68ki_exception_format_error(void);
+INLINE void m68ki_exception_address_error(void);
+INLINE void m68ki_exception_interrupt(uint int_level);
+INLINE void m68ki_check_interrupts(void); /* ASG: check for interrupts */
+
+/* quick disassembly (used for logging) */
+char* m68ki_disassemble_quick(unsigned int pc, unsigned int cpu_type);
+
+
+/* ======================================================================== */
+/* =========================== UTILITY FUNCTIONS ========================== */
+/* ======================================================================== */
+
+
+/* ---------------------------- Read Immediate ---------------------------- */
+
+/* Handles all immediate reads, does address error check, function code setting,
+ * and prefetching if they are enabled in m68kconf.h
+ */
+INLINE uint m68ki_read_imm_16(void)
+{
+ m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
+ m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
+#if M68K_EMULATE_PREFETCH
+ if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR)
+ {
+ CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC);
+ CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR));
+ }
+ REG_PC += 2;
+ return MASK_OUT_ABOVE_16(CPU_PREF_DATA >> ((2-((REG_PC-2)&2))<<3));
+#else
+ REG_PC += 2;
+ return m68k_read_immediate_16(ADDRESS_68K(REG_PC-2));
+#endif /* M68K_EMULATE_PREFETCH */
+}
+INLINE uint m68ki_read_imm_32(void)
+{
+#if M68K_EMULATE_PREFETCH
+ uint temp_val;
+
+ m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
+ m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
+ if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR)
+ {
+ CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC);
+ CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR));
+ }
+ temp_val = CPU_PREF_DATA;
+ REG_PC += 2;
+ if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR)
+ {
+ CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC);
+ CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR));
+ temp_val = MASK_OUT_ABOVE_32((temp_val << 16) | (CPU_PREF_DATA >> 16));
+ }
+ REG_PC += 2;
+
+ return temp_val;
+#else
+ m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
+ m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
+ REG_PC += 4;
+ return m68k_read_immediate_32(ADDRESS_68K(REG_PC-4));
+#endif /* M68K_EMULATE_PREFETCH */
+}
+
+
+
+/* ------------------------- Top level read/write ------------------------- */
+
+/* Handles all memory accesses (except for immediate reads if they are
+ * configured to use separate functions in m68kconf.h).
+ * All memory accesses must go through these top level functions.
+ * These functions will also check for address error and set the function
+ * code if they are enabled in m68kconf.h.
+ */
+INLINE uint m68ki_read_8_fc(uint address, uint fc)
+{
+ m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
+ return m68k_read_memory_8(ADDRESS_68K(address));
+}
+INLINE uint m68ki_read_16_fc(uint address, uint fc)
+{
+ m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
+ m68ki_check_address_error(address, MODE_READ, fc); /* auto-disable (see m68kcpu.h) */
+ return m68k_read_memory_16(ADDRESS_68K(address));
+}
+INLINE uint m68ki_read_32_fc(uint address, uint fc)
+{
+ m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
+ m68ki_check_address_error(address, MODE_READ, fc); /* auto-disable (see m68kcpu.h) */
+ return m68k_read_memory_32(ADDRESS_68K(address));
+}
+
+INLINE void m68ki_write_8_fc(uint address, uint fc, uint value)
+{
+ m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
+ m68k_write_memory_8(ADDRESS_68K(address), value);
+}
+INLINE void m68ki_write_16_fc(uint address, uint fc, uint value)
+{
+ m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
+ m68ki_check_address_error(address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
+ m68k_write_memory_16(ADDRESS_68K(address), value);
+}
+INLINE void m68ki_write_32_fc(uint address, uint fc, uint value)
+{
+ m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
+ m68ki_check_address_error(address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
+ m68k_write_memory_32(ADDRESS_68K(address), value);
+}
+
+#if M68K_SIMULATE_PD_WRITES
+INLINE void m68ki_write_32_pd_fc(uint address, uint fc, uint value)
+{
+ m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
+ m68ki_check_address_error(address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
+ m68k_write_memory_32_pd(ADDRESS_68K(address), value);
+}
+#endif
+
+
+/* --------------------- Effective Address Calculation -------------------- */
+
+/* The program counter relative addressing modes cause operands to be
+ * retrieved from program space, not data space.
+ */
+INLINE uint m68ki_get_ea_pcdi(void)
+{
+ uint old_pc = REG_PC;
+ m68ki_use_program_space(); /* auto-disable */
+ return old_pc + MAKE_INT_16(m68ki_read_imm_16());
+}
+
+
+INLINE uint m68ki_get_ea_pcix(void)
+{
+ m68ki_use_program_space(); /* auto-disable */
+ return m68ki_get_ea_ix(REG_PC);
+}
+
+/* Indexed addressing modes are encoded as follows:
+ *
+ * Base instruction format:
+ * F E D C B A 9 8 7 6 | 5 4 3 | 2 1 0
+ * x x x x x x x x x x | 1 1 0 | BASE REGISTER (An)
+ *
+ * Base instruction format for destination EA in move instructions:
+ * F E D C | B A 9 | 8 7 6 | 5 4 3 2 1 0
+ * x x x x | BASE REG | 1 1 0 | X X X X X X (An)
+ *
+ * Brief extension format:
+ * F | E D C | B | A 9 | 8 | 7 6 5 4 3 2 1 0
+ * D/A | REGISTER | W/L | SCALE | 0 | DISPLACEMENT
+ *
+ * Full extension format:
+ * F E D C B A 9 8 7 6 5 4 3 2 1 0
+ * D/A | REGISTER | W/L | SCALE | 1 | BS | IS | BD SIZE | 0 | I/IS
+ * BASE DISPLACEMENT (0, 16, 32 bit) (bd)
+ * OUTER DISPLACEMENT (0, 16, 32 bit) (od)
+ *
+ * D/A: 0 = Dn, 1 = An (Xn)
+ * W/L: 0 = W (sign extend), 1 = L (.SIZE)
+ * SCALE: 00=1, 01=2, 10=4, 11=8 (*SCALE)
+ * BS: 0=add base reg, 1=suppress base reg (An suppressed)
+ * IS: 0=add index, 1=suppress index (Xn suppressed)
+ * BD SIZE: 00=reserved, 01=NULL, 10=Word, 11=Long (size of bd)
+ *
+ * IS I/IS Operation
+ * 0 000 No Memory Indirect
+ * 0 001 indir prex with null outer
+ * 0 010 indir prex with word outer
+ * 0 011 indir prex with long outer
+ * 0 100 reserved
+ * 0 101 indir postx with null outer
+ * 0 110 indir postx with word outer
+ * 0 111 indir postx with long outer
+ * 1 000 no memory indirect
+ * 1 001 mem indir with null outer
+ * 1 010 mem indir with word outer
+ * 1 011 mem indir with long outer
+ * 1 100-111 reserved
+ */
+INLINE uint m68ki_get_ea_ix(uint An)
+{
+ /* An = base register */
+ uint extension = m68ki_read_imm_16();
+ uint Xn = 0; /* Index register */
+ uint bd = 0; /* Base Displacement */
+ uint od = 0; /* Outer Displacement */
+
+ if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
+ {
+ /* Calculate index */
+ Xn = REG_DA[extension>>12]; /* Xn */
+ if(!BIT_B(extension)) /* W/L */
+ Xn = MAKE_INT_16(Xn);
+
+ /* Add base register and displacement and return */
+ return An + Xn + MAKE_INT_8(extension);
+ }
+
+ /* Brief extension format */
+ if(!BIT_8(extension))
+ {
+ /* Calculate index */
+ Xn = REG_DA[extension>>12]; /* Xn */
+ if(!BIT_B(extension)) /* W/L */
+ Xn = MAKE_INT_16(Xn);
+ /* Add scale if proper CPU type */
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ Xn <<= (extension>>9) & 3; /* SCALE */
+
+ /* Add base register and displacement and return */
+ return An + Xn + MAKE_INT_8(extension);
+ }
+
+ /* Full extension format */
+
+ USE_CYCLES(m68ki_ea_idx_cycle_table[extension&0x3f]);
+
+ /* Check if base register is present */
+ if(BIT_7(extension)) /* BS */
+ An = 0; /* An */
+
+ /* Check if index is present */
+ if(!BIT_6(extension)) /* IS */
+ {
+ Xn = REG_DA[extension>>12]; /* Xn */
+ if(!BIT_B(extension)) /* W/L */
+ Xn = MAKE_INT_16(Xn);
+ Xn <<= (extension>>9) & 3; /* SCALE */
+ }
+
+ /* Check if base displacement is present */
+ if(BIT_5(extension)) /* BD SIZE */
+ bd = BIT_4(extension) ? m68ki_read_imm_32() : MAKE_INT_16(m68ki_read_imm_16());
+
+ /* If no indirect action, we are done */
+ if(!(extension&7)) /* No Memory Indirect */
+ return An + bd + Xn;
+
+ /* Check if outer displacement is present */
+ if(BIT_1(extension)) /* I/IS: od */
+ od = BIT_0(extension) ? m68ki_read_imm_32() : MAKE_INT_16(m68ki_read_imm_16());
+
+ /* Postindex */
+ if(BIT_2(extension)) /* I/IS: 0 = preindex, 1 = postindex */
+ return m68ki_read_32(An + bd) + Xn + od;
+
+ /* Preindex */
+ return m68ki_read_32(An + bd + Xn) + od;
+}
+
+
+/* Fetch operands */
+INLINE uint OPER_AY_AI_8(void) {uint ea = EA_AY_AI_8(); return m68ki_read_8(ea); }
+INLINE uint OPER_AY_AI_16(void) {uint ea = EA_AY_AI_16(); return m68ki_read_16(ea);}
+INLINE uint OPER_AY_AI_32(void) {uint ea = EA_AY_AI_32(); return m68ki_read_32(ea);}
+INLINE uint OPER_AY_PI_8(void) {uint ea = EA_AY_PI_8(); return m68ki_read_8(ea); }
+INLINE uint OPER_AY_PI_16(void) {uint ea = EA_AY_PI_16(); return m68ki_read_16(ea);}
+INLINE uint OPER_AY_PI_32(void) {uint ea = EA_AY_PI_32(); return m68ki_read_32(ea);}
+INLINE uint OPER_AY_PD_8(void) {uint ea = EA_AY_PD_8(); return m68ki_read_8(ea); }
+INLINE uint OPER_AY_PD_16(void) {uint ea = EA_AY_PD_16(); return m68ki_read_16(ea);}
+INLINE uint OPER_AY_PD_32(void) {uint ea = EA_AY_PD_32(); return m68ki_read_32(ea);}
+INLINE uint OPER_AY_DI_8(void) {uint ea = EA_AY_DI_8(); return m68ki_read_8(ea); }
+INLINE uint OPER_AY_DI_16(void) {uint ea = EA_AY_DI_16(); return m68ki_read_16(ea);}
+INLINE uint OPER_AY_DI_32(void) {uint ea = EA_AY_DI_32(); return m68ki_read_32(ea);}
+INLINE uint OPER_AY_IX_8(void) {uint ea = EA_AY_IX_8(); return m68ki_read_8(ea); }
+INLINE uint OPER_AY_IX_16(void) {uint ea = EA_AY_IX_16(); return m68ki_read_16(ea);}
+INLINE uint OPER_AY_IX_32(void) {uint ea = EA_AY_IX_32(); return m68ki_read_32(ea);}
+
+INLINE uint OPER_AX_AI_8(void) {uint ea = EA_AX_AI_8(); return m68ki_read_8(ea); }
+INLINE uint OPER_AX_AI_16(void) {uint ea = EA_AX_AI_16(); return m68ki_read_16(ea);}
+INLINE uint OPER_AX_AI_32(void) {uint ea = EA_AX_AI_32(); return m68ki_read_32(ea);}
+INLINE uint OPER_AX_PI_8(void) {uint ea = EA_AX_PI_8(); return m68ki_read_8(ea); }
+INLINE uint OPER_AX_PI_16(void) {uint ea = EA_AX_PI_16(); return m68ki_read_16(ea);}
+INLINE uint OPER_AX_PI_32(void) {uint ea = EA_AX_PI_32(); return m68ki_read_32(ea);}
+INLINE uint OPER_AX_PD_8(void) {uint ea = EA_AX_PD_8(); return m68ki_read_8(ea); }
+INLINE uint OPER_AX_PD_16(void) {uint ea = EA_AX_PD_16(); return m68ki_read_16(ea);}
+INLINE uint OPER_AX_PD_32(void) {uint ea = EA_AX_PD_32(); return m68ki_read_32(ea);}
+INLINE uint OPER_AX_DI_8(void) {uint ea = EA_AX_DI_8(); return m68ki_read_8(ea); }
+INLINE uint OPER_AX_DI_16(void) {uint ea = EA_AX_DI_16(); return m68ki_read_16(ea);}
+INLINE uint OPER_AX_DI_32(void) {uint ea = EA_AX_DI_32(); return m68ki_read_32(ea);}
+INLINE uint OPER_AX_IX_8(void) {uint ea = EA_AX_IX_8(); return m68ki_read_8(ea); }
+INLINE uint OPER_AX_IX_16(void) {uint ea = EA_AX_IX_16(); return m68ki_read_16(ea);}
+INLINE uint OPER_AX_IX_32(void) {uint ea = EA_AX_IX_32(); return m68ki_read_32(ea);}
+
+INLINE uint OPER_A7_PI_8(void) {uint ea = EA_A7_PI_8(); return m68ki_read_8(ea); }
+INLINE uint OPER_A7_PD_8(void) {uint ea = EA_A7_PD_8(); return m68ki_read_8(ea); }
+
+INLINE uint OPER_AW_8(void) {uint ea = EA_AW_8(); return m68ki_read_8(ea); }
+INLINE uint OPER_AW_16(void) {uint ea = EA_AW_16(); return m68ki_read_16(ea);}
+INLINE uint OPER_AW_32(void) {uint ea = EA_AW_32(); return m68ki_read_32(ea);}
+INLINE uint OPER_AL_8(void) {uint ea = EA_AL_8(); return m68ki_read_8(ea); }
+INLINE uint OPER_AL_16(void) {uint ea = EA_AL_16(); return m68ki_read_16(ea);}
+INLINE uint OPER_AL_32(void) {uint ea = EA_AL_32(); return m68ki_read_32(ea);}
+INLINE uint OPER_PCDI_8(void) {uint ea = EA_PCDI_8(); return m68ki_read_pcrel_8(ea); }
+INLINE uint OPER_PCDI_16(void) {uint ea = EA_PCDI_16(); return m68ki_read_pcrel_16(ea);}
+INLINE uint OPER_PCDI_32(void) {uint ea = EA_PCDI_32(); return m68ki_read_pcrel_32(ea);}
+INLINE uint OPER_PCIX_8(void) {uint ea = EA_PCIX_8(); return m68ki_read_pcrel_8(ea); }
+INLINE uint OPER_PCIX_16(void) {uint ea = EA_PCIX_16(); return m68ki_read_pcrel_16(ea);}
+INLINE uint OPER_PCIX_32(void) {uint ea = EA_PCIX_32(); return m68ki_read_pcrel_32(ea);}
+
+
+
+/* ---------------------------- Stack Functions --------------------------- */
+
+/* Push/pull data from the stack */
+INLINE void m68ki_push_16(uint value)
+{
+ REG_SP = MASK_OUT_ABOVE_32(REG_SP - 2);
+ m68ki_write_16(REG_SP, value);
+}
+
+INLINE void m68ki_push_32(uint value)
+{
+ REG_SP = MASK_OUT_ABOVE_32(REG_SP - 4);
+ m68ki_write_32(REG_SP, value);
+}
+
+INLINE uint m68ki_pull_16(void)
+{
+ REG_SP = MASK_OUT_ABOVE_32(REG_SP + 2);
+ return m68ki_read_16(REG_SP-2);
+}
+
+INLINE uint m68ki_pull_32(void)
+{
+ REG_SP = MASK_OUT_ABOVE_32(REG_SP + 4);
+ return m68ki_read_32(REG_SP-4);
+}
+
+
+/* Increment/decrement the stack as if doing a push/pull but
+ * don't do any memory access.
+ */
+INLINE void m68ki_fake_push_16(void)
+{
+ REG_SP = MASK_OUT_ABOVE_32(REG_SP - 2);
+}
+
+INLINE void m68ki_fake_push_32(void)
+{
+ REG_SP = MASK_OUT_ABOVE_32(REG_SP - 4);
+}
+
+INLINE void m68ki_fake_pull_16(void)
+{
+ REG_SP = MASK_OUT_ABOVE_32(REG_SP + 2);
+}
+
+INLINE void m68ki_fake_pull_32(void)
+{
+ REG_SP = MASK_OUT_ABOVE_32(REG_SP + 4);
+}
+
+
+/* ----------------------------- Program Flow ----------------------------- */
+
+/* Jump to a new program location or vector.
+ * These functions will also call the pc_changed callback if it was enabled
+ * in m68kconf.h.
+ */
+INLINE void m68ki_jump(uint new_pc)
+{
+ REG_PC = new_pc;
+ m68ki_pc_changed(REG_PC);
+}
+
+INLINE void m68ki_jump_vector(uint vector)
+{
+ REG_PC = (vector<<2) + REG_VBR;
+ REG_PC = m68ki_read_data_32(REG_PC);
+ m68ki_pc_changed(REG_PC);
+}
+
+
+/* Branch to a new memory location.
+ * The 32-bit branch will call pc_changed if it was enabled in m68kconf.h.
+ * So far I've found no problems with not calling pc_changed for 8 or 16
+ * bit branches.
+ */
+INLINE void m68ki_branch_8(uint offset)
+{
+ REG_PC += MAKE_INT_8(offset);
+}
+
+INLINE void m68ki_branch_16(uint offset)
+{
+ REG_PC += MAKE_INT_16(offset);
+}
+
+INLINE void m68ki_branch_32(uint offset)
+{
+ REG_PC += offset;
+ m68ki_pc_changed(REG_PC);
+}
+
+
+
+/* ---------------------------- Status Register --------------------------- */
+
+/* Set the S flag and change the active stack pointer.
+ * Note that value MUST be 4 or 0.
+ */
+INLINE void m68ki_set_s_flag(uint value)
+{
+ /* Backup the old stack pointer */
+ REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)] = REG_SP;
+ /* Set the S flag */
+ FLAG_S = value;
+ /* Set the new stack pointer */
+ REG_SP = REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)];
+}
+
+/* Set the S and M flags and change the active stack pointer.
+ * Note that value MUST be 0, 2, 4, or 6 (bit2 = S, bit1 = M).
+ */
+INLINE void m68ki_set_sm_flag(uint value)
+{
+ /* Backup the old stack pointer */
+ REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)] = REG_SP;
+ /* Set the S and M flags */
+ FLAG_S = value & SFLAG_SET;
+ FLAG_M = value & MFLAG_SET;
+ /* Set the new stack pointer */
+ REG_SP = REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)];
+}
+
+/* Set the S and M flags. Don't touch the stack pointer. */
+INLINE void m68ki_set_sm_flag_nosp(uint value)
+{
+ /* Set the S and M flags */
+ FLAG_S = value & SFLAG_SET;
+ FLAG_M = value & MFLAG_SET;
+}
+
+
+/* Set the condition code register */
+INLINE void m68ki_set_ccr(uint value)
+{
+ FLAG_X = BIT_4(value) << 4;
+ FLAG_N = BIT_3(value) << 4;
+ FLAG_Z = !BIT_2(value);
+ FLAG_V = BIT_1(value) << 6;
+ FLAG_C = BIT_0(value) << 8;
+}
+
+/* Set the status register but don't check for interrupts */
+INLINE void m68ki_set_sr_noint(uint value)
+{
+ /* Mask out the "unimplemented" bits */
+ value &= CPU_SR_MASK;
+
+ /* Now set the status register */
+ FLAG_T1 = BIT_F(value);
+ FLAG_T0 = BIT_E(value);
+ FLAG_INT_MASK = value & 0x0700;
+ m68ki_set_ccr(value);
+ m68ki_set_sm_flag((value >> 11) & 6);
+}
+
+/* Set the status register but don't check for interrupts nor
+ * change the stack pointer
+ */
+INLINE void m68ki_set_sr_noint_nosp(uint value)
+{
+ /* Mask out the "unimplemented" bits */
+ value &= CPU_SR_MASK;
+
+ /* Now set the status register */
+ FLAG_T1 = BIT_F(value);
+ FLAG_T0 = BIT_E(value);
+ FLAG_INT_MASK = value & 0x0700;
+ m68ki_set_ccr(value);
+ m68ki_set_sm_flag_nosp((value >> 11) & 6);
+}
+
+/* Set the status register and check for interrupts */
+INLINE void m68ki_set_sr(uint value)
+{
+ m68ki_set_sr_noint(value);
+ m68ki_check_interrupts();
+}
+
+
+/* ------------------------- Exception Processing ------------------------- */
+
+/* Initiate exception processing */
+INLINE uint m68ki_init_exception(void)
+{
+ /* Save the old status register */
+ uint sr = m68ki_get_sr();
+
+ /* Turn off trace flag, clear pending traces */
+ FLAG_T1 = FLAG_T0 = 0;
+ m68ki_clear_trace();
+ /* Enter supervisor mode */
+ m68ki_set_s_flag(SFLAG_SET);
+
+ return sr;
+}
+
+/* 3 word stack frame (68000 only) */
+INLINE void m68ki_stack_frame_3word(uint pc, uint sr)
+{
+ m68ki_push_32(pc);
+ m68ki_push_16(sr);
+}
+
+/* Format 0 stack frame.
+ * This is the standard stack frame for 68010+.
+ */
+INLINE void m68ki_stack_frame_0000(uint pc, uint sr, uint vector)
+{
+ /* Stack a 3-word frame if we are 68000 */
+ if(CPU_TYPE == CPU_TYPE_000 || CPU_TYPE == CPU_TYPE_008)
+ {
+ m68ki_stack_frame_3word(pc, sr);
+ return;
+ }
+ m68ki_push_16(vector<<2);
+ m68ki_push_32(pc);
+ m68ki_push_16(sr);
+}
+
+/* Format 1 stack frame (68020).
+ * For 68020, this is the 4 word throwaway frame.
+ */
+INLINE void m68ki_stack_frame_0001(uint pc, uint sr, uint vector)
+{
+ m68ki_push_16(0x1000 | (vector<<2));
+ m68ki_push_32(pc);
+ m68ki_push_16(sr);
+}
+
+/* Format 2 stack frame.
+ * This is used only by 68020 for trap exceptions.
+ */
+INLINE void m68ki_stack_frame_0010(uint sr, uint vector)
+{
+ m68ki_push_32(REG_PPC);
+ m68ki_push_16(0x2000 | (vector<<2));
+ m68ki_push_32(REG_PC);
+ m68ki_push_16(sr);
+}
+
+
+/* Bus error stack frame (68000 only).
+ */
+INLINE void m68ki_stack_frame_buserr(uint sr)
+{
+ m68ki_push_32(REG_PC);
+ m68ki_push_16(sr);
+ m68ki_push_16(REG_IR);
+ m68ki_push_32(m68ki_aerr_address); /* access address */
+ /* 0 0 0 0 0 0 0 0 0 0 0 R/W I/N FC
+ * R/W 0 = write, 1 = read
+ * I/N 0 = instruction, 1 = not
+ * FC 3-bit function code
+ */
+ m68ki_push_16(m68ki_aerr_write_mode | CPU_INSTR_MODE | m68ki_aerr_fc);
+}
+
+/* Format 8 stack frame (68010).
+ * 68010 only. This is the 29 word bus/address error frame.
+ */
+void m68ki_stack_frame_1000(uint pc, uint sr, uint vector)
+{
+ /* VERSION
+ * NUMBER
+ * INTERNAL INFORMATION, 16 WORDS
+ */
+ m68ki_fake_push_32();
+ m68ki_fake_push_32();
+ m68ki_fake_push_32();
+ m68ki_fake_push_32();
+ m68ki_fake_push_32();
+ m68ki_fake_push_32();
+ m68ki_fake_push_32();
+ m68ki_fake_push_32();
+
+ /* INSTRUCTION INPUT BUFFER */
+ m68ki_push_16(0);
+
+ /* UNUSED, RESERVED (not written) */
+ m68ki_fake_push_16();
+
+ /* DATA INPUT BUFFER */
+ m68ki_push_16(0);
+
+ /* UNUSED, RESERVED (not written) */
+ m68ki_fake_push_16();
+
+ /* DATA OUTPUT BUFFER */
+ m68ki_push_16(0);
+
+ /* UNUSED, RESERVED (not written) */
+ m68ki_fake_push_16();
+
+ /* FAULT ADDRESS */
+ m68ki_push_32(0);
+
+ /* SPECIAL STATUS WORD */
+ m68ki_push_16(0);
+
+ /* 1000, VECTOR OFFSET */
+ m68ki_push_16(0x8000 | (vector<<2));
+
+ /* PROGRAM COUNTER */
+ m68ki_push_32(pc);
+
+ /* STATUS REGISTER */
+ m68ki_push_16(sr);
+}
+
+/* Format A stack frame (short bus fault).
+ * This is used only by 68020 for bus fault and address error
+ * if the error happens at an instruction boundary.
+ * PC stacked is address of next instruction.
+ */
+void m68ki_stack_frame_1010(uint sr, uint vector, uint pc)
+{
+ /* INTERNAL REGISTER */
+ m68ki_push_16(0);
+
+ /* INTERNAL REGISTER */
+ m68ki_push_16(0);
+
+ /* DATA OUTPUT BUFFER (2 words) */
+ m68ki_push_32(0);
+
+ /* INTERNAL REGISTER */
+ m68ki_push_16(0);
+
+ /* INTERNAL REGISTER */
+ m68ki_push_16(0);
+
+ /* DATA CYCLE FAULT ADDRESS (2 words) */
+ m68ki_push_32(0);
+
+ /* INSTRUCTION PIPE STAGE B */
+ m68ki_push_16(0);
+
+ /* INSTRUCTION PIPE STAGE C */
+ m68ki_push_16(0);
+
+ /* SPECIAL STATUS REGISTER */
+ m68ki_push_16(0);
+
+ /* INTERNAL REGISTER */
+ m68ki_push_16(0);
+
+ /* 1010, VECTOR OFFSET */
+ m68ki_push_16(0xa000 | (vector<<2));
+
+ /* PROGRAM COUNTER */
+ m68ki_push_32(pc);
+
+ /* STATUS REGISTER */
+ m68ki_push_16(sr);
+}
+
+/* Format B stack frame (long bus fault).
+ * This is used only by 68020 for bus fault and address error
+ * if the error happens during instruction execution.
+ * PC stacked is address of instruction in progress.
+ */
+void m68ki_stack_frame_1011(uint sr, uint vector, uint pc)
+{
+ /* INTERNAL REGISTERS (18 words) */
+ m68ki_push_32(0);
+ m68ki_push_32(0);
+ m68ki_push_32(0);
+ m68ki_push_32(0);
+ m68ki_push_32(0);
+ m68ki_push_32(0);
+ m68ki_push_32(0);
+ m68ki_push_32(0);
+ m68ki_push_32(0);
+
+ /* VERSION# (4 bits), INTERNAL INFORMATION */
+ m68ki_push_16(0);
+
+ /* INTERNAL REGISTERS (3 words) */
+ m68ki_push_32(0);
+ m68ki_push_16(0);
+
+ /* DATA INTPUT BUFFER (2 words) */
+ m68ki_push_32(0);
+
+ /* INTERNAL REGISTERS (2 words) */
+ m68ki_push_32(0);
+
+ /* STAGE B ADDRESS (2 words) */
+ m68ki_push_32(0);
+
+ /* INTERNAL REGISTER (4 words) */
+ m68ki_push_32(0);
+ m68ki_push_32(0);
+
+ /* DATA OUTPUT BUFFER (2 words) */
+ m68ki_push_32(0);
+
+ /* INTERNAL REGISTER */
+ m68ki_push_16(0);
+
+ /* INTERNAL REGISTER */
+ m68ki_push_16(0);
+
+ /* DATA CYCLE FAULT ADDRESS (2 words) */
+ m68ki_push_32(0);
+
+ /* INSTRUCTION PIPE STAGE B */
+ m68ki_push_16(0);
+
+ /* INSTRUCTION PIPE STAGE C */
+ m68ki_push_16(0);
+
+ /* SPECIAL STATUS REGISTER */
+ m68ki_push_16(0);
+
+ /* INTERNAL REGISTER */
+ m68ki_push_16(0);
+
+ /* 1011, VECTOR OFFSET */
+ m68ki_push_16(0xb000 | (vector<<2));
+
+ /* PROGRAM COUNTER */
+ m68ki_push_32(pc);
+
+ /* STATUS REGISTER */
+ m68ki_push_16(sr);
+}
+
+
+/* Used for Group 2 exceptions.
+ * These stack a type 2 frame on the 020.
+ */
+INLINE void m68ki_exception_trap(uint vector)
+{
+ uint sr = m68ki_init_exception();
+
+ if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
+ m68ki_stack_frame_0000(REG_PC, sr, vector);
+ else
+ m68ki_stack_frame_0010(sr, vector);
+
+ m68ki_jump_vector(vector);
+
+ /* Use up some clock cycles */
+ USE_CYCLES(CYC_EXCEPTION[vector]);
+}
+
+/* Trap#n stacks a 0 frame but behaves like group2 otherwise */
+INLINE void m68ki_exception_trapN(uint vector)
+{
+ uint sr = m68ki_init_exception();
+ m68ki_stack_frame_0000(REG_PC, sr, vector);
+ m68ki_jump_vector(vector);
+
+ /* Use up some clock cycles */
+ USE_CYCLES(CYC_EXCEPTION[vector]);
+}
+
+/* Exception for trace mode */
+INLINE void m68ki_exception_trace(void)
+{
+ uint sr = m68ki_init_exception();
+
+ if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
+ {
+ #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
+ if(CPU_TYPE_IS_000(CPU_TYPE))
+ {
+ CPU_INSTR_MODE = INSTRUCTION_NO;
+ }
+ #endif /* M68K_EMULATE_ADDRESS_ERROR */
+ m68ki_stack_frame_0000(REG_PC, sr, EXCEPTION_TRACE);
+ }
+ else
+ m68ki_stack_frame_0010(sr, EXCEPTION_TRACE);
+
+ m68ki_jump_vector(EXCEPTION_TRACE);
+
+ /* Trace nullifies a STOP instruction */
+ CPU_STOPPED &= ~STOP_LEVEL_STOP;
+
+ /* Use up some clock cycles */
+ USE_CYCLES(CYC_EXCEPTION[EXCEPTION_TRACE]);
+}
+
+/* Exception for privilege violation */
+INLINE void m68ki_exception_privilege_violation(void)
+{
+ uint sr = m68ki_init_exception();
+
+ #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
+ if(CPU_TYPE_IS_000(CPU_TYPE))
+ {
+ CPU_INSTR_MODE = INSTRUCTION_NO;
+ }
+ #endif /* M68K_EMULATE_ADDRESS_ERROR */
+
+ m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_PRIVILEGE_VIOLATION);
+ m68ki_jump_vector(EXCEPTION_PRIVILEGE_VIOLATION);
+
+ /* Use up some clock cycles and undo the instruction's cycles */
+ USE_CYCLES(CYC_EXCEPTION[EXCEPTION_PRIVILEGE_VIOLATION] - CYC_INSTRUCTION[REG_IR]);
+}
+
+/* Exception for A-Line instructions */
+INLINE void m68ki_exception_1010(void)
+{
+ uint sr;
+#if M68K_LOG_1010_1111 == OPT_ON
+ M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: called 1010 instruction %04x (%s)\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
+ m68ki_disassemble_quick(ADDRESS_68K(REG_PPC))));
+#endif
+
+ sr = m68ki_init_exception();
+ m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_1010);
+ m68ki_jump_vector(EXCEPTION_1010);
+
+ /* Use up some clock cycles and undo the instruction's cycles */
+ USE_CYCLES(CYC_EXCEPTION[EXCEPTION_1010] - CYC_INSTRUCTION[REG_IR]);
+}
+
+/* Exception for F-Line instructions */
+INLINE void m68ki_exception_1111(void)
+{
+ uint sr;
+
+#if M68K_LOG_1010_1111 == OPT_ON
+ M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: called 1111 instruction %04x (%s)\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
+ m68ki_disassemble_quick(ADDRESS_68K(REG_PPC))));
+#endif
+
+ sr = m68ki_init_exception();
+ m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_1111);
+ m68ki_jump_vector(EXCEPTION_1111);
+
+ /* Use up some clock cycles and undo the instruction's cycles */
+ USE_CYCLES(CYC_EXCEPTION[EXCEPTION_1111] - CYC_INSTRUCTION[REG_IR]);
+}
+
+/* Exception for illegal instructions */
+INLINE void m68ki_exception_illegal(void)
+{
+ uint sr;
+
+ M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: illegal instruction %04x (%s)\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
+ m68ki_disassemble_quick(ADDRESS_68K(REG_PPC))));
+
+ sr = m68ki_init_exception();
+
+ #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
+ if(CPU_TYPE_IS_000(CPU_TYPE))
+ {
+ CPU_INSTR_MODE = INSTRUCTION_NO;
+ }
+ #endif /* M68K_EMULATE_ADDRESS_ERROR */
+
+ m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_ILLEGAL_INSTRUCTION);
+ m68ki_jump_vector(EXCEPTION_ILLEGAL_INSTRUCTION);
+
+ /* Use up some clock cycles and undo the instruction's cycles */
+ USE_CYCLES(CYC_EXCEPTION[EXCEPTION_ILLEGAL_INSTRUCTION] - CYC_INSTRUCTION[REG_IR]);
+}
+
+/* Exception for format errror in RTE */
+INLINE void m68ki_exception_format_error(void)
+{
+ uint sr = m68ki_init_exception();
+ m68ki_stack_frame_0000(REG_PC, sr, EXCEPTION_FORMAT_ERROR);
+ m68ki_jump_vector(EXCEPTION_FORMAT_ERROR);
+
+ /* Use up some clock cycles and undo the instruction's cycles */
+ USE_CYCLES(CYC_EXCEPTION[EXCEPTION_FORMAT_ERROR] - CYC_INSTRUCTION[REG_IR]);
+}
+
+/* Exception for address error */
+INLINE void m68ki_exception_address_error(void)
+{
+ uint sr = m68ki_init_exception();
+
+ /* If we were processing a bus error, address error, or reset,
+ * this is a catastrophic failure.
+ * Halt the CPU
+ */
+ if(CPU_RUN_MODE == RUN_MODE_BERR_AERR_RESET)
+ {
+m68k_read_memory_8(0x00ffff01);
+ CPU_STOPPED = STOP_LEVEL_HALT;
+ return;
+ }
+ CPU_RUN_MODE = RUN_MODE_BERR_AERR_RESET;
+
+ /* Note: This is implemented for 68000 only! */
+ m68ki_stack_frame_buserr(sr);
+
+ m68ki_jump_vector(EXCEPTION_ADDRESS_ERROR);
+
+ /* Use up some clock cycles and undo the instruction's cycles */
+ USE_CYCLES(CYC_EXCEPTION[EXCEPTION_ADDRESS_ERROR] - CYC_INSTRUCTION[REG_IR]);
+}
+
+
+/* Service an interrupt request and start exception processing */
+void m68ki_exception_interrupt(uint int_level)
+{
+ uint vector;
+ uint sr;
+ uint new_pc;
+
+ #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
+ if(CPU_TYPE_IS_000(CPU_TYPE))
+ {
+ CPU_INSTR_MODE = INSTRUCTION_NO;
+ }
+ #endif /* M68K_EMULATE_ADDRESS_ERROR */
+
+ /* Turn off the stopped state */
+ CPU_STOPPED &= ~STOP_LEVEL_STOP;
+
+ /* If we are halted, don't do anything */
+ if(CPU_STOPPED)
+ return;
+
+ /* Acknowledge the interrupt */
+ vector = m68ki_int_ack(int_level);
+
+ /* Get the interrupt vector */
+ if(vector == M68K_INT_ACK_AUTOVECTOR)
+ /* Use the autovectors. This is the most commonly used implementation */
+ vector = EXCEPTION_INTERRUPT_AUTOVECTOR+int_level;
+ else if(vector == M68K_INT_ACK_SPURIOUS)
+ /* Called if no devices respond to the interrupt acknowledge */
+ vector = EXCEPTION_SPURIOUS_INTERRUPT;
+ else if(vector > 255)
+ {
+ M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: Interrupt acknowledge returned invalid vector $%x\n",
+ m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC), vector));
+ return;
+ }
+
+ /* Start exception processing */
+ sr = m68ki_init_exception();
+
+ /* Set the interrupt mask to the level of the one being serviced */
+ FLAG_INT_MASK = int_level<<8;
+
+ /* Get the new PC */
+ new_pc = m68ki_read_data_32((vector<<2) + REG_VBR);
+
+ /* If vector is uninitialized, call the uninitialized interrupt vector */
+ if(new_pc == 0)
+ new_pc = m68ki_read_data_32((EXCEPTION_UNINITIALIZED_INTERRUPT<<2) + REG_VBR);
+
+ /* Generate a stack frame */
+ m68ki_stack_frame_0000(REG_PC, sr, vector);
+ if(FLAG_M && CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ /* Create throwaway frame */
+ m68ki_set_sm_flag(FLAG_S); /* clear M */
+ sr |= 0x2000; /* Same as SR in master stack frame except S is forced high */
+ m68ki_stack_frame_0001(REG_PC, sr, vector);
+ }
+
+ m68ki_jump(new_pc);
+
+ /* Defer cycle counting until later */
+ CPU_INT_CYCLES += CYC_EXCEPTION[vector];
+
+#if !M68K_EMULATE_INT_ACK
+ /* Automatically clear IRQ if we are not using an acknowledge scheme */
+ CPU_INT_LEVEL = 0;
+#endif /* M68K_EMULATE_INT_ACK */
+}
+
+
+/* ASG: Check for interrupts */
+INLINE void m68ki_check_interrupts(void)
+{
+ if(CPU_INT_LEVEL > FLAG_INT_MASK)
+ {
+ m68ki_exception_interrupt(CPU_INT_LEVEL>>8);
+ }
+}
+
+
+
+/* ======================================================================== */
+/* ============================== END OF FILE ============================= */
+/* ======================================================================== */
+
+#endif /* M68KCPU__HEADER */
diff --git a/Src/CPU/68K/Musashi/m68kcpu.o b/Src/CPU/68K/Musashi/m68kcpu.o
new file mode 100644
index 0000000..f92a9ee
Binary files /dev/null and b/Src/CPU/68K/Musashi/m68kcpu.o differ
diff --git a/Src/CPU/68K/Musashi/m68kctx.h b/Src/CPU/68K/Musashi/m68kctx.h
new file mode 100644
index 0000000..1b114d2
--- /dev/null
+++ b/Src/CPU/68K/Musashi/m68kctx.h
@@ -0,0 +1,87 @@
+/**
+ ** Supermodel
+ ** A Sega Model 3 Arcade Emulator.
+ ** Copyright 2011 Bart Trzynadlowski, Nik Henson
+ **
+ ** This file is part of Supermodel.
+ **
+ ** Supermodel is free software: you can redistribute it and/or modify it under
+ ** the terms of the GNU General Public License as published by the Free
+ ** Software Foundation, either version 3 of the License, or (at your option)
+ ** any later version.
+ **
+ ** Supermodel is distributed in the hope that it will be useful, but WITHOUT
+ ** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ ** FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ ** more details.
+ **
+ ** You should have received a copy of the GNU General Public License along
+ ** with Supermodel. If not, see .
+ **/
+
+/*
+ * m68kctx.h
+ *
+ * Musashi CPU context. This was made a separate file to more easily facilitate
+ * save state management. It is used internally by m68kcpu.h.
+ */
+
+#include "Types.h" // Supermodel types
+
+typedef struct
+{
+ UINT32 cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, or 68020 */
+ UINT32 dar[16]; /* Data and Address Registers */
+ UINT32 ppc; /* Previous program counter */
+ UINT32 pc; /* Program Counter */
+ UINT32 sp[7]; /* User, Interrupt, and Master Stack Pointers */
+ UINT32 vbr; /* Vector Base Register (m68010+) */
+ UINT32 sfc; /* Source Function Code Register (m68010+) */
+ UINT32 dfc; /* Destination Function Code Register (m68010+) */
+ UINT32 cacr; /* Cache Control Register (m68020, unemulated) */
+ UINT32 caar; /* Cache Address Register (m68020, unemulated) */
+ UINT32 ir; /* Instruction Register */
+ UINT32 t1_flag; /* Trace 1 */
+ UINT32 t0_flag; /* Trace 0 */
+ UINT32 s_flag; /* Supervisor */
+ UINT32 m_flag; /* Master/Interrupt state */
+ UINT32 x_flag; /* Extend */
+ UINT32 n_flag; /* Negative */
+ UINT32 not_z_flag; /* Zero, inverted for speedups */
+ UINT32 v_flag; /* Overflow */
+ UINT32 c_flag; /* Carry */
+ UINT32 int_mask; /* I0-I2 */
+ UINT32 int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */
+ UINT32 int_cycles; /* ASG: extra cycles from generated interrupts */
+ UINT32 stopped; /* Stopped state */
+ UINT32 pref_addr; /* Last prefetch address */
+ UINT32 pref_data; /* Data in the prefetch queue */
+ UINT32 address_mask; /* Available address pins */
+ UINT32 sr_mask; /* Implemented status register bits */
+ UINT32 instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */
+ UINT32 run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */
+
+ /* Clocks required for instructions / exceptions */
+ UINT32 cyc_bcc_notake_b;
+ UINT32 cyc_bcc_notake_w;
+ UINT32 cyc_dbcc_f_noexp;
+ UINT32 cyc_dbcc_f_exp;
+ UINT32 cyc_scc_r_true;
+ UINT32 cyc_movem_w;
+ UINT32 cyc_movem_l;
+ UINT32 cyc_shift;
+ UINT32 cyc_reset;
+ UINT8* cyc_instruction;
+ UINT8* cyc_exception;
+
+ /* Callbacks to host */
+ int (*int_ack_callback)(int int_line); /* Interrupt Acknowledge */
+ void (*bkpt_ack_callback)(unsigned int data); /* Breakpoint Acknowledge */
+ void (*reset_instr_callback)(void); /* Called when a RESET instruction is encountered */
+ void (*cmpild_instr_callback)(unsigned int, int); /* Called when a CMPI.L #v, Dn instruction is encountered */
+ void (*rte_instr_callback)(void); /* Called when a RTE instruction is encountered */
+ void (*pc_changed_callback)(unsigned int new_pc); /* Called when the PC changes by a large amount */
+ void (*set_fc_callback)(unsigned int new_fc); /* Called when the CPU function code changes */
+ void (*instr_hook_callback)(void); /* Called every instruction cycle prior to execution */
+
+} m68ki_cpu_core;
\ No newline at end of file
diff --git a/Src/CPU/68K/Musashi/m68kdasm.c b/Src/CPU/68K/Musashi/m68kdasm.c
new file mode 100644
index 0000000..c396726
--- /dev/null
+++ b/Src/CPU/68K/Musashi/m68kdasm.c
@@ -0,0 +1,3563 @@
+/**
+ ** Supermodel
+ ** A Sega Model 3 Arcade Emulator.
+ ** Copyright 2011 Bart Trzynadlowski, Nik Henson
+ **
+ ** This file is part of Supermodel.
+ **
+ ** Supermodel is free software: you can redistribute it and/or modify it under
+ ** the terms of the GNU General Public License as published by the Free
+ ** Software Foundation, either version 3 of the License, or (at your option)
+ ** any later version.
+ **
+ ** Supermodel is distributed in the hope that it will be useful, but WITHOUT
+ ** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ ** FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ ** more details.
+ **
+ ** You should have received a copy of the GNU General Public License along
+ ** with Supermodel. If not, see .
+ **/
+
+/*
+ * m68kdasm.c
+ *
+ * Musashi 68K disassembler.
+ *
+ * Permission was obtained from Karl Stenerud to apply the GPL license to this
+ * code.
+ */
+
+/* ======================================================================== */
+/* ========================= LICENSING & COPYRIGHT ======================== */
+/* ======================================================================== */
+/*
+ * MUSASHI
+ * Version 3.3
+ *
+ * A portable Motorola M680x0 processor emulation engine.
+ * Copyright 1998-2001 Karl Stenerud. All rights reserved.
+ *
+ * This code may be freely used for non-commercial purposes as long as this
+ * copyright notice remains unaltered in the source code and any binary files
+ * containing this code in compiled form.
+ *
+ * All other lisencing terms must be negotiated with the author
+ * (Karl Stenerud).
+ *
+ * The latest version of this code can be obtained at:
+ * http://kstenerud.cjb.net
+ */
+
+
+
+/* ======================================================================== */
+/* ================================ INCLUDES ============================== */
+/* ======================================================================== */
+
+#include
+#include
+#include
+#include "m68k.h"
+
+#ifndef DECL_SPEC
+#define DECL_SPEC
+#endif
+
+/* ======================================================================== */
+/* ============================ GENERAL DEFINES =========================== */
+/* ======================================================================== */
+
+/* unsigned int and int must be at least 32 bits wide */
+#undef uint
+#define uint unsigned int
+
+/* Bit Isolation Functions */
+#define BIT_0(A) ((A) & 0x00000001)
+#define BIT_1(A) ((A) & 0x00000002)
+#define BIT_2(A) ((A) & 0x00000004)
+#define BIT_3(A) ((A) & 0x00000008)
+#define BIT_4(A) ((A) & 0x00000010)
+#define BIT_5(A) ((A) & 0x00000020)
+#define BIT_6(A) ((A) & 0x00000040)
+#define BIT_7(A) ((A) & 0x00000080)
+#define BIT_8(A) ((A) & 0x00000100)
+#define BIT_9(A) ((A) & 0x00000200)
+#define BIT_A(A) ((A) & 0x00000400)
+#define BIT_B(A) ((A) & 0x00000800)
+#define BIT_C(A) ((A) & 0x00001000)
+#define BIT_D(A) ((A) & 0x00002000)
+#define BIT_E(A) ((A) & 0x00004000)
+#define BIT_F(A) ((A) & 0x00008000)
+#define BIT_10(A) ((A) & 0x00010000)
+#define BIT_11(A) ((A) & 0x00020000)
+#define BIT_12(A) ((A) & 0x00040000)
+#define BIT_13(A) ((A) & 0x00080000)
+#define BIT_14(A) ((A) & 0x00100000)
+#define BIT_15(A) ((A) & 0x00200000)
+#define BIT_16(A) ((A) & 0x00400000)
+#define BIT_17(A) ((A) & 0x00800000)
+#define BIT_18(A) ((A) & 0x01000000)
+#define BIT_19(A) ((A) & 0x02000000)
+#define BIT_1A(A) ((A) & 0x04000000)
+#define BIT_1B(A) ((A) & 0x08000000)
+#define BIT_1C(A) ((A) & 0x10000000)
+#define BIT_1D(A) ((A) & 0x20000000)
+#define BIT_1E(A) ((A) & 0x40000000)
+#define BIT_1F(A) ((A) & 0x80000000)
+
+/* These are the CPU types understood by this disassembler */
+#define TYPE_68000 1
+#define TYPE_68008 2
+#define TYPE_68010 4
+#define TYPE_68020 8
+#define TYPE_68030 16
+#define TYPE_68040 32
+
+#define M68000_ONLY (TYPE_68000 | TYPE_68008)
+
+#define M68010_ONLY TYPE_68010
+#define M68010_LESS (TYPE_68000 | TYPE_68008 | TYPE_68010)
+#define M68010_PLUS (TYPE_68010 | TYPE_68020 | TYPE_68030 | TYPE_68040)
+
+#define M68020_ONLY TYPE_68020
+#define M68020_LESS (TYPE_68010 | TYPE_68020)
+#define M68020_PLUS (TYPE_68020 | TYPE_68030 | TYPE_68040)
+
+#define M68030_ONLY TYPE_68030
+#define M68030_LESS (TYPE_68010 | TYPE_68020 | TYPE_68030)
+#define M68030_PLUS (TYPE_68030 | TYPE_68040)
+
+#define M68040_PLUS TYPE_68040
+
+
+/* Extension word formats */
+#define EXT_8BIT_DISPLACEMENT(A) ((A)&0xff)
+#define EXT_FULL(A) BIT_8(A)
+#define EXT_EFFECTIVE_ZERO(A) (((A)&0xe4) == 0xc4 || ((A)&0xe2) == 0xc0)
+#define EXT_BASE_REGISTER_PRESENT(A) (!BIT_7(A))
+#define EXT_INDEX_REGISTER_PRESENT(A) (!BIT_6(A))
+#define EXT_INDEX_REGISTER(A) (((A)>>12)&7)
+#define EXT_INDEX_PRE_POST(A) (EXT_INDEX_PRESENT(A) && (A)&3)
+#define EXT_INDEX_PRE(A) (EXT_INDEX_PRESENT(A) && ((A)&7) < 4 && ((A)&7) != 0)
+#define EXT_INDEX_POST(A) (EXT_INDEX_PRESENT(A) && ((A)&7) > 4)
+#define EXT_INDEX_SCALE(A) (((A)>>9)&3)
+#define EXT_INDEX_LONG(A) BIT_B(A)
+#define EXT_INDEX_AR(A) BIT_F(A)
+#define EXT_BASE_DISPLACEMENT_PRESENT(A) (((A)&0x30) > 0x10)
+#define EXT_BASE_DISPLACEMENT_WORD(A) (((A)&0x30) == 0x20)
+#define EXT_BASE_DISPLACEMENT_LONG(A) (((A)&0x30) == 0x30)
+#define EXT_OUTER_DISPLACEMENT_PRESENT(A) (((A)&3) > 1 && ((A)&0x47) < 0x44)
+#define EXT_OUTER_DISPLACEMENT_WORD(A) (((A)&3) == 2 && ((A)&0x47) < 0x44)
+#define EXT_OUTER_DISPLACEMENT_LONG(A) (((A)&3) == 3 && ((A)&0x47) < 0x44)
+
+
+/* Opcode flags */
+#if M68K_COMPILE_FOR_MAME == OPT_ON
+#define SET_OPCODE_FLAGS(x) g_opcode_type = x;
+#define COMBINE_OPCODE_FLAGS(x) ((x) | g_opcode_type | DASMFLAG_SUPPORTED)
+#else
+#define SET_OPCODE_FLAGS(x)
+#define COMBINE_OPCODE_FLAGS(x) (x)
+#endif
+
+
+/* ======================================================================== */
+/* =============================== PROTOTYPES ============================= */
+/* ======================================================================== */
+
+/* Read data at the PC and increment PC */
+uint read_imm_8(void);
+uint read_imm_16(void);
+uint read_imm_32(void);
+
+/* Read data at the PC but don't imcrement the PC */
+uint peek_imm_8(void);
+uint peek_imm_16(void);
+uint peek_imm_32(void);
+
+/* make signed integers 100% portably */
+static int make_int_8(int value);
+static int make_int_16(int value);
+
+/* make a string of a hex value */
+static char* make_signed_hex_str_8(uint val);
+static char* make_signed_hex_str_16(uint val);
+static char* make_signed_hex_str_32(uint val);
+
+/* make string of ea mode */
+static char* get_ea_mode_str(uint instruction, uint size);
+
+char* get_ea_mode_str_8(uint instruction);
+char* get_ea_mode_str_16(uint instruction);
+char* get_ea_mode_str_32(uint instruction);
+
+/* make string of immediate value */
+static char* get_imm_str_s(uint size);
+static char* get_imm_str_u(uint size);
+
+char* get_imm_str_s8(void);
+char* get_imm_str_s16(void);
+char* get_imm_str_s32(void);
+
+/* Stuff to build the opcode handler jump table */
+static void build_opcode_table(void);
+static int valid_ea(uint opcode, uint mask);
+static int DECL_SPEC compare_nof_true_bits(const void *aptr, const void *bptr);
+
+/* used to build opcode handler jump table */
+typedef struct
+{
+ void (*opcode_handler)(void); /* handler function */
+ uint mask; /* mask on opcode */
+ uint match; /* what to match after masking */
+ uint ea_mask; /* what ea modes are allowed */
+} opcode_struct;
+
+
+
+/* ======================================================================== */
+/* ================================= DATA ================================= */
+/* ======================================================================== */
+
+/* Opcode handler jump table */
+static void (*g_instruction_table[0x10000])(void);
+/* Flag if disassembler initialized */
+static int g_initialized = 0;
+
+/* Address mask to simulate address lines */
+static unsigned int g_address_mask = 0xffffffff;
+
+static char g_dasm_str[100]; /* string to hold disassembly */
+static char g_helper_str[100]; /* string to hold helpful info */
+static uint g_cpu_pc; /* program counter */
+static uint g_cpu_ir; /* instruction register */
+static uint g_cpu_type;
+static uint g_opcode_type;
+
+/* used by ops like asr, ror, addq, etc */
+static uint g_3bit_qdata_table[8] = {8, 1, 2, 3, 4, 5, 6, 7};
+
+static uint g_5bit_data_table[32] =
+{
+ 32, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
+ 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
+};
+
+static const char* g_cc[16] =
+{"t", "f", "hi", "ls", "cc", "cs", "ne", "eq", "vc", "vs", "pl", "mi", "ge", "lt", "gt", "le"};
+
+static const char* g_cpcc[64] =
+{/* 000 001 010 011 100 101 110 111 */
+ "f", "eq", "ogt", "oge", "olt", "ole", "ogl", "or", /* 000 */
+ "un", "ueq", "ugt", "uge", "ult", "ule", "ne", "t", /* 001 */
+ "sf", "seq", "gt", "ge", "lt", "le", "gl" "gle", /* 010 */
+ "ngle", "ngl", "nle", "nlt", "nge", "ngt", "sne", "st", /* 011 */
+ "?", "?", "?", "?", "?", "?", "?", "?", /* 100 */
+ "?", "?", "?", "?", "?", "?", "?", "?", /* 101 */
+ "?", "?", "?", "?", "?", "?", "?", "?", /* 110 */
+ "?", "?", "?", "?", "?", "?", "?", "?" /* 111 */
+};
+
+
+/* ======================================================================== */
+/* =========================== UTILITY FUNCTIONS ========================== */
+/* ======================================================================== */
+
+#define LIMIT_CPU_TYPES(ALLOWED_CPU_TYPES) \
+ if(!(g_cpu_type & ALLOWED_CPU_TYPES)) \
+ { \
+ d68000_illegal(); \
+ return; \
+ }
+
+#define read_imm_8() (m68k_read_disassembler_16(((g_cpu_pc+=2)-2)&g_address_mask)&0xff)
+#define read_imm_16() m68k_read_disassembler_16(((g_cpu_pc+=2)-2)&g_address_mask)
+#define read_imm_32() m68k_read_disassembler_32(((g_cpu_pc+=4)-4)&g_address_mask)
+
+#define peek_imm_8() (m68k_read_disassembler_16(g_cpu_pc & g_address_mask)&0xff)
+#define peek_imm_16() m68k_read_disassembler_16(g_cpu_pc & g_address_mask)
+#define peek_imm_32() m68k_read_disassembler_32(g_cpu_pc & g_address_mask)
+
+/* Fake a split interface */
+#define get_ea_mode_str_8(instruction) get_ea_mode_str(instruction, 0)
+#define get_ea_mode_str_16(instruction) get_ea_mode_str(instruction, 1)
+#define get_ea_mode_str_32(instruction) get_ea_mode_str(instruction, 2)
+
+#define get_imm_str_s8() get_imm_str_s(0)
+#define get_imm_str_s16() get_imm_str_s(1)
+#define get_imm_str_s32() get_imm_str_s(2)
+
+#define get_imm_str_u8() get_imm_str_u(0)
+#define get_imm_str_u16() get_imm_str_u(1)
+#define get_imm_str_u32() get_imm_str_u(2)
+
+
+/* 100% portable signed int generators */
+static int make_int_8(int value)
+{
+ return (value & 0x80) ? value | ~0xff : value & 0xff;
+}
+
+static int make_int_16(int value)
+{
+ return (value & 0x8000) ? value | ~0xffff : value & 0xffff;
+}
+
+
+/* Get string representation of hex values */
+static char* make_signed_hex_str_8(uint val)
+{
+ static char str[20];
+
+ val &= 0xff;
+
+ if(val == 0x80)
+ sprintf(str, "-$80");
+ else if(val & 0x80)
+ sprintf(str, "-$%x", (0-val) & 0x7f);
+ else
+ sprintf(str, "$%x", val & 0x7f);
+
+ return str;
+}
+
+static char* make_signed_hex_str_16(uint val)
+{
+ static char str[20];
+
+ val &= 0xffff;
+
+ if(val == 0x8000)
+ sprintf(str, "-$8000");
+ else if(val & 0x8000)
+ sprintf(str, "-$%x", (0-val) & 0x7fff);
+ else
+ sprintf(str, "$%x", val & 0x7fff);
+
+ return str;
+}
+
+static char* make_signed_hex_str_32(uint val)
+{
+ static char str[20];
+
+ val &= 0xffffffff;
+
+ if(val == 0x80000000)
+ sprintf(str, "-$80000000");
+ else if(val & 0x80000000)
+ sprintf(str, "-$%x", (0-val) & 0x7fffffff);
+ else
+ sprintf(str, "$%x", val & 0x7fffffff);
+
+ return str;
+}
+
+
+/* make string of immediate value */
+static char* get_imm_str_s(uint size)
+{
+ static char str[15];
+ if(size == 0)
+ sprintf(str, "#%s", make_signed_hex_str_8(read_imm_8()));
+ else if(size == 1)
+ sprintf(str, "#%s", make_signed_hex_str_16(read_imm_16()));
+ else
+ sprintf(str, "#%s", make_signed_hex_str_32(read_imm_32()));
+ return str;
+}
+
+static char* get_imm_str_u(uint size)
+{
+ static char str[15];
+ if(size == 0)
+ sprintf(str, "#$%x", read_imm_8() & 0xff);
+ else if(size == 1)
+ sprintf(str, "#$%x", read_imm_16() & 0xffff);
+ else
+ sprintf(str, "#$%x", read_imm_32() & 0xffffffff);
+ return str;
+}
+
+/* Make string of effective address mode */
+static char* get_ea_mode_str(uint instruction, uint size)
+{
+ static char b1[64];
+ static char b2[64];
+ static char* mode = b2;
+ uint extension;
+ uint base;
+ uint outer;
+ char base_reg[4];
+ char index_reg[8];
+ uint preindex;
+ uint postindex;
+ uint comma = 0;
+ uint temp_value;
+ char invalid_mode = 0;
+
+ /* Switch buffers so we don't clobber on a double-call to this function */
+ mode = mode == b1 ? b2 : b1;
+
+ switch(instruction & 0x3f)
+ {
+ case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
+ /* data register direct */
+ sprintf(mode, "D%d", instruction&7);
+ break;
+ case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
+ /* address register direct */
+ sprintf(mode, "A%d", instruction&7);
+ break;
+ case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
+ /* address register indirect */
+ sprintf(mode, "(A%d)", instruction&7);
+ break;
+ case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
+ /* address register indirect with postincrement */
+ sprintf(mode, "(A%d)+", instruction&7);
+ break;
+ case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
+ /* address register indirect with predecrement */
+ sprintf(mode, "-(A%d)", instruction&7);
+ break;
+ case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
+ /* address register indirect with displacement*/
+ sprintf(mode, "(%s,A%d)", make_signed_hex_str_16(read_imm_16()), instruction&7);
+ break;
+ case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
+ /* address register indirect with index */
+ extension = read_imm_16();
+
+ if((g_cpu_type & M68010_LESS) && EXT_INDEX_SCALE(extension))
+ {
+ invalid_mode = 1;
+ break;
+ }
+
+ if(EXT_FULL(extension))
+ {
+ if(g_cpu_type & M68010_LESS)
+ {
+ invalid_mode = 1;
+ break;
+ }
+
+ if(EXT_EFFECTIVE_ZERO(extension))
+ {
+ strcpy(mode, "0");
+ break;
+ }
+
+ base = EXT_BASE_DISPLACEMENT_PRESENT(extension) ? (EXT_BASE_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
+ outer = EXT_OUTER_DISPLACEMENT_PRESENT(extension) ? (EXT_OUTER_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
+ if(EXT_BASE_REGISTER_PRESENT(extension))
+ sprintf(base_reg, "A%d", instruction&7);
+ else
+ *base_reg = 0;
+ if(EXT_INDEX_REGISTER_PRESENT(extension))
+ {
+ sprintf(index_reg, "%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
+ if(EXT_INDEX_SCALE(extension))
+ sprintf(index_reg+strlen(index_reg), "*%d", 1 << EXT_INDEX_SCALE(extension));
+ }
+ else
+ *index_reg = 0;
+ preindex = (extension&7) > 0 && (extension&7) < 4;
+ postindex = (extension&7) > 4;
+
+ strcpy(mode, "(");
+ if(preindex || postindex)
+ strcat(mode, "[");
+ if(base)
+ {
+ strcat(mode, make_signed_hex_str_16(base));
+ comma = 1;
+ }
+ if(*base_reg)
+ {
+ if(comma)
+ strcat(mode, ",");
+ strcat(mode, base_reg);
+ comma = 1;
+ }
+ if(postindex)
+ {
+ strcat(mode, "]");
+ comma = 1;
+ }
+ if(*index_reg)
+ {
+ if(comma)
+ strcat(mode, ",");
+ strcat(mode, index_reg);
+ comma = 1;
+ }
+ if(preindex)
+ {
+ strcat(mode, "]");
+ comma = 1;
+ }
+ if(outer)
+ {
+ if(comma)
+ strcat(mode, ",");
+ strcat(mode, make_signed_hex_str_16(outer));
+ }
+ strcat(mode, ")");
+ break;
+ }
+
+ if(EXT_8BIT_DISPLACEMENT(extension) == 0)
+ sprintf(mode, "(A%d,%c%d.%c", instruction&7, EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
+ else
+ sprintf(mode, "(%s,A%d,%c%d.%c", make_signed_hex_str_8(extension), instruction&7, EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
+ if(EXT_INDEX_SCALE(extension))
+ sprintf(mode+strlen(mode), "*%d", 1 << EXT_INDEX_SCALE(extension));
+ strcat(mode, ")");
+ break;
+ case 0x38:
+ /* absolute short address */
+ sprintf(mode, "$%x.w", read_imm_16());
+ break;
+ case 0x39:
+ /* absolute long address */
+ sprintf(mode, "$%x.l", read_imm_32());
+ break;
+ case 0x3a:
+ /* program counter with displacement */
+ temp_value = read_imm_16();
+ sprintf(mode, "(%s,PC)", make_signed_hex_str_16(temp_value));
+ sprintf(g_helper_str, "; ($%x)", (make_int_16(temp_value) + g_cpu_pc-2) & 0xffffffff);
+ break;
+ case 0x3b:
+ /* program counter with index */
+ extension = read_imm_16();
+
+ if((g_cpu_type & M68010_LESS) && EXT_INDEX_SCALE(extension))
+ {
+ invalid_mode = 1;
+ break;
+ }
+
+ if(EXT_FULL(extension))
+ {
+ if(g_cpu_type & M68010_LESS)
+ {
+ invalid_mode = 1;
+ break;
+ }
+
+ if(EXT_EFFECTIVE_ZERO(extension))
+ {
+ strcpy(mode, "0");
+ break;
+ }
+ base = EXT_BASE_DISPLACEMENT_PRESENT(extension) ? (EXT_BASE_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
+ outer = EXT_OUTER_DISPLACEMENT_PRESENT(extension) ? (EXT_OUTER_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
+ if(EXT_BASE_REGISTER_PRESENT(extension))
+ strcpy(base_reg, "PC");
+ else
+ *base_reg = 0;
+ if(EXT_INDEX_REGISTER_PRESENT(extension))
+ {
+ sprintf(index_reg, "%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
+ if(EXT_INDEX_SCALE(extension))
+ sprintf(index_reg+strlen(index_reg), "*%d", 1 << EXT_INDEX_SCALE(extension));
+ }
+ else
+ *index_reg = 0;
+ preindex = (extension&7) > 0 && (extension&7) < 4;
+ postindex = (extension&7) > 4;
+
+ strcpy(mode, "(");
+ if(preindex || postindex)
+ strcat(mode, "[");
+ if(base)
+ {
+ strcat(mode, make_signed_hex_str_16(base));
+ comma = 1;
+ }
+ if(*base_reg)
+ {
+ if(comma)
+ strcat(mode, ",");
+ strcat(mode, base_reg);
+ comma = 1;
+ }
+ if(postindex)
+ {
+ strcat(mode, "]");
+ comma = 1;
+ }
+ if(*index_reg)
+ {
+ if(comma)
+ strcat(mode, ",");
+ strcat(mode, index_reg);
+ comma = 1;
+ }
+ if(preindex)
+ {
+ strcat(mode, "]");
+ comma = 1;
+ }
+ if(outer)
+ {
+ if(comma)
+ strcat(mode, ",");
+ strcat(mode, make_signed_hex_str_16(outer));
+ }
+ strcat(mode, ")");
+ break;
+ }
+
+ if(EXT_8BIT_DISPLACEMENT(extension) == 0)
+ sprintf(mode, "(PC,%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
+ else
+ sprintf(mode, "(%s,PC,%c%d.%c", make_signed_hex_str_8(extension), EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
+ if(EXT_INDEX_SCALE(extension))
+ sprintf(mode+strlen(mode), "*%d", 1 << EXT_INDEX_SCALE(extension));
+ strcat(mode, ")");
+ break;
+ case 0x3c:
+ /* Immediate */
+ sprintf(mode, "%s", get_imm_str_u(size));
+ break;
+ default:
+ invalid_mode = 1;
+ }
+
+ if(invalid_mode)
+ sprintf(mode, "INVALID %x", instruction & 0x3f);
+
+ return mode;
+}
+
+
+
+/* ======================================================================== */
+/* ========================= INSTRUCTION HANDLERS ========================= */
+/* ======================================================================== */
+/* Instruction handler function names follow this convention:
+ *
+ * d68000_NAME_EXTENSIONS(void)
+ * where NAME is the name of the opcode it handles and EXTENSIONS are any
+ * extensions for special instances of that opcode.
+ *
+ * Examples:
+ * d68000_add_er_8(): add opcode, from effective address to register,
+ * size = byte
+ *
+ * d68000_asr_s_8(): arithmetic shift right, static count, size = byte
+ *
+ *
+ * Common extensions:
+ * 8 : size = byte
+ * 16 : size = word
+ * 32 : size = long
+ * rr : register to register
+ * mm : memory to memory
+ * r : register
+ * s : static
+ * er : effective address -> register
+ * re : register -> effective address
+ * ea : using effective address mode of operation
+ * d : data register direct
+ * a : address register direct
+ * ai : address register indirect
+ * pi : address register indirect with postincrement
+ * pd : address register indirect with predecrement
+ * di : address register indirect with displacement
+ * ix : address register indirect with index
+ * aw : absolute word
+ * al : absolute long
+ */
+
+static void d68000_illegal(void)
+{
+ sprintf(g_dasm_str, "dc.w $%04x; ILLEGAL", g_cpu_ir);
+}
+
+static void d68000_1010(void)
+{
+ sprintf(g_dasm_str, "dc.w $%04x; opcode 1010", g_cpu_ir);
+}
+
+
+static void d68000_1111(void)
+{
+ sprintf(g_dasm_str, "dc.w $%04x; opcode 1111", g_cpu_ir);
+}
+
+
+static void d68000_abcd_rr(void)
+{
+ sprintf(g_dasm_str, "abcd D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
+}
+
+
+static void d68000_abcd_mm(void)
+{
+ sprintf(g_dasm_str, "abcd -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
+}
+
+static void d68000_add_er_8(void)
+{
+ sprintf(g_dasm_str, "add.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+
+static void d68000_add_er_16(void)
+{
+ sprintf(g_dasm_str, "add.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_add_er_32(void)
+{
+ sprintf(g_dasm_str, "add.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_add_re_8(void)
+{
+ sprintf(g_dasm_str, "add.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_add_re_16(void)
+{
+ sprintf(g_dasm_str, "add.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_add_re_32(void)
+{
+ sprintf(g_dasm_str, "add.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_adda_16(void)
+{
+ sprintf(g_dasm_str, "adda.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_adda_32(void)
+{
+ sprintf(g_dasm_str, "adda.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_addi_8(void)
+{
+ char* str = get_imm_str_s8();
+ sprintf(g_dasm_str, "addi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_addi_16(void)
+{
+ char* str = get_imm_str_s16();
+ sprintf(g_dasm_str, "addi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_addi_32(void)
+{
+ char* str = get_imm_str_s32();
+ sprintf(g_dasm_str, "addi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_addq_8(void)
+{
+ sprintf(g_dasm_str, "addq.b #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_addq_16(void)
+{
+ sprintf(g_dasm_str, "addq.w #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_addq_32(void)
+{
+ sprintf(g_dasm_str, "addq.l #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_addx_rr_8(void)
+{
+ sprintf(g_dasm_str, "addx.b D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
+}
+
+static void d68000_addx_rr_16(void)
+{
+ sprintf(g_dasm_str, "addx.w D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
+}
+
+static void d68000_addx_rr_32(void)
+{
+ sprintf(g_dasm_str, "addx.l D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
+}
+
+static void d68000_addx_mm_8(void)
+{
+ sprintf(g_dasm_str, "addx.b -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
+}
+
+static void d68000_addx_mm_16(void)
+{
+ sprintf(g_dasm_str, "addx.w -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
+}
+
+static void d68000_addx_mm_32(void)
+{
+ sprintf(g_dasm_str, "addx.l -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
+}
+
+static void d68000_and_er_8(void)
+{
+ sprintf(g_dasm_str, "and.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_and_er_16(void)
+{
+ sprintf(g_dasm_str, "and.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_and_er_32(void)
+{
+ sprintf(g_dasm_str, "and.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_and_re_8(void)
+{
+ sprintf(g_dasm_str, "and.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_and_re_16(void)
+{
+ sprintf(g_dasm_str, "and.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_and_re_32(void)
+{
+ sprintf(g_dasm_str, "and.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_andi_8(void)
+{
+ char* str = get_imm_str_u8();
+ sprintf(g_dasm_str, "andi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_andi_16(void)
+{
+ char* str = get_imm_str_u16();
+ sprintf(g_dasm_str, "andi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_andi_32(void)
+{
+ char* str = get_imm_str_u32();
+ sprintf(g_dasm_str, "andi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_andi_to_ccr(void)
+{
+ sprintf(g_dasm_str, "andi %s, CCR", get_imm_str_u8());
+}
+
+static void d68000_andi_to_sr(void)
+{
+ sprintf(g_dasm_str, "andi %s, SR", get_imm_str_u16());
+}
+
+static void d68000_asr_s_8(void)
+{
+ sprintf(g_dasm_str, "asr.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
+}
+
+static void d68000_asr_s_16(void)
+{
+ sprintf(g_dasm_str, "asr.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
+}
+
+static void d68000_asr_s_32(void)
+{
+ sprintf(g_dasm_str, "asr.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
+}
+
+static void d68000_asr_r_8(void)
+{
+ sprintf(g_dasm_str, "asr.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_asr_r_16(void)
+{
+ sprintf(g_dasm_str, "asr.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_asr_r_32(void)
+{
+ sprintf(g_dasm_str, "asr.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_asr_ea(void)
+{
+ sprintf(g_dasm_str, "asr.w %s", get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_asl_s_8(void)
+{
+ sprintf(g_dasm_str, "asl.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
+}
+
+static void d68000_asl_s_16(void)
+{
+ sprintf(g_dasm_str, "asl.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
+}
+
+static void d68000_asl_s_32(void)
+{
+ sprintf(g_dasm_str, "asl.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
+}
+
+static void d68000_asl_r_8(void)
+{
+ sprintf(g_dasm_str, "asl.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_asl_r_16(void)
+{
+ sprintf(g_dasm_str, "asl.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_asl_r_32(void)
+{
+ sprintf(g_dasm_str, "asl.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_asl_ea(void)
+{
+ sprintf(g_dasm_str, "asl.w %s", get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_bcc_8(void)
+{
+ uint temp_pc = g_cpu_pc;
+ sprintf(g_dasm_str, "b%-2s %x", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + make_int_8(g_cpu_ir));
+}
+
+static void d68000_bcc_16(void)
+{
+ uint temp_pc = g_cpu_pc;
+ sprintf(g_dasm_str, "b%-2s %x", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + make_int_16(read_imm_16()));
+}
+
+static void d68020_bcc_32(void)
+{
+ uint temp_pc = g_cpu_pc;
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "b%-2s %x; (2+)", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + read_imm_32());
+}
+
+static void d68000_bchg_r(void)
+{
+ sprintf(g_dasm_str, "bchg D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_bchg_s(void)
+{
+ char* str = get_imm_str_u8();
+ sprintf(g_dasm_str, "bchg %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_bclr_r(void)
+{
+ sprintf(g_dasm_str, "bclr D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_bclr_s(void)
+{
+ char* str = get_imm_str_u8();
+ sprintf(g_dasm_str, "bclr %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68010_bkpt(void)
+{
+ LIMIT_CPU_TYPES(M68010_PLUS);
+ sprintf(g_dasm_str, "bkpt #%d; (1+)", g_cpu_ir&7);
+}
+
+static void d68020_bfchg(void)
+{
+ uint extension;
+ char offset[3];
+ char width[3];
+
+ LIMIT_CPU_TYPES(M68020_PLUS);
+
+ extension = read_imm_16();
+
+ if(BIT_B(extension))
+ sprintf(offset, "D%d", (extension>>6)&7);
+ else
+ sprintf(offset, "%d", (extension>>6)&31);
+ if(BIT_5(extension))
+ sprintf(width, "D%d", extension&7);
+ else
+ sprintf(width, "%d", g_5bit_data_table[extension&31]);
+ sprintf(g_dasm_str, "bfchg %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);
+}
+
+static void d68020_bfclr(void)
+{
+ uint extension;
+ char offset[3];
+ char width[3];
+
+ LIMIT_CPU_TYPES(M68020_PLUS);
+
+ extension = read_imm_16();
+
+ if(BIT_B(extension))
+ sprintf(offset, "D%d", (extension>>6)&7);
+ else
+ sprintf(offset, "%d", (extension>>6)&31);
+ if(BIT_5(extension))
+ sprintf(width, "D%d", extension&7);
+ else
+ sprintf(width, "%d", g_5bit_data_table[extension&31]);
+ sprintf(g_dasm_str, "bfclr %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);
+}
+
+static void d68020_bfexts(void)
+{
+ uint extension;
+ char offset[3];
+ char width[3];
+
+ LIMIT_CPU_TYPES(M68020_PLUS);
+
+ extension = read_imm_16();
+
+ if(BIT_B(extension))
+ sprintf(offset, "D%d", (extension>>6)&7);
+ else
+ sprintf(offset, "%d", (extension>>6)&31);
+ if(BIT_5(extension))
+ sprintf(width, "D%d", extension&7);
+ else
+ sprintf(width, "%d", g_5bit_data_table[extension&31]);
+ sprintf(g_dasm_str, "bfexts D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);
+}
+
+static void d68020_bfextu(void)
+{
+ uint extension;
+ char offset[3];
+ char width[3];
+
+ LIMIT_CPU_TYPES(M68020_PLUS);
+
+ extension = read_imm_16();
+
+ if(BIT_B(extension))
+ sprintf(offset, "D%d", (extension>>6)&7);
+ else
+ sprintf(offset, "%d", (extension>>6)&31);
+ if(BIT_5(extension))
+ sprintf(width, "D%d", extension&7);
+ else
+ sprintf(width, "%d", g_5bit_data_table[extension&31]);
+ sprintf(g_dasm_str, "bfextu D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);
+}
+
+static void d68020_bfffo(void)
+{
+ uint extension;
+ char offset[3];
+ char width[3];
+
+ LIMIT_CPU_TYPES(M68020_PLUS);
+
+ extension = read_imm_16();
+
+ if(BIT_B(extension))
+ sprintf(offset, "D%d", (extension>>6)&7);
+ else
+ sprintf(offset, "%d", (extension>>6)&31);
+ if(BIT_5(extension))
+ sprintf(width, "D%d", extension&7);
+ else
+ sprintf(width, "%d", g_5bit_data_table[extension&31]);
+ sprintf(g_dasm_str, "bfffo D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);
+}
+
+static void d68020_bfins(void)
+{
+ uint extension;
+ char offset[3];
+ char width[3];
+
+ LIMIT_CPU_TYPES(M68020_PLUS);
+
+ extension = read_imm_16();
+
+ if(BIT_B(extension))
+ sprintf(offset, "D%d", (extension>>6)&7);
+ else
+ sprintf(offset, "%d", (extension>>6)&31);
+ if(BIT_5(extension))
+ sprintf(width, "D%d", extension&7);
+ else
+ sprintf(width, "%d", g_5bit_data_table[extension&31]);
+ sprintf(g_dasm_str, "bfins D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);
+}
+
+static void d68020_bfset(void)
+{
+ uint extension;
+ char offset[3];
+ char width[3];
+
+ LIMIT_CPU_TYPES(M68020_PLUS);
+
+ extension = read_imm_16();
+
+ if(BIT_B(extension))
+ sprintf(offset, "D%d", (extension>>6)&7);
+ else
+ sprintf(offset, "%d", (extension>>6)&31);
+ if(BIT_5(extension))
+ sprintf(width, "D%d", extension&7);
+ else
+ sprintf(width, "%d", g_5bit_data_table[extension&31]);
+ sprintf(g_dasm_str, "bfset %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);
+}
+
+static void d68020_bftst(void)
+{
+ uint extension;
+ char offset[3];
+ char width[3];
+
+ LIMIT_CPU_TYPES(M68020_PLUS);
+
+ extension = read_imm_16();
+
+ if(BIT_B(extension))
+ sprintf(offset, "D%d", (extension>>6)&7);
+ else
+ sprintf(offset, "%d", (extension>>6)&31);
+ if(BIT_5(extension))
+ sprintf(width, "D%d", extension&7);
+ else
+ sprintf(width, "%d", g_5bit_data_table[extension&31]);
+ sprintf(g_dasm_str, "bftst %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);
+}
+
+static void d68000_bra_8(void)
+{
+ uint temp_pc = g_cpu_pc;
+ sprintf(g_dasm_str, "bra %x", temp_pc + make_int_8(g_cpu_ir));
+}
+
+static void d68000_bra_16(void)
+{
+ uint temp_pc = g_cpu_pc;
+ sprintf(g_dasm_str, "bra %x", temp_pc + make_int_16(read_imm_16()));
+}
+
+static void d68020_bra_32(void)
+{
+ uint temp_pc = g_cpu_pc;
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "bra %x; (2+)", temp_pc + read_imm_32());
+}
+
+static void d68000_bset_r(void)
+{
+ sprintf(g_dasm_str, "bset D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_bset_s(void)
+{
+ char* str = get_imm_str_u8();
+ sprintf(g_dasm_str, "bset %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_bsr_8(void)
+{
+ uint temp_pc = g_cpu_pc;
+ sprintf(g_dasm_str, "bsr %x", temp_pc + make_int_8(g_cpu_ir));
+ SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
+}
+
+static void d68000_bsr_16(void)
+{
+ uint temp_pc = g_cpu_pc;
+ sprintf(g_dasm_str, "bsr %x", temp_pc + make_int_16(read_imm_16()));
+ SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
+}
+
+static void d68020_bsr_32(void)
+{
+ uint temp_pc = g_cpu_pc;
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "bsr %x; (2+)", temp_pc + peek_imm_32());
+ SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
+}
+
+static void d68000_btst_r(void)
+{
+ sprintf(g_dasm_str, "btst D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_btst_s(void)
+{
+ char* str = get_imm_str_u8();
+ sprintf(g_dasm_str, "btst %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68020_callm(void)
+{
+ char* str;
+ LIMIT_CPU_TYPES(M68020_ONLY);
+ str = get_imm_str_u8();
+
+ sprintf(g_dasm_str, "callm %s, %s; (2)", str, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68020_cas_8(void)
+{
+ uint extension;
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ extension = read_imm_16();
+ sprintf(g_dasm_str, "cas.b D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68020_cas_16(void)
+{
+ uint extension;
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ extension = read_imm_16();
+ sprintf(g_dasm_str, "cas.w D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68020_cas_32(void)
+{
+ uint extension;
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ extension = read_imm_16();
+ sprintf(g_dasm_str, "cas.l D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68020_cas2_16(void)
+{
+/* CAS2 Dc1:Dc2,Du1:Dc2:(Rn1):(Rn2)
+f e d c b a 9 8 7 6 5 4 3 2 1 0
+ DARn1 0 0 0 Du1 0 0 0 Dc1
+ DARn2 0 0 0 Du2 0 0 0 Dc2
+*/
+
+ uint extension;
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ extension = read_imm_32();
+ sprintf(g_dasm_str, "cas2.w D%d:D%d:D%d:D%d, (%c%d):(%c%d); (2+)",
+ (extension>>16)&7, extension&7, (extension>>22)&7, (extension>>6)&7,
+ BIT_1F(extension) ? 'A' : 'D', (extension>>28)&7,
+ BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
+}
+
+static void d68020_cas2_32(void)
+{
+ uint extension;
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ extension = read_imm_32();
+ sprintf(g_dasm_str, "cas2.l D%d:D%d:D%d:D%d, (%c%d):(%c%d); (2+)",
+ (extension>>16)&7, extension&7, (extension>>22)&7, (extension>>6)&7,
+ BIT_1F(extension) ? 'A' : 'D', (extension>>28)&7,
+ BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
+}
+
+static void d68000_chk_16(void)
+{
+ sprintf(g_dasm_str, "chk.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
+ SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
+}
+
+static void d68020_chk_32(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "chk.l %s, D%d; (2+)", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
+ SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
+}
+
+static void d68020_chk2_cmp2_8(void)
+{
+ uint extension;
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ extension = read_imm_16();
+ sprintf(g_dasm_str, "%s.b %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_8(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
+}
+
+static void d68020_chk2_cmp2_16(void)
+{
+ uint extension;
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ extension = read_imm_16();
+ sprintf(g_dasm_str, "%s.w %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_16(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
+}
+
+static void d68020_chk2_cmp2_32(void)
+{
+ uint extension;
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ extension = read_imm_16();
+ sprintf(g_dasm_str, "%s.l %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_32(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
+}
+
+static void d68040_cinv(void)
+{
+ LIMIT_CPU_TYPES(M68040_PLUS);
+ switch((g_cpu_ir>>3)&3)
+ {
+ case 0:
+ sprintf(g_dasm_str, "cinv (illegal scope); (4)");
+ break;
+ case 1:
+ sprintf(g_dasm_str, "cinvl %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);
+ break;
+ case 2:
+ sprintf(g_dasm_str, "cinvp %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);
+ break;
+ case 3:
+ sprintf(g_dasm_str, "cinva %d; (4)", (g_cpu_ir>>6)&3);
+ break;
+ }
+}
+
+static void d68000_clr_8(void)
+{
+ sprintf(g_dasm_str, "clr.b %s", get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_clr_16(void)
+{
+ sprintf(g_dasm_str, "clr.w %s", get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_clr_32(void)
+{
+ sprintf(g_dasm_str, "clr.l %s", get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_cmp_8(void)
+{
+ sprintf(g_dasm_str, "cmp.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_cmp_16(void)
+{
+ sprintf(g_dasm_str, "cmp.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_cmp_32(void)
+{
+ sprintf(g_dasm_str, "cmp.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_cmpa_16(void)
+{
+ sprintf(g_dasm_str, "cmpa.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_cmpa_32(void)
+{
+ sprintf(g_dasm_str, "cmpa.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_cmpi_8(void)
+{
+ char* str = get_imm_str_s8();
+ sprintf(g_dasm_str, "cmpi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68020_cmpi_pcdi_8(void)
+{
+ char* str;
+ LIMIT_CPU_TYPES(M68010_PLUS);
+ str = get_imm_str_s8();
+ sprintf(g_dasm_str, "cmpi.b %s, %s; (2+)", str, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68020_cmpi_pcix_8(void)
+{
+ char* str;
+ LIMIT_CPU_TYPES(M68010_PLUS);
+ str = get_imm_str_s8();
+ sprintf(g_dasm_str, "cmpi.b %s, %s; (2+)", str, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_cmpi_16(void)
+{
+ char* str;
+ str = get_imm_str_s16();
+ sprintf(g_dasm_str, "cmpi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68020_cmpi_pcdi_16(void)
+{
+ char* str;
+ LIMIT_CPU_TYPES(M68010_PLUS);
+ str = get_imm_str_s16();
+ sprintf(g_dasm_str, "cmpi.w %s, %s; (2+)", str, get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68020_cmpi_pcix_16(void)
+{
+ char* str;
+ LIMIT_CPU_TYPES(M68010_PLUS);
+ str = get_imm_str_s16();
+ sprintf(g_dasm_str, "cmpi.w %s, %s; (2+)", str, get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_cmpi_32(void)
+{
+ char* str;
+ str = get_imm_str_s32();
+ sprintf(g_dasm_str, "cmpi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68020_cmpi_pcdi_32(void)
+{
+ char* str;
+ LIMIT_CPU_TYPES(M68010_PLUS);
+ str = get_imm_str_s32();
+ sprintf(g_dasm_str, "cmpi.l %s, %s; (2+)", str, get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68020_cmpi_pcix_32(void)
+{
+ char* str;
+ LIMIT_CPU_TYPES(M68010_PLUS);
+ str = get_imm_str_s32();
+ sprintf(g_dasm_str, "cmpi.l %s, %s; (2+)", str, get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_cmpm_8(void)
+{
+ sprintf(g_dasm_str, "cmpm.b (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7);
+}
+
+static void d68000_cmpm_16(void)
+{
+ sprintf(g_dasm_str, "cmpm.w (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7);
+}
+
+static void d68000_cmpm_32(void)
+{
+ sprintf(g_dasm_str, "cmpm.l (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7);
+}
+
+static void d68020_cpbcc_16(void)
+{
+ uint extension;
+ uint new_pc = g_cpu_pc;
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ extension = read_imm_16();
+ new_pc += make_int_16(peek_imm_16());
+ sprintf(g_dasm_str, "%db%-4s %s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[g_cpu_ir&0x3f], get_imm_str_s16(), new_pc, extension);
+}
+
+static void d68020_cpbcc_32(void)
+{
+ uint extension;
+ uint new_pc = g_cpu_pc;
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ extension = read_imm_16();
+ new_pc += peek_imm_32();
+ sprintf(g_dasm_str, "%db%-4s %s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[g_cpu_ir&0x3f], get_imm_str_s16(), new_pc, extension);
+}
+
+static void d68020_cpdbcc(void)
+{
+ uint extension1;
+ uint extension2;
+ uint new_pc = g_cpu_pc;
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ extension1 = read_imm_16();
+ extension2 = read_imm_16();
+ new_pc += make_int_16(peek_imm_16());
+ sprintf(g_dasm_str, "%ddb%-4s D%d,%s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], g_cpu_ir&7, get_imm_str_s16(), new_pc, extension2);
+}
+
+static void d68020_cpgen(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "%dgen %s; (2-3)", (g_cpu_ir>>9)&7, get_imm_str_u32());
+}
+
+static void d68020_cprestore(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "%drestore %s; (2-3)", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68020_cpsave(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "%dsave %s; (2-3)", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68020_cpscc(void)
+{
+ uint extension1;
+ uint extension2;
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ extension1 = read_imm_16();
+ extension2 = read_imm_16();
+ sprintf(g_dasm_str, "%ds%-4s %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_ea_mode_str_8(g_cpu_ir), extension2);
+}
+
+static void d68020_cptrapcc_0(void)
+{
+ uint extension1;
+ uint extension2;
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ extension1 = read_imm_16();
+ extension2 = read_imm_16();
+ sprintf(g_dasm_str, "%dtrap%-4s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], extension2);
+}
+
+static void d68020_cptrapcc_16(void)
+{
+ uint extension1;
+ uint extension2;
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ extension1 = read_imm_16();
+ extension2 = read_imm_16();
+ sprintf(g_dasm_str, "%dtrap%-4s %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_imm_str_u16(), extension2);
+}
+
+static void d68020_cptrapcc_32(void)
+{
+ uint extension1;
+ uint extension2;
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ extension1 = read_imm_16();
+ extension2 = read_imm_16();
+ sprintf(g_dasm_str, "%dtrap%-4s %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_imm_str_u32(), extension2);
+}
+
+static void d68040_cpush(void)
+{
+ LIMIT_CPU_TYPES(M68040_PLUS);
+ switch((g_cpu_ir>>3)&3)
+ {
+ case 0:
+ sprintf(g_dasm_str, "cpush (illegal scope); (4)");
+ break;
+ case 1:
+ sprintf(g_dasm_str, "cpushl %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);
+ break;
+ case 2:
+ sprintf(g_dasm_str, "cpushp %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);
+ break;
+ case 3:
+ sprintf(g_dasm_str, "cpusha %d; (4)", (g_cpu_ir>>6)&3);
+ break;
+ }
+}
+
+static void d68000_dbra(void)
+{
+ uint temp_pc = g_cpu_pc;
+ sprintf(g_dasm_str, "dbra D%d, %x", g_cpu_ir & 7, temp_pc + make_int_16(read_imm_16()));
+ SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
+}
+
+static void d68000_dbcc(void)
+{
+ uint temp_pc = g_cpu_pc;
+ sprintf(g_dasm_str, "db%-2s D%d, %x", g_cc[(g_cpu_ir>>8)&0xf], g_cpu_ir & 7, temp_pc + make_int_16(read_imm_16()));
+ SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
+}
+
+static void d68000_divs(void)
+{
+ sprintf(g_dasm_str, "divs.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_divu(void)
+{
+ sprintf(g_dasm_str, "divu.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68020_divl(void)
+{
+ uint extension;
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ extension = read_imm_16();
+
+ if(BIT_A(extension))
+ sprintf(g_dasm_str, "div%c.l %s, D%d:D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7);
+ else if((extension&7) == ((extension>>12)&7))
+ sprintf(g_dasm_str, "div%c.l %s, D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), (extension>>12)&7);
+ else
+ sprintf(g_dasm_str, "div%cl.l %s, D%d:D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7);
+}
+
+static void d68000_eor_8(void)
+{
+ sprintf(g_dasm_str, "eor.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_eor_16(void)
+{
+ sprintf(g_dasm_str, "eor.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_eor_32(void)
+{
+ sprintf(g_dasm_str, "eor.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_eori_8(void)
+{
+ char* str = get_imm_str_u8();
+ sprintf(g_dasm_str, "eori.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_eori_16(void)
+{
+ char* str = get_imm_str_u16();
+ sprintf(g_dasm_str, "eori.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_eori_32(void)
+{
+ char* str = get_imm_str_u32();
+ sprintf(g_dasm_str, "eori.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_eori_to_ccr(void)
+{
+ sprintf(g_dasm_str, "eori %s, CCR", get_imm_str_u8());
+}
+
+static void d68000_eori_to_sr(void)
+{
+ sprintf(g_dasm_str, "eori %s, SR", get_imm_str_u16());
+}
+
+static void d68000_exg_dd(void)
+{
+ sprintf(g_dasm_str, "exg D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_exg_aa(void)
+{
+ sprintf(g_dasm_str, "exg A%d, A%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_exg_da(void)
+{
+ sprintf(g_dasm_str, "exg D%d, A%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_ext_16(void)
+{
+ sprintf(g_dasm_str, "ext.w D%d", g_cpu_ir&7);
+}
+
+static void d68000_ext_32(void)
+{
+ sprintf(g_dasm_str, "ext.l D%d", g_cpu_ir&7);
+}
+
+static void d68020_extb_32(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "extb.l D%d; (2+)", g_cpu_ir&7);
+}
+
+static void d68000_jmp(void)
+{
+ sprintf(g_dasm_str, "jmp %s", get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_jsr(void)
+{
+ sprintf(g_dasm_str, "jsr %s", get_ea_mode_str_32(g_cpu_ir));
+ SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
+}
+
+static void d68000_lea(void)
+{
+ sprintf(g_dasm_str, "lea %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_link_16(void)
+{
+ sprintf(g_dasm_str, "link A%d, %s", g_cpu_ir&7, get_imm_str_s16());
+}
+
+static void d68020_link_32(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "link A%d, %s; (2+)", g_cpu_ir&7, get_imm_str_s32());
+}
+
+static void d68000_lsr_s_8(void)
+{
+ sprintf(g_dasm_str, "lsr.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
+}
+
+static void d68000_lsr_s_16(void)
+{
+ sprintf(g_dasm_str, "lsr.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
+}
+
+static void d68000_lsr_s_32(void)
+{
+ sprintf(g_dasm_str, "lsr.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
+}
+
+static void d68000_lsr_r_8(void)
+{
+ sprintf(g_dasm_str, "lsr.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_lsr_r_16(void)
+{
+ sprintf(g_dasm_str, "lsr.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_lsr_r_32(void)
+{
+ sprintf(g_dasm_str, "lsr.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_lsr_ea(void)
+{
+ sprintf(g_dasm_str, "lsr.w %s", get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_lsl_s_8(void)
+{
+ sprintf(g_dasm_str, "lsl.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
+}
+
+static void d68000_lsl_s_16(void)
+{
+ sprintf(g_dasm_str, "lsl.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
+}
+
+static void d68000_lsl_s_32(void)
+{
+ sprintf(g_dasm_str, "lsl.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
+}
+
+static void d68000_lsl_r_8(void)
+{
+ sprintf(g_dasm_str, "lsl.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_lsl_r_16(void)
+{
+ sprintf(g_dasm_str, "lsl.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_lsl_r_32(void)
+{
+ sprintf(g_dasm_str, "lsl.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_lsl_ea(void)
+{
+ sprintf(g_dasm_str, "lsl.w %s", get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_move_8(void)
+{
+ char* str = get_ea_mode_str_8(g_cpu_ir);
+ sprintf(g_dasm_str, "move.b %s, %s", str, get_ea_mode_str_8(((g_cpu_ir>>9) & 7) | ((g_cpu_ir>>3) & 0x38)));
+}
+
+static void d68000_move_16(void)
+{
+ char* str = get_ea_mode_str_16(g_cpu_ir);
+ sprintf(g_dasm_str, "move.w %s, %s", str, get_ea_mode_str_16(((g_cpu_ir>>9) & 7) | ((g_cpu_ir>>3) & 0x38)));
+}
+
+static void d68000_move_32(void)
+{
+ char* str = get_ea_mode_str_32(g_cpu_ir);
+ sprintf(g_dasm_str, "move.l %s, %s", str, get_ea_mode_str_32(((g_cpu_ir>>9) & 7) | ((g_cpu_ir>>3) & 0x38)));
+}
+
+static void d68000_movea_16(void)
+{
+ sprintf(g_dasm_str, "movea.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_movea_32(void)
+{
+ sprintf(g_dasm_str, "movea.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_move_to_ccr(void)
+{
+ sprintf(g_dasm_str, "move %s, CCR", get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68010_move_fr_ccr(void)
+{
+ LIMIT_CPU_TYPES(M68010_PLUS);
+ sprintf(g_dasm_str, "move CCR, %s; (1+)", get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_move_fr_sr(void)
+{
+ sprintf(g_dasm_str, "move SR, %s", get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_move_to_sr(void)
+{
+ sprintf(g_dasm_str, "move %s, SR", get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_move_fr_usp(void)
+{
+ sprintf(g_dasm_str, "move USP, A%d", g_cpu_ir&7);
+}
+
+static void d68000_move_to_usp(void)
+{
+ sprintf(g_dasm_str, "move A%d, USP", g_cpu_ir&7);
+}
+
+static void d68010_movec(void)
+{
+ uint extension;
+ const char* reg_name;
+ const char* processor;
+ LIMIT_CPU_TYPES(M68010_PLUS);
+ extension = read_imm_16();
+
+ switch(extension & 0xfff)
+ {
+ case 0x000:
+ reg_name = "SFC";
+ processor = "1+";
+ break;
+ case 0x001:
+ reg_name = "DFC";
+ processor = "1+";
+ break;
+ case 0x800:
+ reg_name = "USP";
+ processor = "1+";
+ break;
+ case 0x801:
+ reg_name = "VBR";
+ processor = "1+";
+ break;
+ case 0x002:
+ reg_name = "CACR";
+ processor = "2+";
+ break;
+ case 0x802:
+ reg_name = "CAAR";
+ processor = "2,3";
+ break;
+ case 0x803:
+ reg_name = "MSP";
+ processor = "2+";
+ break;
+ case 0x804:
+ reg_name = "ISP";
+ processor = "2+";
+ break;
+ case 0x003:
+ reg_name = "TC";
+ processor = "4+";
+ break;
+ case 0x004:
+ reg_name = "ITT0";
+ processor = "4+";
+ break;
+ case 0x005:
+ reg_name = "ITT1";
+ processor = "4+";
+ break;
+ case 0x006:
+ reg_name = "DTT0";
+ processor = "4+";
+ break;
+ case 0x007:
+ reg_name = "DTT1";
+ processor = "4+";
+ break;
+ case 0x805:
+ reg_name = "MMUSR";
+ processor = "4+";
+ break;
+ case 0x806:
+ reg_name = "URP";
+ processor = "4+";
+ break;
+ case 0x807:
+ reg_name = "SRP";
+ processor = "4+";
+ break;
+ default:
+ reg_name = make_signed_hex_str_16(extension & 0xfff);
+ processor = "?";
+ }
+
+ if(BIT_1(g_cpu_ir))
+ sprintf(g_dasm_str, "movec %c%d, %s; (%s)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, reg_name, processor);
+ else
+ sprintf(g_dasm_str, "movec %s, %c%d; (%s)", reg_name, BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, processor);
+}
+
+static void d68000_movem_pd_16(void)
+{
+ uint data = read_imm_16();
+ char buffer[40];
+ uint first;
+ uint run_length;
+ uint i;
+
+ buffer[0] = 0;
+ for(i=0;i<8;i++)
+ {
+ if(data&(1<<(15-i)))
+ {
+ first = i;
+ run_length = 0;
+ while(i<7 && (data&(1<<(15-(i+1)))))
+ {
+ i++;
+ run_length++;
+ }
+ if(buffer[0] != 0)
+ strcat(buffer, "/");
+ sprintf(buffer+strlen(buffer), "D%d", first);
+ if(run_length > 0)
+ sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
+ }
+ }
+ for(i=0;i<8;i++)
+ {
+ if(data&(1<<(7-i)))
+ {
+ first = i;
+ run_length = 0;
+ while(i<7 && (data&(1<<(7-(i+1)))))
+ {
+ i++;
+ run_length++;
+ }
+ if(buffer[0] != 0)
+ strcat(buffer, "/");
+ sprintf(buffer+strlen(buffer), "A%d", first);
+ if(run_length > 0)
+ sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
+ }
+ }
+ sprintf(g_dasm_str, "movem.w %s, %s", buffer, get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_movem_pd_32(void)
+{
+ uint data = read_imm_16();
+ char buffer[40];
+ uint first;
+ uint run_length;
+ uint i;
+
+ buffer[0] = 0;
+ for(i=0;i<8;i++)
+ {
+ if(data&(1<<(15-i)))
+ {
+ first = i;
+ run_length = 0;
+ while(i<7 && (data&(1<<(15-(i+1)))))
+ {
+ i++;
+ run_length++;
+ }
+ if(buffer[0] != 0)
+ strcat(buffer, "/");
+ sprintf(buffer+strlen(buffer), "D%d", first);
+ if(run_length > 0)
+ sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
+ }
+ }
+ for(i=0;i<8;i++)
+ {
+ if(data&(1<<(7-i)))
+ {
+ first = i;
+ run_length = 0;
+ while(i<7 && (data&(1<<(7-(i+1)))))
+ {
+ i++;
+ run_length++;
+ }
+ if(buffer[0] != 0)
+ strcat(buffer, "/");
+ sprintf(buffer+strlen(buffer), "A%d", first);
+ if(run_length > 0)
+ sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
+ }
+ }
+ sprintf(g_dasm_str, "movem.l %s, %s", buffer, get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_movem_er_16(void)
+{
+ uint data = read_imm_16();
+ char buffer[40];
+ uint first;
+ uint run_length;
+ uint i;
+
+ buffer[0] = 0;
+ for(i=0;i<8;i++)
+ {
+ if(data&(1< 0)
+ sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
+ }
+ }
+ for(i=0;i<8;i++)
+ {
+ if(data&(1<<(i+8)))
+ {
+ first = i;
+ run_length = 0;
+ while(i<7 && (data&(1<<(i+8+1))))
+ {
+ i++;
+ run_length++;
+ }
+ if(buffer[0] != 0)
+ strcat(buffer, "/");
+ sprintf(buffer+strlen(buffer), "A%d", first);
+ if(run_length > 0)
+ sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
+ }
+ }
+ sprintf(g_dasm_str, "movem.w %s, %s", get_ea_mode_str_16(g_cpu_ir), buffer);
+}
+
+static void d68000_movem_er_32(void)
+{
+ uint data = read_imm_16();
+ char buffer[40];
+ uint first;
+ uint run_length;
+ uint i;
+
+ buffer[0] = 0;
+ for(i=0;i<8;i++)
+ {
+ if(data&(1< 0)
+ sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
+ }
+ }
+ for(i=0;i<8;i++)
+ {
+ if(data&(1<<(i+8)))
+ {
+ first = i;
+ run_length = 0;
+ while(i<7 && (data&(1<<(i+8+1))))
+ {
+ i++;
+ run_length++;
+ }
+ if(buffer[0] != 0)
+ strcat(buffer, "/");
+ sprintf(buffer+strlen(buffer), "A%d", first);
+ if(run_length > 0)
+ sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
+ }
+ }
+ sprintf(g_dasm_str, "movem.l %s, %s", get_ea_mode_str_32(g_cpu_ir), buffer);
+}
+
+static void d68000_movem_re_16(void)
+{
+ uint data = read_imm_16();
+ char buffer[40];
+ uint first;
+ uint run_length;
+ uint i;
+
+ buffer[0] = 0;
+ for(i=0;i<8;i++)
+ {
+ if(data&(1< 0)
+ sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
+ }
+ }
+ for(i=0;i<8;i++)
+ {
+ if(data&(1<<(i+8)))
+ {
+ first = i;
+ run_length = 0;
+ while(i<7 && (data&(1<<(i+8+1))))
+ {
+ i++;
+ run_length++;
+ }
+ if(buffer[0] != 0)
+ strcat(buffer, "/");
+ sprintf(buffer+strlen(buffer), "A%d", first);
+ if(run_length > 0)
+ sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
+ }
+ }
+ sprintf(g_dasm_str, "movem.w %s, %s", buffer, get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_movem_re_32(void)
+{
+ uint data = read_imm_16();
+ char buffer[40];
+ uint first;
+ uint run_length;
+ uint i;
+
+ buffer[0] = 0;
+ for(i=0;i<8;i++)
+ {
+ if(data&(1< 0)
+ sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
+ }
+ }
+ for(i=0;i<8;i++)
+ {
+ if(data&(1<<(i+8)))
+ {
+ first = i;
+ run_length = 0;
+ while(i<7 && (data&(1<<(i+8+1))))
+ {
+ i++;
+ run_length++;
+ }
+ if(buffer[0] != 0)
+ strcat(buffer, "/");
+ sprintf(buffer+strlen(buffer), "A%d", first);
+ if(run_length > 0)
+ sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
+ }
+ }
+ sprintf(g_dasm_str, "movem.l %s, %s", buffer, get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_movep_re_16(void)
+{
+ sprintf(g_dasm_str, "movep.w D%d, ($%x,A%d)", (g_cpu_ir>>9)&7, read_imm_16(), g_cpu_ir&7);
+}
+
+static void d68000_movep_re_32(void)
+{
+ sprintf(g_dasm_str, "movep.l D%d, ($%x,A%d)", (g_cpu_ir>>9)&7, read_imm_16(), g_cpu_ir&7);
+}
+
+static void d68000_movep_er_16(void)
+{
+ sprintf(g_dasm_str, "movep.w ($%x,A%d), D%d", read_imm_16(), g_cpu_ir&7, (g_cpu_ir>>9)&7);
+}
+
+static void d68000_movep_er_32(void)
+{
+ sprintf(g_dasm_str, "movep.l ($%x,A%d), D%d", read_imm_16(), g_cpu_ir&7, (g_cpu_ir>>9)&7);
+}
+
+static void d68010_moves_8(void)
+{
+ uint extension;
+ LIMIT_CPU_TYPES(M68010_PLUS);
+ extension = read_imm_16();
+ if(BIT_B(extension))
+ sprintf(g_dasm_str, "moves.b %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir));
+ else
+ sprintf(g_dasm_str, "moves.b %s, %c%d; (1+)", get_ea_mode_str_8(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
+}
+
+static void d68010_moves_16(void)
+{
+ uint extension;
+ LIMIT_CPU_TYPES(M68010_PLUS);
+ extension = read_imm_16();
+ if(BIT_B(extension))
+ sprintf(g_dasm_str, "moves.w %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_16(g_cpu_ir));
+ else
+ sprintf(g_dasm_str, "moves.w %s, %c%d; (1+)", get_ea_mode_str_16(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
+}
+
+static void d68010_moves_32(void)
+{
+ uint extension;
+ LIMIT_CPU_TYPES(M68010_PLUS);
+ extension = read_imm_16();
+ if(BIT_B(extension))
+ sprintf(g_dasm_str, "moves.l %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_32(g_cpu_ir));
+ else
+ sprintf(g_dasm_str, "moves.l %s, %c%d; (1+)", get_ea_mode_str_32(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
+}
+
+static void d68000_moveq(void)
+{
+ sprintf(g_dasm_str, "moveq #%s, D%d", make_signed_hex_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68040_move16_pi_pi(void)
+{
+ LIMIT_CPU_TYPES(M68040_PLUS);
+ sprintf(g_dasm_str, "move16 (A%d)+, (A%d)+; (4)", g_cpu_ir&7, (read_imm_16()>>12)&7);
+}
+
+static void d68040_move16_pi_al(void)
+{
+ LIMIT_CPU_TYPES(M68040_PLUS);
+ sprintf(g_dasm_str, "move16 (A%d)+, %s; (4)", g_cpu_ir&7, get_imm_str_u32());
+}
+
+static void d68040_move16_al_pi(void)
+{
+ LIMIT_CPU_TYPES(M68040_PLUS);
+ sprintf(g_dasm_str, "move16 %s, (A%d)+; (4)", get_imm_str_u32(), g_cpu_ir&7);
+}
+
+static void d68040_move16_ai_al(void)
+{
+ LIMIT_CPU_TYPES(M68040_PLUS);
+ sprintf(g_dasm_str, "move16 (A%d), %s; (4)", g_cpu_ir&7, get_imm_str_u32());
+}
+
+static void d68040_move16_al_ai(void)
+{
+ LIMIT_CPU_TYPES(M68040_PLUS);
+ sprintf(g_dasm_str, "move16 %s, (A%d); (4)", get_imm_str_u32(), g_cpu_ir&7);
+}
+
+static void d68000_muls(void)
+{
+ sprintf(g_dasm_str, "muls.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_mulu(void)
+{
+ sprintf(g_dasm_str, "mulu.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68020_mull(void)
+{
+ uint extension;
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ extension = read_imm_16();
+
+ if(BIT_A(extension))
+ sprintf(g_dasm_str, "mul%c.l %s, D%d-D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7);
+ else
+ sprintf(g_dasm_str, "mul%c.l %s, D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), (extension>>12)&7);
+}
+
+static void d68000_nbcd(void)
+{
+ sprintf(g_dasm_str, "nbcd %s", get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_neg_8(void)
+{
+ sprintf(g_dasm_str, "neg.b %s", get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_neg_16(void)
+{
+ sprintf(g_dasm_str, "neg.w %s", get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_neg_32(void)
+{
+ sprintf(g_dasm_str, "neg.l %s", get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_negx_8(void)
+{
+ sprintf(g_dasm_str, "negx.b %s", get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_negx_16(void)
+{
+ sprintf(g_dasm_str, "negx.w %s", get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_negx_32(void)
+{
+ sprintf(g_dasm_str, "negx.l %s", get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_nop(void)
+{
+ sprintf(g_dasm_str, "nop");
+}
+
+static void d68000_not_8(void)
+{
+ sprintf(g_dasm_str, "not.b %s", get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_not_16(void)
+{
+ sprintf(g_dasm_str, "not.w %s", get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_not_32(void)
+{
+ sprintf(g_dasm_str, "not.l %s", get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_or_er_8(void)
+{
+ sprintf(g_dasm_str, "or.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_or_er_16(void)
+{
+ sprintf(g_dasm_str, "or.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_or_er_32(void)
+{
+ sprintf(g_dasm_str, "or.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_or_re_8(void)
+{
+ sprintf(g_dasm_str, "or.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_or_re_16(void)
+{
+ sprintf(g_dasm_str, "or.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_or_re_32(void)
+{
+ sprintf(g_dasm_str, "or.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_ori_8(void)
+{
+ char* str = get_imm_str_u8();
+ sprintf(g_dasm_str, "ori.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_ori_16(void)
+{
+ char* str = get_imm_str_u16();
+ sprintf(g_dasm_str, "ori.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_ori_32(void)
+{
+ char* str = get_imm_str_u32();
+ sprintf(g_dasm_str, "ori.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_ori_to_ccr(void)
+{
+ sprintf(g_dasm_str, "ori %s, CCR", get_imm_str_u8());
+}
+
+static void d68000_ori_to_sr(void)
+{
+ sprintf(g_dasm_str, "ori %s, SR", get_imm_str_u16());
+}
+
+static void d68020_pack_rr(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "pack D%d, D%d, %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());
+}
+
+static void d68020_pack_mm(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "pack -(A%d), -(A%d), %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());
+}
+
+static void d68000_pea(void)
+{
+ sprintf(g_dasm_str, "pea %s", get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_reset(void)
+{
+ sprintf(g_dasm_str, "reset");
+}
+
+static void d68000_ror_s_8(void)
+{
+ sprintf(g_dasm_str, "ror.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
+}
+
+static void d68000_ror_s_16(void)
+{
+ sprintf(g_dasm_str, "ror.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7],g_cpu_ir&7);
+}
+
+static void d68000_ror_s_32(void)
+{
+ sprintf(g_dasm_str, "ror.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
+}
+
+static void d68000_ror_r_8(void)
+{
+ sprintf(g_dasm_str, "ror.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_ror_r_16(void)
+{
+ sprintf(g_dasm_str, "ror.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_ror_r_32(void)
+{
+ sprintf(g_dasm_str, "ror.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_ror_ea(void)
+{
+ sprintf(g_dasm_str, "ror.w %s", get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_rol_s_8(void)
+{
+ sprintf(g_dasm_str, "rol.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
+}
+
+static void d68000_rol_s_16(void)
+{
+ sprintf(g_dasm_str, "rol.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
+}
+
+static void d68000_rol_s_32(void)
+{
+ sprintf(g_dasm_str, "rol.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
+}
+
+static void d68000_rol_r_8(void)
+{
+ sprintf(g_dasm_str, "rol.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_rol_r_16(void)
+{
+ sprintf(g_dasm_str, "rol.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_rol_r_32(void)
+{
+ sprintf(g_dasm_str, "rol.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_rol_ea(void)
+{
+ sprintf(g_dasm_str, "rol.w %s", get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_roxr_s_8(void)
+{
+ sprintf(g_dasm_str, "roxr.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
+}
+
+static void d68000_roxr_s_16(void)
+{
+ sprintf(g_dasm_str, "roxr.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
+}
+
+
+static void d68000_roxr_s_32(void)
+{
+ sprintf(g_dasm_str, "roxr.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
+}
+
+static void d68000_roxr_r_8(void)
+{
+ sprintf(g_dasm_str, "roxr.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_roxr_r_16(void)
+{
+ sprintf(g_dasm_str, "roxr.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_roxr_r_32(void)
+{
+ sprintf(g_dasm_str, "roxr.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_roxr_ea(void)
+{
+ sprintf(g_dasm_str, "roxr.w %s", get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_roxl_s_8(void)
+{
+ sprintf(g_dasm_str, "roxl.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
+}
+
+static void d68000_roxl_s_16(void)
+{
+ sprintf(g_dasm_str, "roxl.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
+}
+
+static void d68000_roxl_s_32(void)
+{
+ sprintf(g_dasm_str, "roxl.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
+}
+
+static void d68000_roxl_r_8(void)
+{
+ sprintf(g_dasm_str, "roxl.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_roxl_r_16(void)
+{
+ sprintf(g_dasm_str, "roxl.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_roxl_r_32(void)
+{
+ sprintf(g_dasm_str, "roxl.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
+}
+
+static void d68000_roxl_ea(void)
+{
+ sprintf(g_dasm_str, "roxl.w %s", get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68010_rtd(void)
+{
+ LIMIT_CPU_TYPES(M68010_PLUS);
+ sprintf(g_dasm_str, "rtd %s; (1+)", get_imm_str_s16());
+ SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);
+}
+
+static void d68000_rte(void)
+{
+ sprintf(g_dasm_str, "rte");
+ SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);
+}
+
+static void d68020_rtm(void)
+{
+ LIMIT_CPU_TYPES(M68020_ONLY);
+ sprintf(g_dasm_str, "rtm %c%d; (2+)", BIT_3(g_cpu_ir) ? 'A' : 'D', g_cpu_ir&7);
+ SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);
+}
+
+static void d68000_rtr(void)
+{
+ sprintf(g_dasm_str, "rtr");
+ SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);
+}
+
+static void d68000_rts(void)
+{
+ sprintf(g_dasm_str, "rts");
+ SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);
+}
+
+static void d68000_sbcd_rr(void)
+{
+ sprintf(g_dasm_str, "sbcd D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
+}
+
+static void d68000_sbcd_mm(void)
+{
+ sprintf(g_dasm_str, "sbcd -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
+}
+
+static void d68000_scc(void)
+{
+ sprintf(g_dasm_str, "s%-2s %s", g_cc[(g_cpu_ir>>8)&0xf], get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_stop(void)
+{
+ sprintf(g_dasm_str, "stop %s", get_imm_str_s16());
+}
+
+static void d68000_sub_er_8(void)
+{
+ sprintf(g_dasm_str, "sub.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_sub_er_16(void)
+{
+ sprintf(g_dasm_str, "sub.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_sub_er_32(void)
+{
+ sprintf(g_dasm_str, "sub.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_sub_re_8(void)
+{
+ sprintf(g_dasm_str, "sub.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_sub_re_16(void)
+{
+ sprintf(g_dasm_str, "sub.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_sub_re_32(void)
+{
+ sprintf(g_dasm_str, "sub.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_suba_16(void)
+{
+ sprintf(g_dasm_str, "suba.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_suba_32(void)
+{
+ sprintf(g_dasm_str, "suba.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
+}
+
+static void d68000_subi_8(void)
+{
+ char* str = get_imm_str_s8();
+ sprintf(g_dasm_str, "subi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_subi_16(void)
+{
+ char* str = get_imm_str_s16();
+ sprintf(g_dasm_str, "subi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_subi_32(void)
+{
+ char* str = get_imm_str_s32();
+ sprintf(g_dasm_str, "subi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_subq_8(void)
+{
+ sprintf(g_dasm_str, "subq.b #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_subq_16(void)
+{
+ sprintf(g_dasm_str, "subq.w #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_subq_32(void)
+{
+ sprintf(g_dasm_str, "subq.l #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_subx_rr_8(void)
+{
+ sprintf(g_dasm_str, "subx.b D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
+}
+
+static void d68000_subx_rr_16(void)
+{
+ sprintf(g_dasm_str, "subx.w D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
+}
+
+static void d68000_subx_rr_32(void)
+{
+ sprintf(g_dasm_str, "subx.l D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
+}
+
+static void d68000_subx_mm_8(void)
+{
+ sprintf(g_dasm_str, "subx.b -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
+}
+
+static void d68000_subx_mm_16(void)
+{
+ sprintf(g_dasm_str, "subx.w -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
+}
+
+static void d68000_subx_mm_32(void)
+{
+ sprintf(g_dasm_str, "subx.l -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
+}
+
+static void d68000_swap(void)
+{
+ sprintf(g_dasm_str, "swap D%d", g_cpu_ir&7);
+}
+
+static void d68000_tas(void)
+{
+ sprintf(g_dasm_str, "tas %s", get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_trap(void)
+{
+ sprintf(g_dasm_str, "trap #$%x", g_cpu_ir&0xf);
+}
+
+static void d68020_trapcc_0(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "trap%-2s; (2+)", g_cc[(g_cpu_ir>>8)&0xf]);
+ SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
+}
+
+static void d68020_trapcc_16(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "trap%-2s %s; (2+)", g_cc[(g_cpu_ir>>8)&0xf], get_imm_str_u16());
+ SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
+}
+
+static void d68020_trapcc_32(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "trap%-2s %s; (2+)", g_cc[(g_cpu_ir>>8)&0xf], get_imm_str_u32());
+ SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
+}
+
+static void d68000_trapv(void)
+{
+ sprintf(g_dasm_str, "trapv");
+ SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
+}
+
+static void d68000_tst_8(void)
+{
+ sprintf(g_dasm_str, "tst.b %s", get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68020_tst_pcdi_8(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "tst.b %s; (2+)", get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68020_tst_pcix_8(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "tst.b %s; (2+)", get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68020_tst_i_8(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "tst.b %s; (2+)", get_ea_mode_str_8(g_cpu_ir));
+}
+
+static void d68000_tst_16(void)
+{
+ sprintf(g_dasm_str, "tst.w %s", get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68020_tst_a_16(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68020_tst_pcdi_16(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68020_tst_pcix_16(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68020_tst_i_16(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));
+}
+
+static void d68000_tst_32(void)
+{
+ sprintf(g_dasm_str, "tst.l %s", get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68020_tst_a_32(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68020_tst_pcdi_32(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68020_tst_pcix_32(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68020_tst_i_32(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));
+}
+
+static void d68000_unlk(void)
+{
+ sprintf(g_dasm_str, "unlk A%d", g_cpu_ir&7);
+}
+
+static void d68020_unpk_rr(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "unpk D%d, D%d, %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());
+}
+
+static void d68020_unpk_mm(void)
+{
+ LIMIT_CPU_TYPES(M68020_PLUS);
+ sprintf(g_dasm_str, "unpk -(A%d), -(A%d), %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());
+}
+
+
+
+/* ======================================================================== */
+/* ======================= INSTRUCTION TABLE BUILDER ====================== */
+/* ======================================================================== */
+
+/* EA Masks:
+800 = data register direct
+400 = address register direct
+200 = address register indirect
+100 = ARI postincrement
+ 80 = ARI pre-decrement
+ 40 = ARI displacement
+ 20 = ARI index
+ 10 = absolute short
+ 8 = absolute long
+ 4 = immediate / sr
+ 2 = pc displacement
+ 1 = pc idx
+*/
+
+static opcode_struct g_opcode_info[] =
+{
+/* opcode handler mask match ea mask */
+ {d68000_1010 , 0xf000, 0xa000, 0x000},
+ {d68000_1111 , 0xf000, 0xf000, 0x000},
+ {d68000_abcd_rr , 0xf1f8, 0xc100, 0x000},
+ {d68000_abcd_mm , 0xf1f8, 0xc108, 0x000},
+ {d68000_add_er_8 , 0xf1c0, 0xd000, 0xbff},
+ {d68000_add_er_16 , 0xf1c0, 0xd040, 0xfff},
+ {d68000_add_er_32 , 0xf1c0, 0xd080, 0xfff},
+ {d68000_add_re_8 , 0xf1c0, 0xd100, 0x3f8},
+ {d68000_add_re_16 , 0xf1c0, 0xd140, 0x3f8},
+ {d68000_add_re_32 , 0xf1c0, 0xd180, 0x3f8},
+ {d68000_adda_16 , 0xf1c0, 0xd0c0, 0xfff},
+ {d68000_adda_32 , 0xf1c0, 0xd1c0, 0xfff},
+ {d68000_addi_8 , 0xffc0, 0x0600, 0xbf8},
+ {d68000_addi_16 , 0xffc0, 0x0640, 0xbf8},
+ {d68000_addi_32 , 0xffc0, 0x0680, 0xbf8},
+ {d68000_addq_8 , 0xf1c0, 0x5000, 0xbf8},
+ {d68000_addq_16 , 0xf1c0, 0x5040, 0xff8},
+ {d68000_addq_32 , 0xf1c0, 0x5080, 0xff8},
+ {d68000_addx_rr_8 , 0xf1f8, 0xd100, 0x000},
+ {d68000_addx_rr_16 , 0xf1f8, 0xd140, 0x000},
+ {d68000_addx_rr_32 , 0xf1f8, 0xd180, 0x000},
+ {d68000_addx_mm_8 , 0xf1f8, 0xd108, 0x000},
+ {d68000_addx_mm_16 , 0xf1f8, 0xd148, 0x000},
+ {d68000_addx_mm_32 , 0xf1f8, 0xd188, 0x000},
+ {d68000_and_er_8 , 0xf1c0, 0xc000, 0xbff},
+ {d68000_and_er_16 , 0xf1c0, 0xc040, 0xbff},
+ {d68000_and_er_32 , 0xf1c0, 0xc080, 0xbff},
+ {d68000_and_re_8 , 0xf1c0, 0xc100, 0x3f8},
+ {d68000_and_re_16 , 0xf1c0, 0xc140, 0x3f8},
+ {d68000_and_re_32 , 0xf1c0, 0xc180, 0x3f8},
+ {d68000_andi_to_ccr , 0xffff, 0x023c, 0x000},
+ {d68000_andi_to_sr , 0xffff, 0x027c, 0x000},
+ {d68000_andi_8 , 0xffc0, 0x0200, 0xbf8},
+ {d68000_andi_16 , 0xffc0, 0x0240, 0xbf8},
+ {d68000_andi_32 , 0xffc0, 0x0280, 0xbf8},
+ {d68000_asr_s_8 , 0xf1f8, 0xe000, 0x000},
+ {d68000_asr_s_16 , 0xf1f8, 0xe040, 0x000},
+ {d68000_asr_s_32 , 0xf1f8, 0xe080, 0x000},
+ {d68000_asr_r_8 , 0xf1f8, 0xe020, 0x000},
+ {d68000_asr_r_16 , 0xf1f8, 0xe060, 0x000},
+ {d68000_asr_r_32 , 0xf1f8, 0xe0a0, 0x000},
+ {d68000_asr_ea , 0xffc0, 0xe0c0, 0x3f8},
+ {d68000_asl_s_8 , 0xf1f8, 0xe100, 0x000},
+ {d68000_asl_s_16 , 0xf1f8, 0xe140, 0x000},
+ {d68000_asl_s_32 , 0xf1f8, 0xe180, 0x000},
+ {d68000_asl_r_8 , 0xf1f8, 0xe120, 0x000},
+ {d68000_asl_r_16 , 0xf1f8, 0xe160, 0x000},
+ {d68000_asl_r_32 , 0xf1f8, 0xe1a0, 0x000},
+ {d68000_asl_ea , 0xffc0, 0xe1c0, 0x3f8},
+ {d68000_bcc_8 , 0xf000, 0x6000, 0x000},
+ {d68000_bcc_16 , 0xf0ff, 0x6000, 0x000},
+ {d68020_bcc_32 , 0xf0ff, 0x60ff, 0x000},
+ {d68000_bchg_r , 0xf1c0, 0x0140, 0xbf8},
+ {d68000_bchg_s , 0xffc0, 0x0840, 0xbf8},
+ {d68000_bclr_r , 0xf1c0, 0x0180, 0xbf8},
+ {d68000_bclr_s , 0xffc0, 0x0880, 0xbf8},
+ {d68020_bfchg , 0xffc0, 0xeac0, 0xa78},
+ {d68020_bfclr , 0xffc0, 0xecc0, 0xa78},
+ {d68020_bfexts , 0xffc0, 0xebc0, 0xa7b},
+ {d68020_bfextu , 0xffc0, 0xe9c0, 0xa7b},
+ {d68020_bfffo , 0xffc0, 0xedc0, 0xa7b},
+ {d68020_bfins , 0xffc0, 0xefc0, 0xa78},
+ {d68020_bfset , 0xffc0, 0xeec0, 0xa78},
+ {d68020_bftst , 0xffc0, 0xe8c0, 0xa7b},
+ {d68010_bkpt , 0xfff8, 0x4848, 0x000},
+ {d68000_bra_8 , 0xff00, 0x6000, 0x000},
+ {d68000_bra_16 , 0xffff, 0x6000, 0x000},
+ {d68020_bra_32 , 0xffff, 0x60ff, 0x000},
+ {d68000_bset_r , 0xf1c0, 0x01c0, 0xbf8},
+ {d68000_bset_s , 0xffc0, 0x08c0, 0xbf8},
+ {d68000_bsr_8 , 0xff00, 0x6100, 0x000},
+ {d68000_bsr_16 , 0xffff, 0x6100, 0x000},
+ {d68020_bsr_32 , 0xffff, 0x61ff, 0x000},
+ {d68000_btst_r , 0xf1c0, 0x0100, 0xbff},
+ {d68000_btst_s , 0xffc0, 0x0800, 0xbfb},
+ {d68020_callm , 0xffc0, 0x06c0, 0x27b},
+ {d68020_cas_8 , 0xffc0, 0x0ac0, 0x3f8},
+ {d68020_cas_16 , 0xffc0, 0x0cc0, 0x3f8},
+ {d68020_cas_32 , 0xffc0, 0x0ec0, 0x3f8},
+ {d68020_cas2_16 , 0xffff, 0x0cfc, 0x000},
+ {d68020_cas2_32 , 0xffff, 0x0efc, 0x000},
+ {d68000_chk_16 , 0xf1c0, 0x4180, 0xbff},
+ {d68020_chk_32 , 0xf1c0, 0x4100, 0xbff},
+ {d68020_chk2_cmp2_8 , 0xffc0, 0x00c0, 0x27b},
+ {d68020_chk2_cmp2_16 , 0xffc0, 0x02c0, 0x27b},
+ {d68020_chk2_cmp2_32 , 0xffc0, 0x04c0, 0x27b},
+ {d68040_cinv , 0xff20, 0xf400, 0x000},
+ {d68000_clr_8 , 0xffc0, 0x4200, 0xbf8},
+ {d68000_clr_16 , 0xffc0, 0x4240, 0xbf8},
+ {d68000_clr_32 , 0xffc0, 0x4280, 0xbf8},
+ {d68000_cmp_8 , 0xf1c0, 0xb000, 0xbff},
+ {d68000_cmp_16 , 0xf1c0, 0xb040, 0xfff},
+ {d68000_cmp_32 , 0xf1c0, 0xb080, 0xfff},
+ {d68000_cmpa_16 , 0xf1c0, 0xb0c0, 0xfff},
+ {d68000_cmpa_32 , 0xf1c0, 0xb1c0, 0xfff},
+ {d68000_cmpi_8 , 0xffc0, 0x0c00, 0xbf8},
+ {d68020_cmpi_pcdi_8 , 0xffff, 0x0c3a, 0x000},
+ {d68020_cmpi_pcix_8 , 0xffff, 0x0c3b, 0x000},
+ {d68000_cmpi_16 , 0xffc0, 0x0c40, 0xbf8},
+ {d68020_cmpi_pcdi_16 , 0xffff, 0x0c7a, 0x000},
+ {d68020_cmpi_pcix_16 , 0xffff, 0x0c7b, 0x000},
+ {d68000_cmpi_32 , 0xffc0, 0x0c80, 0xbf8},
+ {d68020_cmpi_pcdi_32 , 0xffff, 0x0cba, 0x000},
+ {d68020_cmpi_pcix_32 , 0xffff, 0x0cbb, 0x000},
+ {d68000_cmpm_8 , 0xf1f8, 0xb108, 0x000},
+ {d68000_cmpm_16 , 0xf1f8, 0xb148, 0x000},
+ {d68000_cmpm_32 , 0xf1f8, 0xb188, 0x000},
+ {d68020_cpbcc_16 , 0xf1c0, 0xf080, 0x000},
+ {d68020_cpbcc_32 , 0xf1c0, 0xf0c0, 0x000},
+ {d68020_cpdbcc , 0xf1f8, 0xf048, 0x000},
+ {d68020_cpgen , 0xf1c0, 0xf000, 0x000},
+ {d68020_cprestore , 0xf1c0, 0xf140, 0x37f},
+ {d68020_cpsave , 0xf1c0, 0xf100, 0x2f8},
+ {d68020_cpscc , 0xf1c0, 0xf040, 0xbf8},
+ {d68020_cptrapcc_0 , 0xf1ff, 0xf07c, 0x000},
+ {d68020_cptrapcc_16 , 0xf1ff, 0xf07a, 0x000},
+ {d68020_cptrapcc_32 , 0xf1ff, 0xf07b, 0x000},
+ {d68040_cpush , 0xff20, 0xf420, 0x000},
+ {d68000_dbcc , 0xf0f8, 0x50c8, 0x000},
+ {d68000_dbra , 0xfff8, 0x51c8, 0x000},
+ {d68000_divs , 0xf1c0, 0x81c0, 0xbff},
+ {d68000_divu , 0xf1c0, 0x80c0, 0xbff},
+ {d68020_divl , 0xffc0, 0x4c40, 0xbff},
+ {d68000_eor_8 , 0xf1c0, 0xb100, 0xbf8},
+ {d68000_eor_16 , 0xf1c0, 0xb140, 0xbf8},
+ {d68000_eor_32 , 0xf1c0, 0xb180, 0xbf8},
+ {d68000_eori_to_ccr , 0xffff, 0x0a3c, 0x000},
+ {d68000_eori_to_sr , 0xffff, 0x0a7c, 0x000},
+ {d68000_eori_8 , 0xffc0, 0x0a00, 0xbf8},
+ {d68000_eori_16 , 0xffc0, 0x0a40, 0xbf8},
+ {d68000_eori_32 , 0xffc0, 0x0a80, 0xbf8},
+ {d68000_exg_dd , 0xf1f8, 0xc140, 0x000},
+ {d68000_exg_aa , 0xf1f8, 0xc148, 0x000},
+ {d68000_exg_da , 0xf1f8, 0xc188, 0x000},
+ {d68020_extb_32 , 0xfff8, 0x49c0, 0x000},
+ {d68000_ext_16 , 0xfff8, 0x4880, 0x000},
+ {d68000_ext_32 , 0xfff8, 0x48c0, 0x000},
+ {d68000_illegal , 0xffff, 0x4afc, 0x000},
+ {d68000_jmp , 0xffc0, 0x4ec0, 0x27b},
+ {d68000_jsr , 0xffc0, 0x4e80, 0x27b},
+ {d68000_lea , 0xf1c0, 0x41c0, 0x27b},
+ {d68000_link_16 , 0xfff8, 0x4e50, 0x000},
+ {d68020_link_32 , 0xfff8, 0x4808, 0x000},
+ {d68000_lsr_s_8 , 0xf1f8, 0xe008, 0x000},
+ {d68000_lsr_s_16 , 0xf1f8, 0xe048, 0x000},
+ {d68000_lsr_s_32 , 0xf1f8, 0xe088, 0x000},
+ {d68000_lsr_r_8 , 0xf1f8, 0xe028, 0x000},
+ {d68000_lsr_r_16 , 0xf1f8, 0xe068, 0x000},
+ {d68000_lsr_r_32 , 0xf1f8, 0xe0a8, 0x000},
+ {d68000_lsr_ea , 0xffc0, 0xe2c0, 0x3f8},
+ {d68000_lsl_s_8 , 0xf1f8, 0xe108, 0x000},
+ {d68000_lsl_s_16 , 0xf1f8, 0xe148, 0x000},
+ {d68000_lsl_s_32 , 0xf1f8, 0xe188, 0x000},
+ {d68000_lsl_r_8 , 0xf1f8, 0xe128, 0x000},
+ {d68000_lsl_r_16 , 0xf1f8, 0xe168, 0x000},
+ {d68000_lsl_r_32 , 0xf1f8, 0xe1a8, 0x000},
+ {d68000_lsl_ea , 0xffc0, 0xe3c0, 0x3f8},
+ {d68000_move_8 , 0xf000, 0x1000, 0xbff},
+ {d68000_move_16 , 0xf000, 0x3000, 0xfff},
+ {d68000_move_32 , 0xf000, 0x2000, 0xfff},
+ {d68000_movea_16 , 0xf1c0, 0x3040, 0xfff},
+ {d68000_movea_32 , 0xf1c0, 0x2040, 0xfff},
+ {d68000_move_to_ccr , 0xffc0, 0x44c0, 0xbff},
+ {d68010_move_fr_ccr , 0xffc0, 0x42c0, 0xbf8},
+ {d68000_move_to_sr , 0xffc0, 0x46c0, 0xbff},
+ {d68000_move_fr_sr , 0xffc0, 0x40c0, 0xbf8},
+ {d68000_move_to_usp , 0xfff8, 0x4e60, 0x000},
+ {d68000_move_fr_usp , 0xfff8, 0x4e68, 0x000},
+ {d68010_movec , 0xfffe, 0x4e7a, 0x000},
+ {d68000_movem_pd_16 , 0xfff8, 0x48a0, 0x000},
+ {d68000_movem_pd_32 , 0xfff8, 0x48e0, 0x000},
+ {d68000_movem_re_16 , 0xffc0, 0x4880, 0x2f8},
+ {d68000_movem_re_32 , 0xffc0, 0x48c0, 0x2f8},
+ {d68000_movem_er_16 , 0xffc0, 0x4c80, 0x37b},
+ {d68000_movem_er_32 , 0xffc0, 0x4cc0, 0x37b},
+ {d68000_movep_er_16 , 0xf1f8, 0x0108, 0x000},
+ {d68000_movep_er_32 , 0xf1f8, 0x0148, 0x000},
+ {d68000_movep_re_16 , 0xf1f8, 0x0188, 0x000},
+ {d68000_movep_re_32 , 0xf1f8, 0x01c8, 0x000},
+ {d68010_moves_8 , 0xffc0, 0x0e00, 0x3f8},
+ {d68010_moves_16 , 0xffc0, 0x0e40, 0x3f8},
+ {d68010_moves_32 , 0xffc0, 0x0e80, 0x3f8},
+ {d68000_moveq , 0xf100, 0x7000, 0x000},
+ {d68040_move16_pi_pi , 0xfff8, 0xf620, 0x000},
+ {d68040_move16_pi_al , 0xfff8, 0xf600, 0x000},
+ {d68040_move16_al_pi , 0xfff8, 0xf608, 0x000},
+ {d68040_move16_ai_al , 0xfff8, 0xf610, 0x000},
+ {d68040_move16_al_ai , 0xfff8, 0xf618, 0x000},
+ {d68000_muls , 0xf1c0, 0xc1c0, 0xbff},
+ {d68000_mulu , 0xf1c0, 0xc0c0, 0xbff},
+ {d68020_mull , 0xffc0, 0x4c00, 0xbff},
+ {d68000_nbcd , 0xffc0, 0x4800, 0xbf8},
+ {d68000_neg_8 , 0xffc0, 0x4400, 0xbf8},
+ {d68000_neg_16 , 0xffc0, 0x4440, 0xbf8},
+ {d68000_neg_32 , 0xffc0, 0x4480, 0xbf8},
+ {d68000_negx_8 , 0xffc0, 0x4000, 0xbf8},
+ {d68000_negx_16 , 0xffc0, 0x4040, 0xbf8},
+ {d68000_negx_32 , 0xffc0, 0x4080, 0xbf8},
+ {d68000_nop , 0xffff, 0x4e71, 0x000},
+ {d68000_not_8 , 0xffc0, 0x4600, 0xbf8},
+ {d68000_not_16 , 0xffc0, 0x4640, 0xbf8},
+ {d68000_not_32 , 0xffc0, 0x4680, 0xbf8},
+ {d68000_or_er_8 , 0xf1c0, 0x8000, 0xbff},
+ {d68000_or_er_16 , 0xf1c0, 0x8040, 0xbff},
+ {d68000_or_er_32 , 0xf1c0, 0x8080, 0xbff},
+ {d68000_or_re_8 , 0xf1c0, 0x8100, 0x3f8},
+ {d68000_or_re_16 , 0xf1c0, 0x8140, 0x3f8},
+ {d68000_or_re_32 , 0xf1c0, 0x8180, 0x3f8},
+ {d68000_ori_to_ccr , 0xffff, 0x003c, 0x000},
+ {d68000_ori_to_sr , 0xffff, 0x007c, 0x000},
+ {d68000_ori_8 , 0xffc0, 0x0000, 0xbf8},
+ {d68000_ori_16 , 0xffc0, 0x0040, 0xbf8},
+ {d68000_ori_32 , 0xffc0, 0x0080, 0xbf8},
+ {d68020_pack_rr , 0xf1f8, 0x8140, 0x000},
+ {d68020_pack_mm , 0xf1f8, 0x8148, 0x000},
+ {d68000_pea , 0xffc0, 0x4840, 0x27b},
+ {d68000_reset , 0xffff, 0x4e70, 0x000},
+ {d68000_ror_s_8 , 0xf1f8, 0xe018, 0x000},
+ {d68000_ror_s_16 , 0xf1f8, 0xe058, 0x000},
+ {d68000_ror_s_32 , 0xf1f8, 0xe098, 0x000},
+ {d68000_ror_r_8 , 0xf1f8, 0xe038, 0x000},
+ {d68000_ror_r_16 , 0xf1f8, 0xe078, 0x000},
+ {d68000_ror_r_32 , 0xf1f8, 0xe0b8, 0x000},
+ {d68000_ror_ea , 0xffc0, 0xe6c0, 0x3f8},
+ {d68000_rol_s_8 , 0xf1f8, 0xe118, 0x000},
+ {d68000_rol_s_16 , 0xf1f8, 0xe158, 0x000},
+ {d68000_rol_s_32 , 0xf1f8, 0xe198, 0x000},
+ {d68000_rol_r_8 , 0xf1f8, 0xe138, 0x000},
+ {d68000_rol_r_16 , 0xf1f8, 0xe178, 0x000},
+ {d68000_rol_r_32 , 0xf1f8, 0xe1b8, 0x000},
+ {d68000_rol_ea , 0xffc0, 0xe7c0, 0x3f8},
+ {d68000_roxr_s_8 , 0xf1f8, 0xe010, 0x000},
+ {d68000_roxr_s_16 , 0xf1f8, 0xe050, 0x000},
+ {d68000_roxr_s_32 , 0xf1f8, 0xe090, 0x000},
+ {d68000_roxr_r_8 , 0xf1f8, 0xe030, 0x000},
+ {d68000_roxr_r_16 , 0xf1f8, 0xe070, 0x000},
+ {d68000_roxr_r_32 , 0xf1f8, 0xe0b0, 0x000},
+ {d68000_roxr_ea , 0xffc0, 0xe4c0, 0x3f8},
+ {d68000_roxl_s_8 , 0xf1f8, 0xe110, 0x000},
+ {d68000_roxl_s_16 , 0xf1f8, 0xe150, 0x000},
+ {d68000_roxl_s_32 , 0xf1f8, 0xe190, 0x000},
+ {d68000_roxl_r_8 , 0xf1f8, 0xe130, 0x000},
+ {d68000_roxl_r_16 , 0xf1f8, 0xe170, 0x000},
+ {d68000_roxl_r_32 , 0xf1f8, 0xe1b0, 0x000},
+ {d68000_roxl_ea , 0xffc0, 0xe5c0, 0x3f8},
+ {d68010_rtd , 0xffff, 0x4e74, 0x000},
+ {d68000_rte , 0xffff, 0x4e73, 0x000},
+ {d68020_rtm , 0xfff0, 0x06c0, 0x000},
+ {d68000_rtr , 0xffff, 0x4e77, 0x000},
+ {d68000_rts , 0xffff, 0x4e75, 0x000},
+ {d68000_sbcd_rr , 0xf1f8, 0x8100, 0x000},
+ {d68000_sbcd_mm , 0xf1f8, 0x8108, 0x000},
+ {d68000_scc , 0xf0c0, 0x50c0, 0xbf8},
+ {d68000_stop , 0xffff, 0x4e72, 0x000},
+ {d68000_sub_er_8 , 0xf1c0, 0x9000, 0xbff},
+ {d68000_sub_er_16 , 0xf1c0, 0x9040, 0xfff},
+ {d68000_sub_er_32 , 0xf1c0, 0x9080, 0xfff},
+ {d68000_sub_re_8 , 0xf1c0, 0x9100, 0x3f8},
+ {d68000_sub_re_16 , 0xf1c0, 0x9140, 0x3f8},
+ {d68000_sub_re_32 , 0xf1c0, 0x9180, 0x3f8},
+ {d68000_suba_16 , 0xf1c0, 0x90c0, 0xfff},
+ {d68000_suba_32 , 0xf1c0, 0x91c0, 0xfff},
+ {d68000_subi_8 , 0xffc0, 0x0400, 0xbf8},
+ {d68000_subi_16 , 0xffc0, 0x0440, 0xbf8},
+ {d68000_subi_32 , 0xffc0, 0x0480, 0xbf8},
+ {d68000_subq_8 , 0xf1c0, 0x5100, 0xbf8},
+ {d68000_subq_16 , 0xf1c0, 0x5140, 0xff8},
+ {d68000_subq_32 , 0xf1c0, 0x5180, 0xff8},
+ {d68000_subx_rr_8 , 0xf1f8, 0x9100, 0x000},
+ {d68000_subx_rr_16 , 0xf1f8, 0x9140, 0x000},
+ {d68000_subx_rr_32 , 0xf1f8, 0x9180, 0x000},
+ {d68000_subx_mm_8 , 0xf1f8, 0x9108, 0x000},
+ {d68000_subx_mm_16 , 0xf1f8, 0x9148, 0x000},
+ {d68000_subx_mm_32 , 0xf1f8, 0x9188, 0x000},
+ {d68000_swap , 0xfff8, 0x4840, 0x000},
+ {d68000_tas , 0xffc0, 0x4ac0, 0xbf8},
+ {d68000_trap , 0xfff0, 0x4e40, 0x000},
+ {d68020_trapcc_0 , 0xf0ff, 0x50fc, 0x000},
+ {d68020_trapcc_16 , 0xf0ff, 0x50fa, 0x000},
+ {d68020_trapcc_32 , 0xf0ff, 0x50fb, 0x000},
+ {d68000_trapv , 0xffff, 0x4e76, 0x000},
+ {d68000_tst_8 , 0xffc0, 0x4a00, 0xbf8},
+ {d68020_tst_pcdi_8 , 0xffff, 0x4a3a, 0x000},
+ {d68020_tst_pcix_8 , 0xffff, 0x4a3b, 0x000},
+ {d68020_tst_i_8 , 0xffff, 0x4a3c, 0x000},
+ {d68000_tst_16 , 0xffc0, 0x4a40, 0xbf8},
+ {d68020_tst_a_16 , 0xfff8, 0x4a48, 0x000},
+ {d68020_tst_pcdi_16 , 0xffff, 0x4a7a, 0x000},
+ {d68020_tst_pcix_16 , 0xffff, 0x4a7b, 0x000},
+ {d68020_tst_i_16 , 0xffff, 0x4a7c, 0x000},
+ {d68000_tst_32 , 0xffc0, 0x4a80, 0xbf8},
+ {d68020_tst_a_32 , 0xfff8, 0x4a88, 0x000},
+ {d68020_tst_pcdi_32 , 0xffff, 0x4aba, 0x000},
+ {d68020_tst_pcix_32 , 0xffff, 0x4abb, 0x000},
+ {d68020_tst_i_32 , 0xffff, 0x4abc, 0x000},
+ {d68000_unlk , 0xfff8, 0x4e58, 0x000},
+ {d68020_unpk_rr , 0xf1f8, 0x8180, 0x000},
+ {d68020_unpk_mm , 0xf1f8, 0x8188, 0x000},
+ {0, 0, 0, 0}
+};
+
+/* Check if opcode is using a valid ea mode */
+static int valid_ea(uint opcode, uint mask)
+{
+ if(mask == 0)
+ return 1;
+
+ switch(opcode & 0x3f)
+ {
+ case 0x00: case 0x01: case 0x02: case 0x03:
+ case 0x04: case 0x05: case 0x06: case 0x07:
+ return (mask & 0x800) != 0;
+ case 0x08: case 0x09: case 0x0a: case 0x0b:
+ case 0x0c: case 0x0d: case 0x0e: case 0x0f:
+ return (mask & 0x400) != 0;
+ case 0x10: case 0x11: case 0x12: case 0x13:
+ case 0x14: case 0x15: case 0x16: case 0x17:
+ return (mask & 0x200) != 0;
+ case 0x18: case 0x19: case 0x1a: case 0x1b:
+ case 0x1c: case 0x1d: case 0x1e: case 0x1f:
+ return (mask & 0x100) != 0;
+ case 0x20: case 0x21: case 0x22: case 0x23:
+ case 0x24: case 0x25: case 0x26: case 0x27:
+ return (mask & 0x080) != 0;
+ case 0x28: case 0x29: case 0x2a: case 0x2b:
+ case 0x2c: case 0x2d: case 0x2e: case 0x2f:
+ return (mask & 0x040) != 0;
+ case 0x30: case 0x31: case 0x32: case 0x33:
+ case 0x34: case 0x35: case 0x36: case 0x37:
+ return (mask & 0x020) != 0;
+ case 0x38:
+ return (mask & 0x010) != 0;
+ case 0x39:
+ return (mask & 0x008) != 0;
+ case 0x3a:
+ return (mask & 0x002) != 0;
+ case 0x3b:
+ return (mask & 0x001) != 0;
+ case 0x3c:
+ return (mask & 0x004) != 0;
+ }
+ return 0;
+
+}
+
+/* Used by qsort */
+static int DECL_SPEC compare_nof_true_bits(const void *aptr, const void *bptr)
+{
+ uint a = ((const opcode_struct*)aptr)->mask;
+ uint b = ((const opcode_struct*)bptr)->mask;
+
+ a = ((a & 0xAAAA) >> 1) + (a & 0x5555);
+ a = ((a & 0xCCCC) >> 2) + (a & 0x3333);
+ a = ((a & 0xF0F0) >> 4) + (a & 0x0F0F);
+ a = ((a & 0xFF00) >> 8) + (a & 0x00FF);
+
+ b = ((b & 0xAAAA) >> 1) + (b & 0x5555);
+ b = ((b & 0xCCCC) >> 2) + (b & 0x3333);
+ b = ((b & 0xF0F0) >> 4) + (b & 0x0F0F);
+ b = ((b & 0xFF00) >> 8) + (b & 0x00FF);
+
+ return b - a; /* reversed to get greatest to least sorting */
+}
+
+/* build the opcode handler jump table */
+static void build_opcode_table(void)
+{
+ uint i;
+ uint opcode;
+ opcode_struct* ostruct;
+ uint opcode_info_length = 0;
+
+ for(ostruct = g_opcode_info;ostruct->opcode_handler != 0;ostruct++)
+ opcode_info_length++;
+
+ qsort((void *)g_opcode_info, opcode_info_length, sizeof(g_opcode_info[0]), compare_nof_true_bits);
+
+ for(i=0;i<0x10000;i++)
+ {
+ g_instruction_table[i] = d68000_illegal; /* default to illegal */
+ opcode = i;
+ /* search through opcode info for a match */
+ for(ostruct = g_opcode_info;ostruct->opcode_handler != 0;ostruct++)
+ {
+ /* match opcode mask and allowed ea modes */
+ if((opcode & ostruct->mask) == ostruct->match)
+ {
+ /* Handle destination ea for move instructions */
+ if((ostruct->opcode_handler == d68000_move_8 ||
+ ostruct->opcode_handler == d68000_move_16 ||
+ ostruct->opcode_handler == d68000_move_32) &&
+ !valid_ea(((opcode>>9)&7) | ((opcode>>3)&0x38), 0xbf8))
+ continue;
+ if(valid_ea(opcode, ostruct->ea_mask))
+ {
+ g_instruction_table[i] = ostruct->opcode_handler;
+ break;
+ }
+ }
+ }
+ }
+}
+
+
+
+/* ======================================================================== */
+/* ================================= API ================================== */
+/* ======================================================================== */
+
+/* Disasemble one instruction at pc and store in str_buff */
+unsigned int m68k_disassemble(char* str_buff, unsigned int pc, unsigned int cpu_type)
+{
+ if(!g_initialized)
+ {
+ build_opcode_table();
+ g_initialized = 1;
+ }
+ switch(cpu_type)
+ {
+ case M68K_CPU_TYPE_68000:
+ g_cpu_type = TYPE_68000;
+ g_address_mask = 0x00ffffff;
+ break;
+ case M68K_CPU_TYPE_68008:
+ g_cpu_type = TYPE_68008;
+ g_address_mask = 0x003fffff;
+ break;
+ case M68K_CPU_TYPE_68010:
+ g_cpu_type = TYPE_68010;
+ g_address_mask = 0x00ffffff;
+ break;
+ case M68K_CPU_TYPE_68EC020:
+ g_cpu_type = TYPE_68020;
+ g_address_mask = 0x00ffffff;
+ break;
+ case M68K_CPU_TYPE_68020:
+ g_cpu_type = TYPE_68020;
+ g_address_mask = 0xffffffff;
+ break;
+ case M68K_CPU_TYPE_68030:
+ g_cpu_type = TYPE_68030;
+ g_address_mask = 0xffffffff;
+ break;
+ case M68K_CPU_TYPE_68040:
+ g_cpu_type = TYPE_68040;
+ g_address_mask = 0xffffffff;
+ break;
+ default:
+ return 0;
+ }
+
+ g_cpu_pc = pc;
+ g_helper_str[0] = 0;
+ g_cpu_ir = read_imm_16();
+ g_opcode_type = 0;
+ g_instruction_table[g_cpu_ir]();
+ sprintf(str_buff, "%s%s", g_dasm_str, g_helper_str);
+ return COMBINE_OPCODE_FLAGS(g_cpu_pc - pc);
+}
+
+char* m68ki_disassemble_quick(unsigned int pc, unsigned int cpu_type)
+{
+ static char buff[100];
+ buff[0] = 0;
+ m68k_disassemble(buff, pc, cpu_type);
+ return buff;
+}
+
+/* Check if the instruction is a valid one */
+unsigned int m68k_is_valid_instruction(unsigned int instruction, unsigned int cpu_type)
+{
+ if(!g_initialized)
+ {
+ build_opcode_table();
+ g_initialized = 1;
+ }
+
+ instruction &= 0xffff;
+ if(g_instruction_table[instruction] == d68000_illegal)
+ return 0;
+
+ switch(cpu_type)
+ {
+ case M68K_CPU_TYPE_68000:
+ case M68K_CPU_TYPE_68008:
+ if(g_instruction_table[instruction] == d68010_bkpt)
+ return 0;
+ if(g_instruction_table[instruction] == d68010_move_fr_ccr)
+ return 0;
+ if(g_instruction_table[instruction] == d68010_movec)
+ return 0;
+ if(g_instruction_table[instruction] == d68010_moves_8)
+ return 0;
+ if(g_instruction_table[instruction] == d68010_moves_16)
+ return 0;
+ if(g_instruction_table[instruction] == d68010_moves_32)
+ return 0;
+ if(g_instruction_table[instruction] == d68010_rtd)
+ return 0;
+ case M68K_CPU_TYPE_68010:
+ if(g_instruction_table[instruction] == d68020_bcc_32)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_bfchg)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_bfclr)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_bfexts)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_bfextu)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_bfffo)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_bfins)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_bfset)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_bftst)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_bra_32)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_bsr_32)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_callm)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_cas_8)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_cas_16)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_cas_32)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_cas2_16)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_cas2_32)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_chk_32)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_chk2_cmp2_8)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_chk2_cmp2_16)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_chk2_cmp2_32)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_cmpi_pcdi_8)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_cmpi_pcix_8)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_cmpi_pcdi_16)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_cmpi_pcix_16)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_cmpi_pcdi_32)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_cmpi_pcix_32)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_cpbcc_16)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_cpbcc_32)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_cpdbcc)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_cpgen)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_cprestore)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_cpsave)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_cpscc)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_cptrapcc_0)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_cptrapcc_16)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_cptrapcc_32)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_divl)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_extb_32)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_link_32)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_mull)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_pack_rr)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_pack_mm)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_rtm)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_trapcc_0)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_trapcc_16)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_trapcc_32)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_tst_pcdi_8)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_tst_pcix_8)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_tst_i_8)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_tst_a_16)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_tst_pcdi_16)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_tst_pcix_16)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_tst_i_16)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_tst_a_32)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_tst_pcdi_32)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_tst_pcix_32)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_tst_i_32)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_unpk_rr)
+ return 0;
+ if(g_instruction_table[instruction] == d68020_unpk_mm)
+ return 0;
+ case M68K_CPU_TYPE_68EC020:
+ case M68K_CPU_TYPE_68020:
+ case M68K_CPU_TYPE_68030:
+ if(g_instruction_table[instruction] == d68040_cinv)
+ return 0;
+ if(g_instruction_table[instruction] == d68040_cpush)
+ return 0;
+ if(g_instruction_table[instruction] == d68040_move16_pi_pi)
+ return 0;
+ if(g_instruction_table[instruction] == d68040_move16_pi_al)
+ return 0;
+ if(g_instruction_table[instruction] == d68040_move16_al_pi)
+ return 0;
+ if(g_instruction_table[instruction] == d68040_move16_ai_al)
+ return 0;
+ if(g_instruction_table[instruction] == d68040_move16_al_ai)
+ return 0;
+ }
+ if(cpu_type != M68K_CPU_TYPE_68020 && cpu_type != M68K_CPU_TYPE_68EC020 &&
+ (g_instruction_table[instruction] == d68020_callm ||
+ g_instruction_table[instruction] == d68020_rtm))
+ return 0;
+
+ return 1;
+}
+
+
+
+/* ======================================================================== */
+/* ============================== END OF FILE ============================= */
+/* ======================================================================== */
diff --git a/Src/CPU/68K/Musashi/m68kmake.c b/Src/CPU/68K/Musashi/m68kmake.c
new file mode 100644
index 0000000..f953c70
--- /dev/null
+++ b/Src/CPU/68K/Musashi/m68kmake.c
@@ -0,0 +1,1512 @@
+/**
+ ** Supermodel
+ ** A Sega Model 3 Arcade Emulator.
+ ** Copyright 2011 Bart Trzynadlowski, Nik Henson
+ **
+ ** This file is part of Supermodel.
+ **
+ ** Supermodel is free software: you can redistribute it and/or modify it under
+ ** the terms of the GNU General Public License as published by the Free
+ ** Software Foundation, either version 3 of the License, or (at your option)
+ ** any later version.
+ **
+ ** Supermodel is distributed in the hope that it will be useful, but WITHOUT
+ ** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ ** FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ ** more details.
+ **
+ ** You should have received a copy of the GNU General Public License along
+ ** with Supermodel. If not, see .
+ **/
+
+/*
+ * m68kmake.c
+ *
+ * Program to generate the Musashi 68K core.
+ *
+ * Permission was obtained from Karl Stenerud to apply the GPL license to this
+ * code.
+ */
+
+/* ======================================================================== */
+/* ========================= LICENSING & COPYRIGHT ======================== */
+/* ======================================================================== */
+/*
+ * MUSASHI
+ * Version 3.3
+ *
+ * A portable Motorola M680x0 processor emulation engine.
+ * Copyright 1998-2001 Karl Stenerud. All rights reserved.
+ *
+ * This code may be freely used for non-commercial purposes as long as this
+ * copyright notice remains unaltered in the source code and any binary files
+ * containing this code in compiled form.
+ *
+ * All other lisencing terms must be negotiated with the author
+ * (Karl Stenerud).
+ *
+ * The latest version of this code can be obtained at:
+ * http://kstenerud.cjb.net
+ */
+
+/*
+ * Modified For OpenVMS By: Robert Alan Byer
+ * byer@mail.ourservers.net
+ */
+
+
+/* ======================================================================== */
+/* ============================ CODE GENERATOR ============================ */
+/* ======================================================================== */
+/*
+ * This is the code generator program which will generate the opcode table
+ * and the final opcode handlers.
+ *
+ * It requires an input file to function (default m68k_in.c), but you can
+ * specify your own like so:
+ *
+ * m68kmake