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Open Bus: Fixes to open bus implementation - fixes allpads-r2a test result
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20d9b6bbd5
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@ -177,7 +177,7 @@ uint8_t ControlManager::GetPortValue(uint8_t port)
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//"In the NES and Famicom, the top three (or five) bits are not driven, and so retain the bits of the previous byte on the bus.
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//Usually this is the most significant byte of the address of the controller port - 0x40.
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//Paperboy relies on this behavior and requires that reads from the controller ports return exactly $40 or $41 as appropriate."
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uint8_t value = 0x40;
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uint8_t value = MemoryManager::GetOpenBus(0xE0);
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if(device) {
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value |= device->GetPortOutput();
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}
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@ -307,8 +307,7 @@ uint8_t FDS::ReadRegister(uint16_t addr)
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}
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}
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//Return open bus
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return (addr & 0xFF00) >> 8;
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return MemoryManager::GetOpenBus();
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}
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void FDS::StreamState(bool saving)
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@ -93,8 +93,7 @@ public:
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}
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}
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//Open bus
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return (addr >> 8);
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return MemoryManager::GetOpenBus();
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}
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void WriteRegister(uint16_t addr, uint8_t value)
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@ -510,7 +510,6 @@ protected:
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case 0x5206: return (_multiplierValue1*_multiplierValue2) >> 8;
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}
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//Open bus
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return (addr >> 8);
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return MemoryManager::GetOpenBus();
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}
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};
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@ -111,8 +111,7 @@ public:
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return status;
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}
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//Open bus
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return (addr >> 8);
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return MemoryManager::GetOpenBus();
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}
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void WriteRegister(uint16_t addr, uint8_t value)
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@ -4,9 +4,13 @@
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#include "Debugger.h"
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#include "CheatManager.h"
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//Used for open bus
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uint8_t MemoryManager::_lastReadValue = 0;
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MemoryManager::MemoryManager(shared_ptr<BaseMapper> mapper)
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{
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_mapper = mapper;
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_lastReadValue = 0;
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_internalRAM = new uint8_t[InternalRAMSize];
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for(int i = 0; i < 2; i++) {
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@ -49,7 +53,7 @@ uint8_t MemoryManager::ReadRegister(uint16_t addr)
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if(_ramReadHandlers[addr]) {
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return _ramReadHandlers[addr]->ReadRAM(addr);
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} else {
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return (addr & 0xFF00) >> 8;
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return GetOpenBus();
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}
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}
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@ -94,6 +98,7 @@ uint8_t MemoryManager::DebugRead(uint16_t addr)
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}
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CheatManager::ApplyRamCodes(addr, value);
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return value;
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}
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@ -115,6 +120,8 @@ uint8_t MemoryManager::Read(uint16_t addr, MemoryOperationType operationType)
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Debugger::ProcessRamOperation(operationType, addr, value);
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_lastReadValue = value;
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return value;
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}
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@ -175,4 +182,9 @@ void MemoryManager::StreamState(bool saving)
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ArrayInfo<uint8_t> nameTable0Ram = { _nametableRAM[0], MemoryManager::NameTableScreenSize };
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ArrayInfo<uint8_t> nameTable1Ram = { _nametableRAM[1], MemoryManager::NameTableScreenSize };
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Stream(internalRam, nameTable0Ram, nameTable1Ram);
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}
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uint8_t MemoryManager::GetOpenBus(uint8_t mask)
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{
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return _lastReadValue & mask;
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}
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@ -14,6 +14,8 @@ class MemoryManager: public Snapshotable
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static const int VRAMSize = 0x4000;
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static const int NameTableScreenSize = 0x400;
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static uint8_t _lastReadValue;
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shared_ptr<BaseMapper> _mapper;
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uint8_t *_internalRAM;
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@ -51,5 +53,7 @@ class MemoryManager: public Snapshotable
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void WriteVRAM(uint16_t addr, uint8_t value);
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uint32_t ToAbsoluteChrAddress(uint16_t vramAddr);
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static uint8_t GetOpenBus(uint8_t mask = 0xFF);
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};
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@ -289,8 +289,7 @@ uint8_t NsfMapper::ReadRegister(uint16_t addr)
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}
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}
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//Open bus
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return (addr >> 8);
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return MemoryManager::GetOpenBus();
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}
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void NsfMapper::WriteRegister(uint16_t addr, uint8_t value)
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