From 5f2d2851fe0ba3aa659b0afadfa4e05b13e0778b Mon Sep 17 00:00:00 2001 From: Souryo Date: Sat, 2 Jan 2016 18:02:56 -0500 Subject: [PATCH] Fixed PPU even_odd_timing test (when disabling BG just before cycle 339) --- Core/PPU.cpp | 11 ++++++++++- Core/PPU.h | 1 + 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/Core/PPU.cpp b/Core/PPU.cpp index 392e8d7b..b8064b07 100644 --- a/Core/PPU.cpp +++ b/Core/PPU.cpp @@ -31,6 +31,8 @@ PPU::~PPU() void PPU::Reset() { + _skipTick = false; + _state = {}; _flags = {}; _statusFlags = {}; @@ -536,11 +538,16 @@ void PPU::ProcessPrerenderScanline() //copy vertical scrolling value from t _state.VideoRamAddr = (_state.VideoRamAddr & ~0x7BE0) | (_state.TmpVideoRamAddr & 0x7BE0); } - } else if(_nesModel == NesModel::NTSC && _cycle == 339 && IsRenderingEnabled() && (_frameCount & 0x01)) { + } else if(_nesModel == NesModel::NTSC && _cycle == 338 && IsRenderingEnabled() && (_frameCount & 0x01)) { + //Check for the cycle skip in the else if block below + //If, at cycle 338 in the prerender scanline, rendering is enabled, we skip a tick (cycle 340) on the current frame + _skipTick = true; + } else if(_cycle == 339 && _skipTick) { //This behavior is NTSC-specific - PAL frames are always the same number of cycles //"With rendering enabled, each odd PPU frame is one PPU clock shorter than normal" (skip from 339 to 0, going over 340) _cycle = -1; _scanline = 0; + _skipTick = false; } else if(_cycle == 321 || _cycle == 329) { LoadTileInfo(); if(_cycle == 329) { @@ -785,6 +792,8 @@ void PPU::StreamState(bool saving) Stream(_spriteDmaAddr); Stream(_spriteDmaCounter); + Stream(_skipTick); + if(!saving) { SetNesModel(_nesModel); } diff --git a/Core/PPU.h b/Core/PPU.h index 3642bfc1..f81e8453 100644 --- a/Core/PPU.h +++ b/Core/PPU.h @@ -110,6 +110,7 @@ class PPU : public IMemoryHandler, public Snapshotable NesModel _nesModel; uint16_t _vblankEnd; + bool _skipTick; PPUControlFlags _flags; PPUStatusFlags _statusFlags;