Reverted start cycle for CPU and fixed initial "period" for DMC - makes "dpcmletterbox" more stable at first, and doesn't break sprdma_and_dmc tests

This commit is contained in:
Souryo 2016-01-03 11:42:01 -05:00
parent 411967e4fa
commit 64b2856d7c
2 changed files with 6 additions and 2 deletions

View File

@ -58,7 +58,7 @@ void CPU::Reset(bool softReset)
{
_state.NMIFlag = false;
_state.IRQFlag = 0;
_cycleCount = 0;
_cycleCount = -1;
_spriteDmaTransfer = false;
_spriteDmaCounter = 0;
@ -110,7 +110,7 @@ void CPU::IncCycleCount()
PPU::ExecStatic();
APU::ExecStatic();
if(!_spriteDmaTransfer) {
if(!_spriteDmaTransfer && !_dmcDmaRunning) {
//IRQ flags are ignored during Sprite DMA - fixes irq_and_dma
//"it's really the status of the interrupt lines at the end of the second-to-last cycle that matters."

View File

@ -32,6 +32,10 @@ void DeltaModulationChannel::Reset(bool softReset)
_bitsRemaining = 8;
_silenceFlag = true;
_needToRun = false;
//Not sure if this is accurate, but it seems to make things better rather than worse (for dpcmletterbox)
//"On the real thing, I think the power-on value is 428 (or the equivalent at least - it uses a linear feedback shift register), though only the even/oddness should matter for this test."
_period = (GetNesModel() == NesModel::NTSC ? _dmcPeriodLookupTableNtsc : _dmcPeriodLookupTablePal)[0] - 1;
}
void DeltaModulationChannel::InitSample()