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Study box - Minor improvements, most likely not accurate
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@ -6,6 +6,9 @@ class StudyBox : public BaseMapper
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{
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private:
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uint8_t _prgRamReg;
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bool _tapeReady = false;
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uint16_t _tapeReadyDelay = 0;
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uint8_t _reg4202 = 0;
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protected:
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virtual uint16_t RegisterStartAddress() { return 0x4200; }
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@ -41,8 +44,14 @@ protected:
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uint8_t ReadRegister(uint16_t addr)
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{
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switch(addr) {
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case 0x4200: case 0x4201: case 0x4203: return 0x00;
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case 0x4202: return 0x40;
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case 0x4200: case 0x4203: return 0x00;
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case 0x4201:
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return 0x10; /* | (EmulationSettings::CheckFlag(EmulationFlags::ShowFPS) ? 0x20 : 0x00)
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| (EmulationSettings::CheckFlag(EmulationFlags::Turbo) ? 0x40 : 0x00); */
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/*(EmulationSettings::CheckFlag(EmulationFlags::ShowFPS) ? 0x00 : 0x20) |
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(EmulationSettings::CheckFlag(EmulationFlags::Turbo) ? 0x00 : 0x50);*/
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case 0x4202: return _tapeReady ? 0x40 : 0x00;
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default: return 0xFF;
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}
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}
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@ -52,12 +61,28 @@ protected:
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SetCpuMemoryMapping(0x6000, 0x7FFF, _prgRamReg, PrgMemoryType::WorkRam);
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}
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void ProcessCpuClock()
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{
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if(_tapeReadyDelay > 0) {
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_tapeReadyDelay--;
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if(_tapeReadyDelay == 0) {
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_tapeReady = (_reg4202 & 0x10) == 0x10;
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}
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}
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}
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void WriteRegister(uint16_t addr, uint8_t value)
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{
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if(addr & 0x4203) {
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switch(addr & 0x03) {
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case 0: _prgRamReg = value >> 6; UpdateState(); break;
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case 1: SelectPRGPage(0, value); break;
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case 2:
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_reg4202 = value;
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_tapeReadyDelay = 100;
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break;
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case 3:
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break;
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}
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}
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}
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