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Mapper 178 support

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This commit is contained in:
Souryo 2016-07-22 21:38:03 -04:00
parent 8ecd9ea589
commit 7aa1518071
4 changed files with 69 additions and 1 deletions
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1
Core/Core.vcxproj
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@ -629,6 +629,7 @@
<ClInclude Include="VsZapper.h" />
<ClInclude Include="Waixing164.h" />
<ClInclude Include="Waixing176.h" />
<ClInclude Include="Waixing178.h" />
<ClInclude Include="Waixing252.h" />
<ClInclude Include="WaveRecorder.h" />
<ClInclude Include="Zapper.h" />

3
Core/Core.vcxproj.filters
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@ -784,6 +784,9 @@
<ClInclude Include="MMC3_245.h">
<Filter>Nes\Mappers\MMC</Filter>
</ClInclude>
<ClInclude Include="Waixing178.h">
<Filter>Nes\Mappers\Waixing</Filter>
</ClInclude>
</ItemGroup>
<ItemGroup>
<ClCompile Include="stdafx.cpp">

4
Core/MapperFactory.cpp
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@ -134,6 +134,7 @@
#include "VsSystem.h"
#include "Waixing164.h"
#include "Waixing176.h"
#include "Waixing178.h"
#include "Waixing252.h"
/*
@ -153,7 +154,7 @@ Supported mappers:
| | | | |132|133| | | |137|138|139|140|141|142|143|
|144|145|146|147|148|149|150|151|152|153|154|155|156|157| |159|
| | | |163|164| | | | | |170|171|172|173| |175|
|176|177| |179|180| |182| |184|185| | | |189| |191|
|176|177|178|179|180| |182| |184|185| | | |189| |191|
|192|193|194|195| | | | |200|201|202|203| |205|206|207|
| |209|210|211| | | | | | |218| | | | | |
| |225|226|227|228| |230|231|232| | |235| | | | |
@ -302,6 +303,7 @@ BaseMapper* MapperFactory::GetMapperFromID(RomData &romData)
case 175: return new Kaiser7022();
case 176: return new Waixing176();
case 177: return new Henggedianzi177();
case 178: return new Waixing178();
case 179: return new Henggedianzi179();
case 180: return new UnRom_180();
case 182: return new MMC3_182();

62
Core/Waixing178.h Normal file
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@ -0,0 +1,62 @@
#pragma once
#include "BaseMapper.h"
class Waixing178 : public BaseMapper
{
private:
uint8_t _regs[4];
protected:
uint16_t GetPRGPageSize() { return 0x4000; }
uint16_t GetCHRPageSize() { return 0x2000; }
uint16_t RegisterStartAddress() { return 0x4800; }
uint16_t RegisterEndAddress() { return 0x4FFF; }
uint32_t GetWorkRamSize() { return 0x8000; }
void InitMapper()
{
memset(_regs, 0, sizeof(_regs));
UpdateState();
SelectCHRPage(0, 0);
}
void StreamState(bool saving)
{
BaseMapper::StreamState(saving);
Stream(_regs[0], _regs[1], _regs[2], _regs[3]);
if(!saving) {
UpdateState();
}
}
void UpdateState()
{
uint16_t sbank = _regs[1] & 0x07;
uint16_t bbank = _regs[2];
if(_regs[0] & 0x02) {
SelectPRGPage(0, (bbank << 3) | sbank);
if(_regs[0] & 0x04) {
SelectPRGPage(1, (bbank << 3) | 0x06 | (_regs[1] & 0x01));
} else {
SelectPRGPage(1, (bbank << 3) | 0x07);
}
} else {
uint16_t bank = (bbank << 3) | sbank;
if(_regs[0] & 0x04) {
SelectPRGPage(0, bank);
SelectPRGPage(1, bank);
} else {
SelectPrgPage2x(0, bank);
}
}
SetCpuMemoryMapping(0x6000, 0x7FFF, _regs[3] & 0x03, PrgMemoryType::WorkRam, MemoryAccessType::ReadWrite);
SetMirroringType(_regs[0] & 0x01 ? MirroringType::Horizontal : MirroringType::Vertical);
}
void WriteRegister(uint16_t addr, uint8_t value)
{
_regs[addr & 0x03] = value;
UpdateState();
}
};