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52 lines
1.7 KiB
C++
52 lines
1.7 KiB
C++
#pragma once
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#include "stdafx.h"
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#include "BaseMapper.h"
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//Missing flashing support + only tested on 1 game demo
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class UnRom512 : public BaseMapper
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{
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private:
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bool _oneScreenMirroring;
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protected:
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virtual uint16_t GetPRGPageSize() override { return 0x4000; }
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virtual uint16_t GetCHRPageSize() override { return 0x2000; }
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virtual uint16_t RegisterStartAddress() override { return 0x8000; }
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virtual uint16_t RegisterEndAddress() override { return 0xFFFF; }
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virtual uint32_t GetChrRamSize() override { return 0x8000; }
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virtual bool HasBusConflicts() override { return !HasBattery(); }
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void InitMapper() override
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{
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SelectPRGPage(1, -1);
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if(IsNes20()) {
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_oneScreenMirroring = GetMirroringType() == MirroringType::ScreenAOnly;
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} else {
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_oneScreenMirroring = GetMirroringType() == MirroringType::FourScreens;
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}
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}
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void SetDefaultNametables(uint8_t* nametableA, uint8_t* nametableB) override
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{
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BaseMapper::SetDefaultNametables(nametableA, nametableB);
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if(IsNes20() && !_oneScreenMirroring && _chrRam && _chrRamSize >= 0x8000) {
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//InfiniteNesLives four-screen mirroring variation, last 8kb of CHR RAM is always mapped to 0x2000-0x3FFF (0x3EFF due to palette)
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//This "breaks" the "UNROM512_4screen_test" test ROM - was the ROM actually tested on this board? Seems to contradict hardware specs
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SetPpuMemoryMapping(0x2000, 0x3FFF, _chrRam + 0x6000);
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}
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}
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void WriteRegister(uint16_t addr, uint8_t value) override
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{
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if(!HasBattery() || addr >= 0xC000) {
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SelectPRGPage(0, value & 0x1F);
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SelectCHRPage(0, (value >> 5) & 0x03);
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if(_oneScreenMirroring) {
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SetMirroringType(value & 0x80 ? MirroringType::ScreenBOnly : MirroringType::ScreenAOnly);
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}
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} else {
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//Unimplemented (flash process)
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}
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}
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}; |