mirror of
https://github.com/libretro/Mesen.git
synced 2024-12-12 19:36:23 +00:00
753 lines
23 KiB
C++
753 lines
23 KiB
C++
#include "stdafx.h"
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#include "PPU.h"
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#include "CPU.h"
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#include "EmulationSettings.h"
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PPU* PPU::Instance = nullptr;
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IVideoDevice *PPU::VideoDevice = nullptr;
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PPU::PPU(MemoryManager *memoryManager)
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{
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PPU::Instance = this;
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_memoryManager = memoryManager;
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_outputBuffer = new uint16_t[256 * 240];
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Reset();
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}
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PPU::~PPU()
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{
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delete[] _outputBuffer;
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}
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void PPU::Reset()
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{
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_state = {};
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_flags = {};
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_statusFlags = {};
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_scanline = 0;
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_cycle = -1;
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_frameCount = 0;
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_memoryReadBuffer = 0;
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memset(_spriteRAM, 0xFF, 0x100);
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}
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void PPU::SetNesModel(NesModel model)
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{
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_nesModel = model;
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_vblankEnd = (model == NesModel::NTSC ? 260 : 311);
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}
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PPUDebugState PPU::GetState()
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{
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PPUDebugState state;
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state.ControlFlags = _flags;
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state.StatusFlags = _statusFlags;
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state.State = _state;
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state.Cycle = _cycle;
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state.Scanline = _scanline;
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return state;
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}
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void PPU::UpdateVideoRamAddr()
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{
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if(_scanline >= 239 || !IsRenderingEnabled()) {
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_state.VideoRamAddr += _flags.VerticalWrite ? 32 : 1;
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//Trigger memory read when setting the vram address - needed by MMC3 IRQ counter
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//"Should be clocked when A12 changes to 1 via $2007 read/write"
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_memoryManager->ReadVRAM(_state.VideoRamAddr);
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} else {
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//"During rendering (on the pre-render line and the visible lines 0-239, provided either background or sprite rendering is enabled), "
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//it will update v in an odd way, triggering a coarse X increment and a Y increment simultaneously"
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IncHorizontalScrolling();
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IncVerticalScrolling();
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}
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}
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uint8_t PPU::ReadRAM(uint16_t addr)
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{
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uint8_t returnValue;
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switch(GetRegisterID(addr)) {
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case PPURegisters::Status:
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_state.WriteToggle = false;
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_flags.IntensifyBlue = false;
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UpdateStatusFlag();
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return _state.Status;
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case PPURegisters::SpriteData:
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return _spriteRAM[_state.SpriteRamAddr];
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case PPURegisters::VideoMemoryData:
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returnValue = _memoryReadBuffer;
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_memoryReadBuffer = _memoryManager->ReadVRAM(_state.VideoRamAddr);
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if(_state.VideoRamAddr >= 0x3F00) {
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returnValue = ReadPaletteRAM(_state.VideoRamAddr);
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}
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UpdateVideoRamAddr();
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return returnValue;
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default:
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//other registers are meant to be read-only
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break;
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}
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return 0;
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}
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void PPU::WriteRAM(uint16_t addr, uint8_t value)
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{
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switch(GetRegisterID(addr)) {
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case PPURegisters::Control:
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SetControlRegister(value);
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break;
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case PPURegisters::Mask:
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SetMaskRegister(value);
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break;
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case PPURegisters::SpriteAddr:
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_state.SpriteRamAddr = value;
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break;
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case PPURegisters::SpriteData:
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if(_scanline >= 240 || !IsRenderingEnabled()) {
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_spriteRAM[_state.SpriteRamAddr] = value;
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_state.SpriteRamAddr = (_state.SpriteRamAddr + 1) & 0xFF;
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} else {
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//"Writes to OAMDATA during rendering (on the pre-render line and the visible lines 0-239, provided either sprite or background rendering is enabled) do not modify values in OAM,
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//but do perform a glitchy increment of OAMADDR, bumping only the high 6 bits"
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_state.SpriteRamAddr += 4;
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}
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break;
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case PPURegisters::ScrollOffsets:
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if(_state.WriteToggle) {
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_state.TmpVideoRamAddr = (_state.TmpVideoRamAddr & ~0x73E0) | ((value & 0xF8) << 2) | ((value & 0x07) << 12);
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} else {
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_state.XScroll = value & 0x07;
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_state.TmpVideoRamAddr = (_state.TmpVideoRamAddr & ~0x001F) | (value >> 3);
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}
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_state.WriteToggle = !_state.WriteToggle;
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break;
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case PPURegisters::VideoMemoryAddr:
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if(_state.WriteToggle) {
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_state.TmpVideoRamAddr = (_state.TmpVideoRamAddr & ~0x00FF) | value;
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_state.VideoRamAddr = _state.TmpVideoRamAddr;
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//Trigger memory read when setting the vram address - needed by MMC3 IRQ counter
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//"4) Should be clocked when A12 changes to 1 via $2006 write"
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_memoryManager->ReadVRAM(_state.VideoRamAddr);
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} else {
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_state.TmpVideoRamAddr = (_state.TmpVideoRamAddr & ~0xFF00) | ((value & 0x3F) << 8);
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}
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_state.WriteToggle = !_state.WriteToggle;
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break;
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case PPURegisters::VideoMemoryData:
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if(_state.VideoRamAddr >= 0x3F00) {
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WritePaletteRAM(_state.VideoRamAddr, value);
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} else {
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_memoryManager->WriteVRAM(_state.VideoRamAddr, value);
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}
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UpdateVideoRamAddr();
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break;
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case PPURegisters::SpriteDMA:
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CPU::RunDMATransfer(_spriteRAM, _state.SpriteRamAddr, value);
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break;
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}
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}
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uint8_t PPU::ReadPaletteRAM(uint16_t addr)
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{
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addr &= 0x1F;
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if(addr == 0x10 || addr == 0x14 || addr == 0x18 || addr == 0x1C) {
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addr &= ~0x10;
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}
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return (_paletteRAM[addr] & _paletteRamMask);
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}
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void PPU::WritePaletteRAM(uint16_t addr, uint8_t value)
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{
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addr &= 0x1F;
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if(addr == 0x10 || addr == 0x14 || addr == 0x18 || addr == 0x1C) {
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addr &= ~0x10;
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}
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_paletteRAM[addr] = value;
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}
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uint32_t PPU::GetBGPaletteEntry(uint32_t paletteOffset, uint32_t pixel)
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{
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if(pixel == 0) {
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return ReadPaletteRAM(0x3F00) | _intensifyColorBits;
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} else {
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return ReadPaletteRAM(0x3F00 + paletteOffset + pixel) | _intensifyColorBits;
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}
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}
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uint32_t PPU::GetSpritePaletteEntry(uint32_t paletteOffset, uint32_t pixel)
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{
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if(pixel == 0) {
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return ReadPaletteRAM(0x3F00) | _intensifyColorBits;
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} else {
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return ReadPaletteRAM(0x3F10 + paletteOffset + pixel) | _intensifyColorBits;
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}
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}
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bool PPU::IsRenderingEnabled()
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{
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return _flags.BackgroundEnabled || _flags.SpritesEnabled;
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}
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void PPU::SetControlRegister(uint8_t value)
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{
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_state.Control = value;
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uint8_t nameTable = (_state.Control & 0x03);
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_state.TmpVideoRamAddr = (_state.TmpVideoRamAddr & ~0x0C00) | (nameTable << 10);
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_flags.VerticalWrite = (_state.Control & 0x04) == 0x04;
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_flags.SpritePatternAddr = ((_state.Control & 0x08) == 0x08) ? 0x1000 : 0x0000;
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_flags.BackgroundPatternAddr = ((_state.Control & 0x10) == 0x10) ? 0x1000 : 0x0000;
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_flags.LargeSprites = (_state.Control & 0x20) == 0x20;
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//"By toggling NMI_output ($2000 bit 7) during vertical blank without reading $2002, a program can cause /NMI to be pulled low multiple times, causing multiple NMIs to be generated."
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bool originalVBlank = _flags.VBlank;
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_flags.VBlank = (_state.Control & 0x80) == 0x80;
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if(!originalVBlank && _flags.VBlank && _statusFlags.VerticalBlank && (_scanline != -1 || _cycle != 0)) {
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CPU::SetNMIFlag();
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} else if(_scanline == 241 && _cycle < 3 && !_flags.VBlank) {
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CPU::ClearNMIFlag();
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}
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}
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void PPU::SetMaskRegister(uint8_t value)
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{
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_state.Mask = value;
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_flags.Grayscale = (_state.Mask & 0x01) == 0x01;
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_flags.BackgroundMask = (_state.Mask & 0x02) == 0x02;
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_flags.SpriteMask = (_state.Mask & 0x04) == 0x04;
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_flags.BackgroundEnabled = (_state.Mask & 0x08) == 0x08;
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_flags.SpritesEnabled = (_state.Mask & 0x10) == 0x10;
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_flags.IntensifyBlue = (_state.Mask & 0x80) == 0x80;
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//"Bit 0 controls a greyscale mode, which causes the palette to use only the colors from the grey column: $00, $10, $20, $30. This is implemented as a bitwise AND with $30 on any value read from PPU $3F00-$3FFF"
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_paletteRamMask = _flags.Grayscale ? 0x30 : 0x3F;
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if(_nesModel == NesModel::NTSC) {
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_flags.IntensifyRed = (_state.Mask & 0x20) == 0x20;
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_flags.IntensifyGreen = (_state.Mask & 0x40) == 0x40;
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_intensifyColorBits = (value & 0xE0) << 1;
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} else {
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//"Note that on the Dendy and PAL NES, the green and red bits swap meaning."
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_flags.IntensifyRed = (_state.Mask & 0x40) == 0x40;
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_flags.IntensifyGreen = (_state.Mask & 0x20) == 0x20;
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_intensifyColorBits = (_flags.IntensifyRed ? 0x40 : 0x00) | (_flags.IntensifyGreen ? 0x80 : 0x00) | (_flags.IntensifyBlue ? 0x100 : 0x00);
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}
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}
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void PPU::UpdateStatusFlag()
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{
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_state.Status = ((uint8_t)_statusFlags.SpriteOverflow << 5) |
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((uint8_t)_statusFlags.Sprite0Hit << 6) |
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((uint8_t)_statusFlags.VerticalBlank << 7);
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_statusFlags.VerticalBlank = false;
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if(_scanline == 241) {
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if(_cycle < 3) {
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//"Reading on the same PPU clock or one later reads it as set, clears it, and suppresses the NMI for that frame."
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CPU::ClearNMIFlag();
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if(_cycle == 0) {
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//"Reading one PPU clock before reads it as clear and never sets the flag or generates NMI for that frame. "
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_doNotSetVBFlag = true;
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}
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}
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}
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}
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//Taken from http://wiki.nesdev.com/w/index.php/The_skinny_on_NES_scrolling#Wrapping_around
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void PPU::IncVerticalScrolling()
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{
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uint16_t addr = _state.VideoRamAddr;
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if((addr & 0x7000) != 0x7000) {
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// if fine Y < 7
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addr += 0x1000; // increment fine Y
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} else {
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// fine Y = 0
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addr &= ~0x7000;
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int y = (addr & 0x03E0) >> 5; // let y = coarse Y
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if(y == 29) {
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y = 0; // coarse Y = 0
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addr ^= 0x0800; // switch vertical nametable
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} else if(y == 31){
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y = 0; // coarse Y = 0, nametable not switched
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} else {
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y++; // increment coarse Y
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}
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addr = (addr & ~0x03E0) | (y << 5); // put coarse Y back into v
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}
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_state.VideoRamAddr = addr;
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}
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//Taken from http://wiki.nesdev.com/w/index.php/The_skinny_on_NES_scrolling#Wrapping_around
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void PPU::IncHorizontalScrolling()
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{
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//Increase coarse X scrolling value.
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uint16_t addr = _state.VideoRamAddr;
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if((addr & 0x001F) == 31) {
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//When the value is 31, wrap around to 0 and switch nametable
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addr = (addr & ~0x001F) ^ 0x0400;
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} else {
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addr++;
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}
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_state.VideoRamAddr = addr;
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}
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//Taken from http://wiki.nesdev.com/w/index.php/The_skinny_on_NES_scrolling#Tile_and_attribute_fetching
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uint16_t PPU::GetNameTableAddr()
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{
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return 0x2000 | (_state.VideoRamAddr & 0x0FFF);
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}
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//Taken from http://wiki.nesdev.com/w/index.php/The_skinny_on_NES_scrolling#Tile_and_attribute_fetching
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uint16_t PPU::GetAttributeAddr()
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{
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return 0x23C0 | (_state.VideoRamAddr & 0x0C00) | ((_state.VideoRamAddr >> 4) & 0x38) | ((_state.VideoRamAddr >> 2) & 0x07);
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}
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void PPU::LoadTileInfo()
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{
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if(IsRenderingEnabled()) {
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_previousTile = _currentTile;
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_currentTile = _nextTile;
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uint16_t tileIndex = _memoryManager->ReadVRAM(GetNameTableAddr());
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uint16_t tileAddr = (tileIndex << 4) | (_state.VideoRamAddr >> 12) | _flags.BackgroundPatternAddr;
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uint16_t shift = ((_state.VideoRamAddr >> 4) & 0x04) | (_state.VideoRamAddr & 0x02);
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_nextTile.PaletteOffset = ((_memoryManager->ReadVRAM(GetAttributeAddr()) >> shift) & 0x03) << 2;
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_nextTile.LowByte = _memoryManager->ReadVRAM(tileAddr);
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_nextTile.HighByte = _memoryManager->ReadVRAM(tileAddr + 8);
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}
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}
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void PPU::LoadSpriteTileInfo(uint8_t spriteIndex)
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{
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if(IsRenderingEnabled()) {
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uint32_t spriteAddr = spriteIndex * 4;
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uint8_t spriteY = _secondarySpriteRAM[spriteAddr];
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uint8_t tileIndex = _secondarySpriteRAM[spriteAddr + 1];
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uint8_t attributes = _secondarySpriteRAM[spriteAddr + 2];
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uint8_t spriteX = _secondarySpriteRAM[spriteAddr + 3];
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bool backgroundPriority = (attributes & 0x20) == 0x20;
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bool horizontalMirror = (attributes & 0x40) == 0x40;
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bool verticalMirror = (attributes & 0x80) == 0x80;
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uint16_t tileAddr;
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uint8_t lineOffset;
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if(verticalMirror) {
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lineOffset = (_flags.LargeSprites ? 15 : 7) - (_scanline - spriteY);
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} else {
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lineOffset = _scanline - spriteY;
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}
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if(_flags.LargeSprites) {
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tileAddr = (((tileIndex & 0x01) ? 0x1000 : 0x0000) | ((tileIndex & ~0x01) << 4)) + (lineOffset >= 8 ? lineOffset + 8 : lineOffset);
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} else {
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tileAddr = ((tileIndex << 4) | _flags.SpritePatternAddr) + lineOffset;
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}
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if(spriteIndex < _spriteCount && spriteY < 240) {
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_spriteX[spriteIndex] = spriteX;
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_spriteTiles[spriteIndex].BackgroundPriority = backgroundPriority;
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_spriteTiles[spriteIndex].HorizontalMirror = horizontalMirror;
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_spriteTiles[spriteIndex].PaletteOffset = (attributes & 0x03) << 2;
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_spriteTiles[spriteIndex].LowByte = _memoryManager->ReadVRAM(tileAddr);
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_spriteTiles[spriteIndex].HighByte = _memoryManager->ReadVRAM(tileAddr + 8);
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} else {
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//Fetches to sprite 0xFF for remaining sprites/hidden - used by MMC3 IRQ counter
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lineOffset = 0;
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tileIndex = 0xFF;
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if(_flags.LargeSprites) {
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tileAddr = (((tileIndex & 0x01) ? 0x1000 : 0x0000) | ((tileIndex & ~0x01) << 4)) + (lineOffset >= 8 ? lineOffset + 8 : lineOffset);
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} else {
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tileAddr = ((tileIndex << 4) | _flags.SpritePatternAddr) + lineOffset;
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}
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_memoryManager->ReadVRAM(tileAddr);
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_memoryManager->ReadVRAM(tileAddr + 8);
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}
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}
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}
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void PPU::LoadNextTile()
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{
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_state.LowBitShift |= _nextTile.LowByte;
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_state.HighBitShift |= _nextTile.HighByte;
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}
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void PPU::InitializeShiftRegisters()
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{
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_state.LowBitShift = (_currentTile.LowByte << 8) | _nextTile.LowByte;
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_state.HighBitShift = (_currentTile.HighByte << 8) | _nextTile.HighByte;
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}
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void PPU::ShiftTileRegisters()
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{
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_state.LowBitShift <<= 1;
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_state.HighBitShift <<= 1;
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}
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void PPU::DrawPixel()
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{
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//This is called 3.7 million times per second - needs to be as fast as possible.
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uint16_t &pixel = _outputBuffer[(_scanline << 8) + _cycle - 1];
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if(IsRenderingEnabled() || ((_state.VideoRamAddr & 0x3F00) != 0x3F00)) {
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uint8_t offset = _state.XScroll;
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uint32_t backgroundColor = 0;
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if((_cycle > 8 || _flags.BackgroundMask) && _flags.BackgroundEnabled) {
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//BackgroundMask = false: Hide background in leftmost 8 pixels of screen
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backgroundColor = (((_state.LowBitShift << offset) & 0x8000) >> 15) | (((_state.HighBitShift << offset) & 0x8000) >> 14);
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}
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if((_cycle > 8 || _flags.SpriteMask) && _flags.SpritesEnabled) {
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//SpriteMask = true: Hide sprites in leftmost 8 pixels of screen
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for(uint8_t i = 0; i < _spriteCount; i++) {
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int32_t shift = -((int32_t)_spriteX[i] - (int32_t)_cycle + 1);
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if(shift >= 0 && shift < 8) {
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uint32_t spriteColor;
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if(_spriteTiles[i].HorizontalMirror) {
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spriteColor = ((_spriteTiles[i].LowByte >> shift) & 0x01) | ((_spriteTiles[i].HighByte >> shift) & 0x01) << 1;
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} else {
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spriteColor = ((_spriteTiles[i].LowByte << shift) & 0x80) >> 7 | ((_spriteTiles[i].HighByte << shift) & 0x80) >> 6;
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}
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if(spriteColor != 0) {
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//First sprite without a 00 color, use it.
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if(i == 0 && backgroundColor != 0 && _sprite0Visible && _cycle != 256 && _flags.BackgroundEnabled) {
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//"The hit condition is basically sprite zero is in range AND the first sprite output unit is outputting a non-zero pixel AND the background drawing unit is outputting a non-zero pixel."
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//"Sprite zero hits do not register at x=255" (cycle 256)
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//"... provided that background and sprite rendering are both enabled"
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//"Should always miss when Y >= 239"
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_statusFlags.Sprite0Hit = true;
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}
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if(backgroundColor == 0 || !_spriteTiles[i].BackgroundPriority) {
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//Check sprite priority
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pixel = GetSpritePaletteEntry(_spriteTiles[i].PaletteOffset, spriteColor);
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return;
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}
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break;
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}
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}
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}
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}
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pixel = GetBGPaletteEntry(offset + ((_cycle - 1) & 0x07) < 8 ? _previousTile.PaletteOffset : _currentTile.PaletteOffset, backgroundColor);
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} else {
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//"If the current VRAM address points in the range $3F00-$3FFF during forced blanking, the color indicated by this palette location will be shown on screen instead of the backdrop color."
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pixel = ReadPaletteRAM(_state.VideoRamAddr) | _intensifyColorBits;
|
|
}
|
|
}
|
|
|
|
void PPU::ProcessPreVBlankScanline()
|
|
{
|
|
//For pre-render scanline & all visible scanlines
|
|
if(IsRenderingEnabled()) {
|
|
//Update video ram address according to scrolling logic
|
|
if((_cycle > 0 && _cycle < 256 && (_cycle & 0x07) == 0) || _cycle == 328 || _cycle == 336) {
|
|
IncHorizontalScrolling();
|
|
} else if(_cycle == 256) {
|
|
IncVerticalScrolling();
|
|
} else if(_cycle == 257) {
|
|
//copy horizontal scrolling value from t
|
|
_state.VideoRamAddr = (_state.VideoRamAddr & ~0x041F) | (_state.TmpVideoRamAddr & 0x041F);
|
|
}
|
|
}
|
|
|
|
if(_cycle >= 257 && _cycle <= 320) {
|
|
//"OAMADDR is set to 0 during each of ticks 257-320 (the sprite tile loading interval) of the pre-render and visible scanlines."
|
|
_state.SpriteRamAddr = 0;
|
|
}
|
|
}
|
|
|
|
void PPU::ProcessPrerenderScanline()
|
|
{
|
|
ProcessPreVBlankScanline();
|
|
|
|
if(_cycle == 0 && _state.SpriteRamAddr >= 0x08) {
|
|
//"If OAMADDR is not less than eight when rendering starts, the eight bytes starting at OAMADDR & 0xF8 are copied to the first eight bytes of OAM"
|
|
memcpy(_spriteRAM, _spriteRAM + (_state.SpriteRamAddr & 0xF8), 8);
|
|
}
|
|
|
|
if(_cycle == 1) {
|
|
_statusFlags.SpriteOverflow = false;
|
|
_statusFlags.Sprite0Hit = false;
|
|
_statusFlags.VerticalBlank = false;
|
|
}
|
|
|
|
if(((_cycle - 1) & 0x07) == 0 && _cycle < 250) {
|
|
LoadTileInfo();
|
|
} else if(_cycle >= 280 && _cycle <= 304) {
|
|
if(IsRenderingEnabled()) {
|
|
//copy vertical scrolling value from t
|
|
_state.VideoRamAddr = (_state.VideoRamAddr & ~0x7BE0) | (_state.TmpVideoRamAddr & 0x7BE0);
|
|
}
|
|
} else if(_nesModel == NesModel::NTSC && _cycle == 339 && IsRenderingEnabled() && (_frameCount & 0x01)) {
|
|
//This behavior is NTSC-specific - PAL frames are always the same number of cycles
|
|
//"With rendering enabled, each odd PPU frame is one PPU clock shorter than normal" (skip from 339 to 0, going over 340)
|
|
_cycle = -1;
|
|
_scanline = 0;
|
|
} else if(_cycle == 321 || _cycle == 329) {
|
|
LoadTileInfo();
|
|
if(_cycle == 329) {
|
|
InitializeShiftRegisters();
|
|
}
|
|
}
|
|
|
|
if(_cycle >= 261 && ((_cycle - 261) & 0x07) == 0 && _cycle <= 320) {
|
|
//Unused sprite tile fetches, but vital for MMC3 IRQ counter
|
|
uint32_t spriteIndex = (_cycle - 261) / 8;
|
|
LoadSpriteTileInfo(spriteIndex);
|
|
}
|
|
}
|
|
|
|
void PPU::ProcessVisibleScanline()
|
|
{
|
|
if(_cycle > 0 && _cycle <= 256) {
|
|
if(((_cycle - 1) & 0x07) == 0) {
|
|
//Cycle 1, 9, 17, etc.
|
|
if(_cycle != 1) {
|
|
LoadNextTile();
|
|
}
|
|
LoadTileInfo();
|
|
}
|
|
|
|
DrawPixel();
|
|
ShiftTileRegisters();
|
|
|
|
if(IsRenderingEnabled()) {
|
|
CopyOAMData();
|
|
}
|
|
} else if(((_cycle - 261) & 0x07) == 0 && _cycle <= 320) {
|
|
//Cycle 261, 269, etc.
|
|
uint32_t spriteIndex = (_cycle - 261) / 8;
|
|
LoadSpriteTileInfo(spriteIndex);
|
|
} else if(_cycle == 321 || _cycle == 329) {
|
|
LoadTileInfo();
|
|
if(_cycle == 329) {
|
|
InitializeShiftRegisters();
|
|
}
|
|
}
|
|
|
|
ProcessPreVBlankScanline();
|
|
}
|
|
|
|
void PPU::CopyOAMData()
|
|
{
|
|
if(_cycle < 65) {
|
|
//Clear secondary OAM at between cycle 0 and 64
|
|
_secondarySpriteRAM[_cycle >> 1] = 0xFF;
|
|
} else {
|
|
if(_cycle == 65) {
|
|
_overflowCounter = 0;
|
|
_sprite0Added = false;
|
|
_writeOAMData = false;
|
|
_secondaryOAMAddr = 0;
|
|
} else if(_cycle == 256) {
|
|
_sprite0Visible = _sprite0Added;
|
|
_spriteCount = (_secondaryOAMAddr >> 2);
|
|
}
|
|
|
|
if(_cycle & 0x01) {
|
|
//Read a byte from the primary OAM on odd cycles
|
|
_oamCopybuffer = _spriteRAM[_state.SpriteRamAddr & 0xFF];
|
|
_state.SpriteRamAddr++;
|
|
} else {
|
|
if(!_writeOAMData && _scanline >= _oamCopybuffer && _scanline < _oamCopybuffer + (_flags.LargeSprites ? 16 : 8) && _state.SpriteRamAddr < 0x100) {
|
|
_writeOAMData = true;
|
|
}
|
|
|
|
if(_secondaryOAMAddr < 0x20) {
|
|
//Copy 1 byte to secondary OAM
|
|
_secondarySpriteRAM[_secondaryOAMAddr] = _oamCopybuffer;
|
|
|
|
if(_writeOAMData) {
|
|
_secondaryOAMAddr++;
|
|
|
|
if(_state.SpriteRamAddr == 0x01) {
|
|
_sprite0Added = true;
|
|
}
|
|
|
|
if((_secondaryOAMAddr & 0x03) == 0) {
|
|
//Done copying
|
|
_writeOAMData = false;
|
|
}
|
|
} else {
|
|
_state.SpriteRamAddr += 3;
|
|
}
|
|
} else {
|
|
//8 sprites have been found, check next sprite for overflow + emulate PPU bug
|
|
//Based on: http://forums.nesdev.com/viewtopic.php?p=85431#p85431
|
|
//Behavior matches: http://forums.nesdev.com/viewtopic.php?p=1387#p1387
|
|
if(!_statusFlags.SpriteOverflow) {
|
|
if(_writeOAMData) {
|
|
//Sprite is visible, consider this to be an overflow
|
|
_statusFlags.SpriteOverflow = true;
|
|
_overflowCounter = 3;
|
|
} else if((_state.SpriteRamAddr & 0x3) != 0) {
|
|
//Sprite isn't on this scanline, trigger sprite evaluation bug
|
|
_state.SpriteRamAddr += 4;
|
|
}
|
|
} else {
|
|
if(_overflowCounter != 0) {
|
|
_overflowCounter--;
|
|
if(_overflowCounter == 0) {
|
|
_state.SpriteRamAddr = (_state.SpriteRamAddr + 3) & 0x0FFC;
|
|
}
|
|
} else {
|
|
_state.SpriteRamAddr = (_state.SpriteRamAddr + 4) & 0x0FFC;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
void PPU::BeginVBlank()
|
|
{
|
|
if(_cycle == 1) {
|
|
//Send frame to GUI once the last pixel has been output
|
|
if(PPU::VideoDevice) {
|
|
PPU::VideoDevice->UpdateFrame(_outputBuffer);
|
|
}
|
|
|
|
if(!_doNotSetVBFlag) {
|
|
_statusFlags.VerticalBlank = true;
|
|
if(_flags.VBlank) {
|
|
CPU::SetNMIFlag();
|
|
}
|
|
}
|
|
_doNotSetVBFlag = false;
|
|
}
|
|
}
|
|
|
|
void PPU::EndVBlank()
|
|
{
|
|
if(_cycle == 340) {
|
|
_frameCount++;
|
|
}
|
|
}
|
|
|
|
void PPU::Exec()
|
|
{
|
|
if(_cycle == 340) {
|
|
_cycle = -1;
|
|
|
|
if(_scanline++ == _vblankEnd) {
|
|
_scanline = -1;
|
|
}
|
|
}
|
|
_cycle++;
|
|
|
|
if(_scanline != -1 && _scanline < 240) {
|
|
ProcessVisibleScanline();
|
|
} else if(_scanline == -1) {
|
|
ProcessPrerenderScanline();
|
|
} else if(_scanline == 241) {
|
|
BeginVBlank();
|
|
} else if(_scanline == _vblankEnd) {
|
|
EndVBlank();
|
|
}
|
|
}
|
|
|
|
void PPU::ExecStatic()
|
|
{
|
|
PPU::Instance->Exec();
|
|
PPU::Instance->Exec();
|
|
PPU::Instance->Exec();
|
|
if(PPU::Instance->_nesModel == NesModel::PAL && CPU::GetCycleCount() % 5 == 0) {
|
|
//PAL PPU runs 3.2 clocks for every CPU clock, so we need to run an extra clock every 5 CPU clocks
|
|
PPU::Instance->Exec();
|
|
}
|
|
}
|
|
|
|
void PPU::StreamState(bool saving)
|
|
{
|
|
Stream<uint8_t>(_state.Control);
|
|
Stream<uint8_t>(_state.Mask);
|
|
Stream<uint8_t>(_state.Status);
|
|
Stream<uint32_t>(_state.SpriteRamAddr);
|
|
Stream<uint16_t>(_state.VideoRamAddr);
|
|
Stream<uint8_t>(_state.XScroll);
|
|
Stream<uint16_t>(_state.TmpVideoRamAddr);
|
|
Stream<bool>(_state.WriteToggle);
|
|
Stream<uint16_t>(_state.HighBitShift);
|
|
Stream<uint16_t>(_state.LowBitShift);
|
|
|
|
Stream<bool>(_flags.VerticalWrite);
|
|
Stream<uint16_t>(_flags.SpritePatternAddr);
|
|
Stream<uint16_t>(_flags.BackgroundPatternAddr);
|
|
Stream<bool>(_flags.LargeSprites);
|
|
Stream<bool>(_flags.VBlank);
|
|
|
|
Stream<bool>(_flags.Grayscale);
|
|
Stream<bool>(_flags.BackgroundMask);
|
|
Stream<bool>(_flags.SpriteMask);
|
|
Stream<bool>(_flags.BackgroundEnabled);
|
|
Stream<bool>(_flags.SpritesEnabled);
|
|
Stream<bool>(_flags.IntensifyRed);
|
|
Stream<bool>(_flags.IntensifyGreen);
|
|
Stream<bool>(_flags.IntensifyBlue);
|
|
Stream<uint8_t>(_paletteRamMask);
|
|
Stream<uint16_t>(_intensifyColorBits);
|
|
|
|
Stream<bool>(_statusFlags.SpriteOverflow);
|
|
Stream<bool>(_statusFlags.Sprite0Hit);
|
|
Stream<bool>(_statusFlags.VerticalBlank);
|
|
|
|
Stream<int32_t>(_scanline);
|
|
Stream<uint32_t>(_cycle);
|
|
Stream<uint32_t>(_frameCount);
|
|
Stream<uint8_t>(_memoryReadBuffer);
|
|
|
|
StreamArray<uint8_t>(_paletteRAM, 0x20);
|
|
StreamArray<uint8_t>(_spriteRAM, 0x100);
|
|
StreamArray<uint8_t>(_secondarySpriteRAM, 0x20);
|
|
|
|
Stream<uint8_t>(_currentTile.LowByte);
|
|
Stream<uint8_t>(_currentTile.HighByte);
|
|
Stream<uint32_t>(_currentTile.PaletteOffset);
|
|
|
|
Stream<uint8_t>(_nextTile.LowByte);
|
|
Stream<uint8_t>(_nextTile.HighByte);
|
|
Stream<uint32_t>(_nextTile.PaletteOffset);
|
|
|
|
Stream<uint8_t>(_previousTile.LowByte);
|
|
Stream<uint8_t>(_previousTile.HighByte);
|
|
Stream<uint32_t>(_previousTile.PaletteOffset);
|
|
|
|
StreamArray<int32_t>(_spriteX, 0x8);
|
|
for(int i = 0; i < 8; i++) {
|
|
Stream<uint8_t>(_spriteTiles[i].LowByte);
|
|
Stream<uint8_t>(_spriteTiles[i].HighByte);
|
|
Stream<uint32_t>(_spriteTiles[i].PaletteOffset);
|
|
Stream<bool>(_spriteTiles[i].HorizontalMirror);
|
|
Stream<bool>(_spriteTiles[i].BackgroundPriority);
|
|
}
|
|
Stream<uint32_t>(_spriteCount);
|
|
Stream<uint32_t>(_secondaryOAMAddr);
|
|
Stream<bool>(_sprite0Visible);
|
|
|
|
Stream<uint8_t>(_oamCopybuffer);
|
|
Stream<bool>(_writeOAMData);
|
|
Stream<uint32_t>(_overflowCounter);
|
|
Stream<bool>(_sprite0Added);
|
|
|
|
Stream<NesModel>(_nesModel);
|
|
|
|
if(!saving) {
|
|
SetNesModel(_nesModel);
|
|
}
|
|
} |