mirror of
https://github.com/libretro/Mesen.git
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199 lines
7.7 KiB
C++
199 lines
7.7 KiB
C++
#include "stdafx.h"
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#include "Disassembler.h"
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#include "DisassemblyInfo.h"
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Disassembler::Disassembler(uint8_t* internalRAM, uint8_t* prgROM, uint32_t prgSize)
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{
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_internalRAM = internalRAM;
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_prgROM = prgROM;
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_prgSize = prgSize;
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for(uint32_t i = 0; i < prgSize; i++) {
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_disassembleCache.push_back(shared_ptr<DisassemblyInfo>(nullptr));
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}
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for(uint32_t i = 0; i < 0x2000; i++) {
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_disassembleMemoryCache.push_back(shared_ptr<DisassemblyInfo>(nullptr));
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}
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string opName[256] = {
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// 0 1 2 3 4 5 6 7 8 9 A B C D E F
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"BRK", "ORA", "", "", "NOP", "ORA", "ASL", "", "PHP", "ORA", "ASL", "", "NOP", "ORA", "ASL", "", //0
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"BPL", "ORA", "", "", "NOP", "ORA", "ASL", "", "CLC", "ORA", "", "", "NOP", "ORA", "ASL", "", //1
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"JSR", "AND", "", "", "BIT", "AND", "ROL", "", "PLP", "AND", "ROL", "", "BIT", "AND", "ROL", "", //2
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"BMI", "AND", "", "", "NOP", "AND", "ROL", "", "SEC", "AND", "", "", "NOP", "AND", "ROL", "", //3
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"RTI", "EOR", "", "", "NOP", "EOR", "LSR", "", "PHA", "EOR", "LSR", "", "JMP", "EOR", "LSR", "", //4
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"BVC", "EOR", "", "", "NOP", "EOR", "LSR", "", "CLI", "EOR", "", "", "NOP", "EOR", "LSR", "", //5
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"RTS", "ADC", "", "", "NOP", "ADC", "ROR", "", "PLA", "ADC", "ROR", "", "JMP", "ADC", "ROR", "", //6
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"BVS", "ADC", "", "", "NOP", "ADC", "ROR", "", "SEI", "ADC", "", "", "NOP", "ADC", "ROR", "", //7
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"NOP", "STA", "NOP", "", "STY", "STA", "STX", "", "DEY", "NOP", "TXA", "", "STY", "STA", "STX", "", //8
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"BCC", "STA", "", "", "STY", "STA", "STX", "", "TYA", "STA", "TXS", "", "", "STA", "", "", //9
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"LDY", "LDA", "LDX", "", "LDY", "LDA", "LDX", "", "TAY", "LDA", "TAX", "", "LDY", "LDA", "LDX", "", //A
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"BCS", "LDA", "", "", "LDY", "LDA", "LDX", "", "CLV", "LDA", "TSX", "", "LDY", "LDA", "LDX", "", //B
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"CPY", "CPA", "NOP", "", "CPY", "CPA", "DEC", "", "INY", "CPA", "DEX", "", "CPY", "CPA", "DEC", "", //C
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"BNE", "CPA", "", "", "NOP", "CPA", "DEC", "", "CLD", "CPA", "", "", "NOP", "CPA", "DEC", "", //D
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"CPX", "SBC", "NOP", "", "CPX", "SBC", "INC", "", "INX", "SBC", "NOP", "", "CPX", "SBC", "INC", "", //E
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"BEQ", "SBC", "", "", "NOP", "SBC", "INC", "", "SED", "SBC", "", "", "NOP", "SBC", "INC", "" //F
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};
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AddrMode opMode[256] = {
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Imp, IndX, None, IndX, Zero, Zero, Zero, Zero, Imp, Imm, Acc, Imm, Abs, Abs, Abs, Abs,
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Rel, IndY, None, IndYW, ZeroX, ZeroX, ZeroX, ZeroX, Imp, AbsY, Imp, AbsYW, AbsX, AbsX, AbsXW, AbsXW,
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Abs, IndX, None, IndX, Zero, Zero, Zero, Zero, Imp, Imm, Acc, Imm, Abs, Abs, Abs, Abs,
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Rel, IndY, None, IndYW, ZeroX, ZeroX, ZeroX, ZeroX, Imp, AbsY, Imp, AbsYW, AbsX, AbsX, AbsXW, AbsXW,
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Imp, IndX, None, IndX, Zero, Zero, Zero, Zero, Imp, Imm, Acc, Imm, Abs, Abs, Abs, Abs,
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Rel, IndY, None, IndYW, ZeroX, ZeroX, ZeroX, ZeroX, Imp, AbsY, Imp, AbsYW, AbsX, AbsX, AbsXW, AbsXW,
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Imp, IndX, None, IndX, Zero, Zero, Zero, Zero, Imp, Imm, Acc, Imm, Ind, Abs, Abs, Abs,
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Rel, IndY, None, IndYW, ZeroX, ZeroX, ZeroX, ZeroX, Imp, AbsY, Imp, AbsYW, AbsX, AbsX, AbsXW, AbsXW,
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Imm, IndX, Imm, IndX, Zero, Zero, Zero, Zero, Imp, Imm, Imp, Imm, Abs, Abs, Abs, Abs,
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Rel, IndYW, None, IndY, ZeroX, ZeroX, ZeroY, ZeroY, Imp, AbsYW, Imp, AbsY, AbsXW, AbsXW, AbsYW, AbsY,
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Imm, IndX, Imm, IndX, Zero, Zero, Zero, Zero, Imp, Imm, Imp, Imm, Abs, Abs, Abs, Abs,
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Rel, IndY, None, IndY, ZeroX, ZeroX, ZeroY, ZeroY, Imp, AbsY, Imp, AbsY, AbsX, AbsX, AbsY, AbsY,
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Imm, IndX, Imm, IndX, Zero, Zero, Zero, Zero, Imp, Imm, Imp, Imm, Abs, Abs, Abs, Abs,
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Rel, IndY, None, IndYW, ZeroX, ZeroX, ZeroX, ZeroX, Imp, AbsY, Imp, AbsYW, AbsX, AbsX, AbsXW, AbsXW,
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Imm, IndX, Imm, IndX, Zero, Zero, Zero, Zero, Imp, Imm, Imp, Imm, Abs, Abs, Abs, Abs,
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Rel, IndY, None, IndYW, ZeroX, ZeroX, ZeroX, ZeroX, Imp, AbsY, Imp, AbsYW, AbsX, AbsX, AbsXW, AbsXW,
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};
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for(int i = 0; i < 256; i++) {
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DisassemblyInfo::OPName[i] = opName[i];
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DisassemblyInfo::OPMode[i] = opMode[i];
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switch(DisassemblyInfo::OPMode[i]) {
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case AddrMode::Abs:
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case AddrMode::AbsX:
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case AddrMode::AbsXW:
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case AddrMode::AbsY:
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case AddrMode::AbsYW:
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case AddrMode::Ind:
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DisassemblyInfo::OPSize[i] = 3;
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break;
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case AddrMode::Imm:
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case AddrMode::IndX:
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case AddrMode::IndY:
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case AddrMode::IndYW:
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case AddrMode::Rel:
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case AddrMode::Zero:
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case AddrMode::ZeroX:
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case AddrMode::ZeroY:
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DisassemblyInfo::OPSize[i] = 2;
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break;
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default:
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DisassemblyInfo::OPSize[i] = 1;
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break;
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}
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}
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}
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Disassembler::~Disassembler()
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{
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if(_prgROM) {
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delete[] _prgROM;
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}
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}
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uint32_t Disassembler::BuildCache(uint32_t absoluteAddr, uint16_t memoryAddr)
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{
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if(memoryAddr < 0x2000) {
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memoryAddr = memoryAddr & 0x7FF;
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if(!_disassembleMemoryCache[memoryAddr]) {
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shared_ptr<DisassemblyInfo> disInfo(new DisassemblyInfo(&_internalRAM[memoryAddr]));
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_disassembleMemoryCache[memoryAddr] = disInfo;
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memoryAddr += disInfo->GetSize();
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}
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return memoryAddr;
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} else {
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if(!_disassembleCache[absoluteAddr]) {
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while(absoluteAddr < _prgSize && !_disassembleCache[absoluteAddr]) {
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shared_ptr<DisassemblyInfo> disInfo(new DisassemblyInfo(&_prgROM[absoluteAddr]));
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_disassembleCache[absoluteAddr] = disInfo;
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uint8_t opCode = _prgROM[absoluteAddr];
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absoluteAddr += disInfo->GetSize();
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if(opCode == 0x10 || opCode == 0x20 || opCode == 0x30 || opCode == 0x40 || opCode == 0x50 || opCode == 0x60 || opCode == 0x70 || opCode == 0x90 || opCode == 0xB0 || opCode == 0xD0 || opCode == 0xF0 || opCode == 0x4C || opCode == 0x6C) {
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//Hit a jump/return instruction, can't assume that what follows is actual code, stop disassembling
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break;
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}
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}
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} else {
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absoluteAddr += _disassembleCache[absoluteAddr]->GetSize();
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}
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return absoluteAddr;
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}
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}
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string Disassembler::GetRAMCode()
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{
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std::ostringstream output;
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uint32_t addr = 0x0000;
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uint32_t byteCount = 0;
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while(addr < 0x2000) {
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shared_ptr<DisassemblyInfo> info;
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if(info = _disassembleMemoryCache[addr&0x7FF]) {
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if(byteCount > 0) {
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output << "\n";
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byteCount = 0;
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}
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output << std::hex << std::uppercase << addr << ":" << info->ToString(addr) << "\n";
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addr += info->GetSize();
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} else {
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if(byteCount >= 8) {
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output << "\n";
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byteCount = 0;
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}
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if(byteCount == 0) {
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output << std::hex << std::uppercase << addr << ":" << ".db";
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}
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output << std::hex << " $" << std::setfill('0') << std::setw(2) << (short)_internalRAM[addr];
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byteCount++;
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addr++;
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}
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}
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output << "\n1FFF:--END OF INTERNAL RAM--\n";
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return output.str();
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}
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string Disassembler::GetCode(uint32_t startAddr, uint32_t endAddr, uint16_t &memoryAddr)
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{
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std::ostringstream output;
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uint32_t addr = startAddr;
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uint32_t byteCount = 0;
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while(addr <= endAddr) {
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shared_ptr<DisassemblyInfo> info;
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if(info = _disassembleCache[addr]) {
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if(byteCount > 0) {
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output << "\n";
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byteCount = 0;
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}
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output << std::hex << std::uppercase << memoryAddr << ":" << addr << ":" << info->ToString(memoryAddr) << "\n";
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addr += info->GetSize();
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memoryAddr += info->GetSize();
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} else {
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if(byteCount >= 8) {
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output << "\n";
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byteCount = 0;
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}
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if(byteCount == 0) {
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output << std::hex << std::uppercase << memoryAddr << ":" << addr << "::" << ".db";
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}
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output << std::hex << " $" << std::setfill('0') << std::setw(2) << (short)_prgROM[addr];
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byteCount++;
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addr++;
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memoryAddr++;
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}
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}
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output << "\n";
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return output.str();
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}
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shared_ptr<DisassemblyInfo> Disassembler::GetDisassemblyInfo(uint32_t address)
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{
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return _disassembleCache[address];
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} |