mirror of
https://github.com/libretro/Mesen.git
synced 2024-11-23 09:09:45 +00:00
f540fc766d
Fixes dmc_pitch without breaking sprdma_and_dmc_dma tests.
918 lines
21 KiB
C++
918 lines
21 KiB
C++
#pragma once
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#include "stdafx.h"
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#include "MemoryManager.h"
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#include "PPU.h"
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#include "Snapshotable.h"
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#include "TraceLogger.h"
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namespace PSFlags
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{
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enum PSFlags : uint8_t
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{
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Carry = 0x01,
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Zero = 0x02,
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Interrupt = 0x04,
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Decimal = 0x08,
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Break = 0x10,
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Reserved = 0x20,
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Overflow = 0x40,
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Negative = 0x80
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};
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}
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enum AddrMode
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{
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None, Acc, Imp, Imm, Rel,
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Zero, ZeroX, ZeroY,
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Ind, IndX, IndY, IndYW,
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Abs, AbsX, AbsXW, AbsY, AbsYW
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};
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enum class IRQSource
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{
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External = 1,
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FrameCounter = 2,
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DMC = 4,
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FdsDisk = 8,
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};
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struct State
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{
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uint16_t PC = 0;
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uint8_t SP = 0;
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uint8_t A = 0;
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uint8_t X = 0;
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uint8_t Y = 0;
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uint8_t PS = 0;
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uint32_t IRQFlag = 0;
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int32_t CycleCount;
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bool NMIFlag = false;
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//Used by debugger
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uint16_t DebugPC = 0;
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};
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class CPU : public Snapshotable
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{
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private:
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static const uint16_t NMIVector = 0xFFFA;
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static const uint16_t ResetVector = 0xFFFC;
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static const uint16_t IRQVector = 0xFFFE;
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static CPU* Instance;
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typedef void(CPU::*Func)();
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int32_t _cycleCount;
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uint16_t _operand;
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Func _opTable[256];
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AddrMode _addrMode[256];
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AddrMode _instAddrMode;
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uint16_t _spriteDmaCounter;
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bool _spriteDmaTransfer;
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int8_t _dmcCounter;
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bool _dmcDmaRunning;
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bool _cpuWrite = false;
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uint16_t _writeAddr = 0;
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State _state;
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MemoryManager *_memoryManager = nullptr;
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bool _prevRunIrq = false;
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bool _runIrq = false;
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void IncCycleCount();
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uint8_t GetOPCode()
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{
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_state.DebugPC = _state.PC;
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uint8_t opCode = MemoryRead(_state.PC, MemoryOperationType::ExecOpCode);
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_state.PC++;
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return opCode;
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}
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void DummyRead()
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{
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MemoryRead(_state.PC, MemoryOperationType::Read);
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}
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uint8_t ReadByte()
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{
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return MemoryRead(_state.PC++, MemoryOperationType::ExecOperand);
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}
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uint16_t ReadWord()
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{
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uint16_t value = MemoryReadWord(_state.PC, MemoryOperationType::ExecOperand);
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_state.PC += 2;
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return value;
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}
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void ClearFlags(uint8_t flags)
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{
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_state.PS &= ~flags;
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}
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void SetFlags(uint8_t flags)
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{
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_state.PS |= flags;
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}
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bool CheckFlag(uint8_t flag)
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{
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return (_state.PS & flag) == flag;
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}
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void SetZeroNegativeFlags(uint8_t value)
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{
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if(value == 0) {
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SetFlags(PSFlags::Zero);
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} else if(value & 0x80) {
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SetFlags(PSFlags::Negative);
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}
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}
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bool CheckPageCrossed(uint16_t valA, int8_t valB)
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{
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return ((valA + valB) & 0xFF00) != (valA & 0xFF00);
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}
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bool CheckPageCrossed(uint16_t valA, uint8_t valB)
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{
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return ((valA + valB) & 0xFF00) != (valA & 0xFF00);
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}
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void MemoryWrite(uint16_t addr, uint8_t value)
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{
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_cpuWrite = true;;
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_writeAddr = addr;
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IncCycleCount();
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while(_dmcDmaRunning) {
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IncCycleCount();
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}
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_memoryManager->Write(addr, value);
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//DMA DMC might have started after a write to $4015, stall CPU if needed
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while (_dmcDmaRunning) {
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IncCycleCount();
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}
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_cpuWrite = false;
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}
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uint8_t MemoryRead(uint16_t addr, MemoryOperationType operationType = MemoryOperationType::Read) {
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IncCycleCount();
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while(_dmcDmaRunning) {
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//Stall CPU until we can process a DMC read
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if((addr != 0x4016 && addr != 0x4017 && (_cycleCount & 0x01)) || _dmcCounter == 1) {
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//While the CPU is stalled, reads are performed on the current address
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//Reads are only performed every other cycle? This fixes "dma_2007_read" test
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//This behavior causes the $4016/7 data corruption when a DMC is running.
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//When reading $4016/7, only the last read counts (because this only occurs to low-to-high transitions, i.e once in this case)
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_memoryManager->Read(addr);
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}
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IncCycleCount();
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}
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uint8_t value = _memoryManager->Read(addr, operationType);
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return value;
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}
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uint16_t MemoryReadWord(uint16_t addr, MemoryOperationType operationType = MemoryOperationType::Read) {
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uint8_t lo = MemoryRead(addr, operationType);
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uint8_t hi = MemoryRead(addr + 1, operationType);
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return lo | hi << 8;
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}
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void SetRegister(uint8_t ®, uint8_t value) {
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ClearFlags(PSFlags::Zero | PSFlags::Negative);
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SetZeroNegativeFlags(value);
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reg = value;
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}
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void Push(uint8_t value) {
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MemoryWrite(SP() + 0x100, value);
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SetSP(SP() - 1);
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}
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void Push(uint16_t value) {
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Push((uint8_t)(value >> 8));
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Push((uint8_t)value);
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}
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uint8_t Pop() {
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SetSP(SP() + 1);
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return MemoryRead(0x100 + SP());
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}
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uint16_t PopWord() {
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uint8_t lo = Pop();
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uint8_t hi = Pop();
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return lo | hi << 8;
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}
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uint8_t A() { return _state.A; }
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void SetA(uint8_t value) { SetRegister(_state.A, value); }
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uint8_t X() { return _state.X; }
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void SetX(uint8_t value) { SetRegister(_state.X, value); }
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uint8_t Y() { return _state.Y; }
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void SetY(uint8_t value) { SetRegister(_state.Y, value); }
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uint8_t SP() { return _state.SP; }
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void SetSP(uint8_t value) { _state.SP = value; }
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uint8_t PS() { return _state.PS; }
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void SetPS(uint8_t value) { _state.PS = (value & 0xCF) | PSFlags::Reserved; }
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uint16_t PC() { return _state.PC; }
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void SetPC(uint16_t value) { _state.PC = value; }
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uint16_t FetchOperand()
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{
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switch(_instAddrMode) {
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case AddrMode::Acc:
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case AddrMode::Imp: DummyRead(); return 0;
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case AddrMode::Imm:
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case AddrMode::Rel: return GetImmediate();
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case AddrMode::Zero: return GetZeroAddr();
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case AddrMode::ZeroX: return GetZeroXAddr();
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case AddrMode::ZeroY: return GetZeroYAddr();
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case AddrMode::Ind: return GetIndAddr();
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case AddrMode::IndX: return GetIndXAddr();
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case AddrMode::IndY: return GetIndYAddr(false);
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case AddrMode::IndYW: return GetIndYAddr(true);
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case AddrMode::Abs: return GetAbsAddr();
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case AddrMode::AbsX: return GetAbsXAddr(false);
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case AddrMode::AbsXW: return GetAbsXAddr(true);
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case AddrMode::AbsY: return GetAbsYAddr(false);
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case AddrMode::AbsYW: return GetAbsYAddr(true);
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default: break;
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}
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throw std::runtime_error("Invalid OP code - CPU crashed");
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}
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uint16_t GetOperand()
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{
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return _operand;
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}
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uint8_t GetOperandValue()
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{
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if(_instAddrMode >= AddrMode::Zero) {
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return MemoryRead(GetOperand());
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} else {
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return (uint8_t)GetOperand();
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}
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}
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uint16_t GetIndAddr() { return ReadWord(); }
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uint8_t GetImmediate() { return ReadByte(); }
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uint8_t GetZeroAddr() { return ReadByte(); }
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uint8_t GetZeroXAddr() {
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uint8_t value = ReadByte();
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MemoryRead(value); //Dummy read
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return value + X();
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}
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uint8_t GetZeroYAddr() {
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uint8_t value = ReadByte();
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MemoryRead(value); //Dummy read
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return value + Y();
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}
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uint16_t GetAbsAddr() { return ReadWord(); }
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uint16_t GetAbsXAddr(bool dummyRead = true) {
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uint16_t baseAddr = ReadWord();
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bool pageCrossed = CheckPageCrossed(baseAddr, X());
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if(pageCrossed || dummyRead) {
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//Dummy read done by the processor (only when page is crossed for READ instructions)
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MemoryRead(baseAddr + X() - (pageCrossed ? 0x100 : 0));
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}
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return baseAddr + X();
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}
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uint16_t GetAbsYAddr(bool dummyRead = true) {
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uint16_t baseAddr = ReadWord();
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bool pageCrossed = CheckPageCrossed(baseAddr, Y());
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if(pageCrossed || dummyRead) {
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//Dummy read done by the processor (only when page is crossed for READ instructions)
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MemoryRead(baseAddr + Y() - (pageCrossed ? 0x100 : 0));
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}
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return baseAddr + Y();
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}
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uint16_t GetInd() {
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uint16_t addr = GetOperand();
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if((addr & 0xFF) == 0xFF) {
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auto lo = MemoryRead(addr);
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auto hi = MemoryRead(addr - 0xFF);
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return (lo | hi << 8);
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} else {
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return MemoryReadWord(addr);
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}
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}
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uint16_t GetIndXAddr() {
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uint8_t zero = ReadByte();
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//Dummy read
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MemoryRead(zero);
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zero += X();
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uint16_t addr;
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if(zero == 0xFF) {
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addr = MemoryRead(0xFF) | MemoryRead(0x00) << 8;
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} else {
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addr = MemoryReadWord(zero);
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}
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return addr;
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}
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uint16_t GetIndYAddr(bool dummyRead = true) {
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uint8_t zero = ReadByte();
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uint16_t addr;
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if(zero == 0xFF) {
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addr = MemoryRead(0xFF) | MemoryRead(0x00) << 8;
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} else {
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addr = MemoryReadWord(zero);
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}
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bool pageCrossed = CheckPageCrossed(addr, Y());
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if(pageCrossed || dummyRead) {
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//Dummy read done by the processor (only when page is crossed for READ instructions)
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MemoryRead(addr + Y() - (pageCrossed ? 0x100 : 0));
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}
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return addr + Y();
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}
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void AND() { SetA(A() & GetOperandValue()); }
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void EOR() { SetA(A() ^ GetOperandValue()); }
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void ORA() { SetA(A() | GetOperandValue()); }
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void ADD(uint8_t value)
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{
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uint16_t result = (uint16_t)A() + (uint16_t)value + (CheckFlag(PSFlags::Carry) ? PSFlags::Carry : 0x00);
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ClearFlags(PSFlags::Carry | PSFlags::Negative | PSFlags::Overflow | PSFlags::Zero);
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SetZeroNegativeFlags((uint8_t)result);
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if(~(A() ^ value) & (A() ^ result) & 0x80) {
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SetFlags(PSFlags::Overflow);
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}
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if(result > 0xFF) {
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SetFlags(PSFlags::Carry);
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}
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SetA((uint8_t)result);
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}
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void ADC() { ADD(GetOperandValue()); }
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void SBC() { ADD(GetOperandValue() ^ 0xFF); }
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void CMP(uint8_t reg, uint8_t value)
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{
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ClearFlags(PSFlags::Carry | PSFlags::Negative | PSFlags::Zero);
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auto result = reg - value;
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if(reg >= value) {
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SetFlags(PSFlags::Carry);
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}
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if(reg == value) {
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SetFlags(PSFlags::Zero);
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}
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if((result & 0x80) == 0x80) {
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SetFlags(PSFlags::Negative);
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}
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}
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void CPA() { CMP(A(), GetOperandValue()); }
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void CPX() { CMP(X(), GetOperandValue()); }
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void CPY() { CMP(Y(), GetOperandValue()); }
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void INC()
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{
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uint16_t addr = GetOperand();
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ClearFlags(PSFlags::Negative | PSFlags::Zero);
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uint8_t value = MemoryRead(addr);
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MemoryWrite(addr, value); //Dummy write
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value++;
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SetZeroNegativeFlags(value);
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MemoryWrite(addr, value);
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}
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void DEC()
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{
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uint16_t addr = GetOperand();
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ClearFlags(PSFlags::Negative | PSFlags::Zero);
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uint8_t value = MemoryRead(addr);
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MemoryWrite(addr, value); //Dummy write
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value--;
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SetZeroNegativeFlags(value);
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MemoryWrite(addr, value);
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}
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uint8_t ASL(uint8_t value)
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{
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ClearFlags(PSFlags::Carry | PSFlags::Negative | PSFlags::Zero);
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if(value & 0x80) {
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SetFlags(PSFlags::Carry);
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}
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uint8_t result = value << 1;
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SetZeroNegativeFlags(result);
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return result;
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}
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uint8_t LSR(uint8_t value) {
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ClearFlags(PSFlags::Carry | PSFlags::Negative | PSFlags::Zero);
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if(value & 0x01) {
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SetFlags(PSFlags::Carry);
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}
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uint8_t result = value >> 1;
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SetZeroNegativeFlags(result);
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return value >> 1;
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}
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uint8_t ROL(uint8_t value) {
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bool carryFlag = CheckFlag(PSFlags::Carry);
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ClearFlags(PSFlags::Carry | PSFlags::Negative | PSFlags::Zero);
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if(value & 0x80) {
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SetFlags(PSFlags::Carry);
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}
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uint8_t result = (value << 1 | (carryFlag ? 0x01 : 0x00));
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SetZeroNegativeFlags(result);
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return result;
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}
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uint8_t ROR(uint8_t value) {
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bool carryFlag = CheckFlag(PSFlags::Carry);
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ClearFlags(PSFlags::Carry | PSFlags::Negative | PSFlags::Zero);
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if(value & 0x01) {
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SetFlags(PSFlags::Carry);
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}
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uint8_t result = (value >> 1 | (carryFlag ? 0x80 : 0x00));
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SetZeroNegativeFlags(result);
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return result;
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}
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void ASLAddr() {
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uint16_t addr = GetOperand();
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uint8_t value = MemoryRead(addr);
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MemoryWrite(addr, value); //Dummy write
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MemoryWrite(addr, ASL(value));
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}
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void LSRAddr() {
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uint16_t addr = GetOperand();
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uint8_t value = MemoryRead(addr);
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MemoryWrite(addr, value); //Dummy write
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MemoryWrite(addr, LSR(value));
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}
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void ROLAddr() {
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uint16_t addr = GetOperand();
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uint8_t value = MemoryRead(addr);
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MemoryWrite(addr, value); //Dummy write
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MemoryWrite(addr, ROL(value));
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}
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void RORAddr() {
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uint16_t addr = GetOperand();
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uint8_t value = MemoryRead(addr);
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MemoryWrite(addr, value); //Dummy write
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MemoryWrite(addr, ROR(value));
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}
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void JMP(uint16_t addr) {
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SetPC(addr);
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}
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void BranchRelative(bool branch) {
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int8_t offset = (int8_t)GetOperand();
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if(branch) {
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//"a taken non-page-crossing branch ignores IRQ/NMI during its last clock, so that next instruction executes before the IRQ"
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//Fixes "branch_delays_irq" test
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bool skipIrq = false;
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if(_runIrq && !_prevRunIrq) {
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_runIrq = false;
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}
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DummyRead();
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if(CheckPageCrossed(PC(), offset)) {
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DummyRead();
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}
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SetPC(PC() + offset);
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}
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}
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void BIT() {
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uint8_t value = GetOperandValue();
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ClearFlags(PSFlags::Zero | PSFlags::Overflow | PSFlags::Negative);
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if((A() & value) == 0) {
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SetFlags(PSFlags::Zero);
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}
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if(value & 0x40) {
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SetFlags(PSFlags::Overflow);
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}
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if(value & 0x80) {
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SetFlags(PSFlags::Negative);
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}
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}
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//OP Codes
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void LDA() { SetA(GetOperandValue()); }
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void LDX() { SetX(GetOperandValue()); }
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void LDY() { SetY(GetOperandValue()); }
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void STA() { MemoryWrite(GetOperand(), A()); }
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void STX() { MemoryWrite(GetOperand(), X()); }
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void STY() { MemoryWrite(GetOperand(), Y()); }
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void TAX() { SetX(A()); }
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void TAY() { SetY(A()); }
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void TSX() { SetX(SP()); }
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void TXA() { SetA(X()); }
|
|
void TXS() { SetSP(X()); }
|
|
void TYA() { SetA(Y()); }
|
|
|
|
void PHA() { Push(A()); }
|
|
void PHP() {
|
|
uint8_t flags = PS() | PSFlags::Break;
|
|
Push((uint8_t)flags);
|
|
}
|
|
void PLA() {
|
|
DummyRead();
|
|
SetA(Pop());
|
|
}
|
|
void PLP() {
|
|
DummyRead();
|
|
SetPS(Pop());
|
|
}
|
|
|
|
void INX() { SetX(X() + 1); }
|
|
void INY() { SetY(Y() + 1); }
|
|
|
|
void DEX() { SetX(X() - 1); }
|
|
void DEY() { SetY(Y() - 1); }
|
|
|
|
void ASL_Acc() { SetA(ASL(A())); }
|
|
void ASL_Memory() { ASLAddr(); }
|
|
|
|
void LSR_Acc() { SetA(LSR(A())); }
|
|
void LSR_Memory() { LSRAddr(); }
|
|
|
|
void ROL_Acc() { SetA(ROL(A())); }
|
|
void ROL_Memory() { ROLAddr(); }
|
|
|
|
void ROR_Acc() { SetA(ROR(A())); }
|
|
void ROR_Memory() { RORAddr(); }
|
|
|
|
void JMP_Abs() {
|
|
JMP(GetOperand());
|
|
}
|
|
void JMP_Ind() { JMP(GetInd()); }
|
|
void JSR() {
|
|
uint16_t addr = GetOperand();
|
|
DummyRead();
|
|
Push((uint16_t)(PC() - 1));
|
|
JMP(addr);
|
|
}
|
|
void RTS() {
|
|
uint16_t addr = PopWord();
|
|
DummyRead();
|
|
DummyRead();
|
|
SetPC(addr + 1);
|
|
}
|
|
|
|
void BCC() {
|
|
BranchRelative(!CheckFlag(PSFlags::Carry));
|
|
}
|
|
|
|
void BCS() {
|
|
BranchRelative(CheckFlag(PSFlags::Carry));
|
|
}
|
|
|
|
void BEQ() {
|
|
BranchRelative(CheckFlag(PSFlags::Zero));
|
|
}
|
|
|
|
void BMI() {
|
|
BranchRelative(CheckFlag(PSFlags::Negative));
|
|
}
|
|
|
|
void BNE() {
|
|
BranchRelative(!CheckFlag(PSFlags::Zero));
|
|
}
|
|
|
|
void BPL() {
|
|
BranchRelative(!CheckFlag(PSFlags::Negative));
|
|
}
|
|
|
|
void BVC() {
|
|
BranchRelative(!CheckFlag(PSFlags::Overflow));
|
|
}
|
|
|
|
void BVS() {
|
|
BranchRelative(CheckFlag(PSFlags::Overflow));
|
|
}
|
|
|
|
void CLC() { ClearFlags(PSFlags::Carry); }
|
|
void CLD() { ClearFlags(PSFlags::Decimal); }
|
|
void CLI() { ClearFlags(PSFlags::Interrupt); }
|
|
void CLV() { ClearFlags(PSFlags::Overflow); }
|
|
void SEC() { SetFlags(PSFlags::Carry); }
|
|
void SED() { SetFlags(PSFlags::Decimal); }
|
|
void SEI() { SetFlags(PSFlags::Interrupt); }
|
|
|
|
void BRK() {
|
|
Push((uint16_t)(PC() + 1));
|
|
|
|
uint8_t flags = PS() | PSFlags::Break;
|
|
if(_state.NMIFlag) {
|
|
Push((uint8_t)flags);
|
|
SetFlags(PSFlags::Interrupt);
|
|
|
|
SetPC(MemoryReadWord(CPU::NMIVector));
|
|
|
|
TraceLogger::LogStatic("NMI");
|
|
} else {
|
|
Push((uint8_t)flags);
|
|
SetFlags(PSFlags::Interrupt);
|
|
|
|
SetPC(MemoryReadWord(CPU::IRQVector));
|
|
|
|
TraceLogger::LogStatic("IRQ");
|
|
}
|
|
|
|
//Since we just set the flag to prevent interrupts, do not run one right away after this (fixes nmi_and_brk & nmi_and_irq tests)
|
|
_prevRunIrq = false;
|
|
}
|
|
|
|
void IRQ() {
|
|
DummyRead(); //fetch opcode (and discard it - $00 (BRK) is forced into the opcode register instead)
|
|
DummyRead(); //read next instruction byte (actually the same as above, since PC increment is suppressed. Also discarded.)
|
|
Push((uint16_t)(PC()));
|
|
|
|
if(_state.NMIFlag) {
|
|
Push((uint8_t)PS());
|
|
SetFlags(PSFlags::Interrupt);
|
|
|
|
SetPC(MemoryReadWord(CPU::NMIVector));
|
|
_state.NMIFlag = false;
|
|
|
|
TraceLogger::LogStatic("NMI");
|
|
} else {
|
|
Push((uint8_t)PS());
|
|
SetFlags(PSFlags::Interrupt);
|
|
SetPC(MemoryReadWord(CPU::IRQVector));
|
|
|
|
TraceLogger::LogStatic("IRQ");
|
|
}
|
|
}
|
|
|
|
void RTI() {
|
|
DummyRead();
|
|
SetPS(Pop());
|
|
SetPC(PopWord());
|
|
}
|
|
|
|
void NOP() {
|
|
//Make sure the nop operation takes as many cycles as meant to
|
|
GetOperandValue();
|
|
}
|
|
|
|
|
|
//Unofficial OpCodes
|
|
void SLO()
|
|
{
|
|
//ASL & ORA
|
|
uint8_t value = GetOperandValue();
|
|
MemoryWrite(GetOperand(), value); //Dummy write
|
|
uint8_t shiftedValue = ASL(value);
|
|
SetA(A() | shiftedValue);
|
|
MemoryWrite(GetOperand(), shiftedValue);
|
|
}
|
|
|
|
void SRE()
|
|
{
|
|
//ROL & AND
|
|
uint8_t value = GetOperandValue();
|
|
MemoryWrite(GetOperand(), value); //Dummy write
|
|
uint8_t shiftedValue = LSR(value);
|
|
SetA(A() ^ shiftedValue);
|
|
MemoryWrite(GetOperand(), shiftedValue);
|
|
}
|
|
|
|
void RLA()
|
|
{
|
|
//LSR & EOR
|
|
uint8_t value = GetOperandValue();
|
|
MemoryWrite(GetOperand(), value); //Dummy write
|
|
uint8_t shiftedValue = ROL(value);
|
|
SetA(A() & shiftedValue);
|
|
MemoryWrite(GetOperand(), shiftedValue);
|
|
}
|
|
|
|
void RRA()
|
|
{
|
|
//ROR & ADC
|
|
uint8_t value = GetOperandValue();
|
|
MemoryWrite(GetOperand(), value); //Dummy write
|
|
uint8_t shiftedValue = ROR(value);
|
|
ADD(shiftedValue);
|
|
MemoryWrite(GetOperand(), shiftedValue);
|
|
}
|
|
|
|
void SAX()
|
|
{
|
|
//STA & STX
|
|
MemoryWrite(GetOperand(), A() & X());
|
|
}
|
|
|
|
void LAX()
|
|
{
|
|
//LDA & LDX
|
|
uint8_t value = GetOperandValue();
|
|
SetX(value);
|
|
SetA(value);
|
|
}
|
|
|
|
void DCP()
|
|
{
|
|
//DEC & CMP
|
|
uint8_t value = GetOperandValue();
|
|
MemoryWrite(GetOperand(), value); //Dummy write
|
|
value--;
|
|
CMP(A(), value);
|
|
MemoryWrite(GetOperand(), value);
|
|
}
|
|
|
|
void ISB()
|
|
{
|
|
//INC & SBC
|
|
uint8_t value = GetOperandValue();
|
|
MemoryWrite(GetOperand(), value); //Dummy write
|
|
value++;
|
|
ADD(value ^ 0xFF);
|
|
MemoryWrite(GetOperand(), value);
|
|
}
|
|
|
|
void AAC()
|
|
{
|
|
SetA(A() & GetOperandValue());
|
|
|
|
ClearFlags(PSFlags::Carry);
|
|
if(CheckFlag(PSFlags::Negative)) {
|
|
SetFlags(PSFlags::Carry);
|
|
}
|
|
}
|
|
|
|
void ASR()
|
|
{
|
|
ClearFlags(PSFlags::Carry);
|
|
SetA(A() & GetOperandValue());
|
|
if(A() & 0x01) {
|
|
SetFlags(PSFlags::Carry);
|
|
}
|
|
SetA(A() >> 1);
|
|
}
|
|
|
|
void ARR()
|
|
{
|
|
SetA(((A() & GetOperandValue()) >> 1) | (CheckFlag(PSFlags::Carry) ? 0x80 : 0x00));
|
|
ClearFlags(PSFlags::Carry | PSFlags::Overflow);
|
|
if(A() & 0x40) {
|
|
SetFlags(PSFlags::Carry);
|
|
}
|
|
if((CheckFlag(PSFlags::Carry) ? 0x01 : 0x00) ^ ((A() >> 5) & 0x01)) {
|
|
SetFlags(PSFlags::Overflow);
|
|
}
|
|
}
|
|
|
|
void ATX()
|
|
{
|
|
//LDA & TAX
|
|
uint8_t value = GetOperandValue();
|
|
SetA(value); //LDA
|
|
SetX(A()); //TAX
|
|
SetA(A()); //Update flags based on A
|
|
}
|
|
|
|
void AXS()
|
|
{
|
|
//CMP & DEX
|
|
uint8_t opValue = GetOperandValue();
|
|
uint8_t value = (A() & X()) - opValue;
|
|
|
|
ClearFlags(PSFlags::Carry);
|
|
if((A() & X()) >= opValue) {
|
|
SetFlags(PSFlags::Carry);
|
|
}
|
|
|
|
SetX(value);
|
|
}
|
|
|
|
void SYA()
|
|
{
|
|
uint8_t addrHigh = GetOperand() >> 8;
|
|
uint8_t addrLow = GetOperand() & 0xFF;
|
|
uint8_t value = Y() & (addrHigh + 1);
|
|
|
|
//From here: http://forums.nesdev.com/viewtopic.php?f=3&t=3831&start=30
|
|
//Unsure if this is accurate or not
|
|
//"the target address for e.g. SYA becomes ((y & (addr_high + 1)) << 8) | addr_low instead of the normal ((addr_high + 1) << 8) | addr_low"
|
|
MemoryWrite(((Y() & (addrHigh + 1)) << 8) | addrLow, value);
|
|
}
|
|
|
|
void SXA()
|
|
{
|
|
uint8_t addrHigh = GetOperand() >> 8;
|
|
uint8_t addrLow = GetOperand() & 0xFF;
|
|
uint8_t value = X() & (addrHigh + 1);
|
|
MemoryWrite(((X() & (addrHigh + 1)) << 8) | addrLow, value);
|
|
}
|
|
|
|
//Unimplemented/Incorrect Unofficial OP codes
|
|
void HLT()
|
|
{
|
|
//normally freezes the cpu, we can probably assume nothing will ever call this
|
|
GetOperandValue();
|
|
}
|
|
|
|
void UNK()
|
|
{
|
|
//Make sure we take the right amount of cycles (not reliable for operations that write to memory, etc.)
|
|
GetOperandValue();
|
|
}
|
|
|
|
void AXA()
|
|
{
|
|
uint16_t addr = GetOperand();
|
|
|
|
//"This opcode stores the result of A AND X AND the high byte of the target address of the operand +1 in memory."
|
|
//This may not be the actual behavior, but the read/write operations are needed for proper cycle counting
|
|
MemoryWrite(GetOperand(), ((addr >> 8) + 1) & A() & X());
|
|
}
|
|
|
|
void TAS()
|
|
{
|
|
//"AND X register with accumulator and store result in stack
|
|
//pointer, then AND stack pointer with the high byte of the
|
|
//target address of the argument + 1. Store result in memory."
|
|
uint16_t addr = GetOperand();
|
|
SetSP(X() & A());
|
|
MemoryWrite(addr, SP() & ((addr >> 8) + 1));
|
|
}
|
|
|
|
void LAS()
|
|
{
|
|
//"AND memory with stack pointer, transfer result to accumulator, X register and stack pointer."
|
|
uint8_t value = GetOperandValue();
|
|
SetA(value & SP());
|
|
SetX(A());
|
|
SetSP(A());
|
|
}
|
|
|
|
protected:
|
|
void StreamState(bool saving);
|
|
|
|
public:
|
|
static const uint32_t ClockRateNtsc = 1789773;
|
|
static const uint32_t ClockRatePal = 1662607;
|
|
static const uint32_t ClockRateDendy = 1773448;
|
|
|
|
CPU(MemoryManager *memoryManager);
|
|
static int32_t GetCycleCount() { return CPU::Instance->_cycleCount; }
|
|
static void SetNMIFlag() { CPU::Instance->_state.NMIFlag = true; }
|
|
static void ClearNMIFlag() { CPU::Instance->_state.NMIFlag = false; }
|
|
static void SetIRQSource(IRQSource source) { CPU::Instance->_state.IRQFlag |= (int)source; }
|
|
static bool HasIRQSource(IRQSource source) { return (CPU::Instance->_state.IRQFlag & (int)source) != 0; }
|
|
static void ClearIRQSource(IRQSource source) { CPU::Instance->_state.IRQFlag &= ~(int)source; }
|
|
static void RunDMATransfer(uint8_t* spriteRAM, uint8_t offsetValue);
|
|
static void StartDmcTransfer();
|
|
|
|
//Used by debugger for "Set Next Statement"
|
|
void SetDebugPC(uint16_t value) { SetPC(value); _state.DebugPC = value; }
|
|
|
|
void Reset(bool softReset);
|
|
void Exec();
|
|
|
|
State GetState()
|
|
{
|
|
State cpuState(_state);
|
|
cpuState.CycleCount = _cycleCount;
|
|
return cpuState;
|
|
}
|
|
}; |