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2.7.1b7

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This commit is contained in:
Mustafa Tufan 2014-02-09 17:52:58 +02:00
parent a988ca0541
commit 0ac54c6934
43 changed files with 1891 additions and 1623 deletions
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5
.gitignore vendored
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@ -69,3 +69,8 @@ ui_puae_mainwindow.h
# macos
.DS_Store
# testing
kick.rom
kick_ext.rom
df0.adz

21
configure.ac
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@ -10,12 +10,11 @@ AC_INIT(PUAE, 2.7.1, mustafa.tufan@gmail.com, puae)
AC_CONFIG_SRCDIR([bootstrap.sh])
AC_CONFIG_HEADER([src/sysconfig.h])
AC_CANONICAL_TARGET
AM_INIT_AUTOMAKE(1.7 dist-bzip2 foreign)
AM_INIT_AUTOMAKE(1.7 dist-bzip2 foreign subdir-objects)
dnl
dnl Checks for programs.
dnl
AC_PROG_CC
AC_PROG_CPP
AC_PROG_CXX
@ -430,6 +429,7 @@ HAVE_GCC30=no
HAVE_GCC40=no
HAVE_GCC46=no
HAVE_GCC47=no
HAVE_GCC48=no
HAVE_GLIBC2=no
AC_MSG_CHECKING([for GCC 2.7 or higher])
@ -471,6 +471,13 @@ AC_EGREP_CPP(yes,
#endif
], [AC_MSG_RESULT(yes); HAVE_GCC47=yes], AC_MSG_RESULT(no))
AC_MSG_CHECKING([for GCC 4.8 or higher])
AC_EGREP_CPP(yes,
[#if (__GNUC__ > 3 && __GNUC_MINOR__ > 7)
yes
#endif
], [AC_MSG_RESULT(yes); HAVE_GCC48=yes], AC_MSG_RESULT(no))
if test $ac_cv_prog_gcc = yes; then
if test $HAVE_GCC27 != yes; then
AC_MSG_WARN([Version 2.7 or better of GCC is recommended])
@ -890,6 +897,9 @@ fi
if [[ "x$want_gcc_debug" == "xyes" ]]; then
DEBUG_CFLAGS="$DEBUG_CFLAGS -ggdb"
dnl if [[ "x$HAVE_GCC48" = "xyes" ]]; then
dnl DEBUG_CFLAGS="$DEBUG_CFLAGS -Og"
dnl fi
else
OPTIMIZE_CFLAGS="$OPTIMIZE_CFLAGS -fomit-frame-pointer -ffast-math"
fi
@ -908,7 +918,7 @@ if [[ "x$DO_PROFILING" = "xyes" ]]; then
fi
UAE_CFLAGS="$OPTIMIZE_CFLAGS $DEBUG_CFLAGS $WARNING_CFLAGS"
UAE_CXXFLAGS="$OPTIMIZE_CFLAGS $DEBUG_CFLAGS $WARNING_CXXFLAGS"
UAE_CXXFLAGS="$OPTIMIZE_CFLAGS $DEBUG_CFLAGS $WARNING_CXXFLAGS"
dnl -----------------------------------------------
dnl Check CPU emulation options
@ -2137,6 +2147,11 @@ else
UAE_CXXFLAGS="$UAE_CXXFLAGS $UAE_CFLAGS -std=c++98"
fi
dnl gcc 4.8
dnl if [[ "x$HAVE_GCC48" = "xyes" ]]; then
dnl UAE_CFLAGS="$UAE_CFLAGS -fsanitize=address"
dnl fi
UAE_CFLAGS="$UAE_CFLAGS -std=c99"
AC_CONFIG_LINKS(src/target.h:src/targets/$TARGETDEP)

44
m4/ax_gcc_archflag.m4
View File

@ -65,7 +65,7 @@
# modified version of the Autoconf Macro, you may extend this special
# exception to the GPL to apply to your modified version as well.
#serial 11
#serial 14
AC_DEFUN([AX_GCC_ARCHFLAG],
[AC_REQUIRE([AC_PROG_CC])
@ -86,7 +86,7 @@ if test "x$ax_gcc_arch" = xyes; then
ax_gcc_arch=""
if test "$cross_compiling" = no; then
case $host_cpu in
i[[3456]]86*|x86_64*) # use cpuid codes
i[[3456]]86*|x86_64*|amd64*) # use cpuid codes
AX_GCC_X86_CPUID(0)
AX_GCC_X86_CPUID(1)
echo ----------------------
@ -99,25 +99,24 @@ echo ----------------------
case $ax_cv_gcc_x86_cpuid_1 in
*5[[48]]?:*:*:*) ax_gcc_arch="pentium-mmx pentium" ;;
*5??:*:*:*) ax_gcc_arch=pentium ;;
*0?6[[3456]]?:*:*:*) ax_gcc_arch="pentium2 pentiumpro" ;;
*0?6a?:*[[01]]:*:*) ax_gcc_arch="pentium2 pentiumpro" ;;
*0?6a?:*[[234]]:*:*) ax_gcc_arch="pentium3 pentiumpro" ;;
*0?6[[9de]]?:*:*:*) ax_gcc_arch="pentium-m pentium3 pentiumpro" ;;
*0?6[[78b]]?:*:*:*) ax_gcc_arch="pentium3 pentiumpro" ;;
*0?6f?:*:*:*|*1?66?:*:*:*) ax_gcc_arch="core2 pentium-m pentium3 pentiumpro" ;;
*1?6[[7d]]?:*:*:*) ax_gcc_arch="penryn core2 pentium-m pentium3 pentiumpro" ;;
*1?6[[aef]]?:*:*:*|*2?6[[5cef]]?:*:*:*) ax_gcc_arch="corei7 core2 pentium-m pentium3 pentiumpro" ;;
*1?6c?:*:*:*|*[[23]]?66?:*:*:*) ax_gcc_arch="atom core2 pentium-m pentium3 pentiumpro" ;;
*2?6[[ad]]?:*:*:*) ax_gcc_arch="corei7-avx corei7 native core2 pentium-m pentium3 pentiumpro" ;;
306a?:*:*:*) ax_gcc_arch="corei7-avx corei7 native core2" ;;
*0?6??:*:*:*) ax_gcc_arch=pentiumpro ;;
*6??:*:*:*) ax_gcc_arch="core2 pentiumpro" ;;
?000?f3[[347]]:*:*:*|?000?f4[1347]:*:*:*|?000?f6?:*:*:*)
*2?6[[ad]]?:*:*:*) ax_gcc_arch="corei7-avx corei7 core2 pentium-m pentium3 pentiumpro" ;;
*[[1-9a-f]]?6??:*:*:*) ax_gcc_arch="core2 pentiumpro" ;;
*6[[3456]]?:*:*:*) ax_gcc_arch="pentium2 pentiumpro" ;;
*6a?:*[[01]]:*:*) ax_gcc_arch="pentium2 pentiumpro" ;;
*6a?:*[[234]]:*:*) ax_gcc_arch="pentium3 pentiumpro" ;;
*6[[9de]]?:*:*:*) ax_gcc_arch="pentium-m pentium3 pentiumpro" ;;
*6[[78b]]?:*:*:*) ax_gcc_arch="pentium3 pentiumpro" ;;
*6f?:*:*:*) ax_gcc_arch="core2 pentium-m pentium3 pentiumpro" ;;
*6??:*:*:*) ax_gcc_arch=pentiumpro ;;
*f3[[347]]:*:*:*|*f4[1347]:*:*:*|*f6?:*:*:*)
case $host_cpu in
x86_64*) ax_gcc_arch="nocona pentium4 pentiumpro" ;;
*) ax_gcc_arch="prescott pentium4 pentiumpro" ;;
esac ;;
?000?f??:*:*:*) ax_gcc_arch="pentium4 pentiumpro";;
esac ;;
*f??:*:*:*) ax_gcc_arch="pentium4 pentiumpro";;
esac ;;
*:68747541:*:*) # AMD
case $ax_cv_gcc_x86_cpuid_1 in
@ -135,13 +134,13 @@ echo ----------------------
ax_gcc_arch="athlon-xp athlon-4 athlon k7" ;;
*) ax_gcc_arch="athlon-4 athlon k7" ;;
esac ;;
?00??f[[4cef8b]]?:*:*:*) ax_gcc_arch="athlon64 k8" ;;
?00??f5?:*:*:*) ax_gcc_arch="opteron k8" ;;
?00??f7?:*:*:*) ax_gcc_arch="athlon-fx opteron k8" ;;
?00??f??:*:*:*) ax_gcc_arch="k8" ;;
?05??f??:*:*:*) ax_gcc_arch="btver1 amdfam10 k8" ;;
?06??f??:*:*:*) ax_gcc_arch="bdver1 amdfam10 k8" ;;
*f??:*:*:*) ax_gcc_arch="amdfam10 k8" ;;
*5??f??:*:*:*) ax_gcc_arch="btver1 amdfam10 k8" ;;
*6??f??:*:*:*) ax_gcc_arch="bdver1 amdfam10 k8" ;;
*[[1-9a-f]]??f??:*:*:*) ax_gcc_arch="amdfam10 k8" ;;
*f[[4cef8b]]?:*:*:*) ax_gcc_arch="athlon64 k8" ;;
*f5?:*:*:*) ax_gcc_arch="opteron k8" ;;
*f7?:*:*:*) ax_gcc_arch="athlon-fx opteron k8" ;;
*f??:*:*:*) ax_gcc_arch="k8" ;;
esac ;;
*:746e6543:*:*) # IDT
case $ax_cv_gcc_x86_cpuid_1 in
@ -155,7 +154,6 @@ echo ----------------------
case $host_cpu in
i586*) ax_gcc_arch=pentium ;;
i686*) ax_gcc_arch=pentiumpro ;;
*) ax_gcc_arch=native ;;
esac
fi
;;

1
m4/uintmax_t.m4
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@ -30,6 +30,7 @@ AC_DEFUN([jm_AC_TYPE_UINTMAX_T],
[Define if you have the 'uintmax_t' type in <stdint.h> or <inttypes.h>.])
fi
])
# inttypes_h.m4 serial 5 (gettext-0.12)
dnl Copyright (C) 1997-2003 Free Software Foundation, Inc.
dnl This file is free software, distributed under the terms of the GNU

5
release_.sh
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@ -35,6 +35,7 @@ rm -rf `find . -type f -name .DS_Store`
rm -rf `find . -type f -name sysconfig.h`
rm -rf `find . -type f -name gmon.out`
#
rm -rf Makefile.in
rm -rf src/Makefile.in
rm -rf src/archivers/dms/Makefile.in
@ -47,6 +48,7 @@ rm -rf src/gfx-sdl/Makefile.in
rm -rf src/gfx-svga/Makefile.in
rm -rf src/gfx-x11/Makefile.in
rm -rf src/gfx-cocoa/Makefile.in
rm -rf src/gfx-pepper/Makefile.in
rm -rf src/gui-beos/Makefile.in
rm -rf src/gui-cocoa/Makefile.in
rm -rf src/gui-gtk/Makefile.in
@ -54,12 +56,14 @@ rm -rf src/gui-muirexx/Makefile.in
rm -rf src/gui-none/Makefile.in
rm -rf src/gui-qt/Makefile.in
rm -rf src/gui-sdl/Makefile.in
rm -rf src/gui-pepper/Makefile.in
rm -rf src/jd-amigainput/Makefile.in
rm -rf src/jd-amigaos/Makefile.in
rm -rf src/jd-beos/Makefile.in
rm -rf src/jd-linuxold/Makefile.in
rm -rf src/jd-none/Makefile.in
rm -rf src/jd-sdl/Makefile.in
rm -rf src/jd-pepper/Makefile.in
rm -rf src/keymap/Makefile.in
rm -rf src/md-68k/Makefile.in
rm -rf src/md-amd64-gcc/Makefile.in
@ -81,6 +85,7 @@ rm -rf src/sd-none/Makefile.in
rm -rf src/sd-sdl/Makefile.in
rm -rf src/sd-solaris/Makefile.in
rm -rf src/sd-uss/Makefile.in
rm -rf src/sd-pepper/Makefile.in
rm -rf src/td-amigaos/Makefile.in
rm -rf src/td-beos/Makefile.in
rm -rf src/td-none/Makefile.in

2
src/Makefile.am
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@ -177,7 +177,7 @@ EXTRA_DIST = \
test/test_optflag.c test/Makefile.in test/Makefile.am
uae_SOURCES = \
main.c newcpu.c memory.c rommgr.c custom.c serial.c dongle.c cia.c \
main.c newcpu.c newcpu_common.c memory.c rommgr.c custom.c serial.c dongle.c cia.c \
blitter.c autoconf.c traps.c keybuf.c expansion.c inputrecord.c \
diskutil.c zfile.c zfile_archive.c cfgfile.c picasso96.c inputdevice.c \
gfxutil.c audio.c sinctable.c statusline.c drawing.c consolehook.c \

50
src/a2091.c
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@ -3,7 +3,7 @@
*
* A590/A2091/A3000/CDTV SCSI expansion (DMAC/SuperDMAC + WD33C93) emulation
*
* Copyright 2007-2013 Toni Wilen
* Copyright 2007-2014 Toni Wilen
*
*/
@ -1860,30 +1860,32 @@ void a2091_init (void)
rombankswitcher = 0;
rombank = 0;
rl = getromlistbyids (roms);
if (rl) {
struct zfile *z;
rd = rl->rd;
z = read_rom (&rd);
if (z) {
int slotsize = 65536;
write_log (_T("A590/A2091 BOOT ROM %d.%d\n"), rd->ver, rd->rev);
rom_size = rd->size;
rom = xmalloc (uae_u8, slotsize);
zfile_fread (rom, rom_size, 1, z);
zfile_fclose (z);
if (rl->rd->id == 56) {
rombankswitcher = 1;
for (int i = rom_size - 1; i >= 0; i--) {
rom[i * 2 + 0] = rom[i];
rom[i * 2 + 1] = 0xff;
}
} else {
for (int i = 1; i < slotsize / rom_size; i++)
memcpy (rom + i * rom_size, rom, rom_size);
}
rom_mask = rom_size - 1;
struct zfile *z = read_rom_name (currprefs.a2091romfile);
if (!z) {
rl = getromlistbyids (roms);
if (rl) {
rd = rl->rd;
z = read_rom (&rd);
}
}
if (z) {
int slotsize = 65536;
write_log (_T("A590/A2091 BOOT ROM '%s'\n"), zfile_getname (z));
rom_size = rd->size;
rom = xmalloc (uae_u8, slotsize);
zfile_fread (rom, rom_size, 1, z);
zfile_fclose (z);
if (rl->rd->id == 56) {
rombankswitcher = 1;
for (int i = rom_size - 1; i >= 0; i--) {
rom[i * 2 + 0] = rom[i];
rom[i * 2 + 1] = 0xff;
}
} else {
for (int i = 1; i < slotsize / rom_size; i++)
memcpy (rom + i * rom_size, rom, rom_size);
}
rom_mask = rom_size - 1;
} else {
romwarning (roms);
}

37
src/cfgfile.c
View File

@ -916,6 +916,7 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type)
cfgfile_write_str (f, _T("use_gui"), guimode1[p->start_gui]);
cfgfile_write_bool (f, _T("use_debugger"), p->start_debugger);
cfgfile_write_rom (f, &p->path_rom, p->romfile, _T("kickstart_rom_file"));
cfgfile_write_rom (f, &p->path_rom, p->romextfile, _T("kickstart_ext_rom_file"));
if (p->romextfile2addr) {
@ -926,6 +927,14 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type)
cfgfile_dwrite_str (f, _T("kickstart_rom"), p->romident);
if (p->romextident[0])
cfgfile_write_str (f, _T("kickstart_ext_rom="), p->romextident);
cfgfile_write_rom (f, &p->path_rom, p->a2091romfile, _T("a2091_rom_file"));
cfgfile_write_rom (f, &p->path_rom, p->a4091romfile, _T("a4091_rom_file"));
if (p->a2091romident[0])
cfgfile_dwrite_str (f, _T("a2091_rom"), p->a2091romident);
if (p->a4091romident[0])
cfgfile_dwrite_str (f, _T("a4091_rom"), p->a4091romident);
cfgfile_write_path (f, &p->path_rom, _T("flash_file"), p->flashfile);
cfgfile_write_path (f, &p->path_rom, _T("rtc_file"), p->rtcfile);
#ifdef ACTION_REPLAY
@ -1371,10 +1380,13 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type)
cfgfile_write_bool (f, _T("gfxcard_hardware_sprite"), p->rtg_hardwaresprite);
cfgfile_write (f, _T("chipmem_size"), _T("%d"), p->chipmem_size == 0x20000 ? -1 : (int)(p->chipmem_size == 0x40000 ? 0 : p->chipmem_size / 0x80000));
cfgfile_dwrite (f, _T("megachipmem_size"), _T("%d"), p->z3chipmem_size / 0x100000);
if (p->custom_memory_sizes[0])
cfgfile_write (f, _T("addmem1"), _T("0x%x,0x%x"), p->custom_memory_addrs[0], p->custom_memory_sizes[0]);
if (p->custom_memory_sizes[1])
cfgfile_write (f, _T("addmem2"), _T("0x%x,0x%x"), p->custom_memory_addrs[1], p->custom_memory_sizes[1]);
// do not save aros rom special space
if (!(p->custom_memory_sizes[0] == 512 * 1024 && p->custom_memory_sizes[1] == 512 * 1024 && p->custom_memory_addrs[0] == 0xa80000 && p->custom_memory_addrs[1] == 0xb00000)) {
if (p->custom_memory_sizes[0])
cfgfile_write (f, _T("addmem1"), _T("0x%x,0x%x"), p->custom_memory_addrs[0], p->custom_memory_sizes[0]);
if (p->custom_memory_sizes[1])
cfgfile_write (f, _T("addmem2"), _T("0x%x,0x%x"), p->custom_memory_addrs[1], p->custom_memory_sizes[1]);
}
if (p->m68k_speed > 0) {
cfgfile_write (f, _T("finegrain_cpu_speed"), _T("%d"), p->m68k_speed);
@ -3415,8 +3427,12 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, const TCHAR *option, TCH
if (cfgfile_path_mp (option, value, _T("kickstart_rom_file"), p->romfile, sizeof p->romfile / sizeof (TCHAR), &p->path_rom)
|| cfgfile_path_mp (option, value, _T("kickstart_ext_rom_file"), p->romextfile, sizeof p->romextfile / sizeof (TCHAR), &p->path_rom)
|| cfgfile_path_mp (option, value, _T("kickstart_ext_rom_file2"), p->romextfile2, sizeof p->romextfile2 / sizeof (TCHAR), &p->path_rom)
|| cfgfile_path_mp (option, value, _T("a2091_rom_file"), p->a2091romfile, sizeof p->a2091romfile / sizeof (TCHAR), &p->path_rom)
|| cfgfile_path_mp (option, value, _T("a4091_rom_file"), p->a4091romfile, sizeof p->a4091romfile / sizeof (TCHAR), &p->path_rom)
|| cfgfile_rom (option, value, _T("kickstart_rom_file_id"), p->romfile, sizeof p->romfile / sizeof (TCHAR))
|| cfgfile_rom (option, value, _T("kickstart_ext_rom_file_id"), p->romextfile, sizeof p->romextfile / sizeof (TCHAR))
|| cfgfile_rom (option, value, _T("a2091_rom_file_id"), p->a2091romfile, sizeof p->a2091romfile / sizeof (TCHAR))
|| cfgfile_rom (option, value, _T("a4091_rom_file_id"), p->a4091romfile, sizeof p->a4091romfile / sizeof (TCHAR))
|| cfgfile_path (option, value, _T("amax_rom_file"), p->amaxromfile, sizeof p->amaxromfile / sizeof (TCHAR))
|| cfgfile_path_mp (option, value, _T("flash_file"), p->flashfile, sizeof p->flashfile / sizeof (TCHAR), &p->path_rom)
|| cfgfile_path_mp (option, value, _T("cart_file"), p->cartfile, sizeof p->cartfile / sizeof (TCHAR), &p->path_rom)
@ -3448,12 +3464,21 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, const TCHAR *option, TCH
decode_rom_ident (p->romextfile, sizeof p->romextfile / sizeof (TCHAR), p->romextident, ROMTYPE_ALL_EXT);
return 1;
}
if (cfgfile_string (option, value, _T("a2091_rom"), p->a2091romident, sizeof p->a2091romident / sizeof (TCHAR))) {
decode_rom_ident (p->a2091romident, sizeof p->a2091romident / sizeof (TCHAR), p->a2091romident, ROMTYPE_A2091BOOT);
return 1;
}
if (cfgfile_string (option, value, _T("a4091_rom"), p->a4091romident, sizeof p->a4091romident / sizeof (TCHAR))) {
decode_rom_ident (p->a4091romident, sizeof p->a4091romident / sizeof (TCHAR), p->a4091romident, ROMTYPE_A4091BOOT);
return 1;
}
#ifdef ACTION_REPLAY
if (cfgfile_string (option, value, _T("cart"), p->cartident, sizeof p->cartident / sizeof (TCHAR))) {
decode_rom_ident (p->cartfile, sizeof p->cartfile / sizeof (TCHAR), p->cartident, ROMTYPE_ALL_CART);
return 1;
}
#endif
for (i = 0; i < 4; i++) {
_stprintf (tmpbuf, _T("floppy%d"), i);
if (cfgfile_path_mp (option, value, tmpbuf, p->floppyslots[i].df, sizeof p->floppyslots[i].df / sizeof (TCHAR), &p->path_floppy))
@ -4014,6 +4039,8 @@ static int cfgfile_load_2 (struct uae_prefs *p, const TCHAR *filename, bool real
subst (p->path_rom.path[0], p->romfile, sizeof p->romfile / sizeof (TCHAR));
subst (p->path_rom.path[0], p->romextfile, sizeof p->romextfile / sizeof (TCHAR));
subst (p->path_rom.path[0], p->romextfile2, sizeof p->romextfile2 / sizeof (TCHAR));
subst (p->path_rom.path[0], p->a2091romfile, sizeof p->a2091romfile / sizeof (TCHAR));
subst (p->path_rom.path[0], p->a4091romfile, sizeof p->a4091romfile / sizeof (TCHAR));
return 1;
}
@ -5398,6 +5425,8 @@ static void buildin_default_prefs (struct uae_prefs *p)
_tcscpy (p->romfile, _T(""));
_tcscpy (p->romextfile, _T(""));
_tcscpy (p->a2091romfile, _T(""));
_tcscpy (p->a4091romfile, _T(""));
_tcscpy (p->flashfile, _T(""));
_tcscpy (p->cartfile, _T(""));
_tcscpy (p->rtcfile, _T(""));

2
src/cpummu.c
View File

@ -252,7 +252,7 @@ static ALWAYS_INLINE int mmu_get_fc(bool super, bool data)
return (super ? 4 : 0) | (data ? 1 : 2);
}
static void mmu_bus_error(uaecptr addr, int fc, bool write, int size, bool rmw, uae_u32 status)
void mmu_bus_error(uaecptr addr, int fc, bool write, int size, bool rmw, uae_u32 status)
{
if (currprefs.mmu_model == 68040) {
uae_u16 ssw = 0;

2
src/cpummu30.c
View File

@ -1558,7 +1558,7 @@ uae_u32 mmu030_ptest_table_search(uaecptr logical_addr, uae_u32 fc, bool write,
#define ATC030_PHYS_CI 0x04000000
#define ATC030_PHYS_BE 0x08000000
static void mmu030_page_fault(uaecptr addr, bool read, int flags, uae_u32 fc) {
void mmu030_page_fault(uaecptr addr, bool read, int flags, uae_u32 fc) {
regs.mmu_fault_addr = addr;
regs.mmu_ssw = (fc & 1) ? MMU030_SSW_DF | (MMU030_SSW_DF << 1) : (MMU030_SSW_FB | MMU030_SSW_RB);
regs.mmu_ssw |= read ? MMU030_SSW_RW : 0;

69
src/custom.c
View File

@ -62,7 +62,7 @@
#define CUSTOM_DEBUG 0
#define SPRITE_DEBUG 0
#define SPRITE_DEBUG_MINY 246
#define SPRITE_DEBUG_MINY 0
#define SPRITE_DEBUG_MAXY 0x300
#define SPR0_HPOS 0x15
#define MAX_SPRITES 8
@ -247,7 +247,7 @@ static uae_u8 magic_sprite_mask = 0xff;
static int sprite_vblank_endline = VBLANK_SPRITE_PAL;
static unsigned int sprctl[MAX_SPRITES], sprpos[MAX_SPRITES];
static uae_u16 sprctl[MAX_SPRITES], sprpos[MAX_SPRITES];
#ifdef AGA
static uae_u16 sprdata[MAX_SPRITES][4], sprdatb[MAX_SPRITES][4];
#else
@ -394,7 +394,7 @@ static uae_u32 thisline_changed;
static struct decision thisline_decision;
static int fetch_cycle, fetch_modulo_cycle;
static bool aga_plf_passed_stop2;
enum plfstate
{
plf_idle,
@ -617,6 +617,13 @@ STATIC_INLINE int get_equ_vblank_endline (void)
return equ_vblank_endline + (equ_vblank_toggle ? (lof_current ? 1 : 0) : 0);
}
#define HARD_DDF_LIMITS_DISABLED ((beamcon0 & 0x80) || (bplcon0 & 0x40))
/* The HRM says 0xD8, but that can't work... */
#define HARD_DDF_STOP (HARD_DDF_LIMITS_DISABLED ? 0xff : 0xd6)
#define HARD_DDF_START_REAL 0x18
/* Programmed rates or superhires (!) disable normal DMA limits */
#define HARD_DDF_START (HARD_DDF_LIMITS_DISABLED ? 0x04 : 0x18)
/* Called to determine the state of the horizontal display window state
* machine at the current position. It might have changed since we last
* checked. */
@ -643,7 +650,7 @@ static void decide_diw (int hpos)
thisline_decision.diwfirstword = diwfirstword < 0 ? PIXEL_XPOS(0) : diwfirstword;
hdiwstate = DIW_waiting_stop;
}
if (lhdiw >= diw_hstop && last_hdiw < diw_hstop && hdiwstate == DIW_waiting_stop) {
if (((hpos >= maxhpos && HARD_DDF_LIMITS_DISABLED) || (lhdiw >= diw_hstop && last_hdiw < diw_hstop)) && hdiwstate == DIW_waiting_stop) {
if (thisline_decision.diwlastword < 0)
thisline_decision.diwlastword = diwlastword < 0 ? 0 : diwlastword;
hdiwstate = DIW_waiting_start;
@ -667,13 +674,6 @@ STATIC_INLINE int GET_PLANES_LIMIT (uae_u16 bc0)
return real_bitplane_number[fetchmode][res][planes];
}
#define HARD_DDF_LIMITS_DISABLED ((beamcon0 & 0x80) || (bplcon0 & 0x40))
/* The HRM says 0xD8, but that can't work... */
#define HARD_DDF_STOP (HARD_DDF_LIMITS_DISABLED ? 0xff : 0xd6)
#define HARD_DDF_START_REAL 0x18
/* Programmed rates or superhires (!) disable normal DMA limits */
#define HARD_DDF_START (HARD_DDF_LIMITS_DISABLED ? 0x04 : 0x18)
static void reset_dbplh (int hpos, int num)
{
if (dbplpth_on[num] && hpos >= dbplpth_on[num]) {
@ -1061,10 +1061,15 @@ static void compute_toscr_delay (int bplcon1)
static void set_delay_lastcycle (void)
{
delay_lastcycle[0] = ((maxhpos + 1) * 2 + 0) << bplcon0_res;
delay_lastcycle[1] = delay_lastcycle[0];
if (islinetoggle ())
delay_lastcycle[1]++;
if (HARD_DDF_LIMITS_DISABLED) {
delay_lastcycle[0] = (256 * 2) << bplcon0_res;
delay_lastcycle[1] = (256 * 2) << bplcon0_res;
} else {
delay_lastcycle[0] = ((maxhpos + 1) * 2 + 0) << bplcon0_res;
delay_lastcycle[1] = delay_lastcycle[0];
if (islinetoggle ())
delay_lastcycle[1]++;
}
}
static int bpldmasetuphpos, bpldmasetuphpos_diff;
@ -2107,6 +2112,11 @@ static void finish_final_fetch (void)
if (plfr_state < plf_end)
finish_last_fetch (maxhpos, fetchmode, true);
plfr_state = plfr_finished;
// workaround for too long fetches that don't pass plf_passed_stop2 before end of scanline
if (aga_plf_passed_stop2 && plf_state >= plf_passed_stop)
plf_state = plf_end;
// This is really the end of scanline, we can finally flush all remaining data.
thisline_decision.plfright += flush_plane_data (fetchmode);
thisline_decision.plflinelen = out_offs;
@ -2151,6 +2161,15 @@ STATIC_INLINE int one_fetch_cycle_0 (int pos, int ddfstop_to_test, int dma, int
case 5: fetch (2, fm, pos); break;
case 6: fetch (4, fm, pos); break;
case 7: fetch (0, fm, pos); break;
#ifdef AGA
default:
// if AGA: consider plf_passed_stop2 already
// active when last plane has been written,
// even if there is still idle cycles left
if (plf_state == plf_passed_stop)
aga_plf_passed_stop2 = true;
break;
#endif
}
break;
case 4:
@ -2159,12 +2178,24 @@ STATIC_INLINE int one_fetch_cycle_0 (int pos, int ddfstop_to_test, int dma, int
case 1: fetch (1, fm, pos); break;
case 2: fetch (2, fm, pos); break;
case 3: fetch (0, fm, pos); break;
#ifdef AGA
default:
if (plf_state == plf_passed_stop)
aga_plf_passed_stop2 = true;
break;
#endif
}
break;
case 2:
switch (cycle_start) {
case 0: fetch (1, fm, pos); break;
case 1: fetch (0, fm, pos); break;
#ifdef AGA
default:
if (plf_state == plf_passed_stop)
aga_plf_passed_stop2 = true;
break;
#endif
}
break;
}
@ -2603,7 +2634,7 @@ STATIC_INLINE void decide_line (int hpos)
}
if (dma) {
if (plf_state == plf_active && (!(currprefs.chipset_mask & CSMASK_ECS_AGNUS) || hpos >= 0x18)) {
if (plf_state == plf_active && (!(currprefs.chipset_mask & CSMASK_ECS_AGNUS) || hpos >= 0x18 || HARD_DDF_LIMITS_DISABLED)) {
start_bpl_dma (hpos, bplstart);
last_decide_line_hpos = hpos;
#ifndef CUSTOM_SIMPLE
@ -3423,6 +3454,7 @@ static void reset_decisions (void)
memset (todisplay_aga, 0, sizeof todisplay_aga);
memset (todisplay2_aga, 0, sizeof todisplay2_aga);
}
aga_plf_passed_stop2 = false;
#endif
if (bitplane_line_crossing) {
@ -3436,6 +3468,8 @@ static void reset_decisions (void)
beginning_of_plane_block (bitplane_line_crossing, fetchmode);
}
bitplane_line_crossing = 0;
} else {
reset_bpl_vars ();
}
last_decide_line_hpos = -1;
@ -6067,7 +6101,7 @@ STATIC_INLINE uae_u16 sprite_fetch (struct sprite *s, int dma, int hpos, int cyc
}
STATIC_INLINE uae_u16 sprite_fetch2 (struct sprite *s, int hpos, int cycle, int mode)
{
uae_u16 data = last_custom_value1 = chipmem_wget_indirect (s->pt);
uae_u16 data = chipmem_wget_indirect (s->pt);
s->pt += 2;
return data;
}
@ -6311,6 +6345,7 @@ static void init_hardware_frame (void)
autoscale_bordercolors = 0;
for (i = 0; i < MAX_SPRITES; i++)
spr[i].ptxhpos = MAXHPOS;
plf_state = plf_end;
}
void init_hardware_for_drawing_frame (void)

6
src/dongle.c
View File

@ -43,14 +43,14 @@ int dongle_analogjoy (int joy, int axis);
uae_u32 uaerand (void);
/*
Robocop 3
RoboCop 3
- set firebutton as output
- read JOY1DAT
- pulse firebutton (high->low)
- read JOY1DAT
- JOY1DAT bit 8 must toggle
Leaderboard
Leader Board
- JOY1DAT, both up and down active (0x0101)
B.A.T. II
@ -60,7 +60,7 @@ B.A.T. II
- delay
- CTS must be zero
Italy'90 Soccer
Italy '90 Soccer
- 220k resistor between pins 5 (+5v) and 7 (POTX)
- POT1DAT POTX must be between 0x32 and 0x60

27
src/expansion.c
View File

@ -771,16 +771,19 @@ static void expamem_init_fastcard (void)
{
uae_u16 mid = (currprefs.cs_a2091 || currprefs.uae_hide) ? commodore : uae_id;
uae_u8 pid = (currprefs.cs_a2091 || currprefs.uae_hide) ? commodore_a2091_ram : (currprefs.maprom ? 1 : 81);
uae_u8 type = add_memory | zorroII | (currprefs.cs_a2091 ? chainedconfig : 0);
expamem_init_clear ();
if (fastmem_bank.allocated == 0x100000)
expamem_write (0x00, Z2_MEM_1MB + add_memory + zorroII);
type |= Z2_MEM_1MB;
else if (fastmem_bank.allocated == 0x200000)
expamem_write (0x00, Z2_MEM_2MB + add_memory + zorroII);
type |= Z2_MEM_2MB;
else if (fastmem_bank.allocated == 0x400000)
expamem_write (0x00, Z2_MEM_4MB + add_memory + zorroII);
type |= Z2_MEM_4MB;
else if (fastmem_bank.allocated == 0x800000)
expamem_write (0x00, Z2_MEM_8MB + add_memory + zorroII);
type |= Z2_MEM_8MB;
expamem_write (0x00, type);
expamem_write (0x08, care_addr);
@ -1294,6 +1297,7 @@ void expamem_reset (void)
}
if (need_uae_boot_rom () == 0)
do_mount = 0;
if (fastmem_bank.baseaddr != NULL && currprefs.chipmem_size <= 2 * 1024 * 1024) {
if (currprefs.fastmem_autoconfig) {
fastmem_bank.name = _T("Fast memory");
@ -1305,6 +1309,14 @@ void expamem_reset (void)
map_banks (&fastmem_bank, 0x00200000 >> 16, fastmem_bank.allocated >> 16, 0);
}
}
// immediately after Z2Fast so that they can be emulated as A590/A2091 with fast ram.
#ifdef A2091
if (currprefs.cs_a2091) {
card_name[cardno] = _T("A2091");
card_init[cardno] = expamem_init_a2091;
card_map[cardno++] = NULL;
}
#endif
#ifdef CDTV
if (currprefs.cs_cdtvcd) {
@ -1324,13 +1336,6 @@ void expamem_reset (void)
}
}
#endif
#ifdef A2091
if (currprefs.cs_a2091) {
card_name[cardno] = _T("A2091");
card_init[cardno] = expamem_init_a2091;
card_map[cardno++] = NULL;
}
#endif
#ifdef A2065
if (currprefs.a2065name[0]) {
card_name[cardno] = _T("A2065");

103
src/filesys.c
View File

@ -522,7 +522,7 @@ static int set_filesys_volume (const TCHAR *rootdir, int *flags, bool *readonly,
struct zvolume *zv;
zv = zfile_fopen_archive (rootdir);
if (!zv) {
write_log (_T("'%s' is not a supported archive file\n"), rootdir);
error_log (_T("'%s' is not a supported archive file."), rootdir);
return -1;
}
*zvp = zv;
@ -532,11 +532,11 @@ static int set_filesys_volume (const TCHAR *rootdir, int *flags, bool *readonly,
*flags = my_getvolumeinfo (rootdir);
if (*flags < 0) {
if (rootdir && rootdir[0])
write_log (_T("directory '%s' not found, mounting as empty drive\n"), rootdir);
error_log (_T("directory '%s' not found, mounting as empty drive."), rootdir);
*emptydrive = 1;
*flags = 0;
} else if ((*flags) & MYVOLUMEINFO_READONLY) {
write_log (_T("'%s' set to read-only\n"), rootdir);
error_log (_T("'%s' set to read-only."), rootdir);
*readonly = 1;
}
}
@ -578,7 +578,7 @@ static int set_filesys_unit_1 (int nr, struct uaedev_config_info *ci)
break;
}
if (nr == MAX_FILESYSTEM_UNITS) {
write_log (_T("No slot allocated for this unit\n"));
error_log (_T("No slot allocated for this unit"));
return -1;
}
}
@ -600,7 +600,7 @@ static int set_filesys_unit_1 (int nr, struct uaedev_config_info *ci)
if (nr == i || !mountinfo.ui[i].open || mountinfo.ui[i].rootdir == NULL || is_hardfile (i) == FILESYS_CD)
continue;
if (_tcslen (c.rootdir) > 0 && !_tcsicmp (mountinfo.ui[i].rootdir, c.rootdir)) {
write_log (_T("directory/hardfile '%s' already added\n"), c.rootdir);
error_log (_T("directory/hardfile '%s' already added."), c.rootdir);
return -1;
}
}
@ -629,9 +629,11 @@ static int set_filesys_unit_1 (int nr, struct uaedev_config_info *ci)
ui->volname = 0;
if (ui->hf.ci.rootdir[0]) {
if (!hdf_open (&ui->hf, NULL) && !c.readonly) {
write_log (_T("Attempting to open in read-only mode\n"));
write_log (_T("Attempting to open '%s' in read-only mode\n"), ui->hf.ci.rootdir);
ui->hf.ci.readonly = c.readonly = true;
hdf_open (&ui->hf, NULL);
if (hdf_open (&ui->hf, NULL)) {
error_log (_T("'%s' opened in read-only mode.\n"), ui->hf.ci.rootdir);
}
}
} else {
// empty drive?
@ -639,22 +641,22 @@ static int set_filesys_unit_1 (int nr, struct uaedev_config_info *ci)
}
if (!ui->hf.drive_empty) {
if (ui->hf.handle_valid == 0) {
write_log (_T("Hardfile %s not found\n"), ui->hf.device_name);
error_log (_T("Hardfile '%s' not found."), ui->hf.ci.rootdir);
goto err;
}
if ((uae_u64)(ui->hf.ci.blocksize) > ui->hf.virtsize || ui->hf.virtsize == 0) {
write_log (_T("Hardfile %s too small\n"), ui->hf.device_name);
error_log (_T("Hardfile '%s' too small."), ui->hf.ci.rootdir);
goto err;
}
}
if ((ui->hf.ci.blocksize & (ui->hf.ci.blocksize - 1)) != 0 || ui->hf.ci.blocksize == 0) {
write_log (_T("Hardfile %s bad blocksize\n"), ui->hf.device_name);
error_log (_T("Hardfile '%s' bad blocksize %d."), ui->hf.ci.rootdir, ui->hf.ci.blocksize);
goto err;
}
if ((ui->hf.ci.sectors || ui->hf.ci.surfaces || ui->hf.ci.reserved) &&
(ui->hf.ci.sectors < 1 || ui->hf.ci.surfaces < 1 || ui->hf.ci.surfaces > 1023 ||
ui->hf.ci.reserved < 0 || ui->hf.ci.reserved > 1023) != 0) {
write_log (_T("Hardfile %s bad hardfile geometry\n"), ui->hf.device_name);
error_log (_T("Hardfile '%s' bad hardfile geometry."), ui->hf.ci.rootdir);
goto err;
}
if (!ui->hf.ci.highcyl) {
@ -1386,7 +1388,7 @@ static unsigned int fs_write (struct fs_filehandle *fsf, void *b, unsigned int s
}
/* return value = old position. -1 = error. */
static uae_u64 fs_lseek64 (struct fs_filehandle *fsf, uae_s64 offset, int whence)
static uae_s64 fs_lseek64 (struct fs_filehandle *fsf, uae_s64 offset, int whence)
{
if (fsf->fstype == FS_ARCHIVE)
return zfile_lseek_archive (fsf->zf, offset, whence);
@ -1396,11 +1398,14 @@ static uae_u64 fs_lseek64 (struct fs_filehandle *fsf, uae_s64 offset, int whence
return isofs_lseek (fsf->isof, offset, whence);*/
return -1;
}
static uae_u32 fs_lseek (struct fs_filehandle *fsf, uae_s32 offset, int whence)
static uae_s32 fs_lseek (struct fs_filehandle *fsf, uae_s32 offset, int whence)
{
return (uae_u32)fs_lseek64 (fsf, offset, whence);
uae_s64 v = fs_lseek64 (fsf, offset, whence);
if (v < 0 || v > 0x7fffffff)
return -1;
return (uae_s32)v;
}
static uae_u64 fs_fsize64 (struct fs_filehandle *fsf)
static uae_s64 fs_fsize64 (struct fs_filehandle *fsf)
{
if (fsf->fstype == FS_ARCHIVE)
return zfile_fsize_archive (fsf->zf);
@ -2745,7 +2750,7 @@ static Unit *startup_create_unit (UnitInfo *uinfo, int num)
return unit;
}
/*
#if 0
static bool mount_cd (UnitInfo *uinfo, int nr, struct mytimeval *ctime, uae_u64 *uniq)
{
uinfo->cddevno = nr - cd_unit_offset;
@ -2780,7 +2785,7 @@ static bool mount_cd (UnitInfo *uinfo, int nr, struct mytimeval *ctime, uae_u64
uinfo->cd_open = true;
return true;
}
*/
#endif
#ifdef UAE_FILESYS_THREADS
static void *filesys_thread (void *unit_v);
@ -2817,19 +2822,17 @@ static uae_u32 REGPARAM2 startup_handler (TrapContext *context)
/* Just got the startup packet. It's in D3. DosBase is in A2,
* our allocated volume structure is in A3, A5 is a pointer to
* our port. */
// REMOVEME:
#if 0
uaecptr rootnode = get_long (m68k_areg (regs, 2) + 34);
uaecptr dos_info = get_long (rootnode + 24) << 2;
#endif
// REMOVEME: uaecptr rootnode = get_long (m68k_areg (regs, 2) + 34);
// REMOVEME: uaecptr dos_info = get_long (rootnode + 24) << 2;
uaecptr pkt = m68k_dreg (regs, 3);
//uaecptr arg1 = get_long (pkt + dp_Arg1);
// REMOVEME: uaecptr arg1 = get_long (pkt + dp_Arg1);
uaecptr arg2 = get_long (pkt + dp_Arg2);
//uaecptr arg3 = get_long (pkt + dp_Arg3);
// REMOVEME: uaecptr arg3 = get_long (pkt + dp_Arg3);
// 1.3:
// dp_Arg1 contains crap (Should be name of device)
// dp_Arg2 = works as documented
// dp_Arg3 = NULL (!?). (Should be DeviceNode)
uaecptr devnode;
int nr;
Unit *unit;
@ -3418,7 +3421,7 @@ static void action_make_link (Unit *unit, dpacket packet)
for (Unit *u = units; u; u = u->next) {
if (u->volflags & (MYVOLUMEINFO_ARCHIVE | MYVOLUMEINFO_CDFS))
continue;
a3 = find_aino (u, NULL, link, &err);
a3 = find_aino (u, 0, link, &err);
if (err || !a3)
continue;
_tcscpy (tmp2, a1->nname);
@ -3733,8 +3736,10 @@ static void
TRACE((_T("name=\"%s\"\n"), xs));
x = ua_fs (xs, -1);
n = strlen (x);
if (n > 106)
n = 106;
if (n > 107)
n = 107;
if (n > abs (currprefs.filesys_max_name))
n = abs (currprefs.filesys_max_name);
i = 8;
put_byte (info + i, n); i++;
while (n--)
@ -4823,7 +4828,7 @@ static void
write_log (_T("unixfs warning: Bad pointer passed for read: %08x, size %d\n"), addr, size);
/* ugh this is inefficient but easy */
if ((uae_u64)-1 == fs_lseek64 (k->fd, k->file_pos, SEEK_SET)) {
if (fs_lseek64 (k->fd, k->file_pos, SEEK_SET) < 0) {
PUT_PCK_RES1 (packet, 0);
PUT_PCK_RES2 (packet, dos_errno ());
return;
@ -4838,7 +4843,7 @@ static void
actual = fs_read (k->fd, buf, size);
if (actual < 0) {
if ((uae_s32)actual == -1) {
PUT_PCK_RES1 (packet, 0);
PUT_PCK_RES2 (packet, dos_errno ());
} else {
@ -4857,7 +4862,7 @@ static void
/* normal fast read */
uae_u8 *realpt = get_real_address (addr);
if ((uae_u64)-1 == fs_lseek64 (k->fd, k->file_pos, SEEK_SET)) {
if (fs_lseek64 (k->fd, k->file_pos, SEEK_SET) < 0) {
PUT_PCK_RES1 (packet, 0);
PUT_PCK_RES2 (packet, dos_errno ());
return;
@ -4868,7 +4873,7 @@ static void
if (actual == 0) {
PUT_PCK_RES1 (packet, 0);
PUT_PCK_RES2 (packet, 0);
} else if ((uae_u32)-1 == actual) {
} else if (actual < 0) {
PUT_PCK_RES1 (packet, 0);
PUT_PCK_RES2 (packet, dos_errno ());
} else {
@ -4913,7 +4918,7 @@ static void
} else if (valid_address (addr, size)) {
uae_u8 *realpt = get_real_address (addr);
if ((uae_u64)-1 == fs_lseek64 (k->fd, k->file_pos, SEEK_SET)) {
if (fs_lseek64 (k->fd, k->file_pos, SEEK_SET) < 0) {
PUT_PCK_RES1 (packet, 0);
PUT_PCK_RES2 (packet, dos_errno ());
return;
@ -4924,7 +4929,7 @@ static void
write_log (_T("unixfs warning: Bad pointer passed for write: %08x, size %d\n"), addr, size);
/* ugh this is inefficient but easy */
if ((uae_u64)-1 == fs_lseek64 (k->fd, k->file_pos, SEEK_SET)) {
if (fs_lseek64 (k->fd, k->file_pos, SEEK_SET) < 0) {
PUT_PCK_RES1 (packet, 0);
PUT_PCK_RES2 (packet, dos_errno ());
return;
@ -4948,7 +4953,7 @@ static void
PUT_PCK_RES1 (packet, actual);
if (actual != size)
PUT_PCK_RES2 (packet, dos_errno ());
if ((uae_u32)-1 != actual)
if ((uae_s32)actual != -1)
k->file_pos += actual;
k->notifyactive = 1;
@ -6328,6 +6333,7 @@ void filesys_prepare_reset (void)
static uae_u32 REGPARAM2 filesys_diagentry (TrapContext *context)
{
uaecptr resaddr = m68k_areg (regs, 2) + 0x10;
uaecptr expansion = m68k_areg (regs, 5);
uaecptr start = resaddr;
uaecptr residents, tmp;
@ -6371,6 +6377,7 @@ static uae_u32 REGPARAM2 filesys_diagentry (TrapContext *context)
#ifdef UAESERIAL
resaddr = uaeserialdev_startup (resaddr);
#endif
/* scan for Residents and return pointer to array of them */
residents = resaddr;
while (tmp < residents && tmp > start) {
@ -6397,6 +6404,32 @@ static uae_u32 REGPARAM2 filesys_diagentry (TrapContext *context)
m68k_areg (regs, 0) = residents;
if (currprefs.uae_hide_autoconfig) {
bool found = true;
while (found) {
uaecptr node = get_long (expansion + 0x3c);
found = false;
while (get_long (node)) {
if (get_word (node + 0x10 + 4) == 2011) {
uae_u8 prod = get_byte (node + 0x10 + 1);
if (prod != 2) {
// remove all 2011 boards except filesystem
found = true;
uaecptr succ = get_long (node);
uaecptr pred = get_long (node + 4);
put_long (pred, succ);
put_long (succ + 4, pred);
break;
}
// replace filesystem with A590/A2091 IDs..
put_byte (node + 0x10 + 1, 3);
put_word (node + 0x10 + 4, 514);
}
node = get_long (node);
}
}
}
return 1;
}
@ -7092,7 +7125,7 @@ static int dofakefilesys (UnitInfo *uip, uaecptr parmpacket, struct uaedev_confi
zf = zfile_fopen (tmp, _T("rb"), ZFD_NORMAL);
if (!zf) {
addfakefilesys (parmpacket, dostype, ver, rev, ci);
write_log (_T("RDB: filesys not found, mounted without filesys\n"));
write_log (_T("RDB: filesys not found, mounted without forced filesys\n"));
return FILESYS_HARDFILE;
}

9
src/fpp.c
View File

@ -20,7 +20,6 @@
#include "custom.h"
#include "events.h"
#include "newcpu.h"
#include "ersatz.h"
#include "md-fpp.h"
#include "savestate.h"
#include "cpu_prefetch.h"
@ -747,9 +746,9 @@ STATIC_INLINE int get_fp_value (uae_u32 opcode, uae_u16 extra, fptype *src, uaec
break;
case 2:
{
uae_u32 wrd1, wrd2, wrd3;
if (fault_if_4060 (opcode, extra, ad, oldpc, FPU_EXP_UNIMP_DATATYPE))
return -1;
uae_u32 wrd1, wrd2, wrd3;
wrd1 = (doext ? exts[0] : x_cp_get_long (ad));
ad += 4;
wrd2 = (doext ? exts[1] : x_cp_get_long (ad));
@ -760,9 +759,9 @@ STATIC_INLINE int get_fp_value (uae_u32 opcode, uae_u16 extra, fptype *src, uaec
break;
case 3:
{
uae_u32 wrd1, wrd2, wrd3;
if (fault_if_4060 (opcode, extra, ad, oldpc, FPU_EXP_UNIMP_DATATYPE))
return -1;
uae_u32 wrd1, wrd2, wrd3;
wrd1 = (doext ? exts[0] : x_cp_get_long (ad));
ad += 4;
wrd2 = (doext ? exts[1] : x_cp_get_long (ad));
@ -895,9 +894,9 @@ STATIC_INLINE int put_fp_value (fptype value, uae_u32 opcode, uae_u16 extra, uae
break;
case 2:
{
uae_u32 wrd1, wrd2, wrd3;
if (fault_if_4060 (opcode, extra, ad, oldpc, FPU_EXP_UNIMP_DATATYPE))
return -1;
uae_u32 wrd1, wrd2, wrd3;
from_exten (value, &wrd1, &wrd2, &wrd3);
x_cp_put_long (ad, wrd1);
ad += 4;
@ -908,9 +907,9 @@ STATIC_INLINE int put_fp_value (fptype value, uae_u32 opcode, uae_u16 extra, uae
break;
case 3:
{
uae_u32 wrd1, wrd2, wrd3;
if (fault_if_4060 (opcode, extra, ad, oldpc, FPU_EXP_UNIMP_DATATYPE))
return -1;
uae_u32 wrd1, wrd2, wrd3;
from_pack (value, &wrd1, &wrd2, &wrd3);
x_cp_put_long (ad, wrd1);
ad += 4;

16
src/fsdb.c
View File

@ -207,7 +207,7 @@ a_inode *fsdb_lookup_aino_aname (a_inode *base, const TCHAR *aname)
xfree (s);
}
fclose (f);
return 0;
return 0;
}
a_inode *fsdb_lookup_aino_nname (a_inode *base, const TCHAR *nname)
@ -222,19 +222,19 @@ a_inode *fsdb_lookup_aino_nname (a_inode *base, const TCHAR *nname)
return 0;
}
s = ua (nname);
for (;;) {
for (;;) {
uae_u8 buf[1 + 4 + 257 + 257 + 81];
if (fread (buf, 1, sizeof buf, f) < sizeof buf)
break;
break;
if (buf[0] != 0 && strcmp ((char*)buf + 5 + 257, s) == 0) {
long pos = ftell (f) - sizeof buf;
fclose (f);
long pos = ftell (f) - sizeof buf;
fclose (f);
xfree (s);
return aino_from_buf (base, buf, pos);
return aino_from_buf (base, buf, pos);
}
}
}
xfree (s);
fclose (f);
fclose (f);
return 0;
}

56
src/fsusage.c
View File

@ -23,7 +23,6 @@ Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include <devices/timer.h>
#endif
#include <stdlib.h>
#include <sys/types.h>
@ -68,25 +67,19 @@ int get_fs_usage (const TCHAR *path, const TCHAR *disk, struct fs_usage *fsp)
int result = -1;
if (info) {
BPTR lock = Lock (path, SHARED_LOCK);
if (lock) {
if (Info (lock, info)) {
fsp->fsu_blocks = adjust_blocks (info->id_NumBlocks,
info->id_BytesPerBlock,
512);
fsp->fsu_bfree = fsp->fsu_bavail =
adjust_blocks (info->id_NumBlocks - info->id_NumBlocksUsed,
info->id_BytesPerBlock,
512);
fsp->fsu_files = fsp->fsu_ffree = -1;
result = 0;
}
UnLock (lock);
BPTR lock = Lock (path, SHARED_LOCK);
if (lock) {
if (Info (lock, info)) {
fsp->fsu_blocks = adjust_blocks (info->id_NumBlocks, info->id_BytesPerBlock, 512);
fsp->fsu_bfree = fsp->fsu_bavail = adjust_blocks (info->id_NumBlocks - info->id_NumBlocksUsed, info->id_BytesPerBlock, 512);
fsp->fsu_files = fsp->fsu_ffree = -1;
result = 0;
}
UnLock (lock);
}
FreeVec (info);
}
FreeVec (info);
}
return result;
return result;
}
#else /* ! TARGET_AMIGAOS */
@ -97,21 +90,20 @@ int get_fs_usage (const TCHAR *path, const TCHAR *disk, struct fs_usage *fsp)
int get_fs_usage (const char *path, const char *disk, struct fs_usage *fsp)
{
int result = -1;
dev_t device = dev_for_path (path);
int result = -1;
dev_t device = dev_for_path (path);
if (device >0) {
fs_info info;
if (fs_stat_dev (device, &info) == 0) {
fsp->fsu_blocks = adjust_blocks (info.total_blocks, info.block_size, 512);
fsp->fsu_bfree = fsp->fsu_bavail = adjust_blocks (info.free_blocks, info.block_size, 512);
fsp->fsu_files = info.total_nodes;
fsp->fsu_ffree = info.free_nodes;
result = 0;
if (device >0) {
fs_info info;
if (fs_stat_dev (device, &info) == 0) {
fsp->fsu_blocks = adjust_blocks (info.total_blocks, info.block_size, 512);
fsp->fsu_bfree = fsp->fsu_bavail = adjust_blocks (info.free_blocks, info.block_size, 512);
fsp->fsu_files = info.total_nodes;
fsp->fsu_ffree = info.free_nodes;
result = 0;
}
}
}
return result;
return result;
};
#else /* ! __BEOS__ */

46
src/gayle.c
View File

@ -55,6 +55,7 @@ DD2000 to DDFFFF A4000 IDE
DE0000 to DEFFFF 64 KB Motherboard resources
*/
/* A4000T NCR */
#define NCR_OFFSET 0x40
#define NCR_LONG_OFFSET 0x80
#define NCR_MASK 0x3f
@ -1518,12 +1519,15 @@ addrbank gayle_bank = {
dummy_lgeti, dummy_wgeti, ABFLAG_IO
};
static bool isa4000t (uaecptr addr)
static bool isa4000t (uaecptr *paddr)
{
if (currprefs.cs_mbdmac != 2)
return false;
uaecptr addr = *paddr;
if ((addr & 0xffff) >= (GAYLE_BASE_4000 & 0xffff))
return false;
addr &= 0xff;
*paddr = addr;
return true;
}
@ -1535,19 +1539,22 @@ static uae_u32 REGPARAM2 gayle_lget (uaecptr addr)
#ifdef JIT
special_mem |= S_READ;
#endif
if (isa4000t (addr)) {
addr &= 0xff;
#ifdef NCR
if (currprefs.cs_mbdmac == 2 && (addr & 0xffff) == 0x3000)
return 0xffffffff; // NCR DIP BANK
if (isa4000t (&addr)) {
if (addr >= NCR_LONG_OFFSET) {
addr &= NCR_MASK;
v = (ncr_io_bget (addr + 3) << 24) | (ncr_io_bget (addr + 2) << 16) |
(ncr_io_bget (addr + 1) << 8) | (ncr_io_bget (addr + 0));
v = (ncr_io_bget (addr + 3) << 0) | (ncr_io_bget (addr + 2) << 8) |
(ncr_io_bget (addr + 1) << 16) | (ncr_io_bget (addr + 0) << 24);
} else if (addr >= NCR_OFFSET) {
addr &= NCR_MASK;
v = (ncr_io_bget (addr + 0) << 24) | (ncr_io_bget (addr + 1) << 16) |
(ncr_io_bget (addr + 2) << 8) | (ncr_io_bget (addr + 3));
v = (ncr_io_bget (addr + 3) << 0) | (ncr_io_bget (addr + 2) << 8) |
(ncr_io_bget (addr + 1) << 16) | (ncr_io_bget (addr + 0) << 24);
}
return v;
}
#endif
ide_reg = get_gayle_ide_reg (addr, &ide);
if (ide_reg == IDE_DATA) {
v = ide_get_data (ide) << 16;
@ -1567,8 +1574,9 @@ static uae_u32 REGPARAM2 gayle_wget (uaecptr addr)
special_mem |= S_READ;
#endif
#ifdef NCR
if (isa4000t (addr)) {
addr &= 0xff;
if (currprefs.cs_mbdmac == 2 && (addr & (0xffff - 1)) == 0x3000)
return 0xffff; // NCR DIP BANK
if (isa4000t (&addr)) {
if (addr >= NCR_OFFSET) {
addr &= NCR_MASK;
v = (ncr_io_bget (addr) << 8) | ncr_io_bget (addr + 1);
@ -1589,8 +1597,9 @@ static uae_u32 REGPARAM2 gayle_bget (uaecptr addr)
special_mem |= S_READ;
#endif
#ifdef NCR
if (isa4000t (addr)) {
addr &= 0xff;
if (currprefs.cs_mbdmac == 2 && (addr & (0xffff - 3)) == 0x3000)
return 0xff; // NCR DIP BANK
if (isa4000t (&addr)) {
if (addr >= NCR_OFFSET) {
addr &= NCR_MASK;
return ncr_io_bget (addr);
@ -1608,8 +1617,7 @@ static void REGPARAM2 gayle_lput (uaecptr addr, uae_u32 value)
#ifdef JIT
special_mem |= S_WRITE;
#endif
if (isa4000t (addr)) {
addr &= 0xff;
if (isa4000t (&addr)) {
if (addr >= NCR_LONG_OFFSET) {
addr &= NCR_MASK;
ncr_io_bput (addr + 3, value >> 0);
@ -1618,10 +1626,10 @@ static void REGPARAM2 gayle_lput (uaecptr addr, uae_u32 value)
ncr_io_bput (addr + 0, value >> 24);
} else if (addr >= NCR_OFFSET) {
addr &= NCR_MASK;
ncr_io_bput (addr + 0, value >> 24);
ncr_io_bput (addr + 1, value >> 16);
ncr_io_bput (addr + 2, value >> 8);
ncr_io_bput (addr + 3, value >> 0);
ncr_io_bput (addr + 2, value >> 8);
ncr_io_bput (addr + 1, value >> 16);
ncr_io_bput (addr + 0, value >> 24);
}
return;
}
@ -1642,8 +1650,7 @@ static void REGPARAM2 gayle_wput (uaecptr addr, uae_u32 value)
special_mem |= S_WRITE;
#endif
#ifdef NCR
if (isa4000t (addr)) {
addr &= 0xff;
if (isa4000t (&addr)) {
if (addr >= NCR_OFFSET) {
addr &= NCR_MASK;
ncr_io_bput (addr, value >> 8);
@ -1667,8 +1674,7 @@ static void REGPARAM2 gayle_bput (uaecptr addr, uae_u32 value)
special_mem |= S_WRITE;
#endif
#ifdef NCR
if (isa4000t (addr)) {
addr &= 0xff;
if (isa4000t (&addr)) {
if (addr >= NCR_OFFSET) {
addr &= NCR_MASK;
ncr_io_bput (addr, value);

308
src/genblitter.c
View File

@ -1,11 +1,11 @@
/*
* UAE - The Un*x Amiga Emulator
*
* Optimized blitter minterm function generator
*
* Copyright 1995,1996 Bernd Schmidt
* Copyright 1996 Alessandro Bissacco
*/
/*
* UAE - The Un*x Amiga Emulator
*
* Optimized blitter minterm function generator
*
* Copyright 1995,1996 Bernd Schmidt
* Copyright 1996 Alessandro Bissacco
*/
#include "sysconfig.h"
#include <stdio.h>
@ -16,41 +16,41 @@
/* Here is the minterm table used in blitter function generation */
static unsigned char blttbl[]= {
0x00, 0x0a, 0x2a, 0x30, 0x3a, 0x3c, 0x4a, 0x6a, 0x8a, 0x8c, 0x9a, 0xa8,
0xaa, 0xb1, 0xca, 0xcc, 0xd8, 0xe2, 0xea, 0xf0, 0xfa, 0xfc
0x00, 0x0a, 0x2a, 0x30, 0x3a, 0x3c, 0x4a, 0x6a, 0x8a, 0x8c, 0x9a, 0xa8,
0xaa, 0xb1, 0xca, 0xcc, 0xd8, 0xe2, 0xea, 0xf0, 0xfa, 0xfc
};
static void generate_include(void)
{
int minterm;
printf("STATIC_INLINE uae_u32 blit_func(uae_u32 srca, uae_u32 srcb, uae_u32 srcc, uae_u8 mt)\n{\nswitch(mt){\n");
for (minterm = 0; minterm < 256; minterm++) {
printf("case 0x%x:\n", minterm);
printf("\treturn %s;\n", blitops[minterm].s);
}
printf("}\n");
printf("return 0;\n"); /* No, sir, it doesn't! */
printf("}\n");
int minterm;
printf("STATIC_INLINE uae_u32 blit_func(uae_u32 srca, uae_u32 srcb, uae_u32 srcc, uae_u8 mt)\n{\nswitch(mt){\n");
for (minterm = 0; minterm < 256; minterm++) {
printf("case 0x%x:\n", minterm);
printf("\treturn %s;\n", blitops[minterm].s);
}
printf("}\n");
printf("return 0;\n"); /* No, sir, it doesn't! */
printf("}\n");
}
static void generate_func(void)
{
unsigned int i;
printf("#include \"sysconfig.h\"\n");
printf("#include \"sysdeps.h\"\n");
printf("#include \"options.h\"\n");
printf("#include \"custom.h\"\n");
printf("#include \"memory_uae.h\"\n");
printf("#include \"blitter.h\"\n");
printf("#include \"blitfunc.h\"\n\n");
unsigned int i;
printf("#include \"sysconfig.h\"\n");
printf("#include \"sysdeps.h\"\n");
printf("#include \"options.h\"\n");
printf("#include \"custom.h\"\n");
printf("#include \"memory_uae.h\"\n");
printf("#include \"blitter.h\"\n");
printf("#include \"blitfunc.h\"\n\n");
for (i = 0; i < sizeof(blttbl); i++) {
int active = blitops[blttbl[i]].used;
int a_is_on = active & 1, b_is_on = active & 2, c_is_on = active & 4;
printf("void blitdofast_%x (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b)\n",blttbl[i]);
printf("{\n");
printf("int i,j;\n");
printf("uae_u32 totald = 0;\n");
for (i = 0; i < sizeof(blttbl); i++) {
int active = blitops[blttbl[i]].used;
int a_is_on = active & 1, b_is_on = active & 2, c_is_on = active & 4;
printf("void blitdofast_%x (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b)\n",blttbl[i]);
printf("{\n");
printf("int i,j;\n");
printf("uae_u32 totald = 0;\n");
#if 0
printf("if (currprefs.blits_32bit_enabled && b->hblitsize > 1");
if (a_is_on) printf(" && !b->blitashift && b->bltafwm==0xffff && b->bltalwm==0xffff");
@ -90,48 +90,48 @@ static void generate_func(void)
printf("} else {\n");
#endif
if (a_is_on) printf("uae_u32 preva = 0;\n");
if (b_is_on) printf("uae_u32 prevb = 0, srcb = b->bltbhold;\n");
if (c_is_on) printf("uae_u32 srcc = b->bltcdat;\n");
printf("uae_u32 dstd=0;\n");
printf("uaecptr dstp = 0;\n");
printf("for (j = b->vblitsize; j--; ) {\n");
if (a_is_on) {
printf("\tfor (i = 0; i < b->hblitsize; i++) {\n\t\tuae_u32 bltadat, srca;\n\n");
} else {
printf("\tfor (i = b->hblitsize; i--; ) {\n");
}
if (c_is_on) printf("\t\tif (ptc) { srcc = chipmem_wget_indirect (ptc); ptc += 2; }\n");
if (b_is_on) printf("\t\tif (ptb) {\n\t\t\tuae_u32 bltbdat = blt_info.bltbdat = chipmem_wget_indirect (ptb); ptb += 2;\n");
if (b_is_on) printf("\t\t\tsrcb = (((uae_u32)prevb << 16) | bltbdat) >> b->blitbshift;\n");
if (b_is_on) printf("\t\t\tprevb = bltbdat;\n\t\t}\n");
if (a_is_on) printf("\t\tif (pta) { bltadat = blt_info.bltadat = chipmem_wget_indirect (pta); pta += 2; } else { bltadat = blt_info.bltadat; }\n");
if (a_is_on) printf("\t\tbltadat &= blit_masktable[i];\n");
if (a_is_on) printf("\t\tsrca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift;\n");
if (a_is_on) printf("\t\tpreva = bltadat;\n");
printf("\t\tif (dstp) chipmem_wput_indirect (dstp, dstd);\n");
printf("\t\tdstd = (%s) & 0xFFFF;\n", blitops[blttbl[i]].s);
printf("\t\ttotald |= dstd;\n");
printf("\t\tif (ptd) { dstp = ptd; ptd += 2; }\n");
printf("\t}\n");
if (a_is_on) printf("\tif (pta) pta += b->bltamod;\n");
if (b_is_on) printf("\tif (ptb) ptb += b->bltbmod;\n");
if (c_is_on) printf("\tif (ptc) ptc += b->bltcmod;\n");
printf("\tif (ptd) ptd += b->bltdmod;\n");
printf("}\n");
if (b_is_on) printf("b->bltbhold = srcb;\n");
if (c_is_on) printf("b->bltcdat = srcc;\n");
printf("\t\tif (dstp) chipmem_wput_indirect (dstp, dstd);\n");
if (a_is_on) printf("uae_u32 preva = 0;\n");
if (b_is_on) printf("uae_u32 prevb = 0, srcb = b->bltbhold;\n");
if (c_is_on) printf("uae_u32 srcc = b->bltcdat;\n");
printf("uae_u32 dstd=0;\n");
printf("uaecptr dstp = 0;\n");
printf("for (j = b->vblitsize; j--; ) {\n");
if (a_is_on) {
printf("\tfor (i = 0; i < b->hblitsize; i++) {\n\t\tuae_u32 bltadat, srca;\n\n");
} else {
printf("\tfor (i = b->hblitsize; i--; ) {\n");
}
if (c_is_on) printf("\t\tif (ptc) { srcc = chipmem_wget_indirect (ptc); ptc += 2; }\n");
if (b_is_on) printf("\t\tif (ptb) {\n\t\t\tuae_u32 bltbdat = blt_info.bltbdat = chipmem_wget_indirect (ptb); ptb += 2;\n");
if (b_is_on) printf("\t\t\tsrcb = (((uae_u32)prevb << 16) | bltbdat) >> b->blitbshift;\n");
if (b_is_on) printf("\t\t\tprevb = bltbdat;\n\t\t}\n");
if (a_is_on) printf("\t\tif (pta) { bltadat = blt_info.bltadat = chipmem_wget_indirect (pta); pta += 2; } else { bltadat = blt_info.bltadat; }\n");
if (a_is_on) printf("\t\tbltadat &= blit_masktable[i];\n");
if (a_is_on) printf("\t\tsrca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift;\n");
if (a_is_on) printf("\t\tpreva = bltadat;\n");
printf("\t\tif (dstp) chipmem_wput_indirect (dstp, dstd);\n");
printf("\t\tdstd = (%s) & 0xFFFF;\n", blitops[blttbl[i]].s);
printf("\t\ttotald |= dstd;\n");
printf("\t\tif (ptd) { dstp = ptd; ptd += 2; }\n");
printf("\t}\n");
if (a_is_on) printf("\tif (pta) pta += b->bltamod;\n");
if (b_is_on) printf("\tif (ptb) ptb += b->bltbmod;\n");
if (c_is_on) printf("\tif (ptc) ptc += b->bltcmod;\n");
printf("\tif (ptd) ptd += b->bltdmod;\n");
printf("}\n");
if (b_is_on) printf("b->bltbhold = srcb;\n");
if (c_is_on) printf("b->bltcdat = srcc;\n");
printf("\t\tif (dstp) chipmem_wput_indirect (dstp, dstd);\n");
#if 0
printf("}\n");
#endif
printf("if (totald != 0) b->blitzero = 0;\n");
printf("}\n");
printf("if (totald != 0) b->blitzero = 0;\n");
printf("}\n");
printf("void blitdofast_desc_%x (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b)\n",blttbl[i]);
printf("{\n");
printf("uae_u32 totald = 0;\n");
printf("int i,j;\n");
printf("void blitdofast_desc_%x (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b)\n",blttbl[i]);
printf("{\n");
printf("uae_u32 totald = 0;\n");
printf("int i,j;\n");
#if 0
printf("if (currprefs.blits_32bit_enabled && b->hblitsize > 1");
if (a_is_on) printf(" && !b->blitashift && b->bltafwm==0xffff && b->bltalwm==0xffff");
@ -171,108 +171,108 @@ static void generate_func(void)
printf("} else {\n");
#endif
if (a_is_on) printf("uae_u32 preva = 0;\n");
if (b_is_on) printf("uae_u32 prevb = 0, srcb = b->bltbhold;\n");
if (c_is_on) printf("uae_u32 srcc = b->bltcdat;\n");
printf("uae_u32 dstd = 0;\n");
printf("uaecptr dstp = 0;\n");
printf("for (j = b->vblitsize; j--; ) {\n");
if (a_is_on) {
printf("\tfor (i = 0; i < b->hblitsize; i++) {\n\t\tuae_u32 bltadat, srca;\n");
} else {
printf("\tfor (i = b->hblitsize; i--; ) {\n");
}
if (c_is_on) printf("\t\tif (ptc) { srcc = chipmem_wget_indirect (ptc); ptc -= 2; }\n");
if (b_is_on) printf("\t\tif (ptb) {\n\t\t\tuae_u32 bltbdat = blt_info.bltbdat = chipmem_wget_indirect (ptb); ptb -= 2;\n");
if (b_is_on) printf("\t\t\tsrcb = ((bltbdat << 16) | prevb) >> b->blitdownbshift;\n");
if (b_is_on) printf("\t\t\tprevb = bltbdat;\n\t\t}\n");
if (a_is_on) printf("\t\tif (pta) { bltadat = blt_info.bltadat = chipmem_wget_indirect (pta); pta -= 2; } else { bltadat = blt_info.bltadat; }\n");
if (a_is_on) printf("\t\tbltadat &= blit_masktable[i];\n");
if (a_is_on) printf("\t\tsrca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift;\n");
if (a_is_on) printf("\t\tpreva = bltadat;\n");
printf("\t\tif (dstp) chipmem_wput_indirect (dstp, dstd);\n");
printf("\t\tdstd = (%s) & 0xFFFF;\n", blitops[blttbl[i]].s);
printf("\t\ttotald |= dstd;\n");
printf("\t\tif (ptd) { dstp = ptd; ptd -= 2; }\n");
printf("\t}\n");
if (a_is_on) printf("\tif (pta) pta -= b->bltamod;\n");
if (b_is_on) printf("\tif (ptb) ptb -= b->bltbmod;\n");
if (c_is_on) printf("\tif (ptc) ptc -= b->bltcmod;\n");
printf("\tif (ptd) ptd -= b->bltdmod;\n");
printf("}\n");
if (b_is_on) printf("b->bltbhold = srcb;\n");
if (c_is_on) printf("b->bltcdat = srcc;\n");
printf("\t\tif (dstp) chipmem_wput_indirect (dstp, dstd);\n");
if (a_is_on) printf("uae_u32 preva = 0;\n");
if (b_is_on) printf("uae_u32 prevb = 0, srcb = b->bltbhold;\n");
if (c_is_on) printf("uae_u32 srcc = b->bltcdat;\n");
printf("uae_u32 dstd = 0;\n");
printf("uaecptr dstp = 0;\n");
printf("for (j = b->vblitsize; j--; ) {\n");
if (a_is_on) {
printf("\tfor (i = 0; i < b->hblitsize; i++) {\n\t\tuae_u32 bltadat, srca;\n");
} else {
printf("\tfor (i = b->hblitsize; i--; ) {\n");
}
if (c_is_on) printf("\t\tif (ptc) { srcc = chipmem_wget_indirect (ptc); ptc -= 2; }\n");
if (b_is_on) printf("\t\tif (ptb) {\n\t\t\tuae_u32 bltbdat = blt_info.bltbdat = chipmem_wget_indirect (ptb); ptb -= 2;\n");
if (b_is_on) printf("\t\t\tsrcb = ((bltbdat << 16) | prevb) >> b->blitdownbshift;\n");
if (b_is_on) printf("\t\t\tprevb = bltbdat;\n\t\t}\n");
if (a_is_on) printf("\t\tif (pta) { bltadat = blt_info.bltadat = chipmem_wget_indirect (pta); pta -= 2; } else { bltadat = blt_info.bltadat; }\n");
if (a_is_on) printf("\t\tbltadat &= blit_masktable[i];\n");
if (a_is_on) printf("\t\tsrca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift;\n");
if (a_is_on) printf("\t\tpreva = bltadat;\n");
printf("\t\tif (dstp) chipmem_wput_indirect (dstp, dstd);\n");
printf("\t\tdstd = (%s) & 0xFFFF;\n", blitops[blttbl[i]].s);
printf("\t\ttotald |= dstd;\n");
printf("\t\tif (ptd) { dstp = ptd; ptd -= 2; }\n");
printf("\t}\n");
if (a_is_on) printf("\tif (pta) pta -= b->bltamod;\n");
if (b_is_on) printf("\tif (ptb) ptb -= b->bltbmod;\n");
if (c_is_on) printf("\tif (ptc) ptc -= b->bltcmod;\n");
printf("\tif (ptd) ptd -= b->bltdmod;\n");
printf("}\n");
if (b_is_on) printf("b->bltbhold = srcb;\n");
if (c_is_on) printf("b->bltcdat = srcc;\n");
printf("\t\tif (dstp) chipmem_wput_indirect (dstp, dstd);\n");
#if 0
printf("}\n");
#endif
printf("if (totald != 0) b->blitzero = 0;\n");
printf("}\n");
}
printf("if (totald != 0) b->blitzero = 0;\n");
printf("}\n");
}
}
static void generate_table(void)
{
unsigned int index = 0;
unsigned int i;
printf("#include \"sysconfig.h\"\n");
printf("#include \"sysdeps.h\"\n");
printf("#include \"options.h\"\n");
printf("#include \"custom.h\"\n");
printf("#include \"memory_uae.h\"\n");
printf("#include \"blitter.h\"\n");
printf("#include \"blitfunc.h\"\n\n");
printf("blitter_func * const blitfunc_dofast[256] = {\n");
for (i = 0; i < 256; i++) {
if (index < sizeof(blttbl) && i == blttbl[index]) {
printf("blitdofast_%x",i);
index++;
unsigned int index = 0;
unsigned int i;
printf("#include \"sysconfig.h\"\n");
printf("#include \"sysdeps.h\"\n");
printf("#include \"options.h\"\n");
printf("#include \"custom.h\"\n");
printf("#include \"memory_uae.h\"\n");
printf("#include \"blitter.h\"\n");
printf("#include \"blitfunc.h\"\n\n");
printf("blitter_func * const blitfunc_dofast[256] = {\n");
for (i = 0; i < 256; i++) {
if (index < sizeof(blttbl) && i == blttbl[index]) {
printf("blitdofast_%x",i);
index++;
}
else printf("0");
if (i < 255) printf(", ");
if ((i & 7) == 7) printf("\n");
}
else printf("0");
if (i < 255) printf(", ");
if ((i & 7) == 7) printf("\n");
}
printf("};\n\n");
printf("};\n\n");
index = 0;
printf("blitter_func * const blitfunc_dofast_desc[256] = {\n");
for (i = 0; i < 256; i++) {
if (index < sizeof(blttbl) && i == blttbl[index]) {
printf("blitdofast_desc_%x",i);
index++;
index = 0;
printf("blitter_func * const blitfunc_dofast_desc[256] = {\n");
for (i = 0; i < 256; i++) {
if (index < sizeof(blttbl) && i == blttbl[index]) {
printf("blitdofast_desc_%x",i);
index++;
}
else printf("0");
if (i < 255) printf(", ");
if ((i & 7) == 7) printf("\n");
}
else printf("0");
if (i < 255) printf(", ");
if ((i & 7) == 7) printf("\n");
}
printf("};\n");
printf("};\n");
}
static void generate_header(void)
{
unsigned int i;
for (i = 0; i < sizeof(blttbl); i++) {
unsigned int i;
for (i = 0; i < sizeof(blttbl); i++) {
printf("extern blitter_func blitdofast_%x;\n",blttbl[i]);
printf("extern blitter_func blitdofast_desc_%x;\n",blttbl[i]);
}
}
}
int main(int argc, char **argv)
{
char mode = 'i';
char mode = 'i';
if (argc == 2) mode = *argv[1];
switch (mode) {
case 'i': generate_include();
break;
case 'f': generate_func();
break;
case 't': generate_table();
break;
case 'h': generate_header();
break;
default: abort();
}
return 0;
if (argc == 2) mode = *argv[1];
switch (mode) {
case 'i': generate_include();
break;
case 'f': generate_func();
break;
case 't': generate_table();
break;
case 'h': generate_header();
break;
default: abort();
}
return 0;
}

3
src/gencomp.c
View File

@ -26,7 +26,7 @@
#define BOOL_TYPE "int"
#define failure global_failure=1
#define FAILURE global_failure=1
//REMOVEME: #define FAILURE global_failure=1
#define isjump global_isjump=1
#define is_const_jump global_iscjump=1;
#define isaddx global_isaddx=1
@ -110,6 +110,7 @@ read_counts (void)
}
fclose (file);
}
if (nr == nr_cpuop_funcs)
return;
for (opcode = 0; opcode < 0x10000; opcode++)

14
src/gencpu.c
View File

@ -199,7 +199,7 @@ static void addcycles_ce020 (int cycles, char *s)
if (s == NULL)
printf ("\t%s (%d);\n", do_cycles, cycles);
else
printf ("\t%s (%d); /* %d */\n", do_cycles, cycles, s);
printf ("\t%s (%d); /* %s */\n", do_cycles, cycles, s);
}
count_cycles += cycles;
count_cycles_ce020 += cycles;
@ -467,7 +467,7 @@ static const char *gen_nextiword (int flags)
} else {
if (using_prefetch) {
if (flags & GF_NOREFILL) {
sprintf (buffer, "regs.irc", r);
sprintf (buffer, "regs.irc");
} else {
sprintf (buffer, "%s (%d)", prefetch_word, r + 2);
count_read++;
@ -501,7 +501,7 @@ static const char *gen_nextibyte (int flags)
insn_n_cycles += 4;
if (using_prefetch) {
if (flags & GF_NOREFILL) {
sprintf (buffer, "(uae_u8)regs.irc", r);
sprintf (buffer, "(uae_u8)regs.irc");
} else {
sprintf (buffer, "(uae_u8)%s (%d)", prefetch_word, r + 2);
insn_n_cycles += 4;
@ -777,7 +777,7 @@ static void addopcycles_ce20 (int h, int t, int c, int subhead)
printf ("\tif (regs.ce020memcycles > %d * cpucycleunit)\n", h);
printf ("\t\tregs.ce020memcycles = %d * cpucycleunit;\n", h);
} else {
printf ("\tregs.ce020memcycles = 0;\n", h);
printf ("\tregs.ce020memcycles = 0;\n");
}
}
}
@ -886,7 +886,7 @@ static void addcycles_ea_ce020_htco (char *ea, int h, int t, int c, int oph)
printf ("\tif (regs.ce020memcycles > %d * cpucycleunit)\n", h);
printf ("\t\tregs.ce020memcycles = %d * cpucycleunit;\n", h);
} else {
printf ("\tregs.ce020memcycles = 0;\n", h);
printf ("\tregs.ce020memcycles = 0;\n");
}
if (1 && c > 0) {
@ -3514,7 +3514,7 @@ static void gen_opcode (unsigned long int opcode)
printf ("\tregs.sr = newsr;\n");
makefromsr ();
printf ("\tif (newpc & 1) {\n");
printf ("\t\texception3i (0x%04X, newpc);\n", opcode);
printf ("\t\texception3i (0x%04lX, newpc);\n", opcode);
printf ("\t\tgoto %s;\n", endlabelstr);
printf ("\t}\n");
setpc ("newpc");
@ -3763,7 +3763,7 @@ static void gen_opcode (unsigned long int opcode)
printf ("\ts = (uae_s32)src + 2;\n");
if (using_exception_3) {
printf ("\tif (src & 1) {\n");
printf ("\t\texception3pc (opcode, m68k_getpc () + s, 0, 1, m68k_getpc () + s);\n");
printf ("\t\texception3b (opcode, m68k_getpc () + s, 0, 1, m68k_getpc () + s);\n");
printf ("\t\tgoto %s;\n", endlabelstr);
printf ("\t}\n");
need_endlabel = 1;

36
src/hardfile.c
View File

@ -4,7 +4,7 @@
* Hardfile emulation
*
* Copyright 1995 Bernd Schmidt
* 2002 Toni Wilen (scsi emulation, 64-bit support)
* 2014 Toni Wilen (scsi emulation, 64-bit support)
*/
#define USE_CHD 0
@ -1698,27 +1698,25 @@ static uae_u32 REGPARAM2 hardfile_open (TrapContext *context)
int unit = mangleunit (m68k_dreg (regs, 0));
struct hardfileprivdata *hfpd = &hardfpd[unit];
int err = IOERR_OPENFAIL;
int size = get_word (ioreq + 0x12);
/* boot device port size == 0!? KS 1.x size = 12??? */
if (size >= IOSTDREQ_SIZE || size == 0 || kickstart_version == 0xffff || kickstart_version < 39) {
/* Check unit number */
if (unit >= 0) {
struct hardfiledata *hfd = get_hardfile_data (unit);
if (hfd && (hfd->handle_valid || hfd->drive_empty) && start_thread (context, unit)) {
put_word (hfpd->base + 32, get_word (hfpd->base + 32) + 1);
put_long (ioreq + 24, unit); /* io_Unit */
put_byte (ioreq + 31, 0); /* io_Error */
put_byte (ioreq + 8, 7); /* ln_type = NT_REPLYMSG */
hf_log (_T("hardfile_open, unit %d (%d), OK\n"), unit, m68k_dreg (regs, 0));
return 0;
}
/* boot device port size == 0!? KS 1.x size = 12???
* Ignore message size, too many programs do not set it correct
* int size = get_word (ioreq + 0x12);
*/
/* Check unit number */
if (unit >= 0) {
struct hardfiledata *hfd = get_hardfile_data (unit);
if (hfd && (hfd->handle_valid || hfd->drive_empty) && start_thread (context, unit)) {
put_word (hfpd->base + 32, get_word (hfpd->base + 32) + 1);
put_long (ioreq + 24, unit); /* io_Unit */
put_byte (ioreq + 31, 0); /* io_Error */
put_byte (ioreq + 8, 7); /* ln_type = NT_REPLYMSG */
hf_log (_T("hardfile_open, unit %d (%d), OK\n"), unit, m68k_dreg (regs, 0));
return 0;
}
if (unit < 1000 || is_hardfile (unit) == FILESYS_VIRTUAL || is_hardfile (unit) == FILESYS_CD)
err = 50; /* HFERR_NoBoard */
} else {
err = IOERR_BADLENGTH;
}
if (unit < 1000 || is_hardfile (unit) == FILESYS_VIRTUAL || is_hardfile (unit) == FILESYS_CD)
err = 50; /* HFERR_NoBoard */
hf_log (_T("hardfile_open, unit %d (%d), ERR=%d\n"), unit, m68k_dreg (regs, 0), err);
put_long (ioreq + 20, (uae_u32)err);
put_byte (ioreq + 31, (uae_u8)err);

6
src/include/cpu_prefetch.h
View File

@ -224,7 +224,7 @@ STATIC_INLINE void ipl_fetch (void)
STATIC_INLINE uae_u32 mem_access_delay_word_read (uaecptr addr)
{
uae_u32 v;
uae_u32 v;
switch (ce_banktype[addr >> 16])
{
case CE_MEMBANK_CHIP16:
@ -240,7 +240,7 @@ STATIC_INLINE uae_u32 mem_access_delay_word_read (uaecptr addr)
}
STATIC_INLINE uae_u32 mem_access_delay_wordi_read (uaecptr addr)
{
uae_u32 v;
uae_u32 v;
switch (ce_banktype[addr >> 16])
{
case CE_MEMBANK_CHIP16:
@ -257,7 +257,7 @@ STATIC_INLINE uae_u32 mem_access_delay_wordi_read (uaecptr addr)
STATIC_INLINE uae_u32 mem_access_delay_byte_read (uaecptr addr)
{
uae_u32 v;
uae_u32 v;
switch (ce_banktype[addr >> 16])
{
case CE_MEMBANK_CHIP16:

1
src/include/cpummu.h
View File

@ -336,6 +336,7 @@ extern void mmu_make_transparent_region(uaecptr baseaddr, uae_u32 size, int data
#define FC_INST (regs.s ? 6 : 2)
extern uaecptr REGPARAM3 mmu_translate(uaecptr addr, bool super, bool data, bool write) REGPARAM;
extern void mmu_bus_error(uaecptr addr, int fc, bool write, int size, bool rmw, uae_u32 status);
extern uae_u32 REGPARAM3 sfc_get_long(uaecptr addr) REGPARAM;
extern uae_u16 REGPARAM3 sfc_get_word(uaecptr addr) REGPARAM;

7
src/include/cpummu030.h
View File

@ -29,6 +29,7 @@ struct mmu030_access
extern struct mmu030_access mmu030_ad[MAX_MMU030_ACCESS];
uae_u32 REGPARAM3 get_disp_ea_020_mmu030 (uae_u32 base, int idx) REGPARAM;
void mmu030_page_fault(uaecptr addr, bool read, int flags, uae_u32 fc);
void mmu_op30_pmove (uaecptr pc, uae_u32 opcode, uae_u16 next, uaecptr extra);
void mmu_op30_ptest (uaecptr pc, uae_u32 opcode, uae_u16 next, uaecptr extra);
@ -199,7 +200,7 @@ static ALWAYS_INLINE void dfc030_put_long(uaecptr addr, uae_u32 val)
{
uae_u32 fc = regs.dfc;
#if MMUDEBUG > 2
write_log(_T("dfc030_put_long: FC = %i\n"),fc);
write_log(_T("dfc030_put_long: %08X = %08X FC = %i\n"), addr, val, fc);
#endif
if (unlikely(is_unaligned(addr, 4)))
mmu030_put_long_unaligned(addr, val, fc, 0);
@ -211,7 +212,7 @@ static ALWAYS_INLINE void dfc030_put_word(uaecptr addr, uae_u16 val)
{
uae_u32 fc = regs.dfc;
#if MMUDEBUG > 2
write_log(_T("dfc030_put_word: FC = %i\n"),fc);
write_log(_T("dfc030_put_word: %08X = %04X FC = %i\n"), addr, val, fc);
#endif
if (unlikely(is_unaligned(addr, 2)))
mmu030_put_word_unaligned(addr, val, fc, 0);
@ -223,7 +224,7 @@ static ALWAYS_INLINE void dfc030_put_byte(uaecptr addr, uae_u8 val)
{
uae_u32 fc = regs.dfc;
#if MMUDEBUG > 2
write_log(_T("dfc030_put_byte: FC = %i\n"),fc);
write_log(_T("dfc030_put_byte: %08X = %02X FC = %i\n"), addr, val, fc);
#endif
mmu030_put_byte(addr, val, fc);
}

3
src/include/mmu_common.h
View File

@ -4,6 +4,7 @@
#define MMUDEBUG 0
#define MMUINSDEBUG 0
#define MMUDEBUGMISC 0
#define unlikely(x) x
#define likely(x) x
@ -113,7 +114,7 @@ typedef int m68k_exception;
#define ALWAYS_INLINE __inline
// take care of 2 kinds of alignement, bus size and page
static inline bool is_unaligned(uaecptr addr, int size)
static ALWAYS_INLINE bool is_unaligned(uaecptr addr, int size)
{
return unlikely((addr & (size - 1)) && (addr ^ (addr + size - 1)) & regs.mmu_page_size);
}

9
src/include/newcpu.h
View File

@ -256,6 +256,8 @@ STATIC_INLINE void m68k_setpc (uaecptr newpc)
regs.instruction_pc = regs.pc = newpc;
}
extern void m68k_setpc_normal (uaecptr newpc);
STATIC_INLINE uaecptr m68k_getpc (void)
{
return (uaecptr)(regs.pc + ((uae_u8*)regs.pc_p - (uae_u8*)regs.pc_oldp));
@ -408,10 +410,12 @@ int get_cpu_model (void);
# undef Exception
#endif
extern void set_cpu_caches (bool flush);
void REGPARAM3 MakeSR (void) REGPARAM;
//void SetSR (uae_u16 sr);
void REGPARAM3 MakeFromSR (void) REGPARAM;
void REGPARAM3 Exception (int) REGPARAM;
void REGPARAM3 ExceptionL (int, uaecptr) REGPARAM;
void NMI (void);
void NMI_delayed (void);
void prepare_interrupt (uae_u32);
@ -451,8 +455,9 @@ void fpux_restore (int*);
void exception3 (uae_u32 opcode, uaecptr addr);
void exception3i (uae_u32 opcode, uaecptr addr);
extern void exception3pc (uae_u32 opcode, uaecptr addr, bool w, bool i, uaecptr pc);
void exception2 (uaecptr addr);
void exception3b (uae_u32 opcode, uaecptr addr, bool w, bool i, uaecptr pc);
void exception2 (uaecptr addr, bool read, int size, uae_u32 fc);
void exception2_fake (uaecptr addr);
void cpureset (void);
void cpu_halt (int id);

4
src/include/options.h
View File

@ -456,6 +456,10 @@ struct uae_prefs {
uae_u32 romextfile2addr;
TCHAR romextfile2[MAX_DPATH];
TCHAR romextident[256];
TCHAR a2091romfile[MAX_DPATH];
TCHAR a2091romident[256];
TCHAR a4091romfile[MAX_DPATH];
TCHAR a4091romident[256];
TCHAR flashfile[MAX_DPATH];
TCHAR rtcfile[MAX_DPATH];
#ifdef ACTION_REPLAY

15
src/include/readcpu.h
View File

@ -1,3 +1,14 @@
/*
* UAE - The Un*x Amiga Emulator
*
* Read 68000 CPU specs from file "table68k"
*
* Copyright 1995,1996 Bernd Schmidt
*/
#ifndef READCPU_H
#define READCPU_H
ENUMDECL {
Dreg, Areg, Aind, Aipi, Apdi, Ad16, Ad8r,
absw, absl, PC16, PC8r, imm, imm0, imm1, imm2, immi, am_unknown, am_illg
@ -30,7 +41,8 @@ ENUMDECL {
i_CINVL, i_CINVP, i_CINVA, i_CPUSHL, i_CPUSHP, i_CPUSHA, i_MOVE16,
i_MMUOP030, i_PFLUSHN, i_PFLUSH, i_PFLUSHAN, i_PFLUSHA,
i_PLPAR, i_PLPAW, i_PTESTR, i_PTESTW,
i_LPSTOP
i_LPSTOP,
MAX_OPCODE_FAMILY
} ENUMNAME (instrmnem);
struct mnemolookup {
@ -109,3 +121,4 @@ extern void do_merges (void);
extern int get_no_mismatches (void);
extern int nr_cpuop_funcs;
#endif /* READCPU_H */

7
src/include/rommgr.h
View File

@ -1,3 +1,10 @@
/*
* UAE - The Un*x Amiga Emulator
*
* ROM file management
*
*/
#ifndef ROMMGR_H
#define ROMMGR_H

9
src/include/scsi.h
View File

@ -1,3 +1,12 @@
/*
* UAE - The Un*x Amiga Emulator
*
* SCSI emulation (not uaescsi.device)
*
* Copyright 2007 Toni Wilen
*
*/
#pragma once
#ifndef SCSI_H
#define SCSI_H

9
src/include/uaenet.h
View File

@ -1,3 +1,12 @@
/*
* UAE - The Un*x Amiga Emulator
*
* Linux uaenet emulation
*
* Copyright 2007 Toni Wilen
* 2010 Mustafa TUFAN
*/
#pragma once
#ifndef UAENET_H
#define UAENET_H

7
src/include/uaeresource.h
View File

@ -1,3 +1,10 @@
/*
* UAE - The Un*x Amiga Emulator
*
* uae.resource
*
*/
#pragma once
#ifndef UAERESOURCE_H
#define UAERESOURCE_H

8
src/include/zarchive.h
View File

@ -1,3 +1,11 @@
/*
* UAE - The Un*x Amiga Emulator
*
* transparent archive handling
*
* 2007 Toni Wilen
*/
#pragma once
#ifndef ZARCHIVE_H
#define ZARCHIVE_H

1
src/main.c
View File

@ -983,6 +983,7 @@ void do_leave_program (void)
#endif
#ifdef A2091
a2091_free ();
a3000scsi_free ();
#endif
#ifdef NCR
ncr_free ();

14
src/memory.c
View File

@ -1740,6 +1740,13 @@ static void init_mem_banks (void)
#endif
}
static bool singlebit (uae_u32 v)
{
while (v && !(v & 1))
v >>= 1;
return (v & ~1) == 0;
}
static void allocate_memory (void)
{
bogomem_aliasing = false;
@ -1883,7 +1890,8 @@ static void allocate_memory (void)
mapped_free (custmem1_bank.baseaddr);
custmem1_bank.baseaddr = NULL;
custmem1_bank.allocated = currprefs.custom_memory_sizes[0];
custmem1_bank.mask = -1;
// custmem1 and 2 can have non-power of 2 size so only set correct mask if size is power of 2.
custmem1_bank.mask = singlebit (custmem1_bank.allocated) ? custmem1_bank.allocated - 1 : -1;
custmem1_bank.start = currprefs.custom_memory_addrs[0];
if (custmem1_bank.allocated) {
custmem1_bank.baseaddr = mapped_malloc (custmem1_bank.allocated, _T("custmem1"));
@ -1895,7 +1903,7 @@ static void allocate_memory (void)
mapped_free (custmem2_bank.baseaddr);
custmem2_bank.baseaddr = NULL;
custmem2_bank.allocated = currprefs.custom_memory_sizes[1];
custmem2_bank.mask = -1;
custmem2_bank.mask = singlebit (custmem2_bank.allocated) ? custmem2_bank.allocated - 1 : -1;
custmem2_bank.start = currprefs.custom_memory_addrs[1];
if (custmem2_bank.allocated) {
custmem2_bank.baseaddr = mapped_malloc (custmem2_bank.allocated, _T("custmem2"));
@ -2033,7 +2041,7 @@ void map_overlay (int chip)
}
fill_ce_banks ();
if (!isrestore () && valid_address (regs.pc, 4))
m68k_setpc (m68k_getpc ());
m68k_setpc_normal (m68k_getpc ());
}
uae_s32 getz2size (struct uae_prefs *p)

166
src/ncr_scsi.c
View File

@ -26,6 +26,7 @@
#include "scsi.h"
#include "filesys.h"
#include "zfile.h"
#include "blkdev.h"
#include "qemuvga/qemuuaeglue.h"
#include "qemuvga/queue.h"
#include "qemuvga/scsi/scsi.h"
@ -51,30 +52,37 @@ static int board_mask;
static int configured;
static uae_u8 acmemory[100];
struct ncrscsi {
TCHAR *name;
int be, le;
};
static struct DeviceState devobject;
static SCSIDevice *scsid[8];
static SCSIBus scsibus;
void pci_set_irq(PCIDevice *pci_dev, int level)
{
if (!level)
return;
INTREQ (0x8000 | 0x0008);
write_log (_T("NCR IRQ\n"));
}
void scsi_req_continue(SCSIRequest *req)
{
struct scsi_data *sd = (struct scsi_data*)req->dev->handle;
if (sd->data_len) {
lsi_transfer_data (req, sd->data_len);
} else {
if (sd->direction > 0)
scsi_emulate_cmd(sd);
lsi_command_complete (req, sd->status, 0);
}
}
SCSIRequest *scsi_req_new(SCSIDevice *d, uint32_t tag, uint32_t lun, uint8_t *buf, int len, void *hba_private)
{
SCSIRequest *req = xcalloc(SCSIRequest, 1);
req->dev = d;
struct scsi_data *sd = (struct scsi_data*)d->handle;
req->dev = d;
req->hba_private = hba_private;
req->bus = &scsibus;
req->bus->qbus.parent = &devobject;
memcpy (sd->cmd, buf, len);
sd->cmd_len = len;
@ -83,26 +91,37 @@ SCSIRequest *scsi_req_new(SCSIDevice *d, uint32_t tag, uint32_t lun, uint8_t *bu
int32_t scsi_req_enqueue(SCSIRequest *req)
{
struct scsi_data *sd = (struct scsi_data*)req->dev->handle;
sd->data_len = 0;
scsi_start_transfer (sd);
scsi_emulate_analyze (sd);
scsi_emulate_cmd(sd);
//write_log (_T("%02x.%02x.%02x.%02x.%02x.%02x\n"), sd->cmd[0], sd->cmd[1], sd->cmd[2], sd->cmd[3], sd->cmd[4], sd->cmd[5]);
if (sd->direction < 0)
scsi_emulate_cmd(sd);
if (sd->direction == 0)
return 1;
return -sd->direction;
}
void scsi_req_unref(SCSIRequest *req)
{
xfree (req);
}
uint8_t *scsi_req_get_buf(SCSIRequest *req)
{
return NULL;
struct scsi_data *sd = (struct scsi_data*)req->dev->handle;
sd->data_len = 0;
return sd->buffer;
}
SCSIDevice *scsi_device_find(SCSIBus *bus, int channel, int target, int lun)
{
if (lun != 0)
if (lun != 0 || target < 0 || target >= 8)
return NULL;
return scsid[target];
}
void scsi_req_cancel(SCSIRequest *req)
{
write_log (_T("scsi_req_cancel\n"));
}
@ -314,21 +333,6 @@ static void ew (int addr, uae_u32 value)
}
}
void ncr_free (void)
{
}
void ncr_reset (void)
{
configured = 0;
board_mask = 0xffff;
if (currprefs.cs_mbdmac == 2) {
configured = -1;
}
if (devobject.lsistate)
lsi_scsi_reset (&devobject);
}
void ncr_init (void)
{
lsi_scsi_init (&devobject);
@ -336,9 +340,7 @@ void ncr_init (void)
void ncr_autoconfig_init (void)
{
struct zfile *z;
int roms[3];
struct romlist *rl;
int i;
configured = 0;
@ -364,21 +366,24 @@ void ncr_autoconfig_init (void)
roms[1] = 57;
roms[2] = -1;
rl = getromlistbyids(roms);
if (rl) {
struct romdata *rd = rl->rd;
z = read_rom (&rd);
if (z) {
write_log (_T("A4091 BOOT ROM %d.%d\n"), rd->ver, rd->rev);
rom = xmalloc (uae_u8, ROM_SIZE * 4);
for (i = 0; i < ROM_SIZE; i++) {
uae_u8 b;
zfile_fread (&b, 1, 1, z);
rom[i * 4 + 0] = b;
rom[i * 4 + 2] = b << 4;
}
zfile_fclose(z);
struct zfile *z = read_rom_name (currprefs.a4091romfile);
if (!z) {
struct romlist *rl = getromlistbyids(roms);
if (rl) {
struct romdata *rd = rl->rd;
z = read_rom (&rd);
}
}
if (z) {
write_log (_T("A4091 BOOT ROM '%s'\n"), zfile_getname (z));
rom = xmalloc (uae_u8, ROM_SIZE * 4);
for (i = 0; i < ROM_SIZE; i++) {
uae_u8 b;
zfile_fread (&b, 1, 1, z);
rom[i * 4 + 0] = b;
rom[i * 4 + 2] = b << 4;
}
zfile_fclose(z);
} else {
romwarning (roms);
}
@ -387,9 +392,39 @@ void ncr_autoconfig_init (void)
map_banks (&ncr_bank, 0xe80000 >> 16, 65536 >> 16, 0);
}
static void freescsi_handle (struct scsi_data *sd)
{
if (!sd)
return;
hdf_hd_close (sd->hfd);
scsi_free (sd);
}
static void freescsi (SCSIDevice *scsi)
{
xfree (scsi);
if (scsi) {
freescsi_handle ((struct scsi_data*)scsi->handle);
xfree (scsi);
}
}
void ncr_free (void)
{
for (int ch = 0; ch < 8; ch++) {
freescsi (scsid[ch]);
scsid[ch] = NULL;
}
}
void ncr_reset (void)
{
configured = 0;
board_mask = 0xffff;
if (currprefs.cs_mbdmac == 2) {
configured = -1;
}
if (devobject.lsistate)
lsi_scsi_reset (&devobject);
}
static int add_scsi_hd (int ch, struct hd_hardfiledata *hfd, struct uaedev_config_info *ci, int scsi_level)
@ -414,23 +449,50 @@ static int add_scsi_hd (int ch, struct hd_hardfiledata *hfd, struct uaedev_confi
}
static int add_scsi_cd (int ch, int unitnum)
{
void *handle;
device_func_init (0);
freescsi (scsid[ch]);
scsid[ch] = NULL;
handle = scsi_alloc_cd (ch, unitnum, false);
if (!handle)
return 0;
scsid[ch] = xcalloc (SCSIDevice, 1);
scsid[ch]->handle = handle;
return scsid[ch] ? 1 : 0;
}
static int add_scsi_tape (int ch, const TCHAR *tape_directory, bool readonly)
{
void *handle;
freescsi (scsid[ch]);
scsid[ch] = NULL;
handle = scsi_alloc_tape (ch, tape_directory, readonly);
if (!handle)
return 0;
scsid[ch] = xcalloc (SCSIDevice, 1);
scsid[ch]->handle = handle;
return scsid[ch] ? 1 : 0;
}
int a4000t_add_scsi_unit (int ch, struct uaedev_config_info *ci)
{
// if (ci->type == UAEDEV_CD)
// return add_scsi_cd (ch, ci->device_emu_unit);
// else if (ci->type == UAEDEV_TAPE)
// return add_scsi_tape (ch, ci->rootdir, ci->readonly);
// else
if (ci->type == UAEDEV_CD)
return add_scsi_cd (ch, ci->device_emu_unit);
else if (ci->type == UAEDEV_TAPE)
return add_scsi_tape (ch, ci->rootdir, ci->readonly);
else
return add_scsi_hd (ch, NULL, ci, 1);
}
int a4091_add_scsi_unit (int ch, struct uaedev_config_info *ci)
{
// if (ci->type == UAEDEV_CD)
// return add_scsi_cd (ch, ci->device_emu_unit);
// else if (ci->type == UAEDEV_TAPE)
// return add_scsi_tape (ch, ci->rootdir, ci->readonly);
// else
if (ci->type == UAEDEV_CD)
return add_scsi_cd (ch, ci->device_emu_unit);
else if (ci->type == UAEDEV_TAPE)
return add_scsi_tape (ch, ci->rootdir, ci->readonly);
else
return add_scsi_hd (ch, NULL, ci, 1);
}

1072
src/newcpu.c
View File

File diff suppressed because it is too large Load Diff

1003
src/newcpu_common.c Normal file
View File

File diff suppressed because it is too large Load Diff

287
src/qemuvga/lsi53c895a.c
View File

@ -13,7 +13,7 @@
* as well-behaved operating systems will not try to use them.
*/
/* Hacked to partially support LSI53C710 for UAE by Toni Wilen */
/* Hacked to support LSI53C710 for UAE by Toni Wilen */
#include "sysdeps.h"
@ -27,8 +27,8 @@
#include "scsi/scsi.h"
//#include "sysemu/dma.h"
#define DEBUG_LSI
#define DEBUG_LSI_REG
//#define DEBUG_LSI
//#define DEBUG_LSI_REG
#ifdef DEBUG_LSI
#define DPRINTF(fmt, ...) \
@ -47,7 +47,7 @@ do { write_log("lsi_scsi: error: " fmt , ## __VA_ARGS__);} while (0)
#define LSI_SCNTL0_AAP 0x02
#define LSI_SCNTL0_EPG 0x08
#define LSI_SCNTL0_EPC 0x08
#define LSI_SCNTL0_WATN 0x10
#define LSI_SCNTL0_WATN 0x10,
#define LSI_SCNTL0_START 0x20
#define LSI_SCNTL1_RCV 0x01
@ -68,18 +68,14 @@ do { write_log("lsi_scsi: error: " fmt , ## __VA_ARGS__);} while (0)
#define LSI_SCNTL2_CHM 0x40
#define LSI_SCNTL2_SDU 0x80
#define LSI_ISTAT0_DIP 0x01
#define LSI_ISTAT0_SIP 0x02
#define LSI_ISTAT_DIP 0x01
#define LSI_ISTAT_SIP 0x02
//#define LSI_ISTAT0_INTF 0x04
#define LSI_ISTAT0_CON 0x08
#define LSI_ISTAT_CON 0x08
//#define LSI_ISTAT0_SEM 0x10
#define LSI_ISTAT0_SIGP 0x20
#define LSI_ISTAT0_SRST 0x40
#define LSI_ISTAT0_ABRT 0x80
#define LSI_ISTAT1_SI 0x01
#define LSI_ISTAT1_SRUN 0x02
#define LSI_ISTAT1_FLSH 0x04
#define LSI_ISTAT_SIGP 0x20
#define LSI_ISTAT_RST 0x40
#define LSI_ISTAT_ABRT 0x80
#define LSI_SSTAT1_WOA 0x04
@ -133,11 +129,9 @@ do { write_log("lsi_scsi: error: " fmt , ## __VA_ARGS__);} while (0)
#define LSI_DCNTL_CLSE 0x80
#define LSI_DMODE_MAN 0x01
#define LSI_DMODE_BOF 0x02
#define LSI_DMODE_ERMP 0x04
#define LSI_DMODE_ERL 0x08
#define LSI_DMODE_DIOM 0x10
#define LSI_DMODE_SIOM 0x20
#define LSI_DMODE_UO 0x02
#define LSI_DMODE_FAM 0x04
#define LSI_DMODE_PD 0x08
#define LSI_CTEST2_DACK 0x01
#define LSI_CTEST2_DREQ 0x02
@ -170,8 +164,6 @@ do { write_log("lsi_scsi: error: " fmt , ## __VA_ARGS__);} while (0)
/* Enable Response to Reselection */
#define LSI_SCID_RRE 0x60
#define LSI_CCNTL1_40BIT (LSI_CCNTL1_EN64TIBMV|LSI_CCNTL1_64TIMOD)
#define PHASE_DO 0
#define PHASE_DI 1
#define PHASE_CMD 2
@ -201,9 +193,9 @@ typedef struct {
//PCIDevice parent_obj;
/*< public >*/
MemoryRegion mmio_io;
MemoryRegion ram_io;
MemoryRegion io_io;
//MemoryRegion mmio_io;
//MemoryRegion ram_io;
//MemoryRegion io_io;
int carry; /* ??? Should this be an a visible register somewhere? */
int status;
@ -229,89 +221,62 @@ typedef struct {
uint32_t temp;
uint32_t dnad;
uint32_t dbc;
uint8_t istat0;
uint8_t istat1;
uint8_t istat;
uint8_t dcmd;
uint8_t dstat;
uint8_t dien;
// uint8_t sist0;
// uint8_t sist1;
uint8_t sien0;
// uint8_t sien1;
uint8_t mbox0;
uint8_t mbox1;
uint8_t dfifo;
uint8_t ctest2;
uint8_t ctest3;
uint8_t ctest4;
uint8_t ctest5;
uint8_t ccntl0;
uint8_t ccntl1;
uint32_t dsp;
uint32_t dsps;
uint8_t dmode;
uint8_t dcntl;
uint8_t scntl0;
uint8_t scntl1;
uint8_t scntl2;
uint8_t scntl3;
uint8_t sstat0;
uint8_t sstat1;
uint8_t scid;
uint8_t sxfer;
uint8_t socl;
uint8_t sdid;
uint8_t ssid;
uint8_t sfbr;
uint8_t stest1;
uint8_t stest2;
uint8_t stest3;
uint8_t sidl;
uint8_t stime0;
uint8_t respid0;
uint8_t respid1;
uint32_t mmrs;
uint32_t mmws;
uint32_t sfs;
uint32_t drs;
uint32_t sbms;
uint32_t dbms;
uint32_t dnad64;
uint32_t pmjad1;
uint32_t pmjad2;
uint32_t rbc;
uint32_t ua;
uint32_t ia;
uint32_t sbc;
uint32_t csbc;
uint32_t scratch[18]; /* SCRATCHA-SCRATCHR */
uint32_t scratch;
uint8_t sbr;
/* Script ram is stored as 32-bit words in host byteorder. */
uint32_t script_ram[2048];
uint8_t ctest0;
uint8_t ctest1;
uint8_t ctest6;
uint8_t ctest7;
uint8_t ctest8;
uint8_t lcrc;
uint8_t sstat2;
uint8_t dwt;
uint8_t script_active;
} LSIState;
#define TYPE_LSI53C810 "lsi53c810"
#define TYPE_LSI53C895A "lsi53c895a"
//#define TYPE_LSI53C810 "lsi53c810"
//#define TYPE_LSI53C895A "lsi53c895a"
#define LSI53C895A(obj) (LSIState*)obj->lsistate
//((LSIState*)(OBJECT_CHECK(LSIState, (obj), TYPE_LSI53C895A)))
static inline int lsi_irq_on_rsl(LSIState *s)
{
return 0;// return (s->sien0 & LSI_SIST0_RSL) && (s->scid & LSI_SCID_RRE);
return 0; //return (s->sien0 & LSI_SIST0_RSL) && (s->scid & LSI_SCID_RRE);
}
static void lsi_soft_reset(LSIState *s)
{
DPRINTF("Reset\n");
s->carry = 0;
memset (s, 0, sizeof (LSIState));
s->msg_action = 0;
s->msg_len = 0;
@ -320,9 +285,8 @@ static void lsi_soft_reset(LSIState *s)
s->dnad = 0;
s->dbc = 0;
s->temp = 0;
memset(s->scratch, 0, sizeof(s->scratch));
s->istat0 = 0;
s->istat1 = 0;
s->scratch = 0;
s->istat = 0;
s->dcmd = 0x40;
s->dstat = LSI_DSTAT_DFE;
s->dien = 0;
@ -330,57 +294,31 @@ static void lsi_soft_reset(LSIState *s)
// s->sist1 = 0;
s->sien0 = 0;
// s->sien1 = 0;
s->mbox0 = 0;
s->mbox1 = 0;
s->dfifo = 0;
s->ctest2 = LSI_CTEST2_DACK;
s->ctest3 = 0;
s->ctest4 = 0;
s->ctest5 = 0;
s->ccntl0 = 0;
s->ccntl1 = 0;
s->dsp = 0;
s->dsps = 0;
s->dmode = 0;
s->dcntl = 0;
s->scntl0 = 0xc0;
s->scntl1 = 0;
s->scntl2 = 0;
s->scntl3 = 0;
s->sstat0 = 0;
s->sstat1 = 0;
s->sstat2 = 0;
s->scid = 7;
s->scid = 0x80;
s->sxfer = 0;
s->socl = 0;
s->sdid = 0;
s->ssid = 0;
s->stest1 = 0;
s->stest2 = 0;
s->stest3 = 0;
s->sidl = 0;
s->stime0 = 0;
s->respid0 = 0x80;
s->respid1 = 0;
s->mmrs = 0;
s->mmws = 0;
s->sfs = 0;
s->drs = 0;
s->sbms = 0;
s->dbms = 0;
s->dnad64 = 0;
s->pmjad1 = 0;
s->pmjad2 = 0;
s->rbc = 0;
s->ua = 0;
s->ia = 0;
s->sbc = 0;
s->csbc = 0;
s->sbr = 0;
assert(QTAILQ_EMPTY(&s->queue));
assert(!s->current);
}
#if 0
static int lsi_dma_40bit(LSIState *s)
{
if ((s->ccntl1 & LSI_CCNTL1_40BIT) == LSI_CCNTL1_40BIT)
@ -401,6 +339,7 @@ static int lsi_dma_64bit(LSIState *s)
return 1;
return 0;
}
#endif
static uint8_t lsi_reg_readb(LSIState *s, int offset);
static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val);
@ -417,7 +356,7 @@ static inline uint32_t read_dword(LSIState *s, uint32_t addr)
static void lsi_stop_script(LSIState *s)
{
s->istat1 &= ~LSI_ISTAT1_SRUN;
s->script_active = 0;
}
static void lsi_update_irq(LSIState *s)
@ -434,20 +373,18 @@ static void lsi_update_irq(LSIState *s)
if (s->dstat) {
if (s->dstat & s->dien)
level = 1;
s->istat0 |= LSI_ISTAT0_DIP;
s->istat |= LSI_ISTAT_DIP;
} else {
s->istat0 &= ~LSI_ISTAT0_DIP;
s->istat &= ~LSI_ISTAT_DIP;
}
if (s->sstat0) {
if ((s->sstat0 & s->sien0))
level = 1;
s->istat0 |= LSI_ISTAT0_SIP;
s->istat |= LSI_ISTAT_SIP;
} else {
s->istat0 &= ~LSI_ISTAT0_SIP;
s->istat &= ~LSI_ISTAT_SIP;
}
// if (s->istat0 & LSI_ISTAT0_INTF)
// level = 1;
if (level != last_level) {
DPRINTF("Update IRQ level %d dstat %02x sist %02x%02x\n",
@ -502,23 +439,17 @@ static void lsi_script_dma_interrupt(LSIState *s, int stat)
static inline void lsi_set_phase(LSIState *s, int phase)
{
s->sstat2 = (s->sstat2 & ~PHASE_MASK) | phase;
s->ctest0 &= ~1;
if (phase == PHASE_DI)
s->ctest0 |= 1;
}
static void lsi_bad_phase(LSIState *s, int out, int new_phase)
{
/* Trigger a phase mismatch. */
if (s->ccntl0 & LSI_CCNTL0_ENPMJ) {
if ((s->ccntl0 & LSI_CCNTL0_PMJCTL)) {
s->dsp = out ? s->pmjad1 : s->pmjad2;
} else {
s->dsp = (s->scntl2 & LSI_SCNTL2_WSR ? s->pmjad2 : s->pmjad1);
}
DPRINTF("Data phase mismatch jump to %08x\n", s->dsp);
} else {
DPRINTF("Phase mismatch interrupt\n");
lsi_script_scsi_interrupt(s, LSI_SSTAT0_SGE);
lsi_stop_script(s);
}
DPRINTF("Phase mismatch interrupt\n");
lsi_script_scsi_interrupt(s, LSI_SSTAT0_MA);
lsi_stop_script(s);
lsi_set_phase(s, new_phase);
}
@ -571,16 +502,17 @@ static void lsi_do_dma(LSIState *s, int out)
count = s->current->dma_len;
addr = s->dnad;
/* both 40 and Table Indirect 64-bit DMAs store upper bits in dnad64 */
#if 0
/* both 40 and Table Indirect 64-bit DMAs store upper bits in dnad64 */
if (lsi_dma_40bit(s) || lsi_dma_ti64bit(s))
addr |= ((uint64_t)s->dnad64 << 32);
else if (s->dbms)
addr |= ((uint64_t)s->dbms << 32);
else if (s->sbms)
addr |= ((uint64_t)s->sbms << 32);
#endif
DPRINTF("DMA addr=0x" DMA_ADDR_FMT " len=%d\n", addr, count);
s->csbc += count;
s->dnad += count;
s->dbc -= count;
if (s->current->dma_buf == NULL) {
@ -639,11 +571,11 @@ static void lsi_reselect(LSIState *s, lsi_request *p)
s->current = p;
id = (p->tag >> 8) & 0xf;
s->ssid = id | 0x80;
/* LSI53C700 Family Compatibility, see LSI53C895A 4-73 */
if (!(s->dcntl & LSI_DCNTL_COM)) {
s->sfbr = 1 << (id & 0x7);
}
s->lcrc = 0;
DPRINTF("Reselected target %d\n", id);
s->scntl1 |= LSI_SCNTL1_CON;
lsi_set_phase(s, PHASE_MI);
@ -710,7 +642,7 @@ static int lsi_queue_req(LSIState *s, SCSIRequest *req, uint32_t len)
for service from the device driver. */
if (s->waiting == 1 ||
(lsi_irq_on_rsl(s) && !(s->scntl1 & LSI_SCNTL1_CON) &&
!(s->istat0 & (LSI_ISTAT0_SIP | LSI_ISTAT0_DIP)))) {
!(s->istat & (LSI_ISTAT_SIP | LSI_ISTAT_DIP)))) {
/* Reselect device. */
lsi_reselect(s, p);
return 0;
@ -729,6 +661,7 @@ void lsi_command_complete(SCSIRequest *req, uint32_t status, size_t resid)
out = (s->sstat2 & PHASE_MASK) == PHASE_DO;
DPRINTF("Command complete status=%d\n", (int)status);
s->lcrc = 0;
s->status = status;
s->command_complete = 2;
if (s->waiting && s->dbc != 0) {
@ -782,6 +715,8 @@ static int idbitstonum(int id)
num++;
id >>= 1;
}
if (num > 7)
num = -1;
return num;
}
@ -801,6 +736,7 @@ static void lsi_do_command(LSIState *s)
s->command_complete = 0;
id = (s->select_tag >> 8) & 0xf;
s->lcrc = 1 << (id & 0x7);
dev = scsi_device_find(&s->bus, 0, idbitstonum(id), s->current_lun);
if (!dev) {
lsi_bad_selection(s, id);
@ -1068,11 +1004,11 @@ static void lsi_execute_script(LSIState *s)
{
PCIDevice *pci_dev = PCI_DEVICE(s);
uint32_t insn;
uint32_t addr, addr_high;
uint32_t addr;
int opcode;
int insn_processed = 0;
s->istat1 |= LSI_ISTAT1_SRUN;
s->script_active = 1;
again:
insn_processed++;
insn = read_dword(s, s->dsp);
@ -1083,7 +1019,6 @@ again:
goto again;
}
addr = read_dword(s, s->dsp + 4);
addr_high = 0;
DPRINTF("SCRIPTS dsp=%08x opcode %08x arg %08x\n", s->dsp, insn, addr);
s->dsps = addr;
s->dcmd = insn >> 24;
@ -1096,9 +1031,6 @@ again:
break;
}
s->dbc = insn & 0xffffff;
s->rbc = s->dbc;
/* ??? Set ESA. */
s->ia = s->dsp - 8;
if (insn & (1 << 29)) {
/* Indirect addressing. */
addr = read_dword(s, addr);
@ -1112,10 +1044,10 @@ again:
pci_dma_read(pci_dev, s->dsa + offset, buf, 8);
/* byte count is stored in bits 0:23 only */
s->dbc = cpu_to_le32(buf[0]) & 0xffffff;
s->rbc = s->dbc;
addr = cpu_to_le32(buf[1]);
/* 40-bit DMA, upper addr bits [39:32] stored in first DWORD of
#if 0
/* 40-bit DMA, upper addr bits [39:32] stored in first DWORD of
* table, bits [31:24] */
if (lsi_dma_40bit(s))
addr_high = cpu_to_le32(buf[0]) >> 24;
@ -1172,6 +1104,7 @@ again:
s->dbms = read_dword(s, s->dsp);
s->dsp += 4;
s->ia = s->dsp - 12;
#endif
}
if ((s->sstat2 & PHASE_MASK) != ((insn >> 24) & 7)) {
DPRINTF("Wrong phase got %d expected %d\n",
@ -1180,7 +1113,6 @@ again:
break;
}
s->dnad = addr;
s->dnad64 = addr_high;
switch (s->sstat2 & 0x7) {
case PHASE_DO:
s->waiting = 2;
@ -1210,11 +1142,8 @@ again:
BADF("Unimplemented phase %d\n", s->sstat2 & PHASE_MASK);
exit(1);
}
s->dfifo = s->dbc & 0xff;
s->ctest5 = (s->ctest5 & 0xfc) | ((s->dbc >> 8) & 3);
s->sbc = s->dbc;
s->rbc -= s->dbc;
s->ua = addr + s->dbc;
break;
case 1: /* IO or Read/Write instruction. */
@ -1227,10 +1156,11 @@ again:
} else {
id = insn;
}
id = (id >> 16) & 0xf;
id = (id >> 16) & 0xff;
if (insn & (1 << 26)) {
addr = s->dsp + sextract32(addr, 0, 24);
}
id &= ~s->scid;
s->dnad = addr;
switch (opcode) {
case 0: /* Select */
@ -1247,13 +1177,13 @@ again:
break;
}
DPRINTF("Selected target %d%s\n",
id, insn & (1 << 3) ? " ATN" : "");
id, insn & (1 << 24) ? " ATN" : "");
/* ??? Linux drivers compain when this is set. Maybe
it only applies in low-level mode (unimplemented).
lsi_script_scsi_interrupt(s, LSI_SIST0_CMP, 0); */
s->select_tag = id << 8;
s->scntl1 |= LSI_SCNTL1_CON;
if (insn & (1 << 3)) {
if (insn & (1 << 24)) {
s->socl |= LSI_SOCL_ATN;
}
lsi_set_phase(s, PHASE_MO);
@ -1444,7 +1374,6 @@ again:
case 3: /* Interrupt */
DPRINTF("Interrupt 0x%08x\n", s->dsps);
if ((insn & (1 << 20)) != 0) {
//s->istat0 |= LSI_ISTAT0_INTF;
lsi_update_irq(s);
} else {
lsi_script_dma_interrupt(s, LSI_DSTAT_SIR);
@ -1508,7 +1437,7 @@ again:
fprintf(stderr, "inf. loop with UDC masked\n");
lsi_script_scsi_interrupt(s, LSI_SSTAT0_UDC);
lsi_disconnect(s);
} else if (s->istat1 & LSI_ISTAT1_SRUN && !s->waiting) {
} else if (s->script_active && !s->waiting) {
if (s->dcntl & LSI_DCNTL_SSM) {
lsi_script_dma_interrupt(s, LSI_DSTAT_SSI);
} else {
@ -1722,7 +1651,11 @@ static uint8_t lsi_reg_readb2(LSIState *s, int offset)
case 0x05: /* SXFER */
return s->sxfer;
case 0xc: /* DSTAT */
case 0xb: /* SBCL */
/* ??? This is not correct. However it's (hopefully) only
used for diagnostics, so should be ok. */
return 0;
case 0xc: /* DSTAT */
tmp = s->dstat | LSI_DSTAT_DFE;
s->dstat = 0;
// if ((s->istat0 & LSI_ISTAT0_INTF) == 0)
@ -1738,30 +1671,54 @@ static uint8_t lsi_reg_readb2(LSIState *s, int offset)
return s->sstat1;
case 0x0f: /* SSTAT2 */
return s->sstat2;
CASE_GET_REG32(dsa, 0x10)
case 0x14: /* CTEST0 */
return s->ctest0;
case 0x15: /* CTEST1 */
return 0xf0; // FMT and FFL are always empty
case 0x16: /* CTEST2 */
tmp = s->ctest2 | LSI_CTEST2_DACK;
if (s->istat0 & LSI_ISTAT0_SIGP) {
s->istat0 &= ~LSI_ISTAT0_SIGP;
if (s->istat & LSI_ISTAT_SIGP) {
s->istat &= ~LSI_ISTAT_SIGP;
tmp |= LSI_CTEST2_SIGP;
}
return tmp;
case 0x17: /* CTEST3 */
return s->ctest3;
case 0x18: /* CTEST4 */
return s->ctest4;
case 0x19: /* CTEST5 */
return s->ctest5;
case 0x1a: /* CTEST6 */
return s->ctest6;
case 0x1b: /* CTEST7 */
return s->ctest7;
CASE_GET_REG32(temp, 0x1c)
case 0x20: /* DFIFO */
return 0;
case 0x21: /* ISTAT */
return s->istat0;
return s->istat;
case 0x22: /* CTEST8 */
return (s->ctest8 | (2 << 4)) & ~0x08; // clear CLF
case 0x23: /* LCRC */
return s->lcrc;
CASE_GET_REG24(dbc, 0x24)
case 0x27: /* DCMD */
return s->dcmd;
CASE_GET_REG32(dnad, 0x28)
CASE_GET_REG32(dsp, 0x2c)
CASE_GET_REG32(dsps, 0x30)
CASE_GET_REG32(scratch, 0x34)
case 0x38: /* DMODE */
return s->dmode;
case 0x3a: /* DWT */
return s->dwt;
case 0x3b: /* DCNTL */
return s->dcntl;
}
#undef CASE_GET_REG24
#undef CASE_GET_REG32
write_log ("unknown register\n");
write_log ("read unknown register %02X\n", offset);
return 0;
}
static uint8_t lsi_reg_readb(LSIState *s, int offset)
@ -1828,32 +1785,46 @@ static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val)
return;
CASE_SET_REG32(dsa, 0x10)
case 0x14: /* CTEST0 */
s->ctest0 = val;
s->ctest0 = (val & 0xfe) | (s->ctest0 & 1);
break;
case 0x18: /* CTEST4 */
s->ctest4 = val;
break;
case 0x19: /* CTEST5 */
s->ctest5 = val;
break;
case 0x1a: /* CTEST6 */
s->ctest6 = val;
break;
case 0x1b: /* CTEST7 */
s->ctest7 = val;
break;
CASE_SET_REG32(temp, 0x1c)
case 0x21: /* ISTAT */
s->istat0 = (s->istat0 & 0x0f) | (val & 0xf0);
if (val & LSI_ISTAT0_ABRT) {
s->istat = (s->istat & 0x0f) | (val & 0xf0);
if (val & LSI_ISTAT_ABRT) {
lsi_script_dma_interrupt(s, LSI_DSTAT_ABRT);
}
// if (val & LSI_ISTAT0_INTF) {
// s->istat0 &= ~LSI_ISTAT0_INTF;
// lsi_update_irq(s);
// }
if (s->waiting == 1 && (val & LSI_ISTAT0_SIGP)) {
if (s->waiting == 1 && (val & LSI_ISTAT_SIGP)) {
DPRINTF("Woken by SIGP\n");
s->waiting = 0;
s->dsp = s->dnad;
lsi_execute_script(s);
}
// if (val & LSI_ISTAT0_SRST) {
// qdev_reset_all(DEVICE(s));
// }
if (val & LSI_ISTAT_RST) {
;//qdev_reset_all(DEVICE(s));
}
break;
case 0x22: /* CTEST8 */
s->ctest8 = val;
break;
case 0x23: /* LCRC */
s->lcrc = 0;
break;
CASE_SET_REG24(dbc, 0x24)
CASE_SET_REG32(dnad, 0x28)
case 0x2c: /* DSP[0:7] */
s->dsp &= 0xffffff00;
s->dsp |= val;
@ -1869,11 +1840,12 @@ static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val)
case 0x2f: /* DSP[24:31] */
s->dsp &= 0x00ffffff;
s->dsp |= val << 24;
if ((s->dmode & LSI_DMODE_MAN) == 0
&& (s->istat1 & LSI_ISTAT1_SRUN) == 0)
if ((s->dmode & LSI_DMODE_MAN) == 0) {
s->waiting = 0;
lsi_execute_script(s);
}
break;
CASE_SET_REG32(scratch, 0x34)
case 0x38: /* DMODE */
#if 0
if (val & (LSI_DMODE_SIOM | LSI_DMODE_DIOM)) {
@ -1886,13 +1858,16 @@ static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val)
s->dien = val;
lsi_update_irq(s);
break;
case 0x3a: /* DWT */
s->dwt = val;
break;
case 0x3b: /* DCNTL */
s->dcntl = val & ~(LSI_DCNTL_PFF | LSI_DCNTL_STD);
if ((val & LSI_DCNTL_STD) && (s->istat1 & LSI_ISTAT1_SRUN) == 0)
if ((val & LSI_DCNTL_STD) && (s->dmode & LSI_DMODE_MAN) == 0)
lsi_execute_script(s);
break;
default:
write_log ("unknown register\n");
write_log ("write unknown register %02X\n", offset);
break;
}
#undef CASE_SET_REG24
@ -2164,7 +2139,6 @@ static const MemoryRegionOps lsi_mmio_ops = {
1,
},
};
#endif
static void lsi_ram_write(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
@ -2195,7 +2169,6 @@ static uint64_t lsi_ram_read(void *opaque, hwaddr addr,
return val & mask;
}
#if 0
static const MemoryRegionOps lsi_ram_ops = {
lsi_ram_read,
lsi_ram_write,

14
src/rommgr.c
View File

@ -184,12 +184,12 @@ static struct romdata roms[] = {
{ _T("Arcadia TenPlay 3.11"), 0, 0, 0, 0, _T("ARCADIA\0"), 0, 76, 0, 0, ROMTYPE_ARCADIABIOS, 0, 0, NULL, 0, { 0, 0, 0, 0, 0 }, NULL },
{ _T("Arcadia TenPlay 4.00"), 0, 0, 0, 0, _T("ARCADIA\0"), 0, 77, 0, 0, ROMTYPE_ARCADIABIOS, 0, 0, NULL, 0, { 0, 0, 0, 0, 0 }, NULL },
{ _T("Freezer: Action Replay Mk I v1.00"), 1, 0, 1, 0, _T("AR\0"), 65536, 52, 0, 0, ROMTYPE_AR, 0, 1, NULL, 0x2d921771, { 0x1EAD9DDA, 0x2DAD2914, 0x6441F5EF, 0x72183750, 0x22E01248 }, NULL },
{ _T("A590/A2091 SCSI boot ROM"), 6, 0, 6, 0, _T("A590\0A2091\0"), 16384, 53, 0, 0, ROMTYPE_A2091BOOT, 0, 0, NULL, 0x8396cf4e, { 0x5E03BC61, 0x8C862ABE, 0x7BF79723, 0xB4EEF4D2, 0x1859A0F2 }, NULL },
{ _T("A590/A2091 SCSI boot ROM"), 6, 6, 6, 6, _T("A590\0A2091\0"), 16384, 54, 0, 0, ROMTYPE_A2091BOOT, 0, 0, NULL, 0x33e00a7a, { 0x739BB828, 0xE874F064, 0x9360F59D, 0x26B5ED3F, 0xBC99BB66 }, NULL },
{ _T("A590/A2091 SCSI boot ROM"), 7, 0, 7, 0, _T("A590\0A2091\0"), 16384, 55, 0, 0, ROMTYPE_A2091BOOT, 0, 0, NULL, 0x714a97a2, { 0xE50F01BA, 0xF2899892, 0x85547863, 0x72A82C33, 0x3C91276E }, NULL },
{ _T("A590/A2091 SCSI Guru boot ROM"), 6, 14, 6, 14, _T("A590\0A2091\0"), 32768, 56, 0, 0, ROMTYPE_A2091BOOT, 0, 0, NULL, 0x04e52f93, { 0x6DA21B6F, 0x5E8F8837, 0xD64507CD, 0x8A4D5CDC, 0xAC4F426B }, NULL },
{ _T("A4091 SCSI boot ROM"), 40, 9, 40, 9, _T("A4091\0"), 32768, 57, 0, 0, ROMTYPE_A4091BOOT, 0, 0, NULL, 0x00000000, { 0, 0, 0, 0, 0 }, NULL },
{ _T("A4091 SCSI boot ROM"), 40, 13, 40, 13, _T("A4091\0"), 32768, 58, 0, 0, ROMTYPE_A4091BOOT, 0, 0, _T("391592-02"), 0x54cb9e85, { 0x3CE66919, 0xF6FD6797, 0x4923A12D, 0x91B730F1, 0xFFB4A7BA }, NULL },
{ _T("A590/A2091 ROM 6.0"), 6, 0, 6, 0, _T("A590\0A2091\0"), 16384, 53, 0, 0, ROMTYPE_A2091BOOT, 0, 0, NULL, 0x8396cf4e, { 0x5E03BC61, 0x8C862ABE, 0x7BF79723, 0xB4EEF4D2, 0x1859A0F2 }, NULL },
{ _T("A590/A2091 ROM 6.6"), 6, 6, 6, 6, _T("A590\0A2091\0"), 16384, 54, 0, 0, ROMTYPE_A2091BOOT, 0, 0, NULL, 0x33e00a7a, { 0x739BB828, 0xE874F064, 0x9360F59D, 0x26B5ED3F, 0xBC99BB66 }, NULL },
{ _T("A590/A2091 ROM 7.0"), 7, 0, 7, 0, _T("A590\0A2091\0"), 16384, 55, 0, 0, ROMTYPE_A2091BOOT, 0, 0, NULL, 0x714a97a2, { 0xE50F01BA, 0xF2899892, 0x85547863, 0x72A82C33, 0x3C91276E }, NULL },
{ _T("A590/A2091 Guru ROM 6.14"), 6, 14, 6, 14, _T("A590\0A2091\0"), 32768, 56, 0, 0, ROMTYPE_A2091BOOT, 0, 0, NULL, 0x04e52f93, { 0x6DA21B6F, 0x5E8F8837, 0xD64507CD, 0x8A4D5CDC, 0xAC4F426B }, NULL },
{ _T("A4091 SCSI ROM 40.9"), 40, 9, 40, 9, _T("A4091\0"), 32768, 57, 0, 0, ROMTYPE_A4091BOOT, 0, 0, NULL, 0x00000000, { 0, 0, 0, 0, 0 }, NULL },
{ _T("A4091 SCSI ROM 40.13"), 40, 13, 40, 13, _T("A4091\0"), 32768, 58, 0, 0, ROMTYPE_A4091BOOT, 0, 0, _T("391592-02"), 0x54cb9e85, { 0x3CE66919, 0xF6FD6797, 0x4923A12D, 0x91B730F1, 0xFFB4A7BA }, NULL },
{ _T("KS ROM v1.4 (A3000)"), 1, 4, 36, 16, _T("A3000\0"), 524288, 59, 3, 0, ROMTYPE_KICK, 0, 0, NULL, 0xbc0ec13f, { 0xF76316BF, 0x36DFF14B, 0x20FA349E, 0xD02E4B11, 0xDD932B07 }, NULL },
{ _T("Freezer: Action Cart. Super IV Pro (+ROM v4.3)"), 4, 3, 4, 3, _T("SUPERIV\0"), 170368, 60, 0, 0, ROMTYPE_SUPERIV, 0, 1, NULL, 0xe668a0be, { 0x633A6E65, 0xA93580B8, 0xDDB0BE9C, 0x9A64D4A1, 0x7D4B4801 }, NULL },
{ _T("KS ROM v3.1 (A3000)"), 3, 1, 40, 68, _T("A3000\0"), 524288, 61, 2, 0, ROMTYPE_KICK, 0, 0, NULL, 0xefb239cc, { 0xF8E210D7, 0x2B4C4853, 0xE0C9B85D, 0x223BA20E, 0x3D1B36EE }, NULL },
@ -207,7 +207,7 @@ static struct romdata roms[] = {
{ _T("KS ROM v2.04 (A3000)"), 2, 4, 37, 175, _T("A3000\0"), 524288, 71, 8, 0, ROMTYPE_KICK, 0, 0, NULL, 0x234a7233, { 0xd82ebb59, 0xafc53540, 0xddf2d718, 0x7ecf239b, 0x7ea91590 }, NULL },
{ _T("The Diagnostic 2.0 (Logica)"), 2, 0, 2, 0, _T("LOGICA\0"), 524288, 72, 0, 0, ROMTYPE_KICK_SPC, 0, 0, NULL, 0x8484f426, { 0xba10d161, 0x66b2e2d6, 0x177c979c, 0x99edf846, 0x2b21651e }, NULL },
{ _T("Cloanto Amiga Forever 2010 ROM key"), 0, 0, 0, 0, NULL, 1544, 73, 0, 1, ROMTYPE_KEY, 0, 0, NULL, 0x8c4dd05c, { 0x05034f62, 0x0b5bb7b2, 0x86954ea9, 0x164fdb90, 0xfb2897a4 }, NULL },
{ _T("CD32 MPEG Cartridge ROM"), 3, 1, 40, 22, _T("CD32FMV\0"), 262144, 74, 1, 0, ROMTYPE_CD32CART, 0, 0, _T("391777-01"), 0xc2002d08, { 0xa1ca2d71 ,0x7efb6c60, 0xb9bfabeb, 0x0280ae97, 0xe82b0cb9 }, NULL },
{ _T("CD32 MPEG Cartridge ROM"), 3, 1, 40, 22, _T("CD32FMV\0"), 262144, 74, 1, 0, ROMTYPE_CD32CART, 0, 0, _T("391777-01"), 0xc2002d08, { 0xa1ca2d71 ,0x7efb6c60, 0xb9bfabeb, 0x0280ae97, 0xe82b0cb9 }, NULL },
/* Format of the ALTROMPN() macro: (Please keep valid!)
* (id,grp,num, size, flags, pn, crc32, sha1[0], sha1[1], sha1[2], sha1[3], sha1[4] ) */

9
src/tools/Makefile.in
View File

@ -29,11 +29,15 @@ install:
clean:
-rm -f *.o cpudefs.c gencpu gencomp genblitter build68k genlinetoscr
-rm -f *.o
-rm cpudefs.c
-rm -f gencpu gencomp genblitter build68k genlinetoscr
distclean: clean
-rm -f config.cache config.log config.status Makefile sysconfig.h *.c
-rm -f config.cache config.log config.status
-rm -f Makefile sysconfig.h
-rm -f *.c
genblitter: genblitter.o blitops.o writelog.o
$(CC) $(LDFLAGS) -o genblitter genblitter.o blitops.o writelog.o
@ -50,7 +54,6 @@ custom.o: blit.h
drawing.o: linetoscr.c
cpudefs.c: build68k @top_srcdir@/../table68k
sleep 1s
./build68k <@top_srcdir@/../table68k >cpudefs.c
.c.o:

1
src/uaenet.c
View File

@ -7,7 +7,6 @@
* 2010 Mustafa TUFAN
*/
#include "sysconfig.h"
#include <stdio.h>