2007-12-22 05:25:57 +00:00
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#include <stdio.h>
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#include <string.h>
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#include "PtrMacro.h"
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#include "MIPS.h"
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#include "COP_SCU.h"
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const char* CMIPS::m_sGPRName[] =
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{
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"R0", "AT", "V0", "V1", "A0", "A1", "A2", "A3",
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"T0", "T1", "T2", "T3", "T4", "T5", "T6", "T7",
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"S0", "S1", "S2", "S3", "S4", "S5", "S6", "S7",
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"T8", "T9", "K0", "K1", "GP", "SP", "FP", "RA"
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};
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2011-10-23 20:19:51 +00:00
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CMIPS::CMIPS(MEMORYMAP_ENDIANESS nEnd, uint32 nExecStart, uint32 nExecEnd)
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: m_pAddrTranslator(NULL)
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, m_pArch(NULL)
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2007-12-22 05:25:57 +00:00
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{
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m_pAnalysis = new CMIPSAnalysis(this);
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switch(nEnd)
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{
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case MEMORYMAP_ENDIAN_LSBF:
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m_pMemoryMap = new CMemoryMap_LSBF;
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break;
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case MEMORYMAP_ENDIAN_MSBF:
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//
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break;
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}
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m_pCOP[0] = NULL;
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m_pCOP[1] = NULL;
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m_pCOP[2] = NULL;
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m_pCOP[3] = NULL;
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2008-05-02 15:00:27 +00:00
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Reset();
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2007-12-22 05:25:57 +00:00
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m_nIllOpcode = MIPS_INVALID_PC;
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}
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CMIPS::~CMIPS()
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{
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DELETEPTR(m_pMemoryMap);
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DELETEPTR(m_pAnalysis);
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}
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2008-05-02 15:00:27 +00:00
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void CMIPS::Reset()
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{
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memset(&m_State, 0, sizeof(MIPSSTATE));
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m_State.nDelayedJumpAddr = MIPS_INVALID_PC;
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//Set VF0[w] to 1.0
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m_State.nCOP2[0].nV3 = 0x3F800000;
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}
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2007-12-22 05:25:57 +00:00
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void CMIPS::ToggleBreakpoint(uint32 address)
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{
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if(m_breakpoints.find(address) != m_breakpoints.end())
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{
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m_breakpoints.erase(address);
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return;
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}
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m_breakpoints.insert(address);
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}
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long CMIPS::GetBranch(uint16 nData)
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{
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if(nData & 0x8000)
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{
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return -((0x10000 - nData) * 4);
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}
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else
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{
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return ((nData & 0x7FFF) * 4);
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}
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}
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bool CMIPS::IsBranch(uint32 nAddress)
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{
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uint32 nOpcode;
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2008-06-15 19:55:28 +00:00
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nOpcode = m_pMemoryMap->GetInstruction(nAddress);
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2007-12-22 05:25:57 +00:00
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return m_pArch->IsInstructionBranch(this, nAddress, nOpcode);
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}
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uint32 CMIPS::TranslateAddress64(CMIPS* pC, uint32 nVAddrHI, uint32 nVAddrLO)
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{
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//Proper address translation?
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return nVAddrLO & 0x1FFFFFFF;
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}
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bool CMIPS::GenerateInterrupt(uint32 nAddress)
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{
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//Check if interrupts are enabled
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2008-05-13 21:43:29 +00:00
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if(!(m_State.nCOP0[CCOP_SCU::STATUS] & STATUS_INT)) return false;
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2007-12-22 05:25:57 +00:00
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//Check if we're in exception mode (interrupts are disabled in exception mode)
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2008-05-13 21:43:29 +00:00
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if(m_State.nCOP0[CCOP_SCU::STATUS] & STATUS_EXL) return false;
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2007-12-22 05:25:57 +00:00
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return CMIPS::GenerateException(nAddress);
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}
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bool CMIPS::GenerateException(uint32 nAddress)
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{
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//Save exception PC
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if(m_State.nDelayedJumpAddr != MIPS_INVALID_PC)
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{
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m_State.nCOP0[CCOP_SCU::EPC] = m_State.nPC - 4;
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//m_State.nCOP0[CCOP_SCU::EPC] = m_State.nDelayedJumpAddr;
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}
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else
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{
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m_State.nCOP0[CCOP_SCU::EPC] = m_State.nPC;
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}
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m_State.nDelayedJumpAddr = MIPS_INVALID_PC;
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m_State.nPC = nAddress;
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//Set in exception mode
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2011-10-23 20:19:51 +00:00
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m_State.nCOP0[CCOP_SCU::STATUS] |= STATUS_EXL;
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2007-12-22 05:25:57 +00:00
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return true;
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}
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bool CMIPS::MustBreak()
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{
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return m_breakpoints.find(m_State.nPC) != m_breakpoints.end();
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}
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