mirror of
https://github.com/libretro/Play-.git
synced 2025-01-24 01:54:59 +00:00
Removed MipsTest because AutoTests covers everything that it covers.
This commit is contained in:
Jean-Philip Desjardins
parent
f4bc5f4953
commit
8f33d69351
@ -1,220 +0,0 @@
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|
||||
{FDDEEF2D-1ED6-44B7-B88A-912C2400EA8D}.Release|x64.ActiveCfg = Release|x64
|
||||
{FDDEEF2D-1ED6-44B7-B88A-912C2400EA8D}.Release|x64.Build.0 = Release|x64
|
||||
{FDDEEF2D-1ED6-44B7-B88A-912C2400EA8D}.ReleaseWithDebugger|Win32.ActiveCfg = Release|Win32
|
||||
{FDDEEF2D-1ED6-44B7-B88A-912C2400EA8D}.ReleaseWithDebugger|x64.ActiveCfg = Release|x64
|
||||
{DF91D764-A551-4EA8-A8DF-3E49E1B879EB}.Debug|Win32.ActiveCfg = Debug|Win32
|
||||
{DF91D764-A551-4EA8-A8DF-3E49E1B879EB}.Debug|Win32.Build.0 = Debug|Win32
|
||||
{DF91D764-A551-4EA8-A8DF-3E49E1B879EB}.Debug|x64.ActiveCfg = Debug|x64
|
||||
@ -174,7 +162,6 @@ Global
|
||||
{E3521577-BFC9-4532-9B70-1F8C0D546F4A} = {84FCC3FB-586F-4614-A3C1-654525D87C9B}
|
||||
{482892BB-6D81-4CA4-BFD5-01A756C21292} = {84FCC3FB-586F-4614-A3C1-654525D87C9B}
|
||||
{A286EAD1-ACEA-4132-ACDD-6520168BDEBB} = {84FCC3FB-586F-4614-A3C1-654525D87C9B}
|
||||
{FDDEEF2D-1ED6-44B7-B88A-912C2400EA8D} = {D05BD6D7-C644-418C-9767-5D392359079F}
|
||||
{DF91D764-A551-4EA8-A8DF-3E49E1B879EB} = {D05BD6D7-C644-418C-9767-5D392359079F}
|
||||
{8C48C11A-7C3F-4699-B62F-B0A66F0F78F7} = {84FCC3FB-586F-4614-A3C1-654525D87C9B}
|
||||
{55FCF74F-E31A-4D0D-B86A-76EAE76ACE39} = {D05BD6D7-C644-418C-9767-5D392359079F}
|
||||
|
||||
@ -1,44 +0,0 @@
|
||||
#include "Add64Test.h"
|
||||
#include "MIPSAssembler.h"
|
||||
|
||||
void CAdd64Test::Execute(CTestVm& virtualMachine)
|
||||
{
|
||||
const uint32 baseAddress = 0x100;
|
||||
const uint64 constantValue0 = 0xFFF0FFFFFFFFFFFFULL;
|
||||
const uint64 constantValue1 = 0x8000000000000001ULL;
|
||||
CMIPS::REGISTER valueRegister0 = CMIPS::A0;
|
||||
CMIPS::REGISTER valueRegister1 = CMIPS::A1;
|
||||
CMIPS::REGISTER addReg32Result = CMIPS::T0;
|
||||
CMIPS::REGISTER addReg64Result = CMIPS::T1;
|
||||
CMIPS::REGISTER addCst32Result = CMIPS::T2;
|
||||
CMIPS::REGISTER addCst64Result = CMIPS::T3;
|
||||
|
||||
virtualMachine.Reset();
|
||||
|
||||
{
|
||||
CMIPSAssembler assembler(reinterpret_cast<uint32*>(virtualMachine.m_ram + baseAddress));
|
||||
|
||||
assembler.ADDU(addReg32Result, valueRegister0, valueRegister1);
|
||||
assembler.DADDU(addReg64Result, valueRegister0, valueRegister1);
|
||||
assembler.ADDIU(addCst32Result, valueRegister0, constantValue1);
|
||||
assembler.DADDIU(addCst64Result, valueRegister0, constantValue1);
|
||||
|
||||
assembler.SYSCALL();
|
||||
}
|
||||
|
||||
//Setup initial state
|
||||
virtualMachine.m_cpu.m_State.nGPR[valueRegister0].nD0 = constantValue0;
|
||||
virtualMachine.m_cpu.m_State.nGPR[valueRegister1].nD0 = constantValue1;
|
||||
|
||||
//Execute
|
||||
virtualMachine.ExecuteTest(baseAddress);
|
||||
|
||||
//Check final state
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[valueRegister0].nD0 == constantValue0);
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[valueRegister1].nD0 == constantValue1);
|
||||
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[addReg32Result].nD0 == static_cast<int32>(constantValue0 + constantValue1));
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[addReg64Result].nD0 == constantValue0 + constantValue1);
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[addCst32Result].nD0 == static_cast<int32>(constantValue0 + static_cast<int16>(constantValue1)));
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[addCst64Result].nD0 == constantValue0 + static_cast<int16>(constantValue1));
|
||||
}
|
||||
@ -1,9 +0,0 @@
|
||||
#pragma once
|
||||
|
||||
#include "Test.h"
|
||||
|
||||
class CAdd64Test : public CTest
|
||||
{
|
||||
public:
|
||||
void Execute(CTestVm&);
|
||||
};
|
||||
@ -1,72 +0,0 @@
|
||||
#include "ExchangeTest.h"
|
||||
#include "ee/EEAssembler.h"
|
||||
|
||||
void CExchangeTest::Execute(CTestVm& virtualMachine)
|
||||
{
|
||||
auto& cpu = virtualMachine.m_cpu;
|
||||
|
||||
const uint32 baseAddress = 0x100;
|
||||
const uint32 constantValue0 = 0x00000000;
|
||||
const uint32 constantValue1 = 0x11111111;
|
||||
const uint32 constantValue2 = 0x22222222;
|
||||
const uint32 constantValue3 = 0x33333333;
|
||||
const uint64 exchResultLow = 0x1111000011110000ULL;
|
||||
const uint64 exchResultHigh = 0x3333222233332222ULL;
|
||||
const uint64 excwResultLow = 0x2222222200000000ULL;
|
||||
const uint64 excwResultHigh = 0x3333333311111111ULL;
|
||||
|
||||
auto valueRegister = CMIPS::A0;
|
||||
auto exchResult = CMIPS::T0;
|
||||
auto exchSelfResult = CMIPS::T1;
|
||||
auto excwResult = CMIPS::T2;
|
||||
auto excwSelfResult = CMIPS::T3;
|
||||
|
||||
virtualMachine.Reset();
|
||||
|
||||
{
|
||||
CEEAssembler assembler(reinterpret_cast<uint32*>(virtualMachine.m_ram + baseAddress));
|
||||
|
||||
//PEXCH
|
||||
assembler.PEXCH(exchResult, valueRegister);
|
||||
|
||||
//PEXCH (self)
|
||||
assembler.PADDW(exchSelfResult, valueRegister, CMIPS::R0);
|
||||
assembler.PEXCH(exchSelfResult, exchSelfResult);
|
||||
|
||||
//PEXCW
|
||||
assembler.PEXCW(excwResult, valueRegister);
|
||||
|
||||
//PEXCW (self)
|
||||
assembler.PADDW(excwSelfResult, valueRegister, CMIPS::R0);
|
||||
assembler.PEXCW(excwSelfResult, excwSelfResult);
|
||||
|
||||
assembler.SYSCALL();
|
||||
}
|
||||
|
||||
//Setup initial state
|
||||
cpu.m_State.nGPR[valueRegister].nV[0] = constantValue0;
|
||||
cpu.m_State.nGPR[valueRegister].nV[1] = constantValue1;
|
||||
cpu.m_State.nGPR[valueRegister].nV[2] = constantValue2;
|
||||
cpu.m_State.nGPR[valueRegister].nV[3] = constantValue3;
|
||||
|
||||
//Execute
|
||||
virtualMachine.ExecuteTest(baseAddress);
|
||||
|
||||
//Check final state
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister].nV[0] == constantValue0);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister].nV[1] == constantValue1);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister].nV[2] == constantValue2);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister].nV[3] == constantValue3);
|
||||
|
||||
TEST_VERIFY(cpu.m_State.nGPR[exchResult].nD0 == exchResultLow);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[exchResult].nD1 == exchResultHigh);
|
||||
|
||||
TEST_VERIFY(cpu.m_State.nGPR[exchSelfResult].nD0 == exchResultLow);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[exchSelfResult].nD1 == exchResultHigh);
|
||||
|
||||
TEST_VERIFY(cpu.m_State.nGPR[excwResult].nD0 == excwResultLow);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[excwResult].nD1 == excwResultHigh);
|
||||
|
||||
TEST_VERIFY(cpu.m_State.nGPR[excwSelfResult].nD0 == excwResultLow);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[excwSelfResult].nD1 == excwResultHigh);
|
||||
}
|
||||
@ -1,9 +0,0 @@
|
||||
#pragma once
|
||||
|
||||
#include "Test.h"
|
||||
|
||||
class CExchangeTest : public CTest
|
||||
{
|
||||
public:
|
||||
void Execute(CTestVm&);
|
||||
};
|
||||
@ -1,85 +0,0 @@
|
||||
#include "ExtendTest.h"
|
||||
#include "ee/EEAssembler.h"
|
||||
|
||||
void CExtendTest::Execute(CTestVm& virtualMachine)
|
||||
{
|
||||
auto& cpu = virtualMachine.m_cpu;
|
||||
|
||||
const uint32 baseAddress = 0x100;
|
||||
const uint32 constantValue0 = 0x11110000;
|
||||
const uint32 constantValue1 = 0x33332222;
|
||||
const uint32 constantValue2 = 0x55554444;
|
||||
const uint32 constantValue3 = 0x77776666;
|
||||
const uint32 constantValue4 = 0x99998888;
|
||||
const uint32 constantValue5 = 0xBBBBAAAA;
|
||||
const uint32 constantValue6 = 0xDDDDCCCC;
|
||||
const uint32 constantValue7 = 0xFFFFEEEE;
|
||||
const uint64 extlbResultLow = 0x1199119900880088ULL;
|
||||
const uint64 extlbResultHigh = 0x33BB33BB22AA22AAULL;
|
||||
const uint64 extubResultLow = 0x55DD55DD44CC44CCULL;
|
||||
const uint64 extubResultHigh = 0x77FF77FF66EE66EEULL;
|
||||
const uint64 extuhResultLow = 0x5555DDDD4444CCCCULL;
|
||||
const uint64 extuhResultHigh = 0x7777FFFF6666EEEEULL;
|
||||
const uint64 extlhResultLow = 0x1111999900008888ULL;
|
||||
const uint64 extlhResultHigh = 0x3333BBBB2222AAAAULL;
|
||||
|
||||
auto valueRegister0 = CMIPS::A0;
|
||||
auto valueRegister1 = CMIPS::A1;
|
||||
auto extlbResult = CMIPS::T0;
|
||||
auto extubResult = CMIPS::T1;
|
||||
auto extlhResult = CMIPS::T2;
|
||||
auto extuhResult = CMIPS::T3;
|
||||
|
||||
virtualMachine.Reset();
|
||||
|
||||
{
|
||||
CEEAssembler assembler(reinterpret_cast<uint32*>(virtualMachine.m_ram + baseAddress));
|
||||
|
||||
//PEXTLB
|
||||
assembler.PEXTLB(extlbResult, valueRegister0, valueRegister1);
|
||||
|
||||
//PEXTUB
|
||||
assembler.PEXTUB(extubResult, valueRegister0, valueRegister1);
|
||||
|
||||
//PEXTLH
|
||||
assembler.PEXTLH(extlhResult, valueRegister0, valueRegister1);
|
||||
|
||||
//PEXTUH
|
||||
assembler.PEXTUH(extuhResult, valueRegister0, valueRegister1);
|
||||
|
||||
assembler.SYSCALL();
|
||||
}
|
||||
|
||||
//Setup initial state
|
||||
cpu.m_State.nGPR[valueRegister0].nV[0] = constantValue0;
|
||||
cpu.m_State.nGPR[valueRegister0].nV[1] = constantValue1;
|
||||
cpu.m_State.nGPR[valueRegister0].nV[2] = constantValue2;
|
||||
cpu.m_State.nGPR[valueRegister0].nV[3] = constantValue3;
|
||||
cpu.m_State.nGPR[valueRegister1].nV[0] = constantValue4;
|
||||
cpu.m_State.nGPR[valueRegister1].nV[1] = constantValue5;
|
||||
cpu.m_State.nGPR[valueRegister1].nV[2] = constantValue6;
|
||||
cpu.m_State.nGPR[valueRegister1].nV[3] = constantValue7;
|
||||
|
||||
//Execute
|
||||
virtualMachine.ExecuteTest(baseAddress);
|
||||
|
||||
//Check final state
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister0].nV[0] == constantValue0);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister0].nV[1] == constantValue1);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister0].nV[2] == constantValue2);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister0].nV[3] == constantValue3);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister1].nV[0] == constantValue4);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister1].nV[1] == constantValue5);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister1].nV[2] == constantValue6);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister1].nV[3] == constantValue7);
|
||||
|
||||
TEST_VERIFY(cpu.m_State.nGPR[extlbResult].nD0 == extlbResultLow);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[extlbResult].nD1 == extlbResultHigh);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[extubResult].nD0 == extubResultLow);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[extubResult].nD1 == extubResultHigh);
|
||||
|
||||
TEST_VERIFY(cpu.m_State.nGPR[extlhResult].nD0 == extlhResultLow);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[extlhResult].nD1 == extlhResultHigh);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[extuhResult].nD0 == extuhResultLow);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[extuhResult].nD1 == extuhResultHigh);
|
||||
}
|
||||
@ -1,9 +0,0 @@
|
||||
#pragma once
|
||||
|
||||
#include "Test.h"
|
||||
|
||||
class CExtendTest : public CTest
|
||||
{
|
||||
public:
|
||||
void Execute(CTestVm&);
|
||||
};
|
||||
@ -1,40 +0,0 @@
|
||||
#include <stdio.h>
|
||||
#include <assert.h>
|
||||
#include "Test.h"
|
||||
#include "Add64Test.h"
|
||||
#include "SetLessThanTest.h"
|
||||
#include "SplitLoadTest.h"
|
||||
#include "Shift32Test.h"
|
||||
#include "Shift64Test.h"
|
||||
#include "ExchangeTest.h"
|
||||
#include "ExtendTest.h"
|
||||
#include "PackTest.h"
|
||||
#include "PackedMultiplyTest.h"
|
||||
|
||||
typedef std::function<CTest* ()> TestFactoryFunction;
|
||||
|
||||
static const TestFactoryFunction s_factories[] =
|
||||
{
|
||||
[] () -> CTest* { return new CAdd64Test(); },
|
||||
[] () -> CTest* { return new CSetLessThanTest(); },
|
||||
[] () -> CTest* { return new CSplitLoadTest(); },
|
||||
[] () -> CTest* { return new CShift32Test(); },
|
||||
[] () -> CTest* { return new CShift64Test(); },
|
||||
[] () -> CTest* { return new CExchangeTest(); },
|
||||
[] () -> CTest* { return new CExtendTest(); },
|
||||
[] () -> CTest* { return new CPackTest(); },
|
||||
[] () -> CTest* { return new CPackedMultiplyTest(); }
|
||||
};
|
||||
|
||||
int main(int argc, const char** argv)
|
||||
{
|
||||
CTestVm virtualMachine;
|
||||
|
||||
for(const auto& factory : s_factories)
|
||||
{
|
||||
auto test = factory();
|
||||
test->Execute(virtualMachine);
|
||||
delete test;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
@ -1,87 +0,0 @@
|
||||
#include "PackTest.h"
|
||||
#include "ee/EEAssembler.h"
|
||||
|
||||
void CPackTest::Execute(CTestVm& virtualMachine)
|
||||
{
|
||||
auto& cpu = virtualMachine.m_cpu;
|
||||
|
||||
const uint32 baseAddress = 0x100;
|
||||
const uint32 constantValue0 = 0x00000000;
|
||||
const uint32 constantValue1 = 0x11111111;
|
||||
const uint32 constantValue2 = 0x22222222;
|
||||
const uint32 constantValue3 = 0x33333333;
|
||||
const uint32 constantValue4 = 0x44444444;
|
||||
const uint32 constantValue5 = 0x55555555;
|
||||
const uint32 constantValue6 = 0x66666666;
|
||||
const uint32 constantValue7 = 0x77777777;
|
||||
const uint64 pachResultLow = 0x7777666655554444ULL;
|
||||
const uint64 pachResultHigh = 0x3333222211110000ULL;
|
||||
const uint64 pacwResultLow = 0x6666666644444444ULL;
|
||||
const uint64 pacwResultHigh = 0x2222222200000000ULL;
|
||||
|
||||
auto valueRegister0 = CMIPS::A0;
|
||||
auto valueRegister1 = CMIPS::A1;
|
||||
auto pachResult = CMIPS::T0;
|
||||
auto pachSelfResult = CMIPS::T1;
|
||||
auto pacwResult = CMIPS::T2;
|
||||
auto pacwSelfResult = CMIPS::T3;
|
||||
|
||||
virtualMachine.Reset();
|
||||
|
||||
{
|
||||
CEEAssembler assembler(reinterpret_cast<uint32*>(virtualMachine.m_ram + baseAddress));
|
||||
|
||||
//PPACH
|
||||
assembler.PPACH(pachResult, valueRegister0, valueRegister1);
|
||||
|
||||
//PPACH (self)
|
||||
assembler.PADDW(pachSelfResult, valueRegister0, CMIPS::R0);
|
||||
assembler.PPACH(pachSelfResult, pachSelfResult, valueRegister1);
|
||||
|
||||
//PPACW
|
||||
assembler.PPACW(pacwResult, valueRegister0, valueRegister1);
|
||||
|
||||
//PPACW (self)
|
||||
assembler.PADDW(pacwSelfResult, valueRegister0, CMIPS::R0);
|
||||
assembler.PPACW(pacwSelfResult, pacwSelfResult, valueRegister1);
|
||||
|
||||
assembler.SYSCALL();
|
||||
}
|
||||
|
||||
//Setup initial state
|
||||
cpu.m_State.nGPR[valueRegister0].nV[0] = constantValue0;
|
||||
cpu.m_State.nGPR[valueRegister0].nV[1] = constantValue1;
|
||||
cpu.m_State.nGPR[valueRegister0].nV[2] = constantValue2;
|
||||
cpu.m_State.nGPR[valueRegister0].nV[3] = constantValue3;
|
||||
|
||||
cpu.m_State.nGPR[valueRegister1].nV[0] = constantValue4;
|
||||
cpu.m_State.nGPR[valueRegister1].nV[1] = constantValue5;
|
||||
cpu.m_State.nGPR[valueRegister1].nV[2] = constantValue6;
|
||||
cpu.m_State.nGPR[valueRegister1].nV[3] = constantValue7;
|
||||
|
||||
//Execute
|
||||
virtualMachine.ExecuteTest(baseAddress);
|
||||
|
||||
//Check final state
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister0].nV[0] == constantValue0);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister0].nV[1] == constantValue1);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister0].nV[2] == constantValue2);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister0].nV[3] == constantValue3);
|
||||
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister1].nV[0] == constantValue4);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister1].nV[1] == constantValue5);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister1].nV[2] == constantValue6);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister1].nV[3] == constantValue7);
|
||||
|
||||
TEST_VERIFY(cpu.m_State.nGPR[pachResult].nD0 == pachResultLow);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[pachResult].nD1 == pachResultHigh);
|
||||
|
||||
TEST_VERIFY(cpu.m_State.nGPR[pachSelfResult].nD0 == pachResultLow);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[pachSelfResult].nD1 == pachResultHigh);
|
||||
|
||||
TEST_VERIFY(cpu.m_State.nGPR[pacwResult].nD0 == pacwResultLow);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[pacwResult].nD1 == pacwResultHigh);
|
||||
|
||||
TEST_VERIFY(cpu.m_State.nGPR[pacwSelfResult].nD0 == pacwResultLow);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[pacwSelfResult].nD1 == pacwResultHigh);
|
||||
}
|
||||
@ -1,9 +0,0 @@
|
||||
#pragma once
|
||||
|
||||
#include "Test.h"
|
||||
|
||||
class CPackTest : public CTest
|
||||
{
|
||||
public:
|
||||
void Execute(CTestVm&);
|
||||
};
|
||||
@ -1,112 +0,0 @@
|
||||
#include "PackedMultiplyTest.h"
|
||||
#include "ee/EEAssembler.h"
|
||||
|
||||
void CPackedMultiplyTest::Execute(CTestVm& virtualMachine)
|
||||
{
|
||||
auto& cpu = virtualMachine.m_cpu;
|
||||
|
||||
const uint32 baseAddress = 0x100;
|
||||
const uint32 constantValue0 = 0x11110000;
|
||||
const uint32 constantValue1 = 0x33332222;
|
||||
const uint32 constantValue2 = 0x55554444;
|
||||
const uint32 constantValue3 = 0x77776666;
|
||||
const uint32 constantValue4 = 0x99998888;
|
||||
const uint32 constantValue5 = 0xBBBBAAAA;
|
||||
const uint32 constantValue6 = 0xDDDDCCCC;
|
||||
const uint32 constantValue7 = 0xFFFFEEEE;
|
||||
const uint64 multhResultLow = 0xF49F3E9400000000ULL;
|
||||
const uint64 multhResultHigh = 0xF92C06D4F2589630ULL;
|
||||
const uint64 multhLoLow = 0xF92C5C2900000000ULL;
|
||||
const uint64 multhLoHigh = 0xF49F0B61F2589630ULL;
|
||||
const uint64 multhHiLow = 0xF258A741F49F3E94ULL;
|
||||
const uint64 multhHiHigh = 0xFFFF8889F92C06D4ULL;
|
||||
const uint64 mfhlUwResultLow = 0xF258A741F92C5C29ULL;
|
||||
const uint64 mfhlUwResultHigh = 0xFFFF8889F49F0B61ULL;
|
||||
const uint64 mfhlLhResultLow = 0xA7413E945C290000ULL;
|
||||
const uint64 mfhlLhResultHigh = 0x888906D40B619630ULL;
|
||||
|
||||
auto valueRegister0 = CMIPS::A0;
|
||||
auto valueRegister1 = CMIPS::A1;
|
||||
auto multhResult = CMIPS::T0;
|
||||
auto multhLo = CMIPS::T1;
|
||||
auto multhHi = CMIPS::T2;
|
||||
auto multhSelfResult = CMIPS::T3;
|
||||
auto multhSelfLo = CMIPS::T4;
|
||||
auto multhSelfHi = CMIPS::T5;
|
||||
auto mfhlUwResult = CMIPS::T6;
|
||||
auto mfhlLhResult = CMIPS::T7;
|
||||
|
||||
virtualMachine.Reset();
|
||||
|
||||
{
|
||||
CEEAssembler assembler(reinterpret_cast<uint32*>(virtualMachine.m_ram + baseAddress));
|
||||
|
||||
//PMULTH
|
||||
assembler.PMULTH(multhResult, valueRegister0, valueRegister1);
|
||||
assembler.PMFLO(multhLo);
|
||||
assembler.PMFHI(multhHi);
|
||||
|
||||
//PMULTH (self)
|
||||
assembler.PADDW(multhSelfResult, valueRegister0, CMIPS::R0);
|
||||
assembler.PMULTH(multhSelfResult, multhSelfResult, valueRegister1);
|
||||
assembler.PMFLO(multhSelfLo);
|
||||
assembler.PMFHI(multhSelfHi);
|
||||
|
||||
//PMFHL.UW
|
||||
assembler.PMFHL_UW(mfhlUwResult);
|
||||
|
||||
//PMFHL.LH
|
||||
assembler.PMFHL_LH(mfhlLhResult);
|
||||
|
||||
assembler.SYSCALL();
|
||||
}
|
||||
|
||||
//Setup initial state
|
||||
cpu.m_State.nGPR[valueRegister0].nV[0] = constantValue0;
|
||||
cpu.m_State.nGPR[valueRegister0].nV[1] = constantValue1;
|
||||
cpu.m_State.nGPR[valueRegister0].nV[2] = constantValue2;
|
||||
cpu.m_State.nGPR[valueRegister0].nV[3] = constantValue3;
|
||||
|
||||
cpu.m_State.nGPR[valueRegister1].nV[0] = constantValue4;
|
||||
cpu.m_State.nGPR[valueRegister1].nV[1] = constantValue5;
|
||||
cpu.m_State.nGPR[valueRegister1].nV[2] = constantValue6;
|
||||
cpu.m_State.nGPR[valueRegister1].nV[3] = constantValue7;
|
||||
|
||||
//Execute
|
||||
virtualMachine.ExecuteTest(baseAddress);
|
||||
|
||||
//Check final state
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister0].nV[0] == constantValue0);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister0].nV[1] == constantValue1);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister0].nV[2] == constantValue2);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister0].nV[3] == constantValue3);
|
||||
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister1].nV[0] == constantValue4);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister1].nV[1] == constantValue5);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister1].nV[2] == constantValue6);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[valueRegister1].nV[3] == constantValue7);
|
||||
|
||||
TEST_VERIFY(cpu.m_State.nGPR[multhResult].nD0 == multhResultLow);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[multhResult].nD1 == multhResultHigh);
|
||||
|
||||
TEST_VERIFY(cpu.m_State.nGPR[multhLo].nD0 == multhLoLow);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[multhLo].nD1 == multhLoHigh);
|
||||
|
||||
TEST_VERIFY(cpu.m_State.nGPR[multhHi].nD0 == multhHiLow);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[multhHi].nD1 == multhHiHigh);
|
||||
|
||||
TEST_VERIFY(cpu.m_State.nGPR[multhSelfResult].nD0 == multhResultLow);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[multhSelfResult].nD1 == multhResultHigh);
|
||||
|
||||
TEST_VERIFY(cpu.m_State.nGPR[multhSelfLo].nD0 == multhLoLow);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[multhSelfLo].nD1 == multhLoHigh);
|
||||
|
||||
TEST_VERIFY(cpu.m_State.nGPR[multhSelfHi].nD0 == multhHiLow);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[multhSelfHi].nD1 == multhHiHigh);
|
||||
|
||||
TEST_VERIFY(cpu.m_State.nGPR[mfhlUwResult].nD0 == mfhlUwResultLow);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[mfhlUwResult].nD1 == mfhlUwResultHigh);
|
||||
|
||||
TEST_VERIFY(cpu.m_State.nGPR[mfhlLhResult].nD0 == mfhlLhResultLow);
|
||||
TEST_VERIFY(cpu.m_State.nGPR[mfhlLhResult].nD1 == mfhlLhResultHigh);
|
||||
}
|
||||
@ -1,9 +0,0 @@
|
||||
#pragma once
|
||||
|
||||
#include "Test.h"
|
||||
|
||||
class CPackedMultiplyTest : public CTest
|
||||
{
|
||||
public:
|
||||
void Execute(CTestVm&);
|
||||
};
|
||||
@ -1,57 +0,0 @@
|
||||
#include "SetLessThanTest.h"
|
||||
#include "MIPSAssembler.h"
|
||||
|
||||
void CSetLessThanTest::Execute(CTestVm& virtualMachine)
|
||||
{
|
||||
const uint32 baseAddress = 0x100;
|
||||
const uint64 constantValue0 = 0xFFFFFFFFFFFF0000ULL;
|
||||
const uint64 constantValue1 = 0x00000000FFFF0000ULL;
|
||||
const uint64 constantValue2 = 0xFFFFFFFF00000000ULL;
|
||||
CMIPS::REGISTER valueRegister0 = CMIPS::A0;
|
||||
CMIPS::REGISTER valueRegister1 = CMIPS::A1;
|
||||
CMIPS::REGISTER valueRegister2 = CMIPS::A2;
|
||||
|
||||
CMIPS::REGISTER resultRegister0 = CMIPS::T0;
|
||||
CMIPS::REGISTER resultRegister1 = CMIPS::T1;
|
||||
CMIPS::REGISTER resultRegister2 = CMIPS::T2;
|
||||
CMIPS::REGISTER resultRegister3 = CMIPS::T3;
|
||||
CMIPS::REGISTER resultRegister4 = CMIPS::T4;
|
||||
CMIPS::REGISTER resultRegister5 = CMIPS::T5;
|
||||
|
||||
virtualMachine.Reset();
|
||||
|
||||
{
|
||||
CMIPSAssembler assembler(reinterpret_cast<uint32*>(virtualMachine.m_ram + baseAddress));
|
||||
|
||||
assembler.SLTU(resultRegister0, valueRegister0, valueRegister1);
|
||||
assembler.SLTU(resultRegister1, valueRegister1, valueRegister2);
|
||||
assembler.SLTU(resultRegister2, valueRegister2, valueRegister0);
|
||||
|
||||
assembler.SLT(resultRegister3, valueRegister0, valueRegister1);
|
||||
assembler.SLT(resultRegister4, valueRegister1, valueRegister2);
|
||||
assembler.SLT(resultRegister5, valueRegister2, valueRegister0);
|
||||
|
||||
assembler.SYSCALL();
|
||||
}
|
||||
|
||||
//Setup initial state
|
||||
virtualMachine.m_cpu.m_State.nGPR[valueRegister0].nD0 = constantValue0;
|
||||
virtualMachine.m_cpu.m_State.nGPR[valueRegister1].nD0 = constantValue1;
|
||||
virtualMachine.m_cpu.m_State.nGPR[valueRegister2].nD0 = constantValue2;
|
||||
|
||||
//Execute
|
||||
virtualMachine.ExecuteTest(baseAddress);
|
||||
|
||||
//Check final state
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[valueRegister0].nD0 == constantValue0);
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[valueRegister1].nD0 == constantValue1);
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[valueRegister2].nD0 == constantValue2);
|
||||
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[resultRegister0].nD0 == static_cast<uint64>(constantValue0) < static_cast<uint64>(constantValue1) ? 1 : 0);
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[resultRegister1].nD0 == static_cast<uint64>(constantValue1) < static_cast<uint64>(constantValue2) ? 1 : 0);
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[resultRegister2].nD0 == static_cast<uint64>(constantValue2) < static_cast<uint64>(constantValue0) ? 1 : 0);
|
||||
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[resultRegister3].nD0 == static_cast<int64>(constantValue0) < static_cast<int64>(constantValue1) ? 1 : 0);
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[resultRegister4].nD0 == static_cast<int64>(constantValue1) < static_cast<int64>(constantValue2) ? 1 : 0);
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[resultRegister5].nD0 == static_cast<int64>(constantValue2) < static_cast<int64>(constantValue0) ? 1 : 0);
|
||||
}
|
||||
@ -1,13 +0,0 @@
|
||||
#ifndef _SETLESSTHANTEST_H_
|
||||
#define _SETLESSTHANTEST_H_
|
||||
|
||||
#include "Test.h"
|
||||
#include "MIPSAssembler.h"
|
||||
|
||||
class CSetLessThanTest : public CTest
|
||||
{
|
||||
public:
|
||||
void Execute(CTestVm&);
|
||||
};
|
||||
|
||||
#endif
|
||||
@ -1,113 +0,0 @@
|
||||
#include "Shift32Test.h"
|
||||
#include "MIPSAssembler.h"
|
||||
|
||||
void CShift32Test::Execute(CTestVm& virtualMachine)
|
||||
{
|
||||
TestShift(virtualMachine, &CMIPSAssembler::SLL,
|
||||
[](uint32 value, unsigned int shiftAmount) -> uint32 { return value << shiftAmount; });
|
||||
TestShift(virtualMachine, &CMIPSAssembler::SRL,
|
||||
[](uint32 value, unsigned int shiftAmount) -> uint32 { return value >> shiftAmount; });
|
||||
TestShift(virtualMachine, &CMIPSAssembler::SRA,
|
||||
[](uint32 value, unsigned int shiftAmount) -> uint32 { return static_cast<int32>(value) >> shiftAmount; });
|
||||
|
||||
TestVariableShift(virtualMachine, &CMIPSAssembler::SLLV,
|
||||
[](uint32 value, unsigned int shiftAmount) -> uint32 { return value << shiftAmount; });
|
||||
TestVariableShift(virtualMachine, &CMIPSAssembler::SRLV,
|
||||
[](uint32 value, unsigned int shiftAmount) -> uint32 { return value >> shiftAmount; });
|
||||
TestVariableShift(virtualMachine, &CMIPSAssembler::SRAV,
|
||||
[](uint32 value, unsigned int shiftAmount) -> uint32 { return static_cast<int32>(value) >> shiftAmount; });
|
||||
}
|
||||
|
||||
void CShift32Test::TestShift(CTestVm& virtualMachine, const ShiftAssembleFunction& assembleFunction, const ShiftFunction& shiftFunction)
|
||||
{
|
||||
const uint32 baseAddress = 0x100;
|
||||
const uint32 constantValue = 0x808080FF;
|
||||
CMIPS::REGISTER valueRegister = CMIPS::A0;
|
||||
const unsigned int resultCount = 8;
|
||||
static const CMIPS::REGISTER resultRegisters[resultCount] =
|
||||
{
|
||||
CMIPS::T0,
|
||||
CMIPS::T1,
|
||||
CMIPS::T2,
|
||||
CMIPS::T3,
|
||||
CMIPS::T4,
|
||||
CMIPS::T5,
|
||||
CMIPS::T6,
|
||||
CMIPS::T7
|
||||
};
|
||||
|
||||
virtualMachine.Reset();
|
||||
|
||||
{
|
||||
CMIPSAssembler assembler(reinterpret_cast<uint32*>(virtualMachine.m_ram + baseAddress));
|
||||
|
||||
for(unsigned int i = 0; i < resultCount; i++)
|
||||
{
|
||||
((assembler).*(assembleFunction))(resultRegisters[i], valueRegister, i * 4);
|
||||
}
|
||||
|
||||
assembler.SYSCALL();
|
||||
}
|
||||
|
||||
//Setup initial state
|
||||
virtualMachine.m_cpu.m_State.nGPR[valueRegister].nD0 = static_cast<int32>(constantValue);
|
||||
|
||||
//Execute
|
||||
virtualMachine.ExecuteTest(baseAddress);
|
||||
|
||||
//Check final state
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[valueRegister].nV0 == constantValue);
|
||||
for(unsigned int i = 0; i < resultCount; i++)
|
||||
{
|
||||
uint32 result = shiftFunction(constantValue, i * 4);
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[resultRegisters[i]].nV0 == result);
|
||||
}
|
||||
}
|
||||
|
||||
void CShift32Test::TestVariableShift(CTestVm& virtualMachine, const VariableShiftAssembleFunction& assembleFunction, const ShiftFunction& shiftFunction)
|
||||
{
|
||||
const uint32 baseAddress = 0x100;
|
||||
const uint32 constantValue = 0x808080FF;
|
||||
CMIPS::REGISTER valueRegister = CMIPS::A0;
|
||||
CMIPS::REGISTER shiftAmountRegister = CMIPS::A1;
|
||||
const unsigned int resultCount = 8;
|
||||
static const CMIPS::REGISTER resultRegisters[resultCount] =
|
||||
{
|
||||
CMIPS::T0,
|
||||
CMIPS::T1,
|
||||
CMIPS::T2,
|
||||
CMIPS::T3,
|
||||
CMIPS::T4,
|
||||
CMIPS::T5,
|
||||
CMIPS::T6,
|
||||
CMIPS::T7
|
||||
};
|
||||
|
||||
virtualMachine.Reset();
|
||||
|
||||
{
|
||||
CMIPSAssembler assembler(reinterpret_cast<uint32*>(virtualMachine.m_ram + baseAddress));
|
||||
|
||||
for(unsigned int i = 0; i < resultCount; i++)
|
||||
{
|
||||
assembler.ADDIU(shiftAmountRegister, CMIPS::R0, i * 4);
|
||||
((assembler).*(assembleFunction))(resultRegisters[i], valueRegister, shiftAmountRegister);
|
||||
}
|
||||
|
||||
assembler.SYSCALL();
|
||||
}
|
||||
|
||||
//Setup initial state
|
||||
virtualMachine.m_cpu.m_State.nGPR[valueRegister].nD0 = static_cast<int32>(constantValue);
|
||||
|
||||
//Execute
|
||||
virtualMachine.ExecuteTest(baseAddress);
|
||||
|
||||
//Check final state
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[valueRegister].nV0 == constantValue);
|
||||
for(unsigned int i = 0; i < resultCount; i++)
|
||||
{
|
||||
uint32 result = shiftFunction(constantValue, i * 4);
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[resultRegisters[i]].nV0 == result);
|
||||
}
|
||||
}
|
||||
@ -1,21 +0,0 @@
|
||||
#ifndef _SHIFT32TEST_H_
|
||||
#define _SHIFT32TEST_H_
|
||||
|
||||
#include "Test.h"
|
||||
#include "MIPSAssembler.h"
|
||||
|
||||
class CShift32Test : public CTest
|
||||
{
|
||||
public:
|
||||
void Execute(CTestVm&);
|
||||
|
||||
private:
|
||||
typedef void (CMIPSAssembler::*ShiftAssembleFunction)(unsigned int, unsigned int, unsigned int);
|
||||
typedef void (CMIPSAssembler::*VariableShiftAssembleFunction)(unsigned int, unsigned int, unsigned int);
|
||||
typedef std::function<uint32 (uint32, unsigned int)> ShiftFunction;
|
||||
|
||||
void TestShift(CTestVm&, const ShiftAssembleFunction&, const ShiftFunction&);
|
||||
void TestVariableShift(CTestVm&, const VariableShiftAssembleFunction&, const ShiftFunction&);
|
||||
};
|
||||
|
||||
#endif
|
||||
@ -1,119 +0,0 @@
|
||||
#include "Shift64Test.h"
|
||||
#include "MIPSAssembler.h"
|
||||
|
||||
void CShift64Test::Execute(CTestVm& virtualMachine)
|
||||
{
|
||||
TestShift(virtualMachine, &CMIPSAssembler::DSLL,
|
||||
[](uint64 value, unsigned int shiftAmount) -> uint64 { return value << shiftAmount; });
|
||||
TestShift(virtualMachine, &CMIPSAssembler::DSRL,
|
||||
[](uint64 value, unsigned int shiftAmount) -> uint64 { return value >> shiftAmount; });
|
||||
TestShift(virtualMachine, &CMIPSAssembler::DSRA,
|
||||
[](uint64 value, unsigned int shiftAmount) -> uint64 { return static_cast<int64>(value) >> shiftAmount; });
|
||||
TestShift(virtualMachine, &CMIPSAssembler::DSLL32,
|
||||
[](uint64 value, unsigned int shiftAmount) -> uint64 { return value << (shiftAmount + 32); });
|
||||
TestShift(virtualMachine, &CMIPSAssembler::DSRL32,
|
||||
[](uint64 value, unsigned int shiftAmount) -> uint64 { return value >> (shiftAmount + 32); });
|
||||
TestShift(virtualMachine, &CMIPSAssembler::DSRA32,
|
||||
[](uint64 value, unsigned int shiftAmount) -> uint64 { return static_cast<int64>(value) >> (shiftAmount + 32); });
|
||||
|
||||
TestVariableShift(virtualMachine, &CMIPSAssembler::DSLLV,
|
||||
[](uint64 value, unsigned int shiftAmount) -> uint64 { return value << shiftAmount; });
|
||||
TestVariableShift(virtualMachine, &CMIPSAssembler::DSRLV,
|
||||
[](uint64 value, unsigned int shiftAmount) -> uint64 { return value >> shiftAmount; });
|
||||
TestVariableShift(virtualMachine, &CMIPSAssembler::DSRAV,
|
||||
[](uint64 value, unsigned int shiftAmount) -> uint64 { return static_cast<int64>(value) >> shiftAmount; });
|
||||
}
|
||||
|
||||
void CShift64Test::TestShift(CTestVm& virtualMachine, const ShiftAssembleFunction& assembleFunction, const ShiftFunction& shiftFunction)
|
||||
{
|
||||
const uint32 baseAddress = 0x100;
|
||||
const uint64 constantValue = 0x8080FFFF000080FFULL;
|
||||
CMIPS::REGISTER valueRegister = CMIPS::A0;
|
||||
const unsigned int resultCount = 8;
|
||||
static const CMIPS::REGISTER resultRegisters[resultCount] =
|
||||
{
|
||||
CMIPS::T0,
|
||||
CMIPS::T1,
|
||||
CMIPS::T2,
|
||||
CMIPS::T3,
|
||||
CMIPS::T4,
|
||||
CMIPS::T5,
|
||||
CMIPS::T6,
|
||||
CMIPS::T7
|
||||
};
|
||||
|
||||
virtualMachine.Reset();
|
||||
|
||||
{
|
||||
CMIPSAssembler assembler(reinterpret_cast<uint32*>(virtualMachine.m_ram + baseAddress));
|
||||
|
||||
for(unsigned int i = 0; i < resultCount; i++)
|
||||
{
|
||||
((assembler).*(assembleFunction))(resultRegisters[i], valueRegister, i * 4);
|
||||
}
|
||||
|
||||
assembler.SYSCALL();
|
||||
}
|
||||
|
||||
//Setup initial state
|
||||
virtualMachine.m_cpu.m_State.nGPR[valueRegister].nD0 = constantValue;
|
||||
|
||||
//Execute
|
||||
virtualMachine.ExecuteTest(baseAddress);
|
||||
|
||||
//Check final state
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[valueRegister].nD0 == constantValue);
|
||||
for(unsigned int i = 0; i < resultCount; i++)
|
||||
{
|
||||
uint64 result = shiftFunction(constantValue, i * 4);
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[resultRegisters[i]].nD0 == result);
|
||||
}
|
||||
}
|
||||
|
||||
void CShift64Test::TestVariableShift(CTestVm& virtualMachine, const VariableShiftAssembleFunction& assembleFunction, const ShiftFunction& shiftFunction)
|
||||
{
|
||||
const uint32 baseAddress = 0x100;
|
||||
const uint64 constantValue = 0x8080FFFF000080FFULL;
|
||||
CMIPS::REGISTER valueRegister = CMIPS::A0;
|
||||
CMIPS::REGISTER shiftAmountRegister = CMIPS::A1;
|
||||
const unsigned int resultCount = 8;
|
||||
static const CMIPS::REGISTER resultRegisters[resultCount] =
|
||||
{
|
||||
CMIPS::T0,
|
||||
CMIPS::T1,
|
||||
CMIPS::T2,
|
||||
CMIPS::T3,
|
||||
CMIPS::T4,
|
||||
CMIPS::T5,
|
||||
CMIPS::T6,
|
||||
CMIPS::T7
|
||||
};
|
||||
|
||||
virtualMachine.Reset();
|
||||
|
||||
{
|
||||
CMIPSAssembler assembler(reinterpret_cast<uint32*>(virtualMachine.m_ram + baseAddress));
|
||||
|
||||
for(unsigned int i = 0; i < resultCount; i++)
|
||||
{
|
||||
assembler.ADDIU(shiftAmountRegister, CMIPS::R0, i * 8);
|
||||
((assembler).*(assembleFunction))(resultRegisters[i], valueRegister, shiftAmountRegister);
|
||||
}
|
||||
|
||||
assembler.SYSCALL();
|
||||
}
|
||||
|
||||
//Setup initial state
|
||||
virtualMachine.m_cpu.m_State.nGPR[valueRegister].nD0 = constantValue;
|
||||
|
||||
//Execute
|
||||
virtualMachine.ExecuteTest(baseAddress);
|
||||
|
||||
//Check final state
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[valueRegister].nD0 == constantValue);
|
||||
for(unsigned int i = 0; i < resultCount; i++)
|
||||
{
|
||||
uint64 result = shiftFunction(constantValue, i * 8);
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[resultRegisters[i]].nD0 == result);
|
||||
}
|
||||
}
|
||||
@ -1,21 +0,0 @@
|
||||
#ifndef _SHIFT64TEST_H_
|
||||
#define _SHIFT64TEST_H_
|
||||
|
||||
#include "Test.h"
|
||||
#include "MIPSAssembler.h"
|
||||
|
||||
class CShift64Test : public CTest
|
||||
{
|
||||
public:
|
||||
void Execute(CTestVm&);
|
||||
|
||||
private:
|
||||
typedef void (CMIPSAssembler::*ShiftAssembleFunction)(unsigned int, unsigned int, unsigned int);
|
||||
typedef void (CMIPSAssembler::*VariableShiftAssembleFunction)(unsigned int, unsigned int, unsigned int);
|
||||
typedef std::function<uint64 (uint64, unsigned int)> ShiftFunction;
|
||||
|
||||
void TestShift(CTestVm&, const ShiftAssembleFunction&, const ShiftFunction&);
|
||||
void TestVariableShift(CTestVm&, const VariableShiftAssembleFunction&, const ShiftFunction&);
|
||||
};
|
||||
|
||||
#endif
|
||||
@ -1,53 +0,0 @@
|
||||
#include "SplitLoadTest.h"
|
||||
|
||||
void CSplitLoadTest::Execute(CTestVm& virtualMachine)
|
||||
{
|
||||
const uint32 baseAddress = 0x100;
|
||||
const uint32 addressValue = 0x80;
|
||||
const uint32 constant32Value0 = 0x30201000;
|
||||
const uint32 constant32Value1 = 0x70605040;
|
||||
const uint64 constant64Value0 = 0x0706050403020100ULL;
|
||||
const uint64 constant64Value1 = 0x0F0E0D0C0B0A0908ULL;
|
||||
|
||||
CMIPS::REGISTER addressRegister = CMIPS::A0;
|
||||
CMIPS::REGISTER value32Register = CMIPS::A1;
|
||||
CMIPS::REGISTER value64Register = CMIPS::A2;
|
||||
|
||||
CMIPS::REGISTER result32Register = CMIPS::T0;
|
||||
CMIPS::REGISTER result64Register = CMIPS::T1;
|
||||
|
||||
virtualMachine.Reset();
|
||||
|
||||
virtualMachine.m_cpu.m_pMemoryMap->SetWord(addressValue + 0x00, constant32Value0);
|
||||
virtualMachine.m_cpu.m_pMemoryMap->SetWord(addressValue + 0x04, constant32Value1);
|
||||
|
||||
virtualMachine.m_cpu.m_pMemoryMap->SetWord(addressValue + 0x08, static_cast<uint32>(constant64Value0 >> 0));
|
||||
virtualMachine.m_cpu.m_pMemoryMap->SetWord(addressValue + 0x0C, static_cast<uint32>(constant64Value0 >> 32));
|
||||
virtualMachine.m_cpu.m_pMemoryMap->SetWord(addressValue + 0x10, static_cast<uint32>(constant64Value1 >> 0));
|
||||
virtualMachine.m_cpu.m_pMemoryMap->SetWord(addressValue + 0x14, static_cast<uint32>(constant64Value1 >> 32));
|
||||
|
||||
{
|
||||
CMIPSAssembler assembler(reinterpret_cast<uint32*>(virtualMachine.m_ram + baseAddress));
|
||||
|
||||
assembler.LWL(result32Register, 0x3 + 2, addressRegister);
|
||||
assembler.LWR(result32Register, 0x0 + 2, addressRegister);
|
||||
|
||||
assembler.LDL(result64Register, 0xF + 4, addressRegister);
|
||||
assembler.LDR(result64Register, 0x8 + 4, addressRegister);
|
||||
|
||||
assembler.SYSCALL();
|
||||
}
|
||||
|
||||
//Setup initial state
|
||||
virtualMachine.m_cpu.m_State.nGPR[addressRegister].nD0 = addressValue;
|
||||
virtualMachine.m_cpu.m_State.nGPR[value32Register].nD0 = static_cast<int32>(constant32Value0);
|
||||
virtualMachine.m_cpu.m_State.nGPR[value64Register].nD0 = constant64Value0;
|
||||
|
||||
//Execute
|
||||
virtualMachine.ExecuteTest(baseAddress);
|
||||
|
||||
//Check final state
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[addressRegister].nD0 == addressValue);
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[result32Register].nD0 == 0x50403020);
|
||||
TEST_VERIFY(virtualMachine.m_cpu.m_State.nGPR[result64Register].nD0 == 0x0B0A090807060504);
|
||||
}
|
||||
@ -1,13 +0,0 @@
|
||||
#ifndef _SPLITLOADTEST_H_
|
||||
#define _SPLITLOADTEST_H_
|
||||
|
||||
#include "Test.h"
|
||||
#include "MIPSAssembler.h"
|
||||
|
||||
class CSplitLoadTest : public CTest
|
||||
{
|
||||
public:
|
||||
void Execute(CTestVm&);
|
||||
};
|
||||
|
||||
#endif
|
||||
@ -1 +0,0 @@
|
||||
#include "StdAfx.h"
|
||||
@ -1,19 +0,0 @@
|
||||
#ifndef _STDAFX_H_
|
||||
#define _STDAFX_H_
|
||||
|
||||
#include <string>
|
||||
#include <vector>
|
||||
#include <list>
|
||||
#include <map>
|
||||
#include <set>
|
||||
#include <functional>
|
||||
#include <memory>
|
||||
|
||||
#include <boost/signals2.hpp>
|
||||
#include <boost/lexical_cast.hpp>
|
||||
|
||||
#include "Types.h"
|
||||
#include "Stream.h"
|
||||
#include "xml/Node.h"
|
||||
|
||||
#endif
|
||||
@ -1,15 +0,0 @@
|
||||
#ifndef _TEST_H_
|
||||
#define _TEST_H_
|
||||
|
||||
#include "TestVm.h"
|
||||
|
||||
#define TEST_VERIFY(a) if(!(a)) { int* p = 0; (*p) = 0; }
|
||||
|
||||
class CTest
|
||||
{
|
||||
public:
|
||||
virtual ~CTest() {}
|
||||
virtual void Execute(CTestVm&) = 0;
|
||||
};
|
||||
|
||||
#endif
|
||||
@ -1,35 +0,0 @@
|
||||
#include "TestVm.h"
|
||||
|
||||
CTestVm::CTestVm()
|
||||
: m_cpu(MEMORYMAP_ENDIAN_LSBF)
|
||||
, m_executor(m_cpu, (RAM_SIZE))
|
||||
, m_ram(new uint8[RAM_SIZE])
|
||||
{
|
||||
m_cpu.m_pMemoryMap->InsertReadMap(0, RAM_SIZE - 1, m_ram, 0x01);
|
||||
m_cpu.m_pMemoryMap->InsertWriteMap(0, RAM_SIZE - 1, m_ram, 0x01);
|
||||
m_cpu.m_pMemoryMap->InsertInstructionMap(0, RAM_SIZE - 1, m_ram, 0x01);
|
||||
|
||||
m_cpu.m_pArch = &m_cpuArch;
|
||||
m_cpu.m_pAddrTranslator = &CMIPS::TranslateAddress64;
|
||||
}
|
||||
|
||||
CTestVm::~CTestVm()
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
void CTestVm::Reset()
|
||||
{
|
||||
memset(m_ram, 0, RAM_SIZE);
|
||||
m_cpu.Reset();
|
||||
m_executor.Reset();
|
||||
}
|
||||
|
||||
void CTestVm::ExecuteTest(uint32 startAddress)
|
||||
{
|
||||
m_cpu.m_State.nPC = startAddress;
|
||||
while(!m_cpu.m_State.nHasException)
|
||||
{
|
||||
m_executor.Execute(100);
|
||||
}
|
||||
}
|
||||
@ -1,25 +0,0 @@
|
||||
#pragma once
|
||||
|
||||
#include "MIPS.h"
|
||||
#include "ee/MA_EE.h"
|
||||
#include "MipsExecutor.h"
|
||||
|
||||
class CTestVm
|
||||
{
|
||||
public:
|
||||
enum RAM_SIZE
|
||||
{
|
||||
RAM_SIZE = 0x200000,
|
||||
};
|
||||
|
||||
CTestVm();
|
||||
virtual ~CTestVm();
|
||||
|
||||
void Reset();
|
||||
void ExecuteTest(uint32);
|
||||
|
||||
uint8* m_ram;
|
||||
CMIPS m_cpu;
|
||||
CMA_EE m_cpuArch;
|
||||
CMipsExecutor m_executor;
|
||||
};
|
||||
Loading…
x
Reference in New Issue
Block a user