From adcf9143390e24b2db3564934bbb4c4e7bf0c7d4 Mon Sep 17 00:00:00 2001
From: Jean-Philip Desjardins <jean-philip.desjardins@polymtl.ca>
Date: Sat, 6 Aug 2016 00:45:32 -0400
Subject: [PATCH] Add branchValue field in VU OPERANDSET.

---
 Source/ee/MA_VU.h                   |  4 ++-
 Source/ee/MA_VU_LowerReflection.cpp | 43 +++++++++++++++++++++--------
 Source/ee/VUShared.h                |  4 +++
 3 files changed, 38 insertions(+), 13 deletions(-)

diff --git a/Source/ee/MA_VU.h b/Source/ee/MA_VU.h
index e4ea5df3..59602739 100644
--- a/Source/ee/MA_VU.h
+++ b/Source/ee/MA_VU.h
@@ -248,11 +248,13 @@ private:
 		static void							ReflOpAffWrFtIsRdIs(VUShared::VUINSTRUCTION*, CMIPS*, uint32, uint32, VUShared::OPERANDSET&);
 		static void							ReflOpAffWrIdRdItIs(VUShared::VUINSTRUCTION*, CMIPS*, uint32, uint32, VUShared::OPERANDSET&);
 		static void							ReflOpAffWrIt(VUShared::VUINSTRUCTION*, CMIPS*, uint32, uint32, VUShared::OPERANDSET&);
+		static void							ReflOpAffWrItBv(VUShared::VUINSTRUCTION*, CMIPS*, uint32, uint32, VUShared::OPERANDSET&);
 		static void							ReflOpAffWrItRdFs(VUShared::VUINSTRUCTION*, CMIPS*, uint32, uint32, VUShared::OPERANDSET&);
 		static void							ReflOpAffWrItRdIs(VUShared::VUINSTRUCTION*, CMIPS*, uint32, uint32, VUShared::OPERANDSET&);
+		static void							ReflOpAffWrItBvRdIs(VUShared::VUINSTRUCTION*, CMIPS*, uint32, uint32, VUShared::OPERANDSET&);
 		static void							ReflOpAffWrItRdItFs(VUShared::VUINSTRUCTION*, CMIPS*, uint32, uint32, VUShared::OPERANDSET&);
 		static void							ReflOpAffWrPRdFs(VUShared::VUINSTRUCTION*, CMIPS*, uint32, uint32, VUShared::OPERANDSET&);
-		static void							ReflOpAffWrVi1(VUShared::VUINSTRUCTION*, CMIPS*, uint32, uint32, VUShared::OPERANDSET&);
+		static void							ReflOpAffWrVi1Bv(VUShared::VUINSTRUCTION*, CMIPS*, uint32, uint32, VUShared::OPERANDSET&);
 
 		void								BuildStatusInIT();
 		void								GenerateEATAN();
diff --git a/Source/ee/MA_VU_LowerReflection.cpp b/Source/ee/MA_VU_LowerReflection.cpp
index 072d6938..ae9c50b6 100644
--- a/Source/ee/MA_VU_LowerReflection.cpp
+++ b/Source/ee/MA_VU_LowerReflection.cpp
@@ -275,6 +275,14 @@ void CMA_VU::CLower::ReflOpAffWrIt(VUINSTRUCTION*, CMIPS*, uint32, uint32 opcode
 	operandSet.writeI = it;
 }
 
+void CMA_VU::CLower::ReflOpAffWrItBv(VUINSTRUCTION*, CMIPS*, uint32, uint32 opcode, OPERANDSET& operandSet)
+{
+	auto it = static_cast<uint8>((opcode >> 16) & 0x001F);
+
+	operandSet.writeI = it;
+	operandSet.branchValue = true;
+}
+
 void CMA_VU::CLower::ReflOpAffWrItRdFs(VUINSTRUCTION*, CMIPS*, uint32, uint32 opcode, OPERANDSET& operandSet)
 {
 	auto it = static_cast<uint8>((opcode >> 16) & 0x001F);
@@ -293,6 +301,16 @@ void CMA_VU::CLower::ReflOpAffWrItRdIs(VUINSTRUCTION*, CMIPS*, uint32, uint32 op
 	operandSet.readI0 = is;
 }
 
+void CMA_VU::CLower::ReflOpAffWrItBvRdIs(VUINSTRUCTION*, CMIPS*, uint32, uint32 opcode, OPERANDSET& operandSet)
+{
+	auto it = static_cast<uint8>((opcode >> 16) & 0x001F);
+	auto is = static_cast<uint8>((opcode >> 11) & 0x001F);
+
+	operandSet.writeI = it;
+	operandSet.readI0 = is;
+	operandSet.branchValue = true;
+}
+
 void CMA_VU::CLower::ReflOpAffWrItRdItFs(VUINSTRUCTION*, CMIPS*, uint32, uint32 opcode, OPERANDSET& operandSet)
 {
 	auto it = static_cast<uint8>((opcode >> 16) & 0x001F);
@@ -311,9 +329,10 @@ void CMA_VU::CLower::ReflOpAffWrPRdFs(VUINSTRUCTION*, CMIPS*, uint32, uint32 opc
 	operandSet.readF0 = fs;
 }
 
-void CMA_VU::CLower::ReflOpAffWrVi1(VUINSTRUCTION*, CMIPS*, uint32, uint32 opcode, OPERANDSET& operandSet)
+void CMA_VU::CLower::ReflOpAffWrVi1Bv(VUINSTRUCTION*, CMIPS*, uint32, uint32 opcode, OPERANDSET& operandSet)
 {
 	operandSet.writeI = 1;
+	operandSet.branchValue = true;
 }
 
 INSTRUCTION CMA_VU::CLower::m_cReflGeneral[128] =
@@ -707,7 +726,7 @@ VUINSTRUCTION CMA_VU::CLower::m_cVuReflGeneral[128] =
 	{	"SQ",		NULL,			ReflOpAffRdItFs		},
 	{	NULL,		NULL,			NULL				},
 	{	NULL,		NULL,			NULL				},
-	{	"ILW",		NULL,			ReflOpAffWrItRdIs	},
+	{	"ILW",		NULL,			ReflOpAffWrItBvRdIs	},
 	{	"ISW",		NULL,			ReflOpAffRdItIs		},
 	{	NULL,		NULL,			NULL				},
 	{	NULL,		NULL,			NULL				},
@@ -721,20 +740,20 @@ VUINSTRUCTION CMA_VU::CLower::m_cVuReflGeneral[128] =
 	{	NULL,		NULL,			NULL				},
 	{	NULL,		NULL,			NULL				},
 	//0x10
-	{	"FCEQ",		NULL,			ReflOpAffWrVi1		},
+	{	"FCEQ",		NULL,			ReflOpAffWrVi1Bv	},
 	{	"FCSET",	NULL,			ReflOpAffNone		},
-	{	"FCAND",	NULL,			ReflOpAffWrVi1		},
-	{	"FCOR",		NULL,			ReflOpAffWrVi1		},
+	{	"FCAND",	NULL,			ReflOpAffWrVi1Bv	},
+	{	"FCOR",		NULL,			ReflOpAffWrVi1Bv	},
 	{	NULL,		NULL,			NULL				},
 	{	"FSSET",	NULL,			ReflOpAffNone		},
-	{	"FSAND",	NULL,			ReflOpAffWrIt		},
-	{	"FSOR",		NULL,			ReflOpAffWrIt		},
+	{	"FSAND",	NULL,			ReflOpAffWrItBv		},
+	{	"FSOR",		NULL,			ReflOpAffWrItBv		},
 	//0x18
-	{	"FMEQ",		NULL,			ReflOpAffWrItRdIs	},
+	{	"FMEQ",		NULL,			ReflOpAffWrItBvRdIs	},
 	{	NULL,		NULL,			NULL				},
-	{	"FMAND",	NULL,			ReflOpAffWrItRdIs	},
-	{	"FMOR",		NULL,			ReflOpAffWrItRdIs	},
-	{	"FCGET",	NULL,			ReflOpAffWrIt		},
+	{	"FMAND",	NULL,			ReflOpAffWrItBvRdIs	},
+	{	"FMOR",		NULL,			ReflOpAffWrItBvRdIs	},
+	{	"FCGET",	NULL,			ReflOpAffWrItBv		},
 	{	NULL,		NULL,			NULL				},
 	{	NULL,		NULL,			NULL				},
 	{	NULL,		NULL,			NULL				},
@@ -1023,7 +1042,7 @@ VUINSTRUCTION CMA_VU::CLower::m_cVuReflVX2[32] =
 	{	NULL,		NULL,			NULL				},
 	{	"LQD",		NULL,			ReflOpAffWrFtIsRdIs	},
 	{	"RSQRT",	NULL,			ReflOpAffWrQRdFtFs	},
-	{	"ILWR",		NULL,			ReflOpAffWrItRdIs	},
+	{	"ILWR",		NULL,			ReflOpAffWrItBvRdIs	},
 	//0x10
 	{	"RINIT",	NULL,			ReflOpAffRFsf		},
 	{	NULL,		NULL,			NULL				},
diff --git a/Source/ee/VUShared.h b/Source/ee/VUShared.h
index 83ec1378..14939acd 100644
--- a/Source/ee/VUShared.h
+++ b/Source/ee/VUShared.h
@@ -36,6 +36,10 @@ namespace VUShared
 		unsigned int			readI1;
 		bool					syncQ;
 		bool					readQ;
+
+		//When set, means that a branch following the instruction will be
+		//able to use the integer value directly
+		bool					branchValue;
 	};
 
 	struct VUINSTRUCTION;