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6326378c2a
Almost all memory access instructions can now use the page table.
146 lines
3.6 KiB
C++
146 lines
3.6 KiB
C++
#include <assert.h>
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#include <stddef.h>
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#include "MIPSInstructionFactory.h"
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#include "MIPS.h"
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#include "offsetof_def.h"
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CMIPSInstructionFactory::CMIPSInstructionFactory(MIPS_REGSIZE nRegSize)
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: m_regSize(nRegSize)
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{
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}
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void CMIPSInstructionFactory::SetupQuickVariables(uint32 nAddress, CMipsJitter* codeGen, CMIPS* pCtx)
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{
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m_pCtx = pCtx;
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m_codeGen = codeGen;
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m_nAddress = nAddress;
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m_nOpcode = m_pCtx->m_pMemoryMap->GetInstruction(m_nAddress);
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}
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void CMIPSInstructionFactory::ComputeMemAccessAddr()
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{
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uint8 nRS = (uint8)((m_nOpcode >> 21) & 0x001F);
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uint16 nImmediate = (uint16)((m_nOpcode >> 0) & 0xFFFF);
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if(m_pCtx->m_pAddrTranslator == &CMIPS::TranslateAddress64)
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{
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m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[nRS].nV[0]));
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if(nImmediate != 0)
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{
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m_codeGen->PushCst((int16)nImmediate);
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m_codeGen->Add();
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}
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m_codeGen->PushCst(0x1FFFFFFF);
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m_codeGen->And();
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}
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else
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{
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//TODO: Compute the complete 64-bit address
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//Translate the address
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//Push context
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m_codeGen->PushCtx();
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//Push low part of address
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m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[nRS].nV[0]));
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if(nImmediate != 0)
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{
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m_codeGen->PushCst((int16)nImmediate);
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m_codeGen->Add();
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}
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//Call
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m_codeGen->Call(reinterpret_cast<void*>(m_pCtx->m_pAddrTranslator), 2, true);
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}
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}
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void CMIPSInstructionFactory::ComputeMemAccessAddrNoXlat()
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{
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uint8 nRS = (uint8)((m_nOpcode >> 21) & 0x001F);
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uint16 nImmediate = (uint16)((m_nOpcode >> 0) & 0xFFFF);
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//Push low part of address
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m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[nRS].nV[0]));
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if(nImmediate != 0)
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{
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m_codeGen->PushCst((int16)nImmediate);
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m_codeGen->Add();
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}
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}
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void CMIPSInstructionFactory::ComputeMemAccessRef(uint32 accessSize)
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{
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ComputeMemAccessPageRef();
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auto rs = static_cast<uint8>((m_nOpcode >> 21) & 0x001F);
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auto immediate = static_cast<uint16>((m_nOpcode >> 0) & 0xFFFF);
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m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[rs].nV[0]));
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m_codeGen->PushCst(static_cast<int16>(immediate));
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m_codeGen->Add();
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m_codeGen->PushCst(0x1000 - accessSize);
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m_codeGen->And();
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m_codeGen->AddRef();
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}
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void CMIPSInstructionFactory::ComputeMemAccessPageRef()
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{
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auto rs = static_cast<uint8>((m_nOpcode >> 21) & 0x001F);
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auto immediate = static_cast<uint16>((m_nOpcode >> 0) & 0xFFFF);
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m_codeGen->PushRelRef(offsetof(CMIPS, m_pageLookup));
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m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[rs].nV[0]));
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m_codeGen->PushCst(static_cast<int16>(immediate));
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m_codeGen->Add();
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m_codeGen->Srl(12);
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m_codeGen->Shl(3); //Multiply by sizeof(void*)
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m_codeGen->AddRef();
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m_codeGen->LoadRefFromRef();
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}
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void CMIPSInstructionFactory::Branch(Jitter::CONDITION condition)
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{
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uint16 nImmediate = (uint16)(m_nOpcode & 0xFFFF);
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m_codeGen->PushCst(MIPS_INVALID_PC);
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m_codeGen->PullRel(offsetof(CMIPS, m_State.nDelayedJumpAddr));
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m_codeGen->BeginIf(condition);
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{
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m_codeGen->PushCst((m_nAddress + 4) + CMIPS::GetBranch(nImmediate));
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m_codeGen->PullRel(offsetof(CMIPS, m_State.nDelayedJumpAddr));
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}
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m_codeGen->EndIf();
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}
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void CMIPSInstructionFactory::BranchLikely(Jitter::CONDITION condition)
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{
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uint16 nImmediate = (uint16)(m_nOpcode & 0xFFFF);
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m_codeGen->PushCst(MIPS_INVALID_PC);
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m_codeGen->PullRel(offsetof(CMIPS, m_State.nDelayedJumpAddr));
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m_codeGen->BeginIf(condition);
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{
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m_codeGen->PushCst((m_nAddress + 4) + CMIPS::GetBranch(nImmediate));
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m_codeGen->PullRel(offsetof(CMIPS, m_State.nDelayedJumpAddr));
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}
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m_codeGen->Else();
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{
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m_codeGen->PushCst(m_nAddress + 8);
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m_codeGen->PullRel(offsetof(CMIPS, m_State.nPC));
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m_codeGen->Goto(m_codeGen->GetFinalBlockLabel());
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}
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m_codeGen->EndIf();
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}
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void CMIPSInstructionFactory::Illegal()
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{
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#ifdef _DEBUG
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m_codeGen->Break();
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#endif
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}
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