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533 lines
13 KiB
C++
533 lines
13 KiB
C++
#include <boost/lexical_cast.hpp>
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#include <assert.h>
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#include "Iop_Spu2_Core.h"
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#include "../Log.h"
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#define LOG_NAME_PREFIX ("iop_spu2_core_")
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#define SPU_BASE_SAMPLING_RATE (48000)
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using namespace Iop;
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using namespace Iop::Spu2;
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#define MAX_ADDRESS_REGISTER (22)
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#define MAX_COEFFICIENT_REGISTER (10)
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static unsigned int g_addressRegisterMapping[MAX_ADDRESS_REGISTER] =
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{
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CSpuBase::FB_SRC_A,
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CSpuBase::FB_SRC_B,
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CSpuBase::IIR_DEST_A0,
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CSpuBase::IIR_DEST_A1,
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CSpuBase::ACC_SRC_A0,
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CSpuBase::ACC_SRC_A1,
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CSpuBase::ACC_SRC_B0,
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CSpuBase::ACC_SRC_B1,
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CSpuBase::IIR_SRC_A0,
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CSpuBase::IIR_SRC_A1,
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CSpuBase::IIR_DEST_B0,
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CSpuBase::IIR_DEST_B1,
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CSpuBase::ACC_SRC_C0,
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CSpuBase::ACC_SRC_C1,
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CSpuBase::ACC_SRC_D0,
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CSpuBase::ACC_SRC_D1,
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CSpuBase::IIR_SRC_B1,
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CSpuBase::IIR_SRC_B0,
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CSpuBase::MIX_DEST_A0,
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CSpuBase::MIX_DEST_A1,
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CSpuBase::MIX_DEST_B0,
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CSpuBase::MIX_DEST_B1
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};
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static unsigned int g_coefficientRegisterMapping[MAX_COEFFICIENT_REGISTER] =
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{
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CSpuBase::IIR_ALPHA,
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CSpuBase::ACC_COEF_A,
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CSpuBase::ACC_COEF_B,
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CSpuBase::ACC_COEF_C,
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CSpuBase::ACC_COEF_D,
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CSpuBase::IIR_COEF,
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CSpuBase::FB_ALPHA,
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CSpuBase::FB_X,
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CSpuBase::IN_COEF_L,
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CSpuBase::IN_COEF_R
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};
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CCore::CCore(unsigned int coreId, CSpuBase& spuBase)
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: m_coreId(coreId)
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, m_spuBase(spuBase)
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{
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m_logName = LOG_NAME_PREFIX + boost::lexical_cast<std::string>(m_coreId);
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m_readDispatch.core = &CCore::ReadRegisterCore;
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m_readDispatch.channel = &CCore::ReadRegisterChannel;
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m_writeDispatch.core = &CCore::WriteRegisterCore;
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m_writeDispatch.channel = &CCore::WriteRegisterChannel;
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Reset();
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}
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CCore::~CCore()
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{
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}
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void CCore::Reset()
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{
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}
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CSpuBase& CCore::GetSpuBase() const
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{
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return m_spuBase;
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}
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uint16 CCore::GetAddressLo(uint32 address)
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{
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return static_cast<uint16>((address >> 1) & 0xFFFF);
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}
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uint16 CCore::GetAddressHi(uint32 address)
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{
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return static_cast<uint16>((address >> (16 + 1)) & 0xFFFF);
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}
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uint32 CCore::SetAddressLo(uint32 address, uint16 value)
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{
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address &= 0xFFFF << (1 + 16);
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address |= value << 1;
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return address;
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}
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uint32 CCore::SetAddressHi(uint32 address, uint16 value)
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{
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address &= 0xFFFF << 1;
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address |= value << (1 + 16);
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return address;
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}
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uint32 CCore::ReadRegister(uint32 address, uint32 value)
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{
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return ProcessRegisterAccess(m_readDispatch, address, value);
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}
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uint32 CCore::WriteRegister(uint32 address, uint32 value)
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{
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return ProcessRegisterAccess(m_writeDispatch, address, value);
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}
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uint32 CCore::ProcessRegisterAccess(const REGISTER_DISPATCH_INFO& dispatchInfo, uint32 address, uint32 value)
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{
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if(address < S_REG_BASE)
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{
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//Channel access
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unsigned int channelId = (address >> 4) & 0x3F;
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address &= ~(0x3F << 4);
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return ((this)->*(dispatchInfo.channel))(channelId, address, value);
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}
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else if(address >= VA_REG_BASE && address < R_REG_BASE)
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{
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//Channel access
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unsigned int channelId = (address - VA_REG_BASE) / 12;
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address -= channelId * 12;
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return ((this)->*(dispatchInfo.channel))(channelId, address, value);
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}
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else
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{
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//Core write
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return ((this)->*(dispatchInfo.core))(0, address, value);
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}
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}
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uint32 CCore::ReadRegisterCore(unsigned int channelId, uint32 address, uint32 value)
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{
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uint32 result = 0;
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switch(address)
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{
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case STATX:
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result = 0x0000;
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if(m_spuBase.GetControl() & CSpuBase::CONTROL_DMA)
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{
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result |= 0x80;
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}
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break;
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case S_ENDX_HI:
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result = m_spuBase.GetEndFlags().h0;
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break;
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case S_ENDX_LO:
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result = m_spuBase.GetEndFlags().h1;
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break;
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case CORE_ATTR:
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result = m_spuBase.GetControl();
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break;
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case A_TS_MODE:
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result = m_spuBase.GetTransferMode();
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break;
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case A_TSA_HI:
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result = GetAddressHi(m_spuBase.GetTransferAddress());
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break;
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case A_ESA_LO:
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result = GetAddressLo(m_spuBase.GetReverbWorkAddressStart());
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break;
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case A_EEA_HI:
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result = GetAddressHi(m_spuBase.GetReverbWorkAddressEnd());
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break;
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}
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LogRead(address, result);
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return result;
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}
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uint32 CCore::WriteRegisterCore(unsigned int channelId, uint32 address, uint32 value)
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{
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if(address >= RVB_A_REG_BASE && address < RVB_A_REG_END)
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{
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//Address reverb register
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unsigned int regIndex = (address - RVB_A_REG_BASE) / 4;
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assert(regIndex < MAX_ADDRESS_REGISTER);
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unsigned int reverbParamId = g_addressRegisterMapping[regIndex];
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uint32 previousValue = m_spuBase.GetReverbParam(reverbParamId);
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if(address & 0x02)
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{
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value = SetAddressLo(previousValue, static_cast<uint16>(value));
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}
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else
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{
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value = SetAddressHi(previousValue, static_cast<uint16>(value));
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}
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m_spuBase.SetReverbParam(reverbParamId, value);
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}
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else if(address >= RVB_C_REG_BASE && address < RVB_C_REG_END)
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{
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//Coefficient reverb register
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unsigned int regIndex = (address - RVB_C_REG_BASE) / 2;
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assert(regIndex < MAX_COEFFICIENT_REGISTER);
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m_spuBase.SetReverbParam(g_coefficientRegisterMapping[regIndex], value);
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}
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else
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{
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switch(address)
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{
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case CORE_ATTR:
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m_spuBase.SetBaseSamplingRate(SPU_BASE_SAMPLING_RATE);
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m_spuBase.SetControl(static_cast<uint16>(value));
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break;
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case A_STD:
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m_spuBase.WriteWord(static_cast<uint16>(value));
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break;
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case A_TS_MODE:
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m_spuBase.SetTransferMode(static_cast<uint16>(value));
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break;
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case S_VMIXER_HI:
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m_spuBase.SetChannelReverbLo(static_cast<uint16>(value));
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break;
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case S_VMIXER_LO:
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m_spuBase.SetChannelReverbHi(static_cast<uint16>(value));
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break;
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case A_KON_HI:
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m_spuBase.SendKeyOn(value);
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break;
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case A_KON_LO:
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m_spuBase.SendKeyOn(value << 16);
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break;
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case A_KOFF_HI:
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m_spuBase.SendKeyOff(value);
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break;
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case A_KOFF_LO:
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m_spuBase.SendKeyOff(value << 16);
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break;
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case S_ENDX_LO:
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case S_ENDX_HI:
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if(value)
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{
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m_spuBase.ClearEndFlags();
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}
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break;
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case A_IRQA_HI:
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m_spuBase.SetIrqAddress(SetAddressHi(m_spuBase.GetIrqAddress(), static_cast<uint16>(value)));
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break;
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case A_IRQA_LO:
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m_spuBase.SetIrqAddress(SetAddressLo(m_spuBase.GetIrqAddress(), static_cast<uint16>(value)));
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break;
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case A_TSA_HI:
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m_spuBase.SetTransferAddress(SetAddressHi(m_spuBase.GetTransferAddress(), static_cast<uint16>(value)));
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break;
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case A_TSA_LO:
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m_spuBase.SetTransferAddress(SetAddressLo(m_spuBase.GetTransferAddress(), static_cast<uint16>(value)));
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break;
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case A_ESA_HI:
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m_spuBase.SetReverbWorkAddressStart(SetAddressHi(m_spuBase.GetReverbWorkAddressStart(), static_cast<uint16>(value)));
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break;
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case A_ESA_LO:
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m_spuBase.SetReverbWorkAddressStart(SetAddressLo(m_spuBase.GetReverbWorkAddressStart(), static_cast<uint16>(value)));
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break;
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case A_EEA_HI:
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m_spuBase.SetReverbWorkAddressEnd(((value & 0x0F) << 17) | 0x1FFFF);
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break;
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}
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}
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LogWrite(address, value);
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return 0;
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}
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uint32 CCore::ReadRegisterChannel(unsigned int channelId, uint32 address, uint32 value)
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{
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assert(channelId < MAX_CHANNEL);
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if(channelId >= MAX_CHANNEL)
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{
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return 0;
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}
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uint32 result = 0;
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CSpuBase::CHANNEL& channel(m_spuBase.GetChannel(channelId));
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switch(address)
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{
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case VP_VOLL:
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result = channel.volumeLeft;
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break;
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case VP_VOLR:
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result = channel.volumeRight;
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break;
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case VP_PITCH:
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result = channel.pitch;
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break;
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case VP_ADSR1:
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result = channel.adsrLevel;
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break;
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case VP_ADSR2:
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result = channel.adsrRate;
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break;
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case VP_ENVX:
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result = (channel.adsrVolume >> 16);
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break;
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case VP_VOLXL:
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result = (channel.volumeLeftAbs >> 16);
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break;
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case VP_VOLXR:
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result = (channel.volumeRightAbs >> 16);
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break;
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case VA_SSA_HI:
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result = GetAddressHi(channel.address);
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break;
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case VA_SSA_LO:
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result = GetAddressLo(channel.address);
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break;
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case VA_LSAX_HI:
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result = GetAddressHi(channel.repeat);
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break;
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case VA_LSAX_LO:
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result = GetAddressLo(channel.repeat);
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break;
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case VA_NAX_HI:
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result = GetAddressHi(channel.current);
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break;
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case VA_NAX_LO:
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result = GetAddressLo(channel.current);
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break;
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}
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LogChannelRead(channelId, address, result);
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return result;
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}
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uint32 CCore::WriteRegisterChannel(unsigned int channelId, uint32 address, uint32 value)
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{
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assert(channelId < MAX_CHANNEL);
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if(channelId >= MAX_CHANNEL)
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{
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return 0;
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}
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LogChannelWrite(channelId, address, value);
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CSpuBase::CHANNEL& channel(m_spuBase.GetChannel(channelId));
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switch(address)
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{
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case VP_VOLL:
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channel.volumeLeft <<= static_cast<uint16>(value);
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if(channel.volumeLeft.mode.mode == 0)
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{
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channel.volumeLeftAbs = channel.volumeLeft.volume.volume << 17;
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}
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break;
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case VP_VOLR:
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channel.volumeRight <<= static_cast<uint16>(value);
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if(channel.volumeRight.mode.mode == 0)
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{
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channel.volumeRightAbs = channel.volumeRight.volume.volume << 17;
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}
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break;
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case VP_PITCH:
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channel.pitch = static_cast<uint16>(value);
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break;
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case VP_ADSR1:
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channel.adsrLevel <<= static_cast<uint16>(value);
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break;
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case VP_ADSR2:
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channel.adsrRate <<= static_cast<uint16>(value);
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break;
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case VP_ENVX:
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channel.adsrVolume = static_cast<uint16>(value);
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break;
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case VA_SSA_HI:
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channel.address = SetAddressHi(channel.address, static_cast<uint16>(value));
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break;
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case VA_SSA_LO:
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channel.address = SetAddressLo(channel.address, static_cast<uint16>(value));
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break;
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case VA_LSAX_HI:
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channel.repeat = SetAddressHi(channel.repeat, static_cast<uint16>(value));
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break;
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case VA_LSAX_LO:
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channel.repeat = SetAddressLo(channel.repeat, static_cast<uint16>(value));
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break;
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}
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return 0;
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}
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void CCore::LogRead(uint32 address, uint32 value)
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{
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auto logName = m_logName.c_str();
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#define LOG_GET(registerId) case registerId: CLog::GetInstance().Print(logName, "= " #registerId " = 0x%04X\r\n", value); break;
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switch(address)
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{
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LOG_GET(CORE_ATTR)
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LOG_GET(STATX)
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LOG_GET(S_PMON_HI)
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LOG_GET(S_PMON_LO)
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LOG_GET(S_NON_HI)
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LOG_GET(S_NON_LO)
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LOG_GET(S_VMIXL_HI)
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LOG_GET(S_VMIXL_LO)
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LOG_GET(S_VMIXEL_HI)
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LOG_GET(S_VMIXEL_LO)
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LOG_GET(S_VMIXR_HI)
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LOG_GET(S_VMIXR_LO)
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LOG_GET(S_VMIXER_HI)
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LOG_GET(S_VMIXER_LO)
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LOG_GET(S_ENDX_HI)
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LOG_GET(S_ENDX_LO)
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LOG_GET(A_TSA_HI)
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LOG_GET(A_TSA_LO)
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LOG_GET(A_TS_MODE)
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LOG_GET(A_ESA_HI)
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LOG_GET(A_ESA_LO)
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LOG_GET(A_EEA_HI)
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LOG_GET(A_EEA_LO)
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default:
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CLog::GetInstance().Print(logName, "Read an unknown register 0x%04X.\r\n", address);
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break;
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}
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#undef LOG_GET
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}
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void CCore::LogWrite(uint32 address, uint32 value)
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{
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auto logName = m_logName.c_str();
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#define LOG_SET(registerId) case registerId: CLog::GetInstance().Print(logName, #registerId " = 0x%04X\r\n", value); break;
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switch(address)
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{
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LOG_SET(S_PMON_HI)
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LOG_SET(S_PMON_LO)
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LOG_SET(S_NON_HI)
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LOG_SET(S_NON_LO)
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LOG_SET(S_VMIXL_HI)
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LOG_SET(S_VMIXL_LO)
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LOG_SET(S_VMIXEL_HI)
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LOG_SET(S_VMIXEL_LO)
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LOG_SET(S_VMIXR_HI)
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LOG_SET(S_VMIXR_LO)
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LOG_SET(S_VMIXER_HI)
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LOG_SET(S_VMIXER_LO)
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LOG_SET(P_MMIX)
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LOG_SET(CORE_ATTR)
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LOG_SET(A_KON_HI)
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LOG_SET(A_KON_LO)
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LOG_SET(A_KOFF_HI)
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LOG_SET(A_KOFF_LO)
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LOG_SET(S_ENDX_HI)
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LOG_SET(S_ENDX_LO)
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LOG_SET(A_IRQA_HI)
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LOG_SET(A_IRQA_LO)
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LOG_SET(A_TSA_HI)
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LOG_SET(A_TSA_LO)
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LOG_SET(A_STD)
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LOG_SET(A_TS_MODE)
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LOG_SET(A_ESA_HI)
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LOG_SET(A_ESA_LO)
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LOG_SET(A_EEA_HI)
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LOG_SET(A_EEA_LO)
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LOG_SET(P_MVOLL)
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LOG_SET(P_MVOLR)
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LOG_SET(P_EVOLL)
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LOG_SET(P_EVOLR)
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LOG_SET(P_BVOLL)
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LOG_SET(P_BVOLR)
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default:
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CLog::GetInstance().Print(logName, "Write 0x%04X to an unknown register 0x%04X.\r\n", value, address);
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break;
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}
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#undef LOG_SET
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}
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void CCore::LogChannelRead(unsigned int channelId, uint32 address, uint32 value)
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{
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auto logName = m_logName.c_str();
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#define LOG_GET(registerId) case registerId: CLog::GetInstance().Print(logName, "ch%02d: = " #registerId " = 0x%04X\r\n", channelId, value); break;
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switch(address)
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{
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LOG_GET(VP_VOLL)
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LOG_GET(VP_VOLR)
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LOG_GET(VP_PITCH)
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LOG_GET(VP_ADSR1)
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LOG_GET(VP_ADSR2)
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LOG_GET(VP_ENVX)
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LOG_GET(VP_VOLXL)
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LOG_GET(VP_VOLXR)
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LOG_GET(VA_SSA_HI)
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LOG_GET(VA_SSA_LO)
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LOG_GET(VA_LSAX_HI)
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LOG_GET(VA_LSAX_LO)
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LOG_GET(VA_NAX_HI)
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LOG_GET(VA_NAX_LO)
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default:
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CLog::GetInstance().Print(logName, "ch%02d: Read an unknown register 0x%04X.\r\n",
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channelId, address);
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break;
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}
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#undef LOG_GET
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|
}
|
|
|
|
void CCore::LogChannelWrite(unsigned int channelId, uint32 address, uint32 value)
|
|
{
|
|
auto logName = m_logName.c_str();
|
|
#define LOG_SET(registerId) case registerId: CLog::GetInstance().Print(logName, "ch%02d: " #registerId " = 0x%04X\r\n", channelId, value); break;
|
|
|
|
switch(address)
|
|
{
|
|
LOG_SET(VP_VOLL)
|
|
LOG_SET(VP_VOLR)
|
|
LOG_SET(VP_PITCH)
|
|
LOG_SET(VP_ADSR1)
|
|
LOG_SET(VP_ADSR2)
|
|
LOG_SET(VP_ENVX)
|
|
LOG_SET(VP_VOLXL)
|
|
LOG_SET(VP_VOLXR)
|
|
LOG_SET(VA_SSA_HI)
|
|
LOG_SET(VA_SSA_LO)
|
|
LOG_SET(VA_LSAX_HI)
|
|
LOG_SET(VA_LSAX_LO)
|
|
|
|
default:
|
|
CLog::GetInstance().Print(logName, "ch%02d: Wrote %04X to an unknown register 0x%04X.\r\n",
|
|
channelId, value, address);
|
|
break;
|
|
}
|
|
|
|
#undef LOG_SET
|
|
}
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