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115 lines
2.3 KiB
C++
115 lines
2.3 KiB
C++
#ifndef _IOP_SPU_H_
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#define _IOP_SPU_H_
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#include "Iop_SpuBase.h"
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namespace Iop
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{
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class CSpu
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{
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public:
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CSpu(CSpuBase&);
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virtual ~CSpu();
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void Reset();
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uint16 ReadRegister(uint32);
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void WriteRegister(uint32, uint16);
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enum
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{
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SPU_BEGIN = 0x1F801C00,
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SPU_END = 0x1F801DFF
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};
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enum
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{
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CH0_BASE = 0x1F801C00,
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CH1_BASE = 0x1F801C10,
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CH2_BASE = 0x1F801C20,
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CH3_BASE = 0x1F801C30,
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CH4_BASE = 0x1F801C40,
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CH5_BASE = 0x1F801C50,
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CH6_BASE = 0x1F801C60,
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CH7_BASE = 0x1F801C70,
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CH8_BASE = 0x1F801C80,
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CH9_BASE = 0x1F801C90,
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CH10_BASE = 0x1F801CA0,
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CH11_BASE = 0x1F801CB0,
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CH12_BASE = 0x1F801CC0,
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CH13_BASE = 0x1F801CD0,
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CH14_BASE = 0x1F801CE0,
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CH15_BASE = 0x1F801CF0,
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CH16_BASE = 0x1F801D00,
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CH17_BASE = 0x1F801D10,
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CH18_BASE = 0x1F801D20,
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CH19_BASE = 0x1F801D30,
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CH20_BASE = 0x1F801D40,
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CH21_BASE = 0x1F801D50,
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CH22_BASE = 0x1F801D60,
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CH23_BASE = 0x1F801D70,
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};
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enum
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{
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CH_VOL_LEFT = 0x00,
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CH_VOL_RIGHT = 0x02,
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CH_PITCH = 0x04,
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CH_ADDRESS = 0x06,
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CH_ADSR_LEVEL = 0x08,
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CH_ADSR_RATE = 0x0A,
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CH_ADSR_VOLUME = 0x0C,
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CH_REPEAT = 0x0E
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};
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enum
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{
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SPU_GENERAL_BASE = 0x1F801D80,
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};
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enum
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{
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MAIN_VOL_LEFT = 0x1F801D80,
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MAIN_VOL_RIGHT = 0x1F801D82,
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REVERB_LEFT = 0x1F801D84,
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REVERB_RIGHT = 0x1F801D86,
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VOICE_ON_0 = 0x1F801D88,
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VOICE_ON_1 = 0x1F801D8A,
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VOICE_OFF_0 = 0x1F801D8C,
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VOICE_OFF_1 = 0x1F801D8E,
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FM_0 = 0x1F801D90,
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FM_1 = 0x1F801D92,
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NOISE_0 = 0x1F801D94,
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NOISE_1 = 0x1F801D96,
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REVERB_0 = 0x1F801D98,
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REVERB_1 = 0x1F801D9A,
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CHANNEL_ON_0 = 0x1F801D9C,
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CHANNEL_ON_1 = 0x1F801D9E,
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REVERB_WORK = 0x1F801DA2,
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IRQ_ADDR = 0x1F801DA4,
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BUFFER_ADDR = 0x1F801DA6,
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SPU_DATA = 0x1F801DA8,
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SPU_CTRL0 = 0x1F801DAA,
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SPU_STATUS0 = 0x1F801DAC,
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SPU_STATUS1 = 0x1F801DAE,
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CD_VOL_LEFT = 0x1F801DB0,
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CD_VOL_RIGHT = 0x1F801DB2,
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EXT_VOL_LEFT = 0x1F801DB4,
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EXT_VOL_RIGHT = 0x1F801DB6,
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REVERB_START = 0x1F801DC0,
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REVERB_END = 0x1F801E00,
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};
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private:
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void DisassembleRead(uint32);
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void DisassembleWrite(uint32, uint16);
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CSpuBase& m_base;
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uint16 m_status0;
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uint16 m_status1;
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};
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}
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#endif
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