mirror of
https://github.com/libretro/RACE.git
synced 2024-11-23 08:59:49 +00:00
824 lines
17 KiB
C++
824 lines
17 KiB
C++
/********************************************************************************/
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/* */
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/* CZ80 ED opcode include source file */
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/* C Z80 emulator version 0.92 */
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/* Copyright 2004-2005 Stéphane Dallongeville */
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/* */
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/********************************************************************************/
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#if CZ80_USE_JUMPTABLE
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goto *JumpTableED[Opcode];
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#else
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switch (Opcode)
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{
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#endif
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// ILLEGAL
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OPED(0x00):
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OPED(0x01):
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OPED(0x02):
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OPED(0x03):
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OPED(0x04):
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OPED(0x05):
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OPED(0x06):
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OPED(0x07):
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OPED(0x08):
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OPED(0x09):
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OPED(0x0a):
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OPED(0x0b):
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OPED(0x0c):
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OPED(0x0d):
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OPED(0x0e):
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OPED(0x0f):
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OPED(0x10):
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OPED(0x11):
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OPED(0x12):
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OPED(0x13):
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OPED(0x14):
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OPED(0x15):
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OPED(0x16):
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OPED(0x17):
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OPED(0x18):
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OPED(0x19):
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OPED(0x1a):
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OPED(0x1b):
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OPED(0x1c):
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OPED(0x1d):
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OPED(0x1e):
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OPED(0x1f):
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OPED(0x20):
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OPED(0x21):
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OPED(0x22):
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OPED(0x23):
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OPED(0x24):
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OPED(0x25):
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OPED(0x26):
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OPED(0x27):
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OPED(0x28):
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OPED(0x29):
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OPED(0x2a):
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OPED(0x2b):
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OPED(0x2c):
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OPED(0x2d):
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OPED(0x2e):
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OPED(0x2f):
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OPED(0x30):
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OPED(0x31):
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OPED(0x32):
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OPED(0x33):
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OPED(0x34):
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OPED(0x35):
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OPED(0x36):
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OPED(0x37):
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OPED(0x38):
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OPED(0x39):
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OPED(0x3a):
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OPED(0x3b):
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OPED(0x3c):
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OPED(0x3d):
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OPED(0x3e):
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OPED(0x3f):
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OPED(0xbc):
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OPED(0xbd):
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OPED(0xbe):
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OPED(0xbf):
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OPED(0xc0):
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OPED(0xc1):
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OPED(0xc2):
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OPED(0xc3):
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OPED(0xc4):
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OPED(0xc5):
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OPED(0xc6):
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OPED(0xc7):
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OPED(0xc8):
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OPED(0xc9):
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OPED(0xca):
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OPED(0xcb):
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OPED(0xcc):
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OPED(0xcd):
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OPED(0xce):
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OPED(0xcf):
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OPED(0xd0):
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OPED(0xd1):
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OPED(0xd2):
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OPED(0xd3):
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OPED(0xd4):
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OPED(0xd5):
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OPED(0xd6):
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OPED(0xd7):
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OPED(0xd8):
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OPED(0xd9):
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OPED(0xda):
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OPED(0xdb):
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OPED(0xdc):
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OPED(0xdd):
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OPED(0xde):
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OPED(0xdf):
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OPED(0xe0):
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OPED(0xe1):
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OPED(0xe2):
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OPED(0xe3):
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OPED(0xe4):
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OPED(0xe5):
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OPED(0xe6):
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OPED(0xe7):
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OPED(0xe8):
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OPED(0xe9):
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OPED(0xea):
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OPED(0xeb):
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OPED(0xec):
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OPED(0xed):
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OPED(0xee):
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OPED(0xef):
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OPED(0xf0):
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OPED(0xf1):
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OPED(0xf2):
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OPED(0xf3):
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OPED(0xf4):
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OPED(0xf5):
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OPED(0xf6):
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OPED(0xf7):
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OPED(0xf8):
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OPED(0xf9):
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OPED(0xfa):
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OPED(0xfb):
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OPED(0xfc):
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OPED(0xfd):
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OPED(0xfe):
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OPED(0xff):
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OPED(0x77):
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OPED(0x7f):
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OPED(0x80):
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OPED(0x81):
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OPED(0x82):
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OPED(0x83):
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OPED(0x84):
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OPED(0x85):
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OPED(0x86):
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OPED(0x87):
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OPED(0x88):
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OPED(0x89):
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OPED(0x8a):
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OPED(0x8b):
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OPED(0x8c):
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OPED(0x8d):
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OPED(0x8e):
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OPED(0x8f):
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OPED(0x90):
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OPED(0x91):
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OPED(0x92):
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OPED(0x93):
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OPED(0x94):
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OPED(0x95):
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OPED(0x96):
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OPED(0x97):
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OPED(0x98):
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OPED(0x99):
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OPED(0x9a):
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OPED(0x9b):
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OPED(0x9c):
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OPED(0x9d):
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OPED(0x9e):
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OPED(0x9f):
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OPED(0xa4):
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OPED(0xa5):
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OPED(0xa6):
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OPED(0xa7):
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OPED(0xac):
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OPED(0xad):
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OPED(0xae):
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OPED(0xaf):
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OPED(0xb4):
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OPED(0xb5):
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OPED(0xb6):
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OPED(0xb7):
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goto OP_NOP;
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OPED(0x43): // LD (w),BC
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data = pzBC;
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goto OP_LD_mNN_xx;
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OPED(0x53): // LD (w),DE
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data = pzDE;
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goto OP_LD_mNN_xx;
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OPED(0x63): // LD (w),HL
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data = pzHL;
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goto OP_LD_mNN_xx;
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OPED(0x73): // LD (w),SP
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data = pzSP;
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goto OP_LD_mNN_xx;
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OPED(0x4b): // LD BC,(w)
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data = pzBC;
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goto OP_LD_xx_mNN;
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OPED(0x5b): // LD DE,(w)
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data = pzDE;
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goto OP_LD_xx_mNN;
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OPED(0x6b): // LD HL,(w)
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data = pzHL;
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goto OP_LD_xx_mNN;
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OPED(0x7b): // LD SP,(w)
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data = pzSP;
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goto OP_LD_xx_mNN;
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OPED(0x47): // LD I,A
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zI = zA;
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RET(5)
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OPED(0x4f): // LD R,A
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zR = zA - ((CPU->CycleToDo - Z80_ICount) / 4);
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zR2 = zA & 0x80;
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RET(5)
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OPED(0x57): // LD A,I
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{
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u8 F;
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zA = zI;
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F = zF & CZ80_CF;
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F |= zA & (CZ80_SF | CZ80_YF | CZ80_XF);
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F |= zIFF2;
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if (!zA) F |= CZ80_ZF;
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zF = F;
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RET(5)
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}
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OPED(0x5f): // LD A,R
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{
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u8 F;
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zA = zR2 + ((zR + ((CPU->CycleToDo - Z80_ICount) / 4)) & 0x7F);
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F = zF & CZ80_CF;
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F |= zA & (CZ80_SF | CZ80_YF | CZ80_XF);
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F |= zIFF2;
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if (!zA) F |= CZ80_ZF;
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zF = F;
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RET(5)
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}
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OPED(0x5c): // NEG
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OPED(0x54): // NEG
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OPED(0x4c): // NEG
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OPED(0x44): // NEG
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OPED(0x64): // NEG
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OPED(0x6c): // NEG
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OPED(0x74): // NEG
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OPED(0x7c): // NEG
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{
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u32 val;
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u32 res;
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val = zA;
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res = 0 - val;
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zF = SZXY[res & 0xFF] | // S/Z/X/Y flag
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((res ^ val) & CZ80_HF) | // H flag
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(((val & res) & 0x80) >> 5) | // V flag
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((res >> 8) & CZ80_CF) | CZ80_NF; // C/N flag
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zA = res;
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RET(4)
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}
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OPED(0x67): // RRD (HL)
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{
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u32 adr;
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u8 src;
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PRE_IO
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adr = zHL;
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READ_BYTE(adr, src)
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WRITE_BYTE(adr, (src >> 4) | (zA << 4))
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zA = (zA & 0xF0) | (src & 0x0F);
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zF = SZXYP[zA] | (zF & CZ80_CF);
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POST_IO
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RET(14)
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}
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OPED(0x6f): // RLD (HL)
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{
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u32 adr;
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u8 src;
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PRE_IO
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adr = zHL;
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READ_BYTE(adr, src)
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WRITE_BYTE(adr, (src << 4) | (zA & 0x0F))
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zA = (zA & 0xF0) | (src >> 4);
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zF = SZXYP[zA] | (zF & CZ80_CF);
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POST_IO
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RET(14)
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}
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{
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u32 src;
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u32 res;
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OPED(0x7a): // ADC HL,SP
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src = zSP;
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goto OP_ADC_HL;
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OPED(0x4a): // ADC HL,BC
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OPED(0x5a): // ADC HL,DE
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OPED(0x6a): // ADC HL,HL
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src = zR16((Opcode >> 4) & 3);
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OP_ADC_HL:
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res = zHL + src + (zF & CZ80_CF);
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zF = (((src ^ zHL ^ res) >> 8) & CZ80_HF) | // H flag
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(((src ^ zHL ^ 0x8000) & (src ^ res) & 0x8000) >> 13) | // V flag
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((res >> 8) & (CZ80_SF | CZ80_XF | CZ80_YF)) | // S/X/Y flag
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((res >> 16) & CZ80_CF) | // C flag
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((res & 0xFFFF) ? 0 : CZ80_ZF); // Z flag
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zHL = res;
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RET(11)
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OPED(0x72): // SBC HL,SP
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src = zSP;
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goto OP_SBC_HL;
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OPED(0x42): // SBC HL,BC
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OPED(0x52): // SBC HL,DE
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OPED(0x62): // SBC HL,HL
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src = zR16((Opcode >> 4) & 3);
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OP_SBC_HL:
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res = zHL - src + (zF & CZ80_CF);
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#if CZ80_DEBUG
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zF = (((src ^ zHL ^ res) >> 8) & CZ80_HF) | CZ80_NF | // H/N flag
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(((src ^ zHL) & (zHL ^ res) & 0x8000) >> 13) | // V flag
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((res >> 8) & CZ80_SF) | // S flag
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((res >> 16) & CZ80_CF) | // C flag
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((res & 0xFFFF) ? 0 : CZ80_ZF); // Z flag
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#else
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zF = (((src ^ zHL ^ res) >> 8) & CZ80_HF) | CZ80_NF | // H/N flag
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(((src ^ zHL) & (zHL ^ res) & 0x8000) >> 13) | // V flag
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((res >> 8) & (CZ80_SF | CZ80_XF | CZ80_YF)) | // S/X/Y flag
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((res >> 16) & CZ80_CF) | // C flag
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((res & 0xFFFF) ? 0 : CZ80_ZF); // Z flag
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#endif
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zHL = res;
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RET(11)
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}
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{
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u32 res;
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OPED(0x40): // IN B,(C)
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OPED(0x48): // IN C,(C)
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OPED(0x50): // IN D,(C)
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OPED(0x58): // IN E,(C)
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OPED(0x60): // IN H,(C)
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OPED(0x68): // IN L,(C)
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OPED(0x78): // IN E,(C)
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IN(zBC, res);
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zR8((Opcode >> 3) & 7) = res;
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zF = (zF & CZ80_CF) | SZXYP[res];
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RET(8)
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OPED(0x70): // IN 0,(C)
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IN(zBC, res);
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zF = (zF & CZ80_CF) | SZXYP[res];
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RET(8)
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}
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{
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u32 src;
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OPED(0x71): // OUT (C),0
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src = 0;
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goto OP_OUT_mBC;
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OPED(0x51): // OUT (C),D
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OPED(0x41): // OUT (C),B
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OPED(0x49): // OUT (C),C
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OPED(0x59): // OUT (C),E
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OPED(0x61): // OUT (C),H
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OPED(0x69): // OUT (C),L
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OPED(0x79): // OUT (C),E
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src = zR8((Opcode >> 3) & 7);
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OP_OUT_mBC:
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OUT(zBC, src);
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RET(8)
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}
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{
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u32 newPC;
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OPED(0x4d): // RETI
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OPED(0x5d): // RETI
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OPED(0x6d): // RETI
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OPED(0x7d): // RETI
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// if (CPU->RetI) CPU->RetI();
|
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OPED(0x45): // RETN;
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OPED(0x55): // RETN;
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OPED(0x65): // RETN;
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OPED(0x75): // RETN;
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PRE_IO
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POP_16(newPC);
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SET_PC(newPC);
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POST_IO
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zIFF1 = zIFF2;
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Z80_ICount -= 10;
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// we need to test for interrupt
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goto Cz80_Check_Int;
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}
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|
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OPED(0x46): // IM 0
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OPED(0x4e): // IM 0
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OPED(0x66): // IM 0
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OPED(0x6e): // IM 0
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zIM = 0;
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RET(4)
|
|
|
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OPED(0x76): // IM 1
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OPED(0x56): // IM 1
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zIM = 1;
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RET(4)
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|
|
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OPED(0x5e): // IM 2
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OPED(0x7e): // IM 2
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zIM = 2;
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RET(4)
|
|
|
|
|
|
{
|
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u8 val;
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u8 F;
|
|
|
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OPED(0xa8): // LDD
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PRE_IO
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READ_BYTE(zHL--, val)
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WRITE_BYTE(zDE--, val)
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goto OP_LDX;
|
|
|
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OPED(0xa0): // LDI
|
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PRE_IO
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READ_BYTE(zHL++, val)
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WRITE_BYTE(zDE++, val)
|
|
|
|
OP_LDX:
|
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#if CZ80_EXACT
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val += zA;
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F = (zF & (CZ80_SF | CZ80_ZF | CZ80_CF)) |
|
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(val & CZ80_XF) | ((val << 4) & CZ80_YF);
|
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#else
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F = zF & (CZ80_SF | CZ80_ZF | CZ80_YF | CZ80_XF | CZ80_CF);
|
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#endif
|
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if (--zBC) F |= CZ80_PF;
|
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zF = F;
|
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POST_IO
|
|
RET(12)
|
|
}
|
|
|
|
{
|
|
u8 val;
|
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u8 F;
|
|
|
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OPED(0xb8): // LDDR
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do
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{
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PRE_IO
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READ_BYTE(zHL--, val)
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WRITE_BYTE(zDE--, val)
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POST_IO
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zBC--;
|
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Z80_ICount -= 21;
|
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} while ((zBC) && (Z80_ICount > -4));
|
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goto OP_LDXR;
|
|
|
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OPED(0xb0): // LDIR
|
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do
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{
|
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PRE_IO
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READ_BYTE(zHL++, val)
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WRITE_BYTE(zDE++, val)
|
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POST_IO
|
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zBC--;
|
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Z80_ICount -= 21;
|
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} while ((zBC) && (Z80_ICount > -4));
|
|
|
|
OP_LDXR:
|
|
#if CZ80_EXACT
|
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val += zA;
|
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F = (zF & (CZ80_SF | CZ80_ZF | CZ80_CF)) |
|
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(val & CZ80_XF) | ((val << 4) & CZ80_YF);
|
|
#else
|
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F = zF & (CZ80_SF | CZ80_ZF | CZ80_YF | CZ80_XF | CZ80_CF);
|
|
#endif
|
|
|
|
if (zBC)
|
|
{
|
|
// instruction not yet completed...
|
|
// we will continu it at next CZ80_Exec
|
|
zF = F | CZ80_PF;
|
|
zPC -= 2;
|
|
Z80_ICount += 4;
|
|
goto Cz80_Check_Int;
|
|
}
|
|
|
|
// instruction completed...
|
|
zF = F;
|
|
RET(-(5 + 4))
|
|
}
|
|
|
|
|
|
{
|
|
u8 val;
|
|
u8 res;
|
|
u8 F;
|
|
|
|
OPED(0xa9): // CPD
|
|
PRE_IO
|
|
READ_BYTE(zHL--, val)
|
|
goto OP_CPX;
|
|
|
|
OPED(0xa1): // CPI
|
|
PRE_IO
|
|
READ_BYTE(zHL++, val)
|
|
|
|
OP_CPX:
|
|
res = zA - val;
|
|
#if CZ80_EXACT
|
|
F = (zF & CZ80_CF) | (SZXY[res] & ~(CZ80_YF | CZ80_XF)) |
|
|
((zA ^ val ^ res) & CZ80_HF) | CZ80_NF;
|
|
if (F & CZ80_HF) res--;
|
|
F |= (res & CZ80_XF) | ((res >> 4) & CZ80_YF);
|
|
#else
|
|
F = (zF & CZ80_CF) | SZXY[res] |
|
|
((zA ^ val ^ res) & CZ80_HF) | CZ80_NF;
|
|
#endif
|
|
if (--zBC) F |= CZ80_PF;
|
|
zF = F;
|
|
POST_IO
|
|
RET(12)
|
|
}
|
|
|
|
{
|
|
u32 val;
|
|
u32 res;
|
|
u8 F;
|
|
|
|
OPED(0xb9): // CPDR
|
|
do
|
|
{
|
|
PRE_IO
|
|
READ_BYTE(zHL--, val)
|
|
res = zA - val;
|
|
POST_IO
|
|
zBC--;
|
|
Z80_ICount -= 21;
|
|
} while ((zBC) && (res) && (Z80_ICount > -4));
|
|
goto OP_CPXR;
|
|
|
|
OPED(0xb1): // CPIR
|
|
do
|
|
{
|
|
PRE_IO
|
|
READ_BYTE(zHL++, val)
|
|
res = zA - val;
|
|
POST_IO
|
|
zBC--;
|
|
Z80_ICount -= 21;
|
|
} while ((zBC) && (res) && (Z80_ICount > -4));
|
|
|
|
OP_CPXR:
|
|
#if CZ80_EXACT
|
|
F = (zF & CZ80_CF) | (SZXY[res] & ~(CZ80_YF | CZ80_XF)) |
|
|
((zA ^ val ^ res) & CZ80_HF) | CZ80_NF;
|
|
if (F & CZ80_HF) res--;
|
|
F |= (res & CZ80_XF) | ((res >> 4) & CZ80_YF);
|
|
#else
|
|
F = (zF & CZ80_CF) | SZXY[res] |
|
|
((zA ^ val ^ res) & CZ80_HF) | CZ80_NF;
|
|
#endif
|
|
|
|
if (zBC)
|
|
{
|
|
// instruction not yet completed...
|
|
// we will continu it at next CZ80_Exec
|
|
zF = F | CZ80_PF;
|
|
zPC -= 2;
|
|
Z80_ICount += 4;
|
|
goto Cz80_Check_Int;
|
|
}
|
|
|
|
// instruction completed...
|
|
zF = F;
|
|
RET(-(3 + 4))
|
|
}
|
|
|
|
|
|
{
|
|
u8 val;
|
|
#if CZ80_EXACT
|
|
u8 F;
|
|
#endif
|
|
|
|
OPED(0xaa): // IND
|
|
PRE_IO
|
|
IN(zBC, val)
|
|
WRITE_BYTE(zHL--, val)
|
|
#if CZ80_EXACT
|
|
if ((((zC - 1) & 0xFF) + val) & 0x100)
|
|
{
|
|
F = CZ80_HF | CZ80_CF;
|
|
goto OP_INX;
|
|
}
|
|
F = 0;
|
|
#endif
|
|
goto OP_INX;
|
|
|
|
OPED(0xa2): // INI
|
|
PRE_IO
|
|
IN(zBC, val)
|
|
WRITE_BYTE(zHL++, val)
|
|
#if CZ80_EXACT
|
|
if ((((zC + 1) & 0xFF) + val) & 0x100)
|
|
{
|
|
F = CZ80_HF | CZ80_CF;
|
|
goto OP_INX;
|
|
}
|
|
F = 0;
|
|
#endif
|
|
|
|
OP_INX:
|
|
#if CZ80_EXACT
|
|
// P FLAG isn't correct here !
|
|
zF = F | (SZXY[--zB] + ((val >> 6) & CZ80_NF) + (val & CZ80_PF));
|
|
#else
|
|
zF = SZXY[--zB] + ((val >> 6) & CZ80_NF);
|
|
#endif
|
|
POST_IO
|
|
RET(12)
|
|
}
|
|
|
|
{
|
|
u8 val;
|
|
#if CZ80_EXACT
|
|
u8 F;
|
|
#endif
|
|
|
|
OPED(0xba): // INDR
|
|
do
|
|
{
|
|
PRE_IO
|
|
IN(zBC, val)
|
|
WRITE_BYTE(zHL--, val)
|
|
POST_IO
|
|
zB--;
|
|
Z80_ICount -= 21;
|
|
} while ((zB) && (Z80_ICount > -4));
|
|
#if CZ80_EXACT
|
|
if ((((zC - 1) & 0xFF) + val) & 0x100)
|
|
{
|
|
F = CZ80_HF | CZ80_CF;
|
|
goto OP_INXR;
|
|
}
|
|
F = 0;
|
|
#endif
|
|
goto OP_INXR;
|
|
|
|
OPED(0xb2): // INIR
|
|
do
|
|
{
|
|
PRE_IO
|
|
IN(zBC, val)
|
|
WRITE_BYTE(zHL++, val)
|
|
POST_IO
|
|
zB--;
|
|
Z80_ICount -= 21;
|
|
} while ((zB) && (Z80_ICount > -4));
|
|
#if CZ80_EXACT
|
|
if ((((zC + 1) & 0xFF) + val) & 0x100)
|
|
{
|
|
F = CZ80_HF | CZ80_CF;
|
|
goto OP_INXR;
|
|
}
|
|
F = 0;
|
|
#endif
|
|
|
|
OP_INXR:
|
|
#if CZ80_EXACT
|
|
// P FLAG isn't correct here !
|
|
zF = F | (SZXY[zB] + ((val >> 6) & CZ80_NF) + (val & CZ80_PF));
|
|
#else
|
|
zF = SZXY[zB] + ((val >> 6) & CZ80_NF);
|
|
#endif
|
|
|
|
if (zB)
|
|
{
|
|
// instruction not yet completed...
|
|
// we will continu it at next CZ80_Exec
|
|
zPC -= 2;
|
|
Z80_ICount += 4;
|
|
goto Cz80_Check_Int;
|
|
}
|
|
|
|
// instruction completed...
|
|
RET(-(5 + 4))
|
|
}
|
|
|
|
|
|
{
|
|
u8 val;
|
|
#if CZ80_EXACT
|
|
u8 F;
|
|
#endif
|
|
|
|
OPED(0xab): // OUTD
|
|
PRE_IO
|
|
READ_BYTE(zHL--, val)
|
|
OUT(zBC, val)
|
|
goto OP_OUTX;
|
|
|
|
OPED(0xa3): // OUTI
|
|
PRE_IO
|
|
READ_BYTE(zHL++, val)
|
|
OUT(zBC, val)
|
|
|
|
OP_OUTX:
|
|
#if CZ80_EXACT
|
|
// P FLAG isn't correct here !
|
|
F = SZXY[--zB] + ((val >> 6) & CZ80_NF) + (val & CZ80_PF);
|
|
if ((val + zL) & 0x100) F |= CZ80_HF | CZ80_CF;
|
|
zF = F;
|
|
#else
|
|
zF = SZXY[--zB] + ((val >> 6) & CZ80_NF);
|
|
#endif
|
|
POST_IO
|
|
RET(12)
|
|
}
|
|
|
|
|
|
{
|
|
u8 val;
|
|
#if CZ80_EXACT
|
|
u8 F;
|
|
#endif
|
|
|
|
OPED(0xbb): // OUTDR
|
|
do
|
|
{
|
|
PRE_IO
|
|
READ_BYTE(zHL--, val)
|
|
OUT(zBC, val)
|
|
POST_IO
|
|
zB--;
|
|
Z80_ICount -= 21;
|
|
} while ((zB) && (Z80_ICount > -4));
|
|
goto OP_OUTXR;
|
|
|
|
OPED(0xb3): // OUTIR
|
|
do
|
|
{
|
|
PRE_IO
|
|
READ_BYTE(zHL++, val)
|
|
OUT(zBC, val)
|
|
POST_IO
|
|
zB--;
|
|
Z80_ICount -= 21;
|
|
} while ((zB) && (Z80_ICount > -4));
|
|
|
|
OP_OUTXR:
|
|
#if CZ80_EXACT
|
|
// P FLAG isn't correct here !
|
|
F = SZXY[zB] + ((val >> 6) & CZ80_NF) + (val & CZ80_PF);
|
|
if ((val + zL) & 0x100) F |= CZ80_HF | CZ80_CF;
|
|
zF = F;
|
|
#else
|
|
zF = SZXY[zB] + ((val >> 6) & CZ80_NF);
|
|
#endif
|
|
|
|
if (zB)
|
|
{
|
|
// instruction not yet completed...
|
|
// we will continu it at next CZ80_Exec
|
|
zPC -= 2;
|
|
Z80_ICount += 4;
|
|
goto Cz80_Check_Int;
|
|
}
|
|
|
|
// instruction not yet completed...
|
|
RET(-(5 + 4))
|
|
}
|
|
|
|
#if CZ80_USE_JUMPTABLE
|
|
#else
|
|
}
|
|
#endif
|