mirror of
https://github.com/libretro/RetroArch.git
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f24893bcb1
* Prepare to update deps/switchres * Squashed 'deps/switchres/' content from commit ca72648b32 git-subtree-dir: deps/switchres git-subtree-split: ca72648b3253eca8c5addf64d1e4aa1c43f5db94 * Add CRT modeswitching to KMS Display the real refresh rate Enable the CRT SwitchRes menu Add another switchres.ini path for Lakka
245 lines
6.0 KiB
C++
245 lines
6.0 KiB
C++
/**************************************************************
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edid.c - Basic EDID generation
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(based on edid.S: EDID data template by Carsten Emde)
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---------------------------------------------------------
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Switchres Modeline generation engine for emulation
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License GPL-2.0+
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Copyright 2010-2021 Chris Kennedy, Antonio Giner,
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Alexandre Wodarczyk, Gil Delescluse
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**************************************************************/
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#include <stdio.h>
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#include <string.h>
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#include "switchres.h"
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#include "edid.h"
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//============================================================
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// edid_from_modeline
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//============================================================
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int edid_from_modeline(modeline *mode, monitor_range *range, const char *name, edid_block *edid)
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{
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if (!edid) return 0;
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// header
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edid->b[0] = 0x00;
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edid->b[1] = 0xff;
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edid->b[2] = 0xff;
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edid->b[3] = 0xff;
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edid->b[4] = 0xff;
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edid->b[5] = 0xff;
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edid->b[6] = 0xff;
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edid->b[7] = 0x00;
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// Manufacturer ID = "SWR"
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edid->b[8] = 0x4e;
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edid->b[9] = 0xf2;
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// Manufacturer product code
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edid->b[10] = 0x00;
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edid->b[11] = 0x00;
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// Serial number
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edid->b[12] = 0x00;
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edid->b[13] = 0x00;
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edid->b[14] = 0x00;
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edid->b[15] = 0x00;
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// Week of manufacture
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edid->b[16] = 5;
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// Year of manufacture
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edid->b[17] = 2021 - 1990;
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// EDID version and revision
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edid->b[18] = 1;
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edid->b[19] = 3;
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// video params
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edid->b[20] = 0x6d;
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// Maximum H & V size in cm
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edid->b[21] = 48;
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edid->b[22] = 36;
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// Gamma
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edid->b[23] = 120;
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// Display features
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edid->b[24] = 0x0A;
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// Chromacity coordinates;
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edid->b[25] = 0x5e;
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edid->b[26] = 0xc0;
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edid->b[27] = 0xa4;
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edid->b[28] = 0x59;
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edid->b[29] = 0x4a;
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edid->b[30] = 0x98;
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edid->b[31] = 0x25;
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edid->b[32] = 0x20;
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edid->b[33] = 0x50;
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edid->b[34] = 0x54;
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// Established timings
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edid->b[35] = 0x00;
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edid->b[36] = 0x00;
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edid->b[37] = 0x00;
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// Standard timing information
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edid->b[38] = 0x01;
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edid->b[39] = 0x01;
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edid->b[40] = 0x01;
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edid->b[41] = 0x01;
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edid->b[42] = 0x01;
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edid->b[43] = 0x01;
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edid->b[44] = 0x01;
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edid->b[45] = 0x01;
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edid->b[46] = 0x01;
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edid->b[47] = 0x01;
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edid->b[48] = 0x01;
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edid->b[49] = 0x01;
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edid->b[50] = 0x01;
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edid->b[51] = 0x01;
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edid->b[52] = 0x01;
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edid->b[53] = 0x01;
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// Pixel clock in 10 kHz units. (0.-655.35 MHz, little-endian)
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edid->b[54] = (mode->pclock / 10000) & 0xff;
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edid->b[55] = (mode->pclock / 10000) >> 8;
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int h_active = mode->hactive;
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int h_blank = mode->htotal - mode->hactive;
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int h_offset = mode->hbegin - mode->hactive;
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int h_pulse = mode->hend - mode->hbegin;
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int v_active = mode->vactive;
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int v_blank = (int)mode->vtotal - mode->vactive;
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int v_offset = mode->vbegin - mode->vactive;
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int v_pulse = mode->vend - mode->vbegin;
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// Horizontal active pixels 8 lsbits (0-4095)
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edid->b[56] = h_active & 0xff;
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// Horizontal blanking pixels 8 lsbits (0-4095)
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edid->b[57] = h_blank & 0xff;
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// Bits 7-4 Horizontal active pixels 4 msbits
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// Bits 3-0 Horizontal blanking pixels 4 msbits
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edid->b[58] = (((h_active >> 8) & 0x0f) << 4) + ((h_blank >> 8) & 0x0f);
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// Vertical active lines 8 lsbits (0-4095)
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edid->b[59] = v_active & 0xff;
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// Vertical blanking lines 8 lsbits (0-4095)
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edid->b[60] = v_blank & 0xff;
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// Bits 7-4 Vertical active lines 4 msbits
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// Bits 3-0 Vertical blanking lines 4 msbits
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edid->b[61] = (((v_active >> 8) & 0x0f) << 4) + ((v_blank >> 8) & 0x0f);
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// Horizontal sync offset pixels 8 lsbits (0-1023) From blanking start
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edid->b[62] = h_offset & 0xff;
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// Horizontal sync pulse width pixels 8 lsbits (0-1023)
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edid->b[63] = h_pulse & 0xff;
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// Bits 7-4 Vertical sync offset lines 4 lsbits 0-63)
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// Bits 3-0 Vertical sync pulse width lines 4 lsbits 0-63)
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edid->b[64] = ((v_offset & 0x0f) << 4) + (v_pulse & 0x0f);
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// Bits 7-6 Horizontal sync offset pixels 2 msbits
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// Bits 5-4 Horizontal sync pulse width pixels 2 msbits
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// Bits 3-2 Vertical sync offset lines 2 msbits
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// Bits 1-0 Vertical sync pulse width lines 2 msbits
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edid->b[65] = (((h_offset >> 8) & 0x03) << 6) +
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(((h_pulse >> 8) & 0x03) << 4) +
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(((v_offset >> 8) & 0x03) << 2) +
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((v_pulse >> 8) & 0x03);
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// Horizontal display size, mm, 8 lsbits (0-4095 mm, 161 in)
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edid->b[66] = 485 & 0xff;
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// Vertical display size, mm, 8 lsbits (0-4095 mm, 161 in)
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edid->b[67] = 364 & 0xff;
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// Bits 7-4 Horizontal display size, mm, 4 msbits
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// Bits 3-0 Vertical display size, mm, 4 msbits
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edid->b[68] = (((485 >> 8) & 0x0f) << 4) + ((364 >> 8) & 0x0f);
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// Horizontal border pixels (each side; total is twice this)
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edid->b[69] = 0;
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// Vertical border lines (each side; total is twice this)
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edid->b[70] = 0;
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// Features bitmap
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edid->b[71] = ((mode->interlace & 0x01) << 7) + 0x18 + (mode->vsync << 2) + (mode->hsync << 2);
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// Descriptor: monitor serial number
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edid->b[72] = 0;
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edid->b[73] = 0;
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edid->b[74] = 0;
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edid->b[75] = 0xff;
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edid->b[76] = 0;
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edid->b[77] = 'S';
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edid->b[78] = 'w';
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edid->b[79] = 'i';
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edid->b[80] = 't';
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edid->b[81] = 'c';
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edid->b[82] = 'h';
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edid->b[83] = 'r';
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edid->b[84] = 'e';
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edid->b[85] = 's';
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edid->b[86] = '2';
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edid->b[87] = '0';
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edid->b[88] = '0';
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edid->b[89] = 0x0a;
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// Descriptor: monitor range limits
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edid->b[90] = 0;
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edid->b[91] = 0;
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edid->b[92] = 0;
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edid->b[93] = 0xfd;
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edid->b[94] = 0;
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edid->b[95] = ((int)range->vfreq_min) & 0xff;
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edid->b[96] = ((int)range->vfreq_max) & 0xff;
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edid->b[97] = ((int)range->hfreq_min / 1000) & 0xff;
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edid->b[98] = ((int)range->hfreq_max / 1000) & 0xff;
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edid->b[99] = 0xff;
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edid->b[100] = 0;
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edid->b[101] = 0x0a;
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edid->b[102] = 0x20;
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edid->b[103] = 0x20;
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edid->b[104] = 0x20;
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edid->b[105] = 0x20;
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edid->b[106] = 0x20;
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edid->b[107] = 0x20;
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// Descriptor: text
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edid->b[108] = 0;
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edid->b[109] = 0;
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edid->b[110] = 0;
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edid->b[111] = 0xfc;
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edid->b[112] = 0;
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snprintf(&edid->b[113], 13, "%s", name);
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edid->b[125] = 0x0a;
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// Extensions to follow
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edid->b[126] = 0;
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// Compute checksum
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char checksum = 0;
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int i;
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for (i = 0; i <= 126; i++)
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checksum += edid->b[i];
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edid->b[127] = 256 - checksum;
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return 1;
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}
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