mirror of
https://github.com/libretro/beetle-pce-fast-libretro.git
synced 2024-11-23 16:00:08 +00:00
105 lines
2.3 KiB
C++
105 lines
2.3 KiB
C++
static struct {
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struct {
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WREGS w[256];
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BREGS b[256];
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} reg;
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struct {
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WREGS w[256];
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BREGS b[256];
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} RM;
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} Mod_RM;
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#define RegWord(ModRM) I.regs.w[Mod_RM.reg.w[ModRM]]
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#define RegByte(ModRM) I.regs.b[Mod_RM.reg.b[ModRM]]
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#define GetRMWord(ModRM) \
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((ModRM) >= 0xc0 ? I.regs.w[Mod_RM.RM.w[ModRM]] : ( (*GetEA[ModRM])(), ReadWord( EA ) ))
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#define PutbackRMWord(ModRM,val) \
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{ \
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if (ModRM >= 0xc0) I.regs.w[Mod_RM.RM.w[ModRM]]=val; \
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else WriteWord(EA,val); \
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}
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#define GetnextRMWord ReadWord((EA&0xf0000)|((EA+2)&0xffff))
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#define PutRMWord(ModRM,val) \
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{ \
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if (ModRM >= 0xc0) \
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I.regs.w[Mod_RM.RM.w[ModRM]]=val; \
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else { \
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(*GetEA[ModRM])(); \
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WriteWord( EA ,val); \
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} \
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}
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#define PutImmRMWord(ModRM) \
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{ \
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uint16 val; \
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if (ModRM >= 0xc0) \
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FETCHuint16(I.regs.w[Mod_RM.RM.w[ModRM]]) \
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else { \
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(*GetEA[ModRM])(); \
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FETCHuint16(val) \
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WriteWord( EA , val); \
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} \
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}
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#define GetRMByte(ModRM) \
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((ModRM) >= 0xc0 ? I.regs.b[Mod_RM.RM.b[ModRM]] : ReadByte( (*GetEA[ModRM])() ))
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#define PutRMByte(ModRM,val) \
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{ \
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if (ModRM >= 0xc0) \
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I.regs.b[Mod_RM.RM.b[ModRM]]=val; \
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else \
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WriteByte( (*GetEA[ModRM])() ,val); \
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}
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#define PutImmRMByte(ModRM) \
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{ \
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if (ModRM >= 0xc0) \
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I.regs.b[Mod_RM.RM.b[ModRM]]=FETCH; \
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else { \
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(*GetEA[ModRM])(); \
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WriteByte( EA , FETCH ); \
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} \
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}
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#define PutbackRMByte(ModRM,val) \
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{ \
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if (ModRM >= 0xc0) \
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I.regs.b[Mod_RM.RM.b[ModRM]]=val; \
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else \
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WriteByte(EA,val); \
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}
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#define DEF_br8 \
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uint32 ModRM = FETCH,src,dst; \
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src = RegByte(ModRM); \
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dst = GetRMByte(ModRM)
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#define DEF_wr16 \
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uint32 ModRM = FETCH,src,dst; \
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src = RegWord(ModRM); \
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dst = GetRMWord(ModRM)
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#define DEF_r8b \
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uint32 ModRM = FETCH,src,dst; \
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dst = RegByte(ModRM); \
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src = GetRMByte(ModRM)
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#define DEF_r16w \
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uint32 ModRM = FETCH,src,dst; \
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dst = RegWord(ModRM); \
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src = GetRMWord(ModRM)
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#define DEF_ald8 \
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uint32 src = FETCH; \
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uint32 dst = I.regs.b[AL]
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#define DEF_axd16 \
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uint32 src = FETCH; \
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uint32 dst = I.regs.w[AW]; \
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src += (FETCH << 8)
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