mirror of
https://github.com/libretro/beetle-psx-libretro.git
synced 2025-02-13 13:13:47 +00:00
Backport PS_CPU::Exception changes
This commit is contained in:
twinaphex
parent
e109403ac6
commit
3d97f8a247
@ -29,10 +29,11 @@ extern bool psx_cpu_overclock;
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*/
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#define BIU_ENABLE_ICACHE_S1 0x00000800 // Enable I-cache, set 1
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#define BIU_ENABLE_DCACHE 0x00000080 // Enable D-cache
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#define BIU_TAG_TEST_MODE 0x00000004 // Enable TAG test mode(IsC must be set to 1 as well presumably?)
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#define BIU_ENABLE_DCACHE 0x00000080 // Enable D-cache
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#define BIU_TAG_TEST_MODE 0x00000004 // Enable TAG test mode(IsC must be set to 1 as well presumably?)
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#define BIU_INVALIDATE_MODE 0x00000002 // Enable Invalidate mode(IsC must be set to 1 as well presumably?)
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#define BIU_LOCK 0x00000001 // Enable Lock mode(IsC must be set to 1 as well presumably?)
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#define BIU_LOCK 0x00000001 // Enable Lock mode(IsC must be set to 1 as well presumably?)
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// Does lock mode prevent the actual data payload from being modified, while allowing tags to be modified/updated???
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PS_CPU::PS_CPU()
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@ -84,13 +85,13 @@ void PS_CPU::SetFastMap(void *region_mem, uint32_t region_address, uint32_t regi
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INLINE void PS_CPU::RecalcIPCache(void)
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{
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IPCache = 0;
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IPCache = 0;
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if(((CP0.SR & CP0.CAUSE & 0xFF00) && (CP0.SR & 1)) || Halted)
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IPCache = 0x80;
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if(((CP0.SR & CP0.CAUSE & 0xFF00) && (CP0.SR & 1)) || Halted)
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IPCache = 0x80;
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if(Halted)
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IPCache = 0x80;
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if(Halted)
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IPCache = 0x80;
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}
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void PS_CPU::SetHalt(bool status)
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@ -401,16 +402,17 @@ INLINE void PS_CPU::WriteMemory(int32_t ×tamp, uint32_t address, uint32_t v
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}
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}
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uint32_t PS_CPU::Exception(uint32_t code, uint32_t PC, const uint32_t NPM)
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uint32_t PS_CPU::Exception(uint32_t code, uint32_t PC, const uint32 NP, const uint32_t NPM, const uint32_t instr)
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{
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const bool InBDSlot = !(NPM & 0x3);
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const bool AfterBranchInstr = !(NPM & 0x1);
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const bool BranchTaken = !(NPM & 0x3);
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uint32_t handler = 0x80000080;
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assert(code < 16);
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if(code != EXCEPTION_INT && code != EXCEPTION_BP && code != EXCEPTION_SYSCALL)
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{
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PSX_DBG(PSX_DBG_WARNING, "Exception: %08x @ PC=0x%08x(IBDS=%d) -- IPCache=0x%02x -- IPEND=0x%02x -- SR=0x%08x ; IRQC_Status=0x%04x -- IRQC_Mask=0x%04x\n", code, PC, InBDSlot, IPCache, (CP0.CAUSE >> 8) & 0xFF, CP0.SR,
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PSX_DBG(PSX_DBG_WARNING, "Exception: %08x @ PC=0x%08x(IBDS=%d) -- IPCache=0x%02x -- IPEND=0x%02x -- SR=0x%08x ; IRQC_Status=0x%04x -- IRQC_Mask=0x%04x\n", code, PC, BranchTaken, IPCache, (CP0.CAUSE >> 8) & 0xFF, CP0.SR,
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::IRQ_GetRegister(IRQ_GSREG_STATUS, NULL, 0), ::IRQ_GetRegister(IRQ_GSREG_MASK, NULL, 0));
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}
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@ -418,8 +420,11 @@ uint32_t PS_CPU::Exception(uint32_t code, uint32_t PC, const uint32_t NPM)
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handler = 0xBFC00180;
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CP0.EPC = PC;
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if(InBDSlot)
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if(AfterBranchInstr)
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{
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CP0.EPC -= 4;
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CP0.TAR = (PC & (NPM | 3)) + NP;
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}
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#ifdef HAVE_DEBUG
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if(ADDBT)
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@ -433,9 +438,10 @@ uint32_t PS_CPU::Exception(uint32_t code, uint32_t PC, const uint32_t NPM)
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CP0.CAUSE &= 0x0000FF00;
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CP0.CAUSE |= code << 2;
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// If EPC was adjusted -= 4 because we were in a branch delay slot, set the bit.
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if(InBDSlot)
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CP0.CAUSE |= 0x80000000;
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// If EPC was adjusted -= 4 because we are after a branch instructon, set bit 31.
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CP0.CAUSE |= AfterBranchInstr << 31;
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CP0.CAUSE |= BranchTaken << 31;
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CP0.CAUSE |= (instr << 2) & (0x3 << 28); // CE
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RecalcIPCache();
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@ -515,7 +521,7 @@ int32_t PS_CPU::RunReal(int32_t timestamp_in)
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{
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// This will block interrupt processing, but since we're going more for keeping broken homebrew/hacks from working
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// than super-duper-accurate pipeline emulation, it shouldn't be a problem.
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new_PC = Exception(EXCEPTION_ADEL, PC, new_PC_mask);
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new_PC = Exception(EXCEPTION_ADEL, PC, new_PC, new_PC_mask, 0);
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new_PC_mask = 0;
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goto OpDone;
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}
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@ -699,7 +705,7 @@ int32_t PS_CPU::RunReal(int32_t timestamp_in)
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BEGIN_OPF(ILL, 0, 0);
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PSX_WARNING("[CPU] Unknown instruction @%08x = %08x, op=%02x, funct=%02x", PC, instr, instr >> 26, (instr & 0x3F));
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DO_LDS();
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new_PC = Exception(EXCEPTION_RI, PC, new_PC_mask);
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new_PC = Exception(EXCEPTION_RI, PC, new_PC, new_PC_mask, instr);
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new_PC_mask = 0;
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END_OPF;
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@ -722,7 +728,7 @@ int32_t PS_CPU::RunReal(int32_t timestamp_in)
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if(MDFN_UNLIKELY(ep))
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{
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new_PC = Exception(EXCEPTION_OV, PC, new_PC_mask);
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new_PC = Exception(EXCEPTION_OV, PC, new_PC, new_PC_mask, instr);
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new_PC_mask = 0;
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}
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else
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@ -748,7 +754,7 @@ int32_t PS_CPU::RunReal(int32_t timestamp_in)
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if(MDFN_UNLIKELY(ep))
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{
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new_PC = Exception(EXCEPTION_OV, PC, new_PC_mask);
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new_PC = Exception(EXCEPTION_OV, PC, new_PC, new_PC_mask, instr);
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new_PC_mask = 0;
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}
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else
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@ -955,7 +961,7 @@ int32_t PS_CPU::RunReal(int32_t timestamp_in)
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PSX_WARNING("[CPU] BREAK BREAK BREAK BREAK DAAANCE -- PC=0x%08x", PC);
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DO_LDS();
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new_PC = Exception(EXCEPTION_BP, PC, new_PC_mask);
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new_PC = Exception(EXCEPTION_BP, PC, new_PC, new_PC_mask, instr);
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new_PC_mask = 0;
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END_OPF;
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@ -1058,7 +1064,7 @@ int32_t PS_CPU::RunReal(int32_t timestamp_in)
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//
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BEGIN_OPF(COP1, 0x11, 0);
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DO_LDS();
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new_PC = Exception(EXCEPTION_COPU, PC, new_PC_mask);
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new_PC = Exception(EXCEPTION_COPU, PC, new_PC, new_PC_mask, instr);
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new_PC_mask = 0;
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END_OPF;
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@ -1162,7 +1168,7 @@ int32_t PS_CPU::RunReal(int32_t timestamp_in)
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//
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BEGIN_OPF(COP3, 0x13, 0);
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DO_LDS();
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new_PC = Exception(EXCEPTION_COPU, PC, new_PC_mask);
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new_PC = Exception(EXCEPTION_COPU, PC, new_PC, new_PC_mask, instr);
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new_PC_mask = 0;
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END_OPF;
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@ -1171,7 +1177,7 @@ int32_t PS_CPU::RunReal(int32_t timestamp_in)
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//
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BEGIN_OPF(LWC0, 0x30, 0);
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DO_LDS();
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new_PC = Exception(EXCEPTION_COPU, PC, new_PC_mask);
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new_PC = Exception(EXCEPTION_COPU, PC, new_PC, new_PC_mask, instr);
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new_PC_mask = 0;
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END_OPF;
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@ -1180,7 +1186,7 @@ int32_t PS_CPU::RunReal(int32_t timestamp_in)
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//
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BEGIN_OPF(LWC1, 0x31, 0);
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DO_LDS();
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new_PC = Exception(EXCEPTION_COPU, PC, new_PC_mask);
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new_PC = Exception(EXCEPTION_COPU, PC, new_PC, new_PC_mask, instr);
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new_PC_mask = 0;
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END_OPF;
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@ -1195,7 +1201,7 @@ int32_t PS_CPU::RunReal(int32_t timestamp_in)
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if(MDFN_UNLIKELY(address & 3))
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{
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new_PC = Exception(EXCEPTION_ADEL, PC, new_PC_mask);
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new_PC = Exception(EXCEPTION_ADEL, PC, new_PC, new_PC_mask, instr);
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new_PC_mask = 0;
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}
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else
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@ -1213,7 +1219,7 @@ int32_t PS_CPU::RunReal(int32_t timestamp_in)
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//
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BEGIN_OPF(LWC3, 0x33, 0);
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DO_LDS();
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new_PC = Exception(EXCEPTION_COPU, PC, new_PC_mask);
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new_PC = Exception(EXCEPTION_COPU, PC, new_PC, new_PC_mask, instr);
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new_PC_mask = 0;
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END_OPF;
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@ -1223,7 +1229,7 @@ int32_t PS_CPU::RunReal(int32_t timestamp_in)
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//
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BEGIN_OPF(SWC0, 0x38, 0);
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DO_LDS();
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new_PC = Exception(EXCEPTION_COPU, PC, new_PC_mask);
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new_PC = Exception(EXCEPTION_COPU, PC, new_PC, new_PC_mask, instr);
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new_PC_mask = 0;
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END_OPF;
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@ -1232,7 +1238,7 @@ int32_t PS_CPU::RunReal(int32_t timestamp_in)
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//
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BEGIN_OPF(SWC1, 0x39, 0);
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DO_LDS();
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new_PC = Exception(EXCEPTION_COPU, PC, new_PC_mask);
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new_PC = Exception(EXCEPTION_COPU, PC, new_PC, new_PC_mask, instr);
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new_PC_mask = 0;
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END_OPF;
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@ -1245,7 +1251,7 @@ int32_t PS_CPU::RunReal(int32_t timestamp_in)
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if(MDFN_UNLIKELY(address & 0x3))
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{
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new_PC = Exception(EXCEPTION_ADES, PC, new_PC_mask);
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new_PC = Exception(EXCEPTION_ADES, PC, new_PC, new_PC_mask, instr);
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new_PC_mask = 0;
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}
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else
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@ -1263,7 +1269,7 @@ int32_t PS_CPU::RunReal(int32_t timestamp_in)
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///
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BEGIN_OPF(SWC3, 0x3B, 0);
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DO_LDS();
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new_PC = Exception(EXCEPTION_RI, PC, new_PC_mask);
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new_PC = Exception(EXCEPTION_RI, PC, new_PC, new_PC_mask, instr);
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new_PC_mask = 0;
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END_OPF;
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@ -1837,7 +1843,7 @@ int32_t PS_CPU::RunReal(int32_t timestamp_in)
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if(MDFN_UNLIKELY(ep))
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{
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new_PC = Exception(EXCEPTION_OV, PC, new_PC_mask);
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new_PC = Exception(EXCEPTION_OV, PC, new_PC, new_PC_mask, instr);
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new_PC_mask = 0;
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}
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else
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@ -1873,7 +1879,7 @@ int32_t PS_CPU::RunReal(int32_t timestamp_in)
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BEGIN_OPF(SYSCALL, 0, 0x0C);
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DO_LDS();
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new_PC = Exception(EXCEPTION_SYSCALL, PC, new_PC_mask);
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new_PC = Exception(EXCEPTION_SYSCALL, PC, new_PC, new_PC_mask, instr);
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new_PC_mask = 0;
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END_OPF;
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@ -1972,7 +1978,7 @@ int32_t PS_CPU::RunReal(int32_t timestamp_in)
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if(MDFN_UNLIKELY(address & 1))
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{
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new_PC = Exception(EXCEPTION_ADEL, PC, new_PC_mask);
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new_PC = Exception(EXCEPTION_ADEL, PC, new_PC, new_PC_mask, instr);
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new_PC_mask = 0;
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}
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else
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@ -1998,7 +2004,7 @@ int32_t PS_CPU::RunReal(int32_t timestamp_in)
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if(MDFN_UNLIKELY(address & 1))
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{
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new_PC = Exception(EXCEPTION_ADEL, PC, new_PC_mask);
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new_PC = Exception(EXCEPTION_ADEL, PC, new_PC, new_PC_mask, instr);
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new_PC_mask = 0;
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}
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else
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@ -2025,7 +2031,7 @@ int32_t PS_CPU::RunReal(int32_t timestamp_in)
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if(MDFN_UNLIKELY(address & 3))
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{
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new_PC = Exception(EXCEPTION_ADEL, PC, new_PC_mask);
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new_PC = Exception(EXCEPTION_ADEL, PC, new_PC, new_PC_mask, instr);
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new_PC_mask = 0;
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}
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else
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@ -2068,7 +2074,7 @@ int32_t PS_CPU::RunReal(int32_t timestamp_in)
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if(MDFN_UNLIKELY(address & 0x1))
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{
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new_PC = Exception(EXCEPTION_ADES, PC, new_PC_mask);
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new_PC = Exception(EXCEPTION_ADES, PC, new_PC, new_PC_mask, instr);
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new_PC_mask = 0;
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}
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else
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@ -2092,7 +2098,7 @@ int32_t PS_CPU::RunReal(int32_t timestamp_in)
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if(MDFN_UNLIKELY(address & 0x3))
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{
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new_PC = Exception(EXCEPTION_ADES, PC, new_PC_mask);
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new_PC = Exception(EXCEPTION_ADES, PC, new_PC, new_PC_mask, instr);
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new_PC_mask = 0;
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}
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else
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@ -2264,7 +2270,7 @@ int32_t PS_CPU::RunReal(int32_t timestamp_in)
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{
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DO_LDS();
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new_PC = Exception(EXCEPTION_INT, PC, new_PC_mask);
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new_PC = Exception(EXCEPTION_INT, PC, new_PC, new_PC_mask, instr);
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new_PC_mask = 0;
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}
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END_OPF;
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@ -151,7 +151,7 @@ class PS_CPU
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uint8_t DummyPage[FAST_MAP_PSIZE];
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uint32_t Exception(uint32_t code, uint32_t PC, const uint32_t NPM) MDFN_WARN_UNUSED_RESULT;
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uint32_t Exception(uint32_t code, uint32_t PC, const uint32_t NP, const uint32_t NPM, const uint32_t instr) MDFN_WARN_UNUSED_RESULT;
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template<bool DebugMode> int32_t RunReal(int32_t timestamp_in);
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@ -965,7 +965,7 @@ void PS_GPU::ProcessFIFO(void)
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}
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}
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INLINE void PS_GPU::WriteCB(uint32_t InData)
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void PS_GPU::WriteCB(uint32_t InData)
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{
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if(BlitterFIFO.CanRead() >= 0x10
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&& (InCmd != INCMD_NONE || (BlitterFIFO.CanRead() - 0x10) >= Commands[BlitterFIFO.Peek() >> 24].fifo_fb_len))
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@ -1135,7 +1135,7 @@ void PS_GPU::WriteDMA(uint32_t V)
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WriteCB(V);
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}
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INLINE uint32_t PS_GPU::ReadData(void)
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uint32_t PS_GPU::ReadData(void)
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{
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if(InCmd == INCMD_FBREAD)
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{
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@ -1231,7 +1231,7 @@ uint32_t PS_GPU::Read(const int32_t timestamp, uint32_t A)
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return(ret >> ((A & 3) * 8));
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}
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INLINE void PS_GPU::ReorderRGB_Var(uint32_t out_Rshift,
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void PS_GPU::ReorderRGB_Var(uint32_t out_Rshift,
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uint32_t out_Gshift, uint32_t out_Bshift,
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bool bpp24, const uint16_t *src, uint32_t *dest,
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const int32 dx_start, const int32 dx_end, int32 fb_x)
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