GPU is now a struct and a global variable in the stack, like
in upstream.
The GPU's vram is no longer 'flexible', it's still at the end
of the struct but it's a ptr type rather than a zero size array.

Changed some libretro calls so SET_GEOMETRY is used in favor of
SET_AV_INFO, as per the API's recommendation.

Style nits here and there as well.
This commit is contained in:
r5 2017-08-23 19:38:52 +01:00
parent 5df24e93d6
commit fad9372427
5 changed files with 1002 additions and 1029 deletions

View File

@ -3588,17 +3588,16 @@ void retro_run(void)
check_variables(false);
struct retro_system_av_info new_av_info;
retro_get_system_av_info(&new_av_info);
environ_cb(RETRO_ENVIRONMENT_SET_GEOMETRY, &new_av_info);
environ_cb(RETRO_ENVIRONMENT_SET_SYSTEM_AV_INFO, &new_av_info);
if (GPU_get_upscale_shift() != psx_gpu_upscale_shift)
{
struct retro_system_av_info new_av_info;
retro_get_system_av_info(&new_av_info);
if (environ_cb(RETRO_ENVIRONMENT_SET_SYSTEM_AV_INFO,
if (environ_cb(RETRO_ENVIRONMENT_SET_GEOMETRY,
&new_av_info))
{
GPU_Reinit(psx_gpu_upscale_shift);
// We successfully changed the frontend's resolution, we can
// apply the change immediately
GPU_Rescale(psx_gpu_upscale_shift);
alloc_surface();
}
else

File diff suppressed because it is too large Load Diff

View File

@ -59,173 +59,169 @@ struct line_point
_b = tmp; \
} \
class PS_GPU
struct PS_GPU
{
public:
// Private constructors and destructors since we need to use
// custom allocators to allocate the flexible vram
PS_GPU(bool pal_clock_and_tv, int sls, int sle, uint8 upscale_shift) MDFN_COLD;
PS_GPU(const PS_GPU &, uint8 upscale_shift) MDFN_COLD;
~PS_GPU() MDFN_COLD;
uint16 CLUT_Cache[256];
uint8 upscale_shift;
uint8 dither_upscale_shift;
uint32 CLUT_Cache_VB; // Don't try to be clever and reduce it to 16 bits... ~0U is value for invalidated state.
uint32 DMAControl;
struct // Speedup-cache varibles, derived from other variables; shouldn't be saved in save states.
{
// TW*_* variables derived from tww, twh, twx, twy, TexPageX, TexPageY
uint32 TWX_AND;
uint32 TWX_ADD;
// Drawing stuff
int32 ClipX0;
int32 ClipY0;
int32 ClipX1;
int32 ClipY1;
uint32 TWY_AND;
uint32 TWY_ADD;
} SUCV;
int32 OffsX;
int32 OffsY;
struct
{
uint16 Data[4];
uint32 Tag;
} TexCache[256];
bool dtd; // Dithering enable
bool dfe;
uint32 DMAControl;
uint32 MaskSetOR;
uint32 MaskEvalAND;
/* Beetle-psx upscaling vars */
uint8 upscale_shift;
uint8 dither_upscale_shift;
bool TexDisable;
bool TexDisableAllowChange;
// Drawing stuff
int32 ClipX0;
int32 ClipY0;
int32 ClipX1;
int32 ClipY1;
uint8_t tww, twh, twx, twy;
struct
{
uint8 TexWindowXLUT_Pre[16];
uint8 TexWindowXLUT[256];
uint8 TexWindowXLUT_Post[16];
};
int32 OffsX;
int32 OffsY;
struct
{
uint8 TexWindowYLUT_Pre[16];
uint8 TexWindowYLUT[256];
uint8 TexWindowYLUT_Post[16];
};
void RecalcTexWindowStuff(void);
bool dtd; // Dithering enable
bool dfe;
uint32_t TexPageX; // 0, 64, 128, 192, etc up to 960
uint32_t TexPageY; // 0 or 256
uint32 MaskSetOR;
uint32 MaskEvalAND;
uint32 SpriteFlip;
bool TexDisable;
bool TexDisableAllowChange;
uint32 abr; // Semi-transparency mode(0~3)
uint32 TexMode;
uint8_t tww, twh, twx, twy;
struct
{
uint8 TexWindowXLUT_Pre[16];
uint8 TexWindowXLUT[256];
uint8 TexWindowXLUT_Post[16];
};
struct
{
uint8 RGB8SAT_Under[256];
uint8 RGB8SAT[256];
uint8 RGB8SAT_Over[256];
};
struct
{
uint8 TexWindowYLUT_Pre[16];
uint8 TexWindowYLUT[256];
uint8 TexWindowYLUT_Post[16];
};
uint32 DataReadBuffer;
uint32 DataReadBufferEx;
uint32_t TexPageX; // 0, 64, 128, 192, etc up to 960
uint32_t TexPageY; // 0 or 256
bool IRQPending;
uint32 SpriteFlip;
// Powers of 2 for faster multiple equality testing(just for multi-testing; InCmd itself will only contain 0, or a power of 2).
uint8 InCmd;
uint8 InCmd_CC;
uint32 abr; // Semi-transparency mode(0~3)
uint32 TexMode;
tri_vertex InQuad_F3Vertices[3];
uint32 InQuad_clut;
bool InQuad_invalidW;
struct
{
uint8 RGB8SAT_Under[256];
uint8 RGB8SAT[256];
uint8 RGB8SAT_Over[256];
};
line_point InPLine_PrevPoint;
uint32 DataReadBuffer;
uint32 DataReadBufferEx;
uint32 FBRW_X;
uint32 FBRW_Y;
uint32 FBRW_W;
uint32 FBRW_H;
uint32 FBRW_CurY;
uint32 FBRW_CurX;
bool IRQPending;
//
// Display Parameters
//
uint32 DisplayMode;
// Powers of 2 for faster multiple equality testing(just for multi-testing; InCmd itself will only contain 0, or a power of 2).
uint8 InCmd;
uint8 InCmd_CC;
bool DisplayOff;
uint32 DisplayFB_XStart;
uint32 DisplayFB_YStart;
tri_vertex InQuad_F3Vertices[3];
uint32 InQuad_clut;
bool InQuad_invalidW;
unsigned display_change_count;
line_point InPLine_PrevPoint;
uint32 HorizStart;
uint32 HorizEnd;
uint32 FBRW_X;
uint32 FBRW_Y;
uint32 FBRW_W;
uint32 FBRW_H;
uint32 FBRW_CurY;
uint32 FBRW_CurX;
uint32 VertStart;
uint32 VertEnd;
//
// Display Parameters
//
uint32 DisplayMode;
//
// Display work vars
//
uint32 DisplayFB_CurYOffset;
uint32 DisplayFB_CurLineYReadout;
bool DisplayOff;
uint32 DisplayFB_XStart;
uint32 DisplayFB_YStart;
bool InVBlank;
unsigned display_change_count;
//
//
//
uint32 LinesPerField;
uint32 scanline;
bool field;
bool field_ram_readout;
bool PhaseChange;
uint32 HorizStart;
uint32 HorizEnd;
uint32 DotClockCounter;
uint32 VertStart;
uint32 VertEnd;
uint64 GPUClockCounter;
uint32 GPUClockRatio;
int32 LineClockCounter;
int32 LinePhase;
//
// Display work vars
//
uint32 DisplayFB_CurYOffset;
uint32 DisplayFB_CurLineYReadout;
int32 DrawTimeAvail;
bool InVBlank;
int32_t lastts;
//
//
//
uint32 LinesPerField;
uint32 scanline;
bool field;
bool field_ram_readout;
bool PhaseChange;
bool sl_zero_reached;
uint32 DotClockCounter;
EmulateSpecStruct *espec;
MDFN_Surface *surface;
MDFN_Rect *DisplayRect;
int32 *LineWidths;
bool HardwarePALType;
int LineVisFirst, LineVisLast;
uint64 GPUClockCounter;
uint32 GPUClockRatio;
int32 LineClockCounter;
int32 LinePhase;
uint16 CLUT_Cache[256];
int32 DrawTimeAvail;
uint32 CLUT_Cache_VB; // Don't try to be clever and reduce it to 16 bits... ~0U is value for invalidated state.
int32_t lastts;
struct // Speedup-cache varibles, derived from other variables; shouldn't be saved in save states.
{
// TW*_* variables derived from tww, twh, twx, twy, TexPageX, TexPageY
uint32 TWX_AND;
uint32 TWX_ADD;
bool sl_zero_reached;
uint32 TWY_AND;
uint32 TWY_ADD;
} SUCV;
EmulateSpecStruct *espec;
MDFN_Surface *surface;
MDFN_Rect *DisplayRect;
int32 *LineWidths;
bool HardwarePALType;
int LineVisFirst, LineVisLast;
struct
{
uint16 Data[4];
uint32 Tag;
} TexCache[256];
uint8_t DitherLUT[4][4][512]; // Y, X, 8-bit source value(256 extra for saturation)
uint8_t DitherLUT[4][4][512]; // Y, X, 8-bit source value(256 extra for saturation)
// "Flexible" array at the end of the struct. This lets us
// having a dynamically sized vram (depending on the internal
// upscaling ratio) without having an additional level of
// indirection since it'll be allocated right after the struct
uint16 vram[0];
/*
VRAM has to be a ptr type or else we have to rely on smartcode void* shenanigans to
wrestle a variable-sized struct.
*/
uint16 *vram;
};
uint16 *GPU_get_vram(void);
void GPU_WriteDMA(uint32 V, uint32 addr);
@ -253,7 +249,7 @@ void GPU_SoftReset(void);
void GPU_Destroy(void);
void GPU_Reinit(uint8 ushift);
void GPU_Rescale(uint8 ushift);
int32_t GPU_Update(const int32_t sys_timestamp);

View File

@ -1,17 +1,17 @@
extern enum dither_mode psx_gpu_dither_mode;
/* Return a pixel from VRAM */
#define vram_fetch(gpu, x, y) (gpu->vram[((y) << (10 + gpu->upscale_shift)) | (x)])
#define vram_fetch(gpu, x, y) ((gpu)->vram[((y) << (10 + (gpu)->upscale_shift)) | (x)])
/* Return a pixel from VRAM, ignoring the internal upscaling */
#define texel_fetch(gpu, x, y) vram_fetch(gpu, (x) << gpu->upscale_shift, (y) << gpu->upscale_shift)
#define texel_fetch(gpu, x, y) vram_fetch((gpu), (x) << (gpu)->upscale_shift, (y) << (gpu)->upscale_shift)
/* Set a pixel in VRAM */
#define vram_put(gpu, x, y, v) gpu->vram[((y) << (10 + gpu->upscale_shift)) | (x)] = (v)
#define vram_put(gpu, x, y, v) (gpu)->vram[((y) << (10 + (gpu)->upscale_shift)) | (x)] = (v)
#define DitherEnabled(gpu) (psx_gpu_dither_mode != DITHER_OFF && gpu->dtd)
#define DitherEnabled(gpu) (psx_gpu_dither_mode != DITHER_OFF && (gpu)->dtd)
#define UPSCALE(gpu) (1U << gpu->upscale_shift)
#define UPSCALE(gpu) (1U << (gpu)->upscale_shift)
template<int BlendMode>
static INLINE void PlotPixelBlend(uint16_t bg_pix, uint16_t *fore_pix)
@ -157,28 +157,28 @@ static INLINE void Update_CLUT_Cache(PS_GPU *gpu, uint16 raw_clut)
}
#endif
INLINE void PS_GPU::RecalcTexWindowStuff(void)
static INLINE void RecalcTexWindowStuff(PS_GPU *g)
{
unsigned x, y;
const unsigned TexWindowX_AND = ~(tww << 3);
const unsigned TexWindowX_OR = (twx & tww) << 3;
const unsigned TexWindowY_AND = ~(twh << 3);
const unsigned TexWindowY_OR = (twy & twh) << 3;
const unsigned TexWindowX_AND = ~(g->tww << 3);
const unsigned TexWindowX_OR = (g->twx & g->tww) << 3;
const unsigned TexWindowY_AND = ~(g->twh << 3);
const unsigned TexWindowY_OR = (g->twy & g->twh) << 3;
for(x = 0; x < 256; x++)
TexWindowXLUT[x] = (x & TexWindowX_AND) | TexWindowX_OR;
g->TexWindowXLUT[x] = (x & TexWindowX_AND) | TexWindowX_OR;
for(y = 0; y < 256; y++)
TexWindowYLUT[y] = (y & TexWindowY_AND) | TexWindowY_OR;
memset(TexWindowXLUT_Pre, TexWindowXLUT[0], sizeof(TexWindowXLUT_Pre));
memset(TexWindowXLUT_Post, TexWindowXLUT[255], sizeof(TexWindowXLUT_Post));
memset(TexWindowYLUT_Pre, TexWindowYLUT[0], sizeof(TexWindowYLUT_Pre));
memset(TexWindowYLUT_Post, TexWindowYLUT[255], sizeof(TexWindowYLUT_Post));
g->TexWindowYLUT[y] = (y & TexWindowY_AND) | TexWindowY_OR;
memset(g->TexWindowXLUT_Pre, g->TexWindowXLUT[0], sizeof(g->TexWindowXLUT_Pre));
memset(g->TexWindowXLUT_Post, g->TexWindowXLUT[255], sizeof(g->TexWindowXLUT_Post));
memset(g->TexWindowYLUT_Pre, g->TexWindowYLUT[0], sizeof(g->TexWindowYLUT_Pre));
memset(g->TexWindowYLUT_Post, g->TexWindowYLUT[255], sizeof(g->TexWindowYLUT_Post));
SUCV.TWX_AND = ~(tww << 3);
SUCV.TWX_ADD = ((twx & tww) << 3) + (TexPageX << (2 - std::min<uint32_t>(2, TexMode)));
g->SUCV.TWX_AND = ~(g->tww << 3);
g->SUCV.TWX_ADD = ((g->twx & g->tww) << 3) + (g->TexPageX << (2 - std::min<uint32_t>(2, g->TexMode)));
SUCV.TWY_AND = ~(twh << 3);
SUCV.TWY_ADD = ((twy & twh) << 3) + TexPageY;
g->SUCV.TWY_AND = ~(g->twh << 3);
g->SUCV.TWY_ADD = ((g->twy & g->twh) << 3) + g->TexPageY;
}
template<uint32_t TexMode_TA>

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@ -22,11 +22,11 @@
#undef PSX_EVENT_SYSTEM_CHECKS
#endif
#define PSX_DBG_ERROR 0 // Emulator-level error.
#define PSX_DBG_WARNING 1 // Warning about game doing questionable things/hitting stuff that might not be emulated correctly.
#define PSX_DBG_BIOS_PRINT 2 // BIOS printf/putchar output.
#define PSX_DBG_SPARSE 3 // Sparse(relatively) information debug messages(CDC commands).
#define PSX_DBG_FLOOD 4 // Heavy informational debug messages(GPU commands; TODO).
#define PSX_DBG_ERROR 0 // Emulator-level error.
#define PSX_DBG_WARNING 1 // Warning about game doing questionable things/hitting stuff that might not be emulated correctly.
#define PSX_DBG_BIOS_PRINT 2 // BIOS printf/putchar output.
#define PSX_DBG_SPARSE 3 // Sparse(relatively) information debug messages(CDC commands).
#define PSX_DBG_FLOOD 4 // Heavy informational debug messages(GPU commands; TODO).
#if PSX_DBGPRINT_ENABLE
void PSX_DBG(unsigned level, const char *format, ...);
@ -78,7 +78,7 @@ enum
PSX_EVENT__COUNT
};
#define PSX_EVENT_MAXTS 0x20000000
#define PSX_EVENT_MAXTS 0x20000000
void PSX_SetEventNT(const int type, const int32_t next_timestamp);
void PSX_SetDMACycleSteal(unsigned stealage);
@ -98,7 +98,6 @@ class PS_CDC;
class PS_SPU;
extern PS_CPU *CPU;
extern PS_GPU *GPU;
extern PS_CDC *CDC;
extern PS_SPU *SPU;
extern MultiAccessSizeMem<2048 * 1024, uint32_t, false> MainRAM;