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Mode 0 interrupts do not occur in the glitched mode 0 of the first line 0. The extra OAM interrupt bug also affects DMG.
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73dc3560a5
@ -245,7 +245,7 @@ void GB_STAT_update(GB_gameboy_t *gb)
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}
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switch (gb->io_registers[GB_IO_STAT] & 3) {
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case 0: gb->stat_interrupt_line = (gb->io_registers[GB_IO_STAT] & 8); break;
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case 0: gb->stat_interrupt_line = (gb->io_registers[GB_IO_STAT] & 8) && !gb->is_first_line_mode2; break;
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case 1: gb->stat_interrupt_line = gb->io_registers[GB_IO_STAT] & 0x10; break;
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case 2: gb->stat_interrupt_line = gb->io_registers[GB_IO_STAT] & 0x20; break;
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}
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@ -431,6 +431,7 @@ void GB_display_run(GB_gameboy_t *gb, uint8_t cycles)
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}
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/* Handle the very first line 0 */
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gb->is_first_line_mode2 = true;
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gb->current_line = 0;
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gb->ly_for_comparison = 0;
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gb->io_registers[GB_IO_STAT] &= ~3;
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@ -448,6 +449,7 @@ void GB_display_run(GB_gameboy_t *gb, uint8_t cycles)
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gb->vram_read_blocked = !gb->is_cgb;
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gb->oam_write_blocked = true;
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gb->vram_write_blocked = !gb->is_cgb;
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gb->is_first_line_mode2 = false;
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GB_STAT_update(gb);
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gb->cycles_for_line += 2;
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@ -727,7 +729,7 @@ void GB_display_run(GB_gameboy_t *gb, uint8_t cycles)
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if (!gb->is_cgb) {
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gb->ly_for_comparison = -1;
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}
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if (gb->is_cgb && gb->current_line == LINES) {
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if (gb->current_line == LINES) {
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gb->io_registers[GB_IO_STAT] &= ~3;
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gb->io_registers[GB_IO_STAT] |= 2;
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GB_STAT_update(gb);
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