mirror of
https://github.com/libretro/bsnes-libretro.git
synced 2024-11-23 08:59:40 +00:00
Update to v106r76 release.
byuu says:
I added some useful new functions to nall/primitives:
auto Natural<T>::integer() const -> Integer<T>;
auto Integer<T>::natural() const -> Natural<T>;
These let you cast between signed and unsigned representation without
having to care about the value of T (eg if you take a Natural<T> as a
template parameter.) So for instance when you're given an unsigned type
but it's supposed to be a sign-extended type (example: signed
multiplication), eg Natural<T> → Integer<T>, you can just say:
x = y.integer() * z.integer();
The TLCS900H core gained some more pesky instructions such as DAA, BS1F,
BS1B.
I stole an optimization from RACE for calculating the overflow flag on
addition. Assuming: z = x + y + c;
Before: ~(x ^ y) & (x ^ z) & signBit;
After: (x ^ z) & (y ^ z) & signBit;
Subtraction stays the same. Assuming: z = x - y - c;
Same: (x ^ y) & (x ^ z) & signBit;
However, taking a speed penalty, I've implemented the carry computation
in a way that doesn't require an extra bit.
Adding before:
uint9 z = x + y + c;
c = z & 0x100;
Subtracting before:
uint9 z = x - y - c;
c = z & 0x100;
Adding after:
uint8 z = x + y + c;
c = z < x || z == x && c;
Subtracting after:
uint8 z = x - y - c;
c = z > x || z == x && c;
I haven't been able to code golf the new carry computation to be any
shorter, unless I include an extra bit, eg for adding:
c = z < x + c;
But that defeats the entire point of the change. I want the computation
to work even when T is uintmax_t.
If anyone can come up with a faster method, please let me know.
Anyway ... I also had to split off INC and DEC because they compute
flags differently (word and long modes don't set flags at all, byte mode
doesn't set carry at all.)
I also added division by zero support, although I don't know if it's
actually hardware accurate. It's what other emulators do, though.
This commit is contained in:
Tim Allen
parent
95d0020297
commit
c9f7c6c4be
@ -30,7 +30,7 @@ using namespace nall;
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namespace Emulator {
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static const string Name = "higan";
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static const string Version = "106.75";
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static const string Version = "106.76";
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static const string Author = "byuu";
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static const string License = "GPLv3";
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static const string Website = "https://byuu.org/";
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@ -20,13 +20,13 @@ template<> auto TLCS900H::parity<uint32>(uint32 data) const -> bool {
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//
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template<typename T> auto TLCS900H::algorithmAdd(T target, T source, uint1 carry) -> T {
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uint64 result = target + source + carry;
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CF = result.bit(T::bits());
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T result = target + source + carry;
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CF = result < target || result == target && carry;
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NF = 0;
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VF = T(~(target ^ source) & (target ^ result)).negative();
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VF = T((target ^ result) & (source ^ result)).negative();
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HF = T(target ^ source ^ result).bit(4);
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if constexpr(is_same<T, uint32>::value) HF = Undefined;
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ZF = T(result).zero();
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if constexpr(T::bits() == 32) HF = Undefined;
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ZF = result.zero();
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SF = result.negative();
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return result;
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}
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@ -42,6 +42,30 @@ template<typename T> auto TLCS900H::algorithmAnd(T target, T source) -> T {
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return result;
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}
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template<typename T> auto TLCS900H::algorithmDecrement(T target, T source) -> T {
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T result = target - source;
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if constexpr(T::bits() == 8) {
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NF = 1;
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VF = T((target ^ source) & (target ^ result)).negative();
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HF = T(target ^ source ^ result).bit(4);
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ZF = result.zero();
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SF = result.negative();
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}
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return result;
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}
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template<typename T> auto TLCS900H::algorithmIncrement(T target, T source) -> T {
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T result = target + source;
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if constexpr(T::bits() == 8) {
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NF = 0;
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VF = T((target ^ result) & (source ^ result)).negative();
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HF = T(target ^ source ^ result).bit(4);
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ZF = result.zero();
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SF = result.negative();
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}
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return result;
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}
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template<typename T> auto TLCS900H::algorithmOr(T target, T source) -> T {
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T result = target | source;
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CF = 0;
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@ -54,13 +78,13 @@ template<typename T> auto TLCS900H::algorithmOr(T target, T source) -> T {
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}
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template<typename T> auto TLCS900H::algorithmSubtract(T target, T source, uint1 carry) -> T {
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uint64 result = target - source - carry;
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CF = result.bit(T::bits());
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T result = target - source - carry;
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CF = result > target || result == target && carry;
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NF = 1;
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VF = T((target ^ source) & (target ^ result)).negative();
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HF = T(target ^ source ^ result).bit(4);
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if constexpr(is_same<T, uint32>::value) HF = Undefined;
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ZF = T(result).zero();
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if constexpr(T::bits() == 32) HF = Undefined;
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ZF = result.zero();
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SF = result.negative();
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return result;
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}
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@ -1,4 +1,4 @@
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template<> auto TLCS900H::map(ControlRegister<uint8> register) -> maybe<uint8&> {
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template<> auto TLCS900H::map(ControlRegister<uint8> register) const -> maybe<uint8&> {
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switch(register.id) {
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#define r(id, name) case id: return r.name;
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r(0x00, dmas[0].b.b0) r(0x01, dmas[0].b.b1) r(0x02, dmas[0].b.b2) r(0x03, dmas[0].b.b3)
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@ -19,7 +19,7 @@ template<> auto TLCS900H::map(ControlRegister<uint8> register) -> maybe<uint8&>
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return nothing;
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}
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template<> auto TLCS900H::map(ControlRegister<uint16> register) -> maybe<uint16&> {
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template<> auto TLCS900H::map(ControlRegister<uint16> register) const -> maybe<uint16&> {
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switch(register.id & ~1) {
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#define r(id, name) case id: return r.name;
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r(0x00, dmas[0].w.w0) r(0x02, dmas[0].w.w1)
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@ -40,7 +40,7 @@ template<> auto TLCS900H::map(ControlRegister<uint16> register) -> maybe<uint16&
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return nothing;
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}
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template<> auto TLCS900H::map(ControlRegister<uint32> register) -> maybe<uint32&> {
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template<> auto TLCS900H::map(ControlRegister<uint32> register) const -> maybe<uint32&> {
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switch(register.id & ~1) {
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#define r(id, name) case id: return r.name;
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r(0x00, dmas[0].l.l0)
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@ -61,9 +61,9 @@ template<> auto TLCS900H::map(ControlRegister<uint32> register) -> maybe<uint32&
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return nothing;
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}
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template<> auto TLCS900H::load< uint8>(ControlRegister< uint8> register) -> uint8 { return map(register)(Undefined); }
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template<> auto TLCS900H::load<uint16>(ControlRegister<uint16> register) -> uint16 { return map(register)(Undefined); }
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template<> auto TLCS900H::load<uint32>(ControlRegister<uint32> register) -> uint32 { return map(register)(Undefined); }
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template<> auto TLCS900H::load< uint8>(ControlRegister< uint8> register) const -> uint8 { return map(register)(Undefined); }
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template<> auto TLCS900H::load<uint16>(ControlRegister<uint16> register) const -> uint16 { return map(register)(Undefined); }
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template<> auto TLCS900H::load<uint32>(ControlRegister<uint32> register) const -> uint32 { return map(register)(Undefined); }
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template<> auto TLCS900H::store<uint8>(ControlRegister<uint8> register, uint32 data) -> void {
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if(auto r = map(register)) r() = data;
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@ -282,18 +282,36 @@ auto TLCS900H::instructionRegister(R register) -> void {
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if constexpr(bits == 32) return (void)Undefined;
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return instructionNegate(register);
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case 0x08:
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if constexpr(bits == 32) return (void)Undefined;
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return instructionMultiply(register, fetchImmediate<T>());
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if constexpr(bits != 32) return instructionMultiply(register, fetchImmediate<T>());
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return (void)Undefined;
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case 0x09:
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if constexpr(bits == 32) return (void)Undefined;
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return instructionMultiplySigned(register, fetchImmediate<T>());
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if constexpr(bits != 32) return instructionMultiplySigned(register, fetchImmediate<T>());
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return (void)Undefined;
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case 0x0a:
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if constexpr(bits == 32) return (void)Undefined;
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return instructionDivide(register, fetchImmediate<T>());
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if constexpr(bits != 32) return instructionDivide(register, fetchImmediate<T>());
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return (void)Undefined;
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case 0x0b:
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if constexpr(bits == 32) return (void)Undefined;
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return instructionDivideSigned(register, fetchImmediate<T>());
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if constexpr(bits != 32) return instructionDivideSigned(register, fetchImmediate<T>());
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return (void)Undefined;
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//case 0x0c: LINK r,dd
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//case 0x0d: UNLK r
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case 0x0e:
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if constexpr(bits == 16) return instructionBitSearch1Forward(register);
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return (void)Undefined;
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case 0x0f:
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if constexpr(bits == 16) return instructionBitSearch1Backward(register);
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return (void)Undefined;
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case 0x10:
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if constexpr(bits == 8) return instructionDecimalAdjustAccumulator(register);
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return (void)Undefined;
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case 0x11: return (void)Undefined;
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case 0x12:
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if constexpr(bits != 8) return instructionExtendZero(register);
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return (void)Undefined;
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case 0x13:
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if constexpr(bits != 8) return instructionExtendSign(register);
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return (void)Undefined;
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//case 0x14: PAA r
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case 0x15: return (void)Undefined;
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case 0x16:
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if constexpr(bits == 16) return instructionMirror(register);
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@ -303,6 +321,7 @@ auto TLCS900H::instructionRegister(R register) -> void {
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if constexpr(bits == 16) return instructionMultiplyAdd(register);
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return (void)Undefined;
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case 0x1a: case 0x1b: return (void)Undefined;
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//case 0x1c: DJNZ r,d
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case 0x1d: case 0x1e: case 0x1f: return (void)Undefined;
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case 0x25: case 0x26: case 0x27: return (void)Undefined;
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case 0x2d: return (void)Undefined;
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@ -312,21 +331,21 @@ auto TLCS900H::instructionRegister(R register) -> void {
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case 0x3b: return (void)Undefined;
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case 0x3f: return (void)Undefined;
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case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
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if constexpr(bits == 32) return (void)Undefined;
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return instructionMultiply(toRegister3<T>(data), register);
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if constexpr(bits != 32) return instructionMultiply(toRegister3<T>(data), register);
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return (void)Undefined;
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case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f:
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if constexpr(bits == 32) return (void)Undefined;
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return instructionMultiplySigned(toRegister3<T>(data), register);
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if constexpr(bits != 32) return instructionMultiplySigned(toRegister3<T>(data), register);
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return (void)Undefined;
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case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57:
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if constexpr(bits == 32) return (void)Undefined;
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return instructionDivide(toRegister3<T>(data), register);
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if constexpr(bits != 32) return instructionDivide(toRegister3<T>(data), register);
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return (void)Undefined;
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case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f:
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if constexpr(bits == 32) return (void)Undefined;
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return instructionDivideSigned(toRegister3<T>(data), register);
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if constexpr(bits != 32) return instructionDivideSigned(toRegister3<T>(data), register);
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return (void)Undefined;
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case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67:
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return instructionAdd(register, toImmediate3<T>(data));
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return instructionIncrement(register, toImmediate<T>((uint3)data));
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case 0x68: case 0x69: case 0x6a: case 0x6b: case 0x6c: case 0x6d: case 0x6e: case 0x6f:
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return instructionSubtract(register, toImmediate3<T>(data));
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return instructionDecrement(register, toImmediate<T>((uint3)data));
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case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77:
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case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f:
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if constexpr(bits == 32) return (void)Undefined;
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@ -418,21 +437,21 @@ auto TLCS900H::instructionSourceMemory(M memory) -> void {
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if constexpr(bits == 32) return (void)Undefined;
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return instructionCompare(memory, fetchImmediate<T>());
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case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
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if constexpr(bits == 32) return (void)Undefined;
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return instructionMultiply(toRegister3<T>(data), memory);
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if constexpr(bits != 32) return instructionMultiply(toRegister3<T>(data), memory);
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return (void)Undefined;
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case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f:
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if constexpr(bits == 32) return (void)Undefined;
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return instructionMultiplySigned(toRegister3<T>(data), memory);
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if constexpr(bits != 32) return instructionMultiplySigned(toRegister3<T>(data), memory);
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return (void)Undefined;
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case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57:
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if constexpr(bits == 32) return (void)Undefined;
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return instructionDivide(toRegister3<T>(data), memory);
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if constexpr(bits != 32) return instructionDivide(toRegister3<T>(data), memory);
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return (void)Undefined;
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case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f:
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if constexpr(bits == 32) return (void)Undefined;
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return instructionDivideSigned(toRegister3<T>(data), memory);
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if constexpr(bits != 32) return instructionDivideSigned(toRegister3<T>(data), memory);
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return (void)Undefined;
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case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67:
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return instructionAdd(memory, toImmediate3<T>(data));
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return instructionIncrement(memory, toImmediate<T>((uint3)data));
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case 0x68: case 0x69: case 0x6a: case 0x6b: case 0x6c: case 0x6d: case 0x6e: case 0x6f:
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return instructionSubtract(memory, toImmediate3<T>(data));
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return instructionDecrement(memory, toImmediate<T>((uint3)data));
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case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77: return (void)Undefined;
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case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87:
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return instructionAdd(toRegister3<T>(data), memory);
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@ -1,11 +1,3 @@
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template<typename Target>
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auto TLCS900H::toSigned(Target target) -> int32 {
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if constexpr(Target::bits() == 8) return (int8)target;
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if constexpr(Target::bits() == 16) return (int16)target;
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if constexpr(Target::bits() == 32) return (int32)target;
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return Undefined;
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}
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template<typename Target, typename Source>
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auto TLCS900H::instructionAdd(Target target, Source source) -> void {
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store(target, algorithmAdd(load(target), load(source)));
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@ -21,6 +13,22 @@ auto TLCS900H::instructionAnd(Target target, Source source) -> void {
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store(target, algorithmAnd(load(target), load(source)));
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}
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auto TLCS900H::instructionBitSearch1Backward(Register<uint16> register) -> void {
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auto value = load(register);
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for(uint index : reverse(range(16))) {
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if(value.bit(index)) return VF = 1, store(A, index);
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}
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VF = 0;
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}
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auto TLCS900H::instructionBitSearch1Forward(Register<uint16> register) -> void {
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auto value = load(register);
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for(uint index : range(16)) {
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if(value.bit(index)) return VF = 1, store(A, index);
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}
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VF = 0;
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}
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template<typename Source>
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auto TLCS900H::instructionCall(uint4 code, Source source) -> void {
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auto address = load(source);
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@ -45,16 +53,46 @@ auto TLCS900H::instructionComplement(Target target) -> void {
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HF = 1;
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}
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auto TLCS900H::instructionDecimalAdjustAccumulator(Register<uint8> register) -> void {
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auto value = load(register);
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if(CF || (uint8)value > 0x99) value += NF ? -0x60 : 0x60, CF = 1;
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if(HF || (uint4)value > 0x09) value += NF ? -0x06 : 0x06;
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PF = parity(value);
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HF = uint8(value ^ load(register)).bit(4);
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ZF = value.zero();
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SF = value.negative();
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store(register, value);
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}
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template<typename Target, typename Source>
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auto TLCS900H::instructionDecrement(Target target, Source source) -> void {
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auto immediate = load(source);
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if(!immediate) immediate = 8;
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store(target, algorithmDecrement(load(target), immediate));
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}
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template<typename Target, typename Source>
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auto TLCS900H::instructionDivide(Target target, Source source) -> void {
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//TODO: division by zero
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store(expand(target), load(target) / load(source));
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using T = typename Target::type;
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using E = Natural<2 * T::bits()>;
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auto dividend = load(expand(target));
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auto divisor = load(source);
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auto quotient = divisor ? E(dividend / divisor) : E(T(~(dividend >> T::bits())));
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auto remainder = divisor ? E(dividend % divisor) : E(T(dividend));
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store(expand(target), T(remainder) << T::bits() | T(quotient));
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VF = !divisor || remainder >> T::bits();
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}
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template<typename Target, typename Source>
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auto TLCS900H::instructionDivideSigned(Target target, Source source) -> void {
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//TODO: division by zero
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store(expand(target), toSigned(load(target)) / toSigned(load(source)));
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using T = typename Target::type;
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using E = Natural<2 * T::bits()>;
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auto dividend = load(expand(target)).integer();
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auto divisor = load(source).integer();
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auto quotient = divisor ? E(dividend / divisor) : E(T(~(dividend >> T::bits())));
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auto remainder = divisor ? E(dividend % divisor) : E(T(dividend));
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store(expand(target), T(remainder) << T::bits() | T(quotient));
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VF = !divisor || remainder >> T::bits();
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}
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template<typename Target, typename Source>
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@ -64,10 +102,27 @@ auto TLCS900H::instructionExchange(Target target, Source source) -> void {
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store(source, data);
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}
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template<typename Target>
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auto TLCS900H::instructionExtendSign(Target target) -> void {
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store(target, load(shrink(target)).integer());
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}
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template<typename Target>
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auto TLCS900H::instructionExtendZero(Target target) -> void {
|
||||
store(target, load(shrink(target)));
|
||||
}
|
||||
|
||||
auto TLCS900H::instructionHalt() -> void {
|
||||
setHalted(true);
|
||||
}
|
||||
|
||||
template<typename Target, typename Source>
|
||||
auto TLCS900H::instructionIncrement(Target target, Source source) -> void {
|
||||
auto immediate = load(source);
|
||||
if(!immediate) immediate = 8;
|
||||
store(target, algorithmIncrement(load(target), immediate));
|
||||
}
|
||||
|
||||
template<typename Source>
|
||||
auto TLCS900H::instructionJump(uint4 code, Source source) -> void {
|
||||
auto address = load(source);
|
||||
@ -85,6 +140,7 @@ auto TLCS900H::instructionLoad(Target target, Source source) -> void {
|
||||
}
|
||||
|
||||
//reverse all bits in a 16-bit register
|
||||
//note: an 8-bit lookup table is faster (when in L1/L2 cache), but much more code
|
||||
auto TLCS900H::instructionMirror(Register<uint16> register) -> void {
|
||||
auto data = load(register);
|
||||
uint8 lo = (data.byte(0) * 0x80200802ull & 0x884422110ull) * 0x101010101ull >> 32;
|
||||
@ -114,7 +170,7 @@ auto TLCS900H::instructionMultiplyAdd(Register<uint16> register) -> void {
|
||||
|
||||
template<typename Target, typename Source>
|
||||
auto TLCS900H::instructionMultiplySigned(Target target, Source source) -> void {
|
||||
store(expand(target), toSigned(load(target)) * toSigned(load(source)));
|
||||
store(expand(target), load(target).integer() * load(source).integer());
|
||||
}
|
||||
|
||||
template<typename Target>
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
#define a RFP
|
||||
#define p RFP - 1 & 3
|
||||
|
||||
template<> auto TLCS900H::map(Register<uint8> register) -> maybe<uint8&> {
|
||||
template<> auto TLCS900H::map(Register<uint8> register) const -> maybe<uint8&> {
|
||||
switch(register.id) {
|
||||
#define r(id, name) case id: return r.name;
|
||||
r(0x00, xwa[0].b.b0) r(0x01, xwa[0].b.b1) r(0x02, xwa[0].b.b2) r(0x03, xwa[0].b.b3)
|
||||
@ -37,7 +37,7 @@ template<> auto TLCS900H::map(Register<uint8> register) -> maybe<uint8&> {
|
||||
return nothing;
|
||||
}
|
||||
|
||||
template<> auto TLCS900H::map(Register<uint16> register) -> maybe<uint16&> {
|
||||
template<> auto TLCS900H::map(Register<uint16> register) const -> maybe<uint16&> {
|
||||
switch(register.id & ~1) {
|
||||
#define r(id, name) case id: return r.name;
|
||||
r(0x00, xwa[0].w.w0) r(0x02, xwa[0].w.w1) r(0x04, xbc[0].w.w0) r(0x06, xbc[0].w.w1)
|
||||
@ -59,7 +59,7 @@ template<> auto TLCS900H::map(Register<uint16> register) -> maybe<uint16&> {
|
||||
return nothing;
|
||||
}
|
||||
|
||||
template<> auto TLCS900H::map(Register<uint32> register) -> maybe<uint32&> {
|
||||
template<> auto TLCS900H::map(Register<uint32> register) const -> maybe<uint32&> {
|
||||
switch(register.id & ~3) {
|
||||
#define r(id, name) case id: return r.name;
|
||||
r(0x00, xwa[0].l.l0) r(0x04, xbc[0].l.l0) r(0x08, xde[0].l.l0) r(0x0c, xhl[0].l.l0)
|
||||
@ -77,9 +77,9 @@ template<> auto TLCS900H::map(Register<uint32> register) -> maybe<uint32&> {
|
||||
#undef a
|
||||
#undef p
|
||||
|
||||
template<> auto TLCS900H::load< uint8>(Register< uint8> register) -> uint8 { return map(register)(Undefined); }
|
||||
template<> auto TLCS900H::load<uint16>(Register<uint16> register) -> uint16 { return map(register)(Undefined); }
|
||||
template<> auto TLCS900H::load<uint32>(Register<uint32> register) -> uint32 { return map(register)(Undefined); }
|
||||
template<> auto TLCS900H::load< uint8>(Register< uint8> register) const -> uint8 { return map(register)(Undefined); }
|
||||
template<> auto TLCS900H::load<uint16>(Register<uint16> register) const -> uint16 { return map(register)(Undefined); }
|
||||
template<> auto TLCS900H::load<uint32>(Register<uint32> register) const -> uint32 { return map(register)(Undefined); }
|
||||
|
||||
template<> auto TLCS900H::store< uint8>(Register< uint8> register, uint32 data) -> void { if(auto r = map(register)) r() = data; }
|
||||
template<> auto TLCS900H::store<uint16>(Register<uint16> register, uint32 data) -> void { if(auto r = map(register)) r() = data; }
|
||||
@ -87,9 +87,11 @@ template<> auto TLCS900H::store<uint32>(Register<uint32> register, uint32 data)
|
||||
|
||||
auto TLCS900H::expand(Register< uint8> register) const -> Register<uint16> { return {register.id & ~1}; }
|
||||
auto TLCS900H::expand(Register<uint16> register) const -> Register<uint32> { return {register.id & ~3}; }
|
||||
auto TLCS900H::expand(Register<uint32> register) const -> Register<uint32> { return {Undefined}; }
|
||||
|
||||
auto TLCS900H::load(FlagRegister f) -> uint8 {
|
||||
auto TLCS900H::shrink(Register<uint32> register) const -> Register<uint16> { return {register.id}; }
|
||||
auto TLCS900H::shrink(Register<uint16> register) const -> Register< uint8> { return {register.id}; }
|
||||
|
||||
auto TLCS900H::load(FlagRegister f) const -> uint8 {
|
||||
switch(f.id) {
|
||||
case 0: return r.c << 0 | r.n << 1 | r.v << 2 | r.h << 4 | r.z << 6 | r.s << 7;
|
||||
case 1: return r.cp << 0 | r.np << 1 | r.vp << 2 | r.hp << 4 | r.zp << 6 | r.sp << 7;
|
||||
@ -103,7 +105,7 @@ auto TLCS900H::store(FlagRegister f, uint8 data) -> void {
|
||||
} unreachable;
|
||||
}
|
||||
|
||||
auto TLCS900H::load(StatusRegister) -> uint16 {
|
||||
auto TLCS900H::load(StatusRegister) const -> uint16 {
|
||||
return load(F) | r.rfp << 8 | 1 << 11 | r.iff << 12 | 1 << 15;
|
||||
}
|
||||
|
||||
@ -113,5 +115,5 @@ auto TLCS900H::store(StatusRegister, uint16 data) -> void {
|
||||
r.iff = data.bits(12,14);
|
||||
}
|
||||
|
||||
auto TLCS900H::load(ProgramCounter) -> uint32 { return r.pc.l.l0; }
|
||||
auto TLCS900H::load(ProgramCounter) const -> uint32 { return r.pc.l.l0; }
|
||||
auto TLCS900H::store(ProgramCounter, uint32 data) -> void { r.pc.l.l0 = data; }
|
||||
|
||||
@ -20,45 +20,13 @@ struct TLCS900H {
|
||||
|
||||
TLCS900H();
|
||||
|
||||
struct FlagRegister {
|
||||
using type = uint8;
|
||||
enum : uint { bits = 8 };
|
||||
uint1 id;
|
||||
};
|
||||
|
||||
struct StatusRegister {
|
||||
using type = uint16;
|
||||
enum : uint { bits = 16 };
|
||||
};
|
||||
|
||||
struct ProgramCounter {
|
||||
using type = uint32;
|
||||
enum : uint { bits = 32 };
|
||||
};
|
||||
|
||||
template<typename T> struct ControlRegister {
|
||||
using type = T;
|
||||
enum : uint { bits = 8 * sizeof(T) };
|
||||
uint8 id;
|
||||
};
|
||||
|
||||
template<typename T> struct Register {
|
||||
using type = T;
|
||||
enum : uint { bits = 8 * sizeof(T) };
|
||||
uint8 id;
|
||||
};
|
||||
|
||||
template<typename T> struct Memory {
|
||||
using type = T;
|
||||
enum : uint { bits = 8 * sizeof(T) };
|
||||
T address;
|
||||
};
|
||||
|
||||
template<typename T> struct Immediate {
|
||||
using type = T;
|
||||
enum : uint { bits = 8 * sizeof(T) };
|
||||
T constant;
|
||||
};
|
||||
struct FlagRegister { using type = uint8; enum : uint { bits = 8 }; uint1 id; };
|
||||
struct StatusRegister { using type = uint16; enum : uint { bits = 16 }; };
|
||||
struct ProgramCounter { using type = uint32; enum : uint { bits = 32 }; };
|
||||
template<typename T> struct ControlRegister { using type = T; enum : uint { bits = 8 * sizeof(T) }; uint8 id; };
|
||||
template<typename T> struct Register { using type = T; enum : uint { bits = 8 * sizeof(T) }; uint8 id; };
|
||||
template<typename T> struct Memory { using type = T; enum : uint { bits = 8 * sizeof(T) }; T address; };
|
||||
template<typename T> struct Immediate { using type = T; enum : uint { bits = 8 * sizeof(T) }; T constant; };
|
||||
|
||||
template<typename T> auto load(Immediate<T> immediate) const -> T { return immediate.constant; }
|
||||
|
||||
@ -66,22 +34,23 @@ struct TLCS900H {
|
||||
auto power() -> void;
|
||||
|
||||
//registers.cpp
|
||||
template<typename T> auto map(Register<T>) -> maybe<T&>;
|
||||
template<typename T> auto load(Register<T>) -> T;
|
||||
template<typename T> auto map(Register<T>) const -> maybe<T&>;
|
||||
template<typename T> auto load(Register<T>) const -> T;
|
||||
template<typename T> auto store(Register<T>, uint32) -> void;
|
||||
auto expand(Register< uint8>) const -> Register<uint16>;
|
||||
auto expand(Register<uint16>) const -> Register<uint32>;
|
||||
auto expand(Register<uint32>) const -> Register<uint32>;
|
||||
auto load(FlagRegister) -> uint8;
|
||||
auto shrink(Register<uint32>) const -> Register<uint16>;
|
||||
auto shrink(Register<uint16>) const -> Register< uint8>;
|
||||
auto load(FlagRegister) const -> uint8;
|
||||
auto store(FlagRegister, uint8) -> void;
|
||||
auto load(StatusRegister) -> uint16;
|
||||
auto load(StatusRegister) const -> uint16;
|
||||
auto store(StatusRegister, uint16) -> void;
|
||||
auto load(ProgramCounter) -> uint32;
|
||||
auto load(ProgramCounter) const -> uint32;
|
||||
auto store(ProgramCounter, uint32) -> void;
|
||||
|
||||
//control-registers.cpp
|
||||
template<typename T> auto map(ControlRegister<T>) -> maybe<T&>;
|
||||
template<typename T> auto load(ControlRegister<T>) -> T;
|
||||
template<typename T> auto map(ControlRegister<T>) const -> maybe<T&>;
|
||||
template<typename T> auto load(ControlRegister<T>) const -> T;
|
||||
template<typename T> auto store(ControlRegister<T>, uint32) -> void;
|
||||
|
||||
//memory.cpp
|
||||
@ -101,6 +70,8 @@ struct TLCS900H {
|
||||
template<typename T> auto parity(T) const -> bool;
|
||||
template<typename T> auto algorithmAdd(T target, T source, uint1 carry = 0) -> T;
|
||||
template<typename T> auto algorithmAnd(T target, T source) -> T;
|
||||
template<typename T> auto algorithmDecrement(T target, T source) -> T;
|
||||
template<typename T> auto algorithmIncrement(T target, T source) -> T;
|
||||
template<typename T> auto algorithmOr(T target, T source) -> T;
|
||||
template<typename T> auto algorithmSubtract(T target, T source, uint1 carry = 0) -> T;
|
||||
template<typename T> auto algorithmXor(T target, T source) -> T;
|
||||
@ -118,19 +89,24 @@ struct TLCS900H {
|
||||
auto instructionTargetMemory(uint32 address) -> void;
|
||||
|
||||
//instructions.cpp
|
||||
template<typename Target> auto toSigned(Target) -> int32;
|
||||
|
||||
template<typename Target, typename Source> auto instructionAdd(Target, Source) -> void;
|
||||
template<typename Target, typename Source> auto instructionAddCarry(Target, Source) -> void;
|
||||
template<typename Target, typename Source> auto instructionAnd(Target, Source) -> void;
|
||||
auto instructionBitSearch1Backward(Register<uint16>) -> void;
|
||||
auto instructionBitSearch1Forward(Register<uint16>) -> void;
|
||||
template<typename Source> auto instructionCall(uint4 code, Source) -> void;
|
||||
template<typename Source> auto instructionCallRelative(Source) -> void;
|
||||
template<typename Target, typename Source> auto instructionCompare(Target, Source) -> void;
|
||||
template<typename Target> auto instructionComplement(Target) -> void;
|
||||
auto instructionDecimalAdjustAccumulator(Register<uint8>) -> void;
|
||||
template<typename Target, typename Source> auto instructionDecrement(Target, Source) -> void;
|
||||
template<typename Target, typename Source> auto instructionDivide(Target, Source) -> void;
|
||||
template<typename Target, typename Source> auto instructionDivideSigned(Target, Source) -> void;
|
||||
template<typename Target, typename Source> auto instructionExchange(Target, Source) -> void;
|
||||
template<typename Target> auto instructionExtendSign(Target) -> void;
|
||||
template<typename Target> auto instructionExtendZero(Target) -> void;
|
||||
auto instructionHalt() -> void;
|
||||
template<typename Target, typename Source> auto instructionIncrement(Target, Source) -> void;
|
||||
template<typename Source> auto instructionJump(uint4 code, Source) -> void;
|
||||
template<typename Source> auto instructionJumpRelative(uint4 code, Source) -> void;
|
||||
template<typename Target, typename Source> auto instructionLoad(Target, Source) -> void;
|
||||
|
||||
@ -5,6 +5,10 @@
|
||||
|
||||
namespace nall {
|
||||
|
||||
struct Boolean;
|
||||
template<uint Bits> struct Natural;
|
||||
template<uint Bits> struct Integer;
|
||||
|
||||
struct Boolean {
|
||||
inline Boolean() : data(false) {}
|
||||
template<typename T> inline Boolean(const T& value) : data(value) {}
|
||||
@ -127,6 +131,8 @@ template<uint Bits> struct Natural {
|
||||
return data & m;
|
||||
}
|
||||
|
||||
inline auto integer() const -> Integer<Bits>;
|
||||
|
||||
private:
|
||||
auto set(type value) -> void {
|
||||
data = value & Mask;
|
||||
@ -237,6 +243,8 @@ template<uint Bits> struct Integer {
|
||||
return ((data & m) ^ b) - b;
|
||||
}
|
||||
|
||||
inline auto natural() const -> Natural<Bits>;
|
||||
|
||||
private:
|
||||
auto set(type value) -> void {
|
||||
data = ((value & Mask) ^ Sign) - Sign;
|
||||
@ -245,6 +253,16 @@ private:
|
||||
type data;
|
||||
};
|
||||
|
||||
//cast an unsigned type to a signed type with the same number of bits
|
||||
template<uint Bits> auto Natural<Bits>::integer() const -> Integer<Bits> {
|
||||
return Integer<Bits>(*this);
|
||||
}
|
||||
|
||||
//cast a signed type to an unsigned type with the same number of bits
|
||||
template<uint Bits> auto Integer<Bits>::natural() const -> Natural<Bits> {
|
||||
return Natural<Bits>(*this);
|
||||
}
|
||||
|
||||
template<uint Bits> struct Real {
|
||||
using type =
|
||||
typename conditional<Bits == 32, float32_t,
|
||||
|
||||
Loading…
Reference in New Issue
Block a user