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https://github.com/libretro/bsnes-libretro.git
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1a889ae232
byuu says: I started working on the Toshiba TLCS900H CPU core today. It's basically, "what if we took the Z80, added in 32-bit support, added in SPARC register windows, added a ton of additional addressing modes, added control registers, and added a bunch of additional instructions?" -- or in other words, it's basically hell for me. It took several hours just to wrap my head around the way the opcode decoder needed to function, but I think I have a decent strategy for implementing it now. I should have all of the first-byte register/memory address decoding in place, although I'm sure there's lots of bugs. I don't have anything in the way of a disassembler yet.
44 lines
1.8 KiB
C++
44 lines
1.8 KiB
C++
#pragma once
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#include <nall/intrinsics.hpp>
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#if defined(ENDIAN_LSB)
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//little-endian: uint8_t[] { 0x01, 0x02, 0x03, 0x04 } == 0x04030201
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#define order_lsb1(a) a
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#define order_lsb2(a,b) a,b
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#define order_lsb3(a,b,c) a,b,c
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#define order_lsb4(a,b,c,d) a,b,c,d
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#define order_lsb5(a,b,c,d,e) a,b,c,d,e
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#define order_lsb6(a,b,c,d,e,f) a,b,c,d,e,f
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#define order_lsb7(a,b,c,d,e,f,g) a,b,c,d,e,f,g
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#define order_lsb8(a,b,c,d,e,f,g,h) a,b,c,d,e,f,g,h
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#define order_msb1(a) a
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#define order_msb2(a,b) b,a
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#define order_msb3(a,b,c) c,b,a
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#define order_msb4(a,b,c,d) d,c,b,a
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#define order_msb5(a,b,c,d,e) e,d,c,b,a
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#define order_msb6(a,b,c,d,e,f) f,e,d,c,b,a
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#define order_msb7(a,b,c,d,e,f,g) g,f,e,d,c,b,a
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#define order_msb8(a,b,c,d,e,f,g,h) h,g,f,e,d,c,b,a
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#elif defined(ENDIAN_MSB)
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//big-endian: uint8_t[] { 0x01, 0x02, 0x03, 0x04 } == 0x01020304
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#define order_lsb1(a) a
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#define order_lsb2(a,b) b,a
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#define order_lsb3(a,b,c) c,b,a
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#define order_lsb4(a,b,c,d) d,c,b,a
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#define order_lsb5(a,b,c,d,e) e,d,c,b,a
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#define order_lsb6(a,b,c,d,e,f) f,e,d,c,b,a
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#define order_lsb7(a,b,c,d,e,f,g) g,f,e,d,c,b,a
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#define order_lsb8(a,b,c,d,e,f,g,h) h,g,f,e,d,c,b,a
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#define order_msb1(a) a
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#define order_msb2(a,b) a,b
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#define order_msb3(a,b,c) a,b,c
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#define order_msb4(a,b,c,d) a,b,c,d
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#define order_msb5(a,b,c,d,e) a,b,c,d,e
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#define order_msb6(a,b,c,d,e,f) a,b,c,d,e,f
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#define order_msb7(a,b,c,d,e,f,g) a,b,c,d,e,f,g
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#define order_msb8(a,b,c,d,e,f,g,h) a,b,c,d,e,f,g,h
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#else
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#error "Unknown endian. Please specify in nall/intrinsics.hpp"
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#endif
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