ncr5380: drop the TT-MFP interrupt line on reset-parity/interrupt, check phase when DMA mode is armed

Two things a 5380 driver can rely on that the emulation did not do on the TT:

- Reading the reset parity/interrupt register (7) cleared scsi->irq but
  left the TT-MFP GPIP7 line high (only the Falcon FDC IRQ was cleared),
  so the next ncr5380_set_irq() produced no edge and the interrupt was
  lost. Drive the line low there, as the Falcon path already clears its
  IRQ source.

- Setting the DMA mode bit in the mode register while the target is
  already in a phase other than the one in the TCR raises the
  phase-mismatch interrupt on the real chip. The emulation only noticed
  the mismatch on the next CPU access to the chip. Run the phase check
  when DMA mode goes from 0 to 1.

Atari System V (UniSoft SVR4) arms DMA after the command phase and sleeps
for exactly that interrupt; with both changes its disk driver completes
its first DMA read instead of waiting forever.

Co-Authored-By: Claude Fable 5.1 <[email protected]>

src/ncr5380.c

@@ -894,6 +894,12 @@ static uae_u8 ncr5380_bget(struct soft_scsi *scsi, int reg)
 		scsi->irq = false;
 		if (Config_IsMachineFalcon())
 			FDC_ClearIRQ();
+		else if (Config_IsMachineTT())
+			/* The IRQ line must drop, or the next ncr5380_set_irq()
+			 * produces no edge on the MFP-TT GPIP and the interrupt
+			 * is lost: Atari System V waits forever for the end of
+			 * its first DMA read. */
+			MFP_GPIP_Set_Line_Input ( pMFP_TT , MFP_TT_GPIP_LINE_SCSI_NCR , MFP_GPIP_STATE_LOW );
 		break;
 		case 8: // fake dma port
 		v = raw_scsi_get_data(r, true);
@@ -964,6 +970,13 @@ void ncr5380_bput(struct soft_scsi *scsi, int reg, uae_u8 v)
 			scsi->dma_direction = 0;
 			scsi->dma_active = false;
 			scsi->dma_drq = false;
+		} else if (!(old & 2)) {
+			/* DMA mode just enabled: if the target has already moved
+			 * to a phase other than the one in the TCR, the real chip
+			 * raises the phase-mismatch interrupt at once. Atari
+			 * System V arms DMA mode after the command phase and
+			 * SLEEPS for exactly this interrupt. */
+			ncr5380_check_phase(scsi);
 		}
 		break;
 		case 5: