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Elegance Chess Challenger (model AS12) [Berger]
This commit is contained in:
hap 2021-06-22 19:06:59 +02:00
parent 44e550af74
commit e6ea5f23ae
4 changed files with 82 additions and 34 deletions
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83
src/mame/drivers/fidel_as12.cpp
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@ -1,12 +1,12 @@
// license:BSD-3-Clause
// copyright-holders:hap
// thanks-to:yoyo_chessboard
// thanks-to:yoyo_chessboard, Berger
/******************************************************************************
Fidelity Elegance Chess Challenger (AS12)
Fidelity Elegance Chess Challenger (AS12/6085)
Hardware notes:
- R65C02P4 CPU @ 4MHz
- R65C02P4 CPU @ 3/3.57/4MHz
- 3*8KB ROM(TMM2764), 2*2KB RAM(HM6116)
- PCB label 510-1084B01
@ -18,8 +18,8 @@ magnetic chess board sensors. See fidel_sc12.cpp for a more technical descriptio
#include "emu.h"
#include "machine/fidel_clockdiv.h"
#include "bus/generic/slot.h"
#include "bus/generic/carts.h"
#include "bus/generic/slot.h"
#include "cpu/m6502/r65c02.h"
#include "machine/sensorboard.h"
#include "machine/timer.h"
@ -50,10 +50,15 @@ public:
{ }
// machine configs
void as12(machine_config &config);
void feleg(machine_config &config);
void felega(machine_config &config);
DECLARE_INPUT_CHANGED_MEMBER(switch_cpu_freq) { set_cpu_freq(); }
protected:
virtual void machine_start() override;
virtual void machine_reset() override;
void set_cpu_freq();
private:
// devices/pointers
@ -89,6 +94,20 @@ void as12_state::machine_start()
save_item(NAME(m_led_data));
}
void as12_state::machine_reset()
{
set_cpu_freq();
fidel_clockdiv_state::machine_reset();
}
void as12_state::set_cpu_freq()
{
// known official CPU speeds: 3MHz, 3.57MHz, 4MHz
static const XTAL xtal[3] = { 3_MHz_XTAL, 3.579545_MHz_XTAL, 4_MHz_XTAL };
m_maincpu->set_unscaled_clock(xtal[ioport("FAKE")->read() % 3]);
div_refresh();
}
/******************************************************************************
@ -156,7 +175,8 @@ void as12_state::main_map(address_map &map)
map(0x6000, 0x6000).mirror(0x1fff).w(FUNC(as12_state::control_w));
map(0x8000, 0x9fff).rom();
map(0xa000, 0xa007).mirror(0x1ff8).r(FUNC(as12_state::input_r));
map(0xc000, 0xffff).rom();
map(0xc000, 0xcfff).mirror(0x1000).rom();
map(0xe000, 0xffff).rom();
}
@ -165,7 +185,7 @@ void as12_state::main_map(address_map &map)
Input Ports
******************************************************************************/
static INPUT_PORTS_START( as12 )
static INPUT_PORTS_START( feleg )
PORT_INCLUDE( fidel_clockdiv_4 )
PORT_START("IN.0")
@ -177,6 +197,22 @@ static INPUT_PORTS_START( as12 )
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_6) PORT_CODE(KEYCODE_6_PAD) PORT_NAME("PB / King")
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_DEL) PORT_NAME("CL")
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_R) PORT_NAME("RE")
PORT_START("FAKE")
PORT_CONFNAME( 0x03, 0x02, "CPU Frequency" ) PORT_CHANGED_MEMBER(DEVICE_SELF, as12_state, switch_cpu_freq, 0) // factory set
PORT_CONFSETTING( 0x00, "3MHz" )
PORT_CONFSETTING( 0x01, "3.57MHz" )
PORT_CONFSETTING( 0x02, "4MHz" )
INPUT_PORTS_END
static INPUT_PORTS_START( felega )
PORT_INCLUDE( feleg )
PORT_MODIFY("FAKE") // default to 3.57MHz
PORT_CONFNAME( 0x03, 0x01, "CPU Frequency" ) PORT_CHANGED_MEMBER(DEVICE_SELF, as12_state, switch_cpu_freq, 0) // factory set
PORT_CONFSETTING( 0x00, "3MHz" )
PORT_CONFSETTING( 0x01, "3.57MHz" )
PORT_CONFSETTING( 0x02, "4MHz" )
INPUT_PORTS_END
@ -185,7 +221,7 @@ INPUT_PORTS_END
Machine Configs
******************************************************************************/
void as12_state::as12(machine_config &config)
void as12_state::feleg(machine_config &config)
{
/* basic machine hardware */
R65C02(config, m_maincpu, 4_MHz_XTAL); // R65C02P4
@ -193,7 +229,7 @@ void as12_state::as12(machine_config &config)
const attotime irq_period = attotime::from_hz(600); // from 556 timer (22nF, 110K, 1K), ideal frequency is 600Hz
TIMER(config, m_irq_on).configure_periodic(FUNC(as12_state::irq_on<M6502_IRQ_LINE>), irq_period);
m_irq_on->set_start_delay(irq_period - attotime::from_nsec(15250)); // active for 15.25us
m_irq_on->set_start_delay(irq_period - attotime::from_usec(17)); // active for 17us
TIMER(config, "irq_off").configure_periodic(FUNC(as12_state::irq_off<M6502_IRQ_LINE>), irq_period);
SENSORBOARD(config, m_board).set_type(sensorboard_device::MAGNETS);
@ -213,17 +249,33 @@ void as12_state::as12(machine_config &config)
SOFTWARE_LIST(config, "cart_list").set_original("fidel_scc");
}
void as12_state::felega(machine_config &config)
{
feleg(config);
/* basic machine hardware */
m_maincpu->set_clock(3.579545_MHz_XTAL);
}
/******************************************************************************
ROM Definitions
******************************************************************************/
ROM_START( feleg ) // model AS12(or 6085)
ROM_START( feleg ) // model 6085
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD("feleg.1", 0x8000, 0x2000, CRC(e9df31e8) SHA1(31c52bb8f75580c82093eb950959c1bc294189a8) ) // TMM2764, no label
ROM_LOAD("feleg.2", 0xc000, 0x2000, CRC(bed9c84b) SHA1(c12f39765b054d2ad81f747e698715ad4246806d) ) // "
ROM_LOAD("feleg.3", 0xe000, 0x2000, CRC(b1fb49aa) SHA1(d8c9687dd564f0fa603e6d684effb1d113ac64b4) ) // "
ROM_LOAD("feleg.8000", 0x8000, 0x2000, CRC(e9df31e8) SHA1(31c52bb8f75580c82093eb950959c1bc294189a8) ) // TMM2764, no label
ROM_LOAD("feleg.c000", 0xc000, 0x1000, CRC(bed9c84b) SHA1(c12f39765b054d2ad81f747e698715ad4246806d) ) // "
ROM_CONTINUE( 0xc000, 0x1000 ) // 1st half empty
ROM_LOAD("feleg.e000", 0xe000, 0x2000, CRC(b1fb49aa) SHA1(d8c9687dd564f0fa603e6d684effb1d113ac64b4) ) // "
ROM_END
ROM_START( felega ) // model AS12
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD("blue.8000", 0x8000, 0x2000, CRC(2e07e657) SHA1(3238f21bdbf2277851e5a32e18c043e654123f00) ) // M5L2764K-2
ROM_LOAD("yellow.c000", 0xc000, 0x1000, CRC(fcc48302) SHA1(f60d34229721e8659e9f81c267177daec7723d8f) ) // TMS2732AJL-45
ROM_LOAD("black.e000", 0xe000, 0x2000, CRC(9142121b) SHA1(264380e7ad36b7b1867658e1af387624d2a72630) ) // TMS2764JL-25
ROM_END
} // anonymous namespace
@ -234,5 +286,6 @@ ROM_END
Drivers
******************************************************************************/
// YEAR NAME PARENT CMP MACHINE INPUT STATE INIT COMPANY, FULLNAME, FLAGS
CONS( 1985, feleg, 0, 0, as12, as12, as12_state, empty_init, "Fidelity Electronics", "Elegance Chess Challenger", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_TIMING )
// YEAR NAME PARENT CMP MACHINE INPUT STATE INIT COMPANY, FULLNAME, FLAGS
CONS( 1986, feleg , 0, 0, feleg, feleg, as12_state, empty_init, "Fidelity Electronics", "Elegance Chess Challenger (model 6085)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_TIMING )
CONS( 1985, felega, feleg, 0, felega, felega, as12_state, empty_init, "Fidelity Electronics", "Elegance Chess Challenger (model AS12)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_TIMING )

24
src/mame/drivers/fidel_elite.cpp
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@ -61,17 +61,17 @@ uninteresting to emulate as separate drivers.
#include "emu.h"
#include "machine/fidel_clockdiv.h"
#include "bus/generic/carts.h"
#include "bus/generic/slot.h"
#include "cpu/m6502/m65c02.h"
#include "cpu/m6502/r65c02.h"
#include "machine/i8255.h"
#include "machine/sensorboard.h"
#include "machine/nvram.h"
#include "machine/timer.h"
#include "sound/s14001a.h"
#include "sound/dac.h"
#include "sound/s14001a.h"
#include "video/pwm.h"
#include "bus/generic/slot.h"
#include "bus/generic/carts.h"
#include "softlist.h"
#include "speaker.h"
@ -150,22 +150,16 @@ protected:
void ppi_portc_w(u8 data);
bool m_rotate;
u8 m_led_data;
u8 m_7seg_data;
u8 m_inp_mux;
u8 m_speech_bank;
u8 m_led_data = 0;
u8 m_7seg_data = 0;
u8 m_inp_mux = 0;
u8 m_speech_bank = 0;
};
void elite_state::machine_start()
{
fidel_clockdiv_state::machine_start();
// zerofill
m_led_data = 0;
m_7seg_data = 0;
m_inp_mux = 0;
m_speech_bank = 0;
// register for savestates
save_item(NAME(m_led_data));
save_item(NAME(m_7seg_data));
@ -182,8 +176,8 @@ void elite_state::machine_reset()
void elite_state::set_cpu_freq()
{
// known official CPU speeds: 3MHz(EAS), 3.57MHz(PC/EWC/Privat), 4MHz(PC/EAS-C)
u8 inp = ioport("FAKE")->read();
m_maincpu->set_unscaled_clock((inp & 2) ? 4_MHz_XTAL : ((inp & 1) ? 3.579545_MHz_XTAL : 3_MHz_XTAL));
static const XTAL xtal[3] = { 3_MHz_XTAL, 3.579545_MHz_XTAL, 4_MHz_XTAL };
m_maincpu->set_unscaled_clock(xtal[ioport("FAKE")->read() % 3]);
div_refresh();
}

6
src/mame/drivers/fidel_sc12.cpp
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@ -180,7 +180,7 @@ void sc12_state::main_map(address_map &map)
Input Ports
******************************************************************************/
static INPUT_PORTS_START( sc12_sidepanel )
static INPUT_PORTS_START( sc12_base )
PORT_START("IN.0")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_1) PORT_CODE(KEYCODE_1_PAD) PORT_NAME("RV / Pawn")
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_2) PORT_CODE(KEYCODE_2_PAD) PORT_NAME("DM / Knight")
@ -194,12 +194,12 @@ INPUT_PORTS_END
static INPUT_PORTS_START( sc12 )
PORT_INCLUDE( fidel_clockdiv_2 )
PORT_INCLUDE( sc12_sidepanel )
PORT_INCLUDE( sc12_base )
INPUT_PORTS_END
static INPUT_PORTS_START( sc12b )
PORT_INCLUDE( fidel_clockdiv_4 )
PORT_INCLUDE( sc12_sidepanel )
PORT_INCLUDE( sc12_base )
INPUT_PORTS_END

3
src/mame/mame.lst
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@ -13703,7 +13703,8 @@ fgoal // TF (c) 1979 Taito Corporation
fgoala // MF (c) 1979 Taito Corporation
@source:fidel_as12.cpp
feleg //
feleg
felega
@source:fidel_card.cpp
bridgec