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zanacandClaude
d7117cdcdc
- mspacman: the mapped ROM (decoded set or boot ROM) - snk.c: the sound command/busy register, the sprite blink parity, the tile cache marked dirty after a load - fmopl.c: the whole YM3812/YM3526/Y8950 state (channels, operators, envelopes, LFO, noise, timers, status, Delta-T ADPCM); replaces the register replay of #2045 (3812intf.c back to its earlier version) - scsp.c: chip registers, slots, LFOs, DSP, timers, MIDI FIFOs, DMA - model2: which CPU waits on the i960/copro FIFOs, the SCSP IRQ line - bublbobl: ROM bank, display enable, sound NMI, MCU port latches - m6800.c: the 6801/6803/63701 internal registers (ports, timer, TCSR, RAM control, WAI state) - mb86233.c: the stall flag Claude-Session: https://claude.ai/code/session_01N3fzdsnzkQVtgYtYzqepjX Co-authored-by: Claude <[email protected]>
217 lines
5.4 KiB
C
217 lines
5.4 KiB
C
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#include "driver.h"
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#include "vidhrdw/generic.h"
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#include "state.h"
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/*
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It turns out the bootleg is the decrypted version with the checksum check
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removed and interrupt mode changed to 1.
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u7= boot 4($3000-$3fff) other than 4 bytes(checksum check and interupt mode)
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u6= boot 6($9000-$9fff). The second half of u6 gets mirrored to the second
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half of boot5($8800-$8fff) where it is used.
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u5= first half of boot5($8000-$87ff)
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$8000-$81ef contain 8 byte patches that are overlayed on locations in $0000-$2fff
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The Ms Pacman daughter board is not activated with the mainboard. As near as I
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can tell it requires a sequence of bytes starting at around 3176 and ending with
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3196. The location of the bytes doesn't seem to matter, just that those bytes
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are executed. That sequence of bytes includes a write to 5006 so I'm using that
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to bankswitch, but that is not accurate. The actual change is I believe at $317D.
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The daughterboard can also be deactivated. A read to any of the several 8 byte
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chunks listed will cause the Ms Pac roms to disappear and Pacman to show up.
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As a result I couldn't verify what they contained. They should be the same as the
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pacman roms, but I don't see how it could matter. These areas can be accessed by
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the random number generator at $2a23 and the board is deactivated but is
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immediately reactivated. So the net result is no change. The exact trigger for
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this is not yet known.
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deactivation, 8 bytes starting at:
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$38,$3b0,$1600,$2120,$3ff0,$8000
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David Widel
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[email protected]
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*/
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void machine_init_pacman(void);
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static unsigned char decryptd(unsigned char e)
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{
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unsigned char d;
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d = (e & 0x80) >> 3;
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d |= (e & 0x40) >> 3;
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d |= (e & 0x20) ;
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d |= (e & 0x10) << 2;
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d |= (e & 0x08) >> 1;
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d |= (e & 0x04) >> 1;
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d |= (e & 0x02) >> 1;
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d |= (e & 0x01) << 7;
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return d;
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}
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static unsigned int decrypta1(unsigned int e)
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{
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unsigned int d;
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d = (e & 0x800) ;
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d |= (e & 0x400) >> 7;
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d |= (e & 0x200) >> 2;
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d |= (e & 0x100) << 1;
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d |= (e & 0x80) << 3;
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d |= (e & 0x40) << 2;
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d |= (e & 0x20) << 1;
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d |= (e & 0x10) << 1;
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d |= (e & 0x08) << 1;
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d |= (e & 0x04) ;
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d |= (e & 0x02) ;
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d |= (e & 0x01) ;
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return d;
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}
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static unsigned int decrypta2(unsigned int e)
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{
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unsigned int d;
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d = (e & 0x800) ;
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d |= (e & 0x400) >> 2;
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d |= (e & 0x200) >> 2;
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d |= (e & 0x100) >> 3;
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d |= (e & 0x80) << 2;
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d |= (e & 0x40) << 4;
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d |= (e & 0x20) << 1;
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d |= (e & 0x10) >> 1;
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d |= (e & 0x08) << 1;
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d |= (e & 0x04) ;
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d |= (e & 0x02) ;
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d |= (e & 0x01) ;
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return d;
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}
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void mspacman_decode(void)
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{
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int i;
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unsigned char *RAM;
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/* CPU ROMs */
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RAM = memory_region(REGION_CPU1);
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for (i = 0; i < 0x1000; i++)
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{
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RAM[0x10000+i] = RAM[0x0000+i];
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RAM[0x11000+i] = RAM[0x1000+i];
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RAM[0x12000+i] = RAM[0x2000+i];
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RAM[0x1a000+i] = RAM[0x2000+i]; /*not needed but it's there*/
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RAM[0x1b000+i] = RAM[0x3000+i]; /*not needed but it's there*/
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}
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for (i = 0; i < 0x1000; i++)
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{
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RAM[decrypta1(i)+0x13000] = decryptd(RAM[0xb000+i]); /*u7*/
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RAM[decrypta1(i)+0x19000] = decryptd(RAM[0x9000+i]); /*u6*/
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}
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for (i = 0; i < 0x800; i++)
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{
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RAM[decrypta2(i)+0x18000] = decryptd(RAM[0x8000+i]); /*u5*/
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RAM[0x18800+i] = RAM[0x19800+i];
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}
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for (i = 0; i < 8; i++)
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{
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RAM[0x10410+i] = RAM[0x18008+i];
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RAM[0x108E0+i] = RAM[0x181D8+i];
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RAM[0x10A30+i] = RAM[0x18118+i];
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RAM[0x10BD0+i] = RAM[0x180D8+i];
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RAM[0x10C20+i] = RAM[0x18120+i];
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RAM[0x10E58+i] = RAM[0x18168+i];
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RAM[0x10EA8+i] = RAM[0x18198+i];
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RAM[0x11000+i] = RAM[0x18020+i];
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RAM[0x11008+i] = RAM[0x18010+i];
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RAM[0x11288+i] = RAM[0x18098+i];
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RAM[0x11348+i] = RAM[0x18048+i];
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RAM[0x11688+i] = RAM[0x18088+i];
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RAM[0x116B0+i] = RAM[0x18188+i];
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RAM[0x116D8+i] = RAM[0x180C8+i];
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RAM[0x116F8+i] = RAM[0x181C8+i];
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RAM[0x119A8+i] = RAM[0x180A8+i];
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RAM[0x119B8+i] = RAM[0x181A8+i];
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RAM[0x12060+i] = RAM[0x18148+i];
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RAM[0x12108+i] = RAM[0x18018+i];
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RAM[0x121A0+i] = RAM[0x181A0+i];
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RAM[0x12298+i] = RAM[0x180A0+i];
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RAM[0x123E0+i] = RAM[0x180E8+i];
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RAM[0x12418+i] = RAM[0x18000+i];
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RAM[0x12448+i] = RAM[0x18058+i];
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RAM[0x12470+i] = RAM[0x18140+i];
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RAM[0x12488+i] = RAM[0x18080+i];
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RAM[0x124B0+i] = RAM[0x18180+i];
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RAM[0x124D8+i] = RAM[0x180C0+i];
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RAM[0x124F8+i] = RAM[0x181C0+i];
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RAM[0x12748+i] = RAM[0x18050+i];
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RAM[0x12780+i] = RAM[0x18090+i];
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RAM[0x127B8+i] = RAM[0x18190+i];
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RAM[0x12800+i] = RAM[0x18028+i];
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RAM[0x12B20+i] = RAM[0x18100+i];
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RAM[0x12B30+i] = RAM[0x18110+i];
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RAM[0x12BF0+i] = RAM[0x181D0+i];
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RAM[0x12CC0+i] = RAM[0x180D0+i];
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RAM[0x12CD8+i] = RAM[0x180E0+i];
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RAM[0x12CF0+i] = RAM[0x181E0+i];
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RAM[0x12D60+i] = RAM[0x18160+i];
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}
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}
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/* the board boots from the original Pac-Man ROMs and switches to the
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decoded Ms. Pac-Man ROMs on a write to 0x5006; the switch is part of the
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save state, so that a state loaded in a new instance runs the same code */
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static UINT8 mspacman_rom_active;
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static void mspacman_set_bank(void)
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{
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unsigned char *RAM = memory_region(REGION_CPU1);
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cpu_setbank (1, &RAM[mspacman_rom_active ? 0x10000 : 0x00000]);
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}
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MACHINE_INIT( mspacman )
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{
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mspacman_decode();
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mspacman_rom_active = 0;
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mspacman_set_bank();
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state_save_register_UINT8("mspacman", 0, "rom_active", &mspacman_rom_active, 1);
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state_save_register_func_postload(mspacman_set_bank);
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machine_init_pacman();
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}
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WRITE_HANDLER( mspacman_activate_rom )
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{
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if (data == 1)
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{
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mspacman_rom_active = 1;
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mspacman_set_bank();
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}
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}
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