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R5900/VUmicro: route audit-harness FPCR save/restore through FPControlRegister

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ps2_audit_ee_exec and ps2_audit_vu_exec called _mm_getcsr/_mm_setcsr
directly behind an unconditional #include <xmmintrin.h>, which fails to
compile on non-x86 lanes (aarch64/armv7). Use FPControlRegister::GetCurrent
and SetCurrent from common/FPControl.h instead; it is already in scope via
Config.h and carries both the MXCSR and AArch64 FPCR implementations.
Behaviour on x86 is unchanged.

Verified with -fsyntax-only on aarch64-linux-gnu-g++ (-D_M_ARM64) and
native x86 g++. No source-list or build-flag changes, so Makefile.common
and CMakeLists.txt are unaffected.
This commit is contained in:
LibretroAdmin authored and libretroadmin committed 2026-08-27 16:42:22 +02:00
1 parent e758a589ce
commit 1dbdc62be3
2 files changed
+6 -8
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pcsx2/R5900.cpp
+3 -4
View File
@@ -15,7 +15,6 @@
#include <retro_atomic.h>
#include <xmmintrin.h>
#include <cstring> /* memset */
#include <compat/strl.h>
@@ -737,8 +736,8 @@ void ps2_audit_ee_exec(int use_interp, unsigned char* regs_io, unsigned ninstr)
}
else
{
const u32 host_csr = _mm_getcsr();
_mm_setcsr(EmuConfig.Cpu.FPUFPCR.bitmask);
const FPControlRegister host_fpcr = FPControlRegister::GetCurrent();
FPControlRegister::SetCurrent(EmuConfig.Cpu.FPUFPCR);
/* The exit fires at the first block-boundary event test at or
* beyond nextEventCycle; multi-block programs (branches jump
* between blocks with event tests in between) need a cycle
@@ -746,7 +745,7 @@ void ps2_audit_ee_exec(int use_interp, unsigned char* regs_io, unsigned ninstr)
Cpu->ExitExecution();
cpuRegs.nextEventCycle = cpuRegs.cycle + ninstr * 2 + 64;
Cpu->Execute();
_mm_setcsr(host_csr);
FPControlRegister::SetCurrent(host_fpcr);
}
cpuRegs.pc = old_pc;
cpuRegs.nextEventCycle = old_cycle_target;
pcsx2/VUmicro.cpp
+3 -4
View File
@@ -18,7 +18,6 @@
#include "MTVU.h"
#include "GS.h"
#include "Gif_Unit.h"
#include <xmmintrin.h>
const struct VUmicroCpu* CpuVU0 = NULL;
const struct VUmicroCpu* CpuVU1 = NULL;
@@ -174,11 +173,11 @@ void ps2_audit_vu_exec(int unit, int use_interp, unsigned char* regs_io, unsigne
* FPCR-update elision assumes: force the unit's rounding mode
* around the run and restore the host's after. The interpreter
* computes in ps2float integer code and ignores MXCSR. */
const u32 host_csr = _mm_getcsr();
const FPControlRegister host_fpcr = FPControlRegister::GetCurrent();
if (!use_interp)
_mm_setcsr((unit ? EmuConfig.Cpu.VU1FPCR : EmuConfig.Cpu.VU0FPCR).bitmask);
FPControlRegister::SetCurrent(unit ? EmuConfig.Cpu.VU1FPCR : EmuConfig.Cpu.VU0FPCR);
cpu->Execute(max_cycles ? max_cycles : 2048);
_mm_setcsr(host_csr);
FPControlRegister::SetCurrent(host_fpcr);
}
if (getenv("PS2_AUDIT_TRACE"))
fprintf(stderr, "[ATRACE] after: vf3=%08x tpc=%d stat=%x\n",