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17d4885c1d
Three changes, one intent: bare `make` and bare cmake now build the C89 emitter with nothing to specify, and common/emitter contains only the six headers the recompilers actually use (c89emit.h, x86emitter.h, x86types.h, instructions.h, legacy_instructions.h, x86emitter_shim.h). Default flip. Makefile gains `C89_EMITTER ?= 1` -- set BEFORE the Makefile.common include, because the source exclusion there reads it. The first attempt set it next to the CXXFLAGS append at line 839, after the include: the define applied but the exclusion never fired, and the build went on linking reference objects it no longer needed. Caught by `make -n` grep: a bare plan now names zero reference objects, a C89_EMITTER=0 plan names all eight. CMake's option defaults to ON with the same semantics (-DC89_EMITTER=OFF for the reference). Reference headers. internal.h, legacy_internal.h and the thirteen-header implement/ tree move to tests/emitter/reference beside the sources that need them. internal.h now includes the implement set itself -- it is the reference implementation's own root and must be self-sufficient; x86types.h includes them only under the reference configuration, for the extern declarations in instructions.h's #else branches. The three G*Type operator enums move into x86types.h: recompilers name their values, which makes them API, not implementation. iR5900-32.cpp's MOVQ-workaround include of internal.h was already reference-gated and is repointed. cmake's installed- header list is repointed too (the stale entries failed configure). Legacy jump API. The fourteen rel8/rel32 wrappers become macros over two static helpers (J8Rel, J32Rel), matching the C89 core's idiom. The helpers are static -- internal linkage per TU -- so there is no header-linkage subtlety left to get wrong, where the previous inline definitions carried one. The speculative conditional mode initially drafted into J32Rel was removed before commit: only the unconditional form has callers. The legacy SSE C-API wrappers (SSE_MINSS_XMM_to_XMM and friends) now emit through E_SSE_RR directly instead of hopping through the C++ shim objects. Their constants are proven end-to-end in newbind: reference function vs C89 macro across all register pairs, 2,048 cases within the 110,070 total. Verified: six suites green, switchover identical, both compile gates 31/31 in both configurations, bare make links at 11,351,104 bytes with zero reference encoder symbols and boots, cmake configure passes in both configurations. The cmake three-target build has not completed in this container (cmake 4 needs -DCMAKE_POLICY_VERSION_MINIMUM=3.5 for the vendored cpuinfo; GL dev packages were also missing) -- it needs one run on a normally-provisioned machine. C89_EMITTER=0 static: the gates and suites compile and byte-verify that configuration; its last full link ran two commits ago unchanged.
48 lines
1.8 KiB
C++
48 lines
1.8 KiB
C++
/* PCSX2 - PS2 Emulator for PCs
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* Copyright (C) 2002-2010 PCSX2 Dev Team
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*
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* PCSX2 is free software: you can redistribute it and/or modify it under the terms
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* of the GNU Lesser General Public License as published by the Free Software Found-
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* ation, either version 3 of the License, or (at your option) any later version.
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*
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* PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along with PCSX2.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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// Implementations found here: TEST + BTS/BT/BTC/BTR + BSF/BSR! (for lack of better location)
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namespace x86Emitter
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{
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// --------------------------------------------------------------------------------------
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// xImpl_Test
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// --------------------------------------------------------------------------------------
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//
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struct xImpl_Test
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{
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void operator()(const xRegisterInt& to, const xRegisterInt& from) const;
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void operator()(const xIndirect64orLess& dest, int imm) const;
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void operator()(const xRegisterInt& to, int imm) const;
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};
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// --------------------------------------------------------------------------------------
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// BSR
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// --------------------------------------------------------------------------------------
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// 16/32 operands are available. No 8 bit ones, not that any of you cared, I bet.
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//
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struct xImpl_BitScan
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{
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// 0xbc [fwd] / 0xbd [rev]
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u16 Opcode;
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void operator()(const xRegister16or32or64& to, const xRegister16or32or64& from) const;
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void operator()(const xRegister16or32or64& to, const xIndirectVoid& sibsrc) const;
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};
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} // End namespace x86Emitter
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