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libretroadmin
a29b73f01a
tests/dma/spr/normal.expected is about the DMA registers rather than the transfer: SADR keeps bits 4 to 13, so its 0x81234028 reads back as 0x20, and MADR drops bit 31, which is why its own harness reports that the transfer "did not accept MADR: 80000000". Dmac.cpp's write path applies 0x3FF0 and 0x7FFFFFFF, so both claims hold; that was checked by reading it. I wrote it as a scored check first and threw that away. The cases were "input & mask == expected" with the mask copied out of Dmac.cpp and the expected value copied out of the capture, which compares two constants I had transcribed and can only fail if I mistyped one. It passed 6 of 6 and proved nothing about the emulator: driving the real write path needs the hardware register file and its dispatch, which this harness does not have. So it is recorded as an inspection instead. That is the same call already made in this series for the arm64 switch dispatch and the MDEC status register -- an inspection recorded as an inspection is worth more than a check that cannot fail, and a score of 6 of 6 sitting in the output would have implied coverage nothing was providing.