Files
parallel-ps2/link.T
T
libretroadmin fb5bc4f338 VUmicro: per-op audit exports for the fpaudit differential rig
Two dlsym'd test entry points (ps2_audit_vu_prep / ps2_audit_vu_exec)
that run an arbitrary micro program through the actual recompiler or
the actual ps2float interpreter and expose the full architectural
state -- the foundation for the per-op correctness audit of the VU
recompilers. Never a mirror of either engine: prep resets the chosen
provider and loads the program; exec sets VF/VI/ACC/Q/P, runs from
PC 0 to the E-bit end, and reads everything back. Program loads are
separated from data runs so operand grids execute without paying a
recompiler reset per case.

Three run-semantics details the direct entry has to own, each found
by the rig's own integrity checks: VPU_STAT lives in VU0's VI for
both units (setting it on VU1's own VI gates both engines into
running nothing -- the outputs-equal-inputs failure mode that a
files-identical check catches); the dispatcher's FPCR-update elision
assumes EE-side context, so the export forces the unit's MXCSR
around recompiled runs and restores the host's (without it, FMAX
plus FMAX produced a raw infinity under the host's round-nearest);
and the interpreter computes in ps2float integer code, indifferent
to MXCSR. An env-gated trace (PS2_AUDIT_TRACE) prints provider
identity and before/after state for rig debugging.

First results, VADD register form, VU1, 4768 cases in two batteries
(operand-class grid; exponent-distance sweep with sign combinations):
default recompiler diverges from the interpreter oracle on 18.1% and
28.4% of lanes respectively -- the expected mask-class, chop-of-sum
vs discard-then-add, classic borrow-driven one-ulp examples -- and
with accurate add/sub enabled the divergence is 0 of 19072 lanes:
the masked composite emission is bit-exact against the true oracle
through the actual JIT, the first validation of that path that does
not go through a C mirror. Flag-column comparison is recorded but
not yet conclusive pending the recompiler's lazy status-flag sync
discipline in this entry path.

Emitter gate: 35 TUs, 0 failing.
2026-08-26 13:36:04 +02:00

8 lines
143 B
Perl

{
global: retro_*;
ps2_audit_*;
pcsx2_jithash_dump; /* JIT emission oracle; see pcsx2/x86/JitHash.cpp */
local: *;
};