Fix for games which start VIF1 off while the DMA is paused (Crash of the Titans being one of them)

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@704 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
refraction 2009-03-06 22:59:01 +00:00
parent 4b3d1ccab3
commit 056d8c8417
3 changed files with 14 additions and 2 deletions

View File

@ -83,6 +83,8 @@ static void DmaExec( void (*func)(), u32 mem, u32 value )
if ((psHu32(mem) & 0x100) && (psHu32(DMAC_CTRL) & 0x1))
func();
}
@ -155,6 +157,7 @@ void hwWrite8(u32 mem, u8 value) {
case 0x10009001: // dma1 - vif1
DMA_LOG("VIF1dma EXECUTE, value=0x%x\n", value);
if(value & 0x1) vif1.done = 0; //This must be done here! some games (ala Crash of the Titans) pause the dma to start MFIFO
DmaExec8(dmaVIF1, mem, value);
break;
@ -261,6 +264,7 @@ __forceinline void hwWrite16(u32 mem, u16 value)
case 0x10009000: // dma1 - vif1 - chcr
DMA_LOG("VIF1dma CHCR %lx\n", value);
if(value & 0x100) vif1.done = 0; //This must be done here! some games (ala Crash of the Titans) pause the dma to start MFIFO
DmaExec16(dmaVIF1, mem, value);
break;
@ -680,6 +684,10 @@ void __fastcall hwWrite32_generic( u32 mem, u32 value )
//------------------------------------------------------------------
case D1_CHCR: // dma1 - vif1 - chcr
DMA_LOG("VIF1dma EXECUTE, value=0x%x\n", value);
if(value & 0x100)
{
vif1.done = 0; //This must be done here! some games (ala Crash of the Titans) pause the dma to start MFIFO
}
DmaExec(dmaVIF1, mem, value);
return;

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@ -499,7 +499,7 @@ void mfifoVIF1transfer(int qwc) {
if(qwc > 0){
vifqwc += qwc;
SPR_LOG("Added %x qw to mfifo, total now %x\n", qwc, vifqwc);
SPR_LOG("Added %x qw to mfifo, total now %x - Vif CHCR %x Stalled %x done %x\n", qwc, vifqwc, vif1ch->chcr, vif1.vifstalled, vif1.done);
if((vif1ch->chcr & 0x100) == 0 || vif1.vifstalled == 1 || vif1.done == 1) return;
}
@ -589,6 +589,8 @@ void mfifoVIF1transfer(int qwc) {
void vifMFIFOInterrupt()
{
g_vifCycles = 0;
if(vif1.irq && vif1.tag.size == 0) {
vif1Regs->stat|= VIF1_STAT_INT;
hwIntcIrq(INTC_VIF1);
@ -617,6 +619,7 @@ void vifMFIFOInterrupt()
vifqwc = 0;
vif1.done = 1;
g_vifCycles = 0;
vif1ch->chcr &= ~0x100;
hwDmacIrq(DMAC_VIF1);
VIF_LOG("vif mfifo dma end\n");

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@ -2023,6 +2023,7 @@ __forceinline void vif1Interrupt() {
prevviftag = NULL;
prevvifcycles = 0;
vif1ch->chcr &= ~0x100;
g_vifCycles = 0;
hwDmacIrq(DMAC_VIF1);
if(vif1Regs->mskpath3 == 0 || (vif1ch->chcr & 0x1) == 0x1)vif1Regs->stat&= ~0x1F000000; // FQC=0
}
@ -2036,7 +2037,7 @@ void dmaVIF1()
vif1ch->chcr, vif1ch->madr, vif1ch->qwc,
vif1ch->tadr, vif1ch->asr0, vif1ch->asr1 );
vif1.done = 0;
g_vifCycles = 0;
if (((psHu32(DMAC_CTRL) & 0xC) == 0x8)) { // VIF MFIFO