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Fixed some potential dangerous situations in VU rec
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@575 96395faa-99c1-11dd-bbfe-3dabce05a288
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@ -820,7 +820,7 @@ void recVUMI_ADD(VURegs *VU, int info)
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if ( _Fs_ == 0 && _Ft_ == 0 ) { // if adding VF00 with VF00, then the result is always 0,0,0,2
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if ( _X_Y_Z_W != 0xf ) {
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SSE_MOVAPS_M128_to_XMM(EEREC_TEMP, (uptr)s_two);
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VU_MERGE_REGS(EEREC_D, EEREC_TEMP);
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if( EEREC_D != EEREC_TEMP ) VU_MERGE_REGS(EEREC_D, EEREC_TEMP);
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}
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else SSE_MOVAPS_M128_to_XMM(EEREC_D, (uptr)s_two);
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}
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@ -840,7 +840,7 @@ void recVUMI_ADD(VURegs *VU, int info)
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else if (_X_Y_Z_W != 0xf) { // If xyzw != 1111, then we have to use a temp reg
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SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S);
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SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_T);
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VU_MERGE_REGS(EEREC_D, EEREC_TEMP);
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if( EEREC_D != EEREC_TEMP ) VU_MERGE_REGS(EEREC_D, EEREC_TEMP);
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}
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else { // All xyzw being modified (xyzw == 1111)
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if (EEREC_D == EEREC_S) SSE_ADDPS_XMM_to_XMM(EEREC_D, EEREC_T);
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@ -899,7 +899,7 @@ void recVUMI_ADD_iq(VURegs *VU, uptr addr, int info)
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if (_X_Y_Z_W != 0xf) {
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SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_S);
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VU_MERGE_REGS(EEREC_D, EEREC_TEMP);
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if( EEREC_D != EEREC_TEMP ) VU_MERGE_REGS(EEREC_D, EEREC_TEMP);
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}
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else {
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if ( EEREC_D == EEREC_TEMP ) SSE_ADDPS_XMM_to_XMM(EEREC_D, EEREC_S);
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@ -929,7 +929,7 @@ void recVUMI_ADD_xyzw(VURegs *VU, int xyzw, int info)
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if ( _X_Y_Z_W == 0x8 ) { VU_MERGE_REGS(EEREC_D, EEREC_S); }
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else if ( _X_Y_Z_W != 0xf ) {
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SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S);
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VU_MERGE_REGS(EEREC_D, EEREC_TEMP);
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if( EEREC_D != EEREC_TEMP ) VU_MERGE_REGS(EEREC_D, EEREC_TEMP);
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}
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else SSE_MOVAPS_XMM_to_XMM(EEREC_D, EEREC_S);
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}
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@ -949,13 +949,13 @@ void recVUMI_ADD_xyzw(VURegs *VU, int xyzw, int info)
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}
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else if( _Fs_ == 0 && !_W ) { // just move
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_unpackVF_xyzw(EEREC_TEMP, EEREC_T, xyzw);
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VU_MERGE_REGS(EEREC_D, EEREC_TEMP);
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if( EEREC_D != EEREC_TEMP ) VU_MERGE_REGS(EEREC_D, EEREC_TEMP);
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}
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else {
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if ( _X_Y_Z_W != 0xf ) {
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_unpackVF_xyzw(EEREC_TEMP, EEREC_T, xyzw);
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SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_S);
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VU_MERGE_REGS(EEREC_D, EEREC_TEMP);
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if( EEREC_D != EEREC_TEMP ) VU_MERGE_REGS(EEREC_D, EEREC_TEMP);
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}
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else {
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if( EEREC_D == EEREC_TEMP ) { _unpackVF_xyzw(EEREC_TEMP, EEREC_T, xyzw); SSE_ADDPS_XMM_to_XMM(EEREC_D, EEREC_S); }
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@ -1164,7 +1164,7 @@ void recVUMI_SUB(VURegs *VU, int info)
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SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S);
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if( ( _Ft_ > 0 ) || _W ) SSE_SUBPS_XMM_to_XMM(EEREC_TEMP, EEREC_T);
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VU_MERGE_REGS(EEREC_D, EEREC_TEMP);
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if( EEREC_D != EEREC_TEMP ) VU_MERGE_REGS(EEREC_D, EEREC_TEMP);
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}
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else {
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if (EEREC_D == EEREC_S) SSE_SUBPS_XMM_to_XMM(EEREC_D, EEREC_T);
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@ -1238,7 +1238,7 @@ void recVUMI_SUB_iq(VURegs *VU, uptr addr, int info)
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// negate
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SSE_XORPS_M128_to_XMM(EEREC_TEMP, (uptr)&const_clip[4]);
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SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_S);
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VU_MERGE_REGS(EEREC_D, EEREC_TEMP);
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if( EEREC_D != EEREC_TEMP ) VU_MERGE_REGS(EEREC_D, EEREC_TEMP);
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}
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}
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else {
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@ -1304,7 +1304,7 @@ void recVUMI_SUB_xyzw(VURegs *VU, int xyzw, int info)
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// negate
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SSE_XORPS_M128_to_XMM(EEREC_TEMP, (uptr)&const_clip[4]);
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SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_S);
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VU_MERGE_REGS(EEREC_D, EEREC_TEMP);
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if( EEREC_D != EEREC_TEMP ) VU_MERGE_REGS(EEREC_D, EEREC_TEMP);
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}
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}
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else {
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@ -1507,7 +1507,7 @@ void recVUMI_MUL_toD(VURegs *VU, int regd, int info)
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if (_X_Y_Z_W == 1 && (_Ft_ == 0 || _Fs_==0) ) { // W
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SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, _Ft_ ? EEREC_T : EEREC_S);
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VU_MERGE_REGS(regd, EEREC_TEMP);
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if( regd != EEREC_TEMP ) VU_MERGE_REGS(regd, EEREC_TEMP);
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}
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else if( _Fd_ == _Fs_ && _Fs_ == _Ft_ && _XYZW_SS ) {
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_vuFlipRegSS(VU, EEREC_D);
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@ -1526,7 +1526,7 @@ void recVUMI_MUL_toD(VURegs *VU, int regd, int info)
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SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S);
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SSE_MULPS_XMM_to_XMM(EEREC_TEMP, EEREC_T);
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VU_MERGE_REGS(regd, EEREC_TEMP);
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if( regd != EEREC_TEMP ) VU_MERGE_REGS(regd, EEREC_TEMP);
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}
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else {
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if (regd == EEREC_S) SSE_MULPS_XMM_to_XMM(regd, EEREC_T);
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@ -1579,7 +1579,7 @@ void recVUMI_MUL_iq_toD(VURegs *VU, uptr addr, int regd, int info)
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if (_X_Y_Z_W != 0xf) {
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SSE_MULPS_XMM_to_XMM(EEREC_TEMP, EEREC_S);
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VU_MERGE_REGS(regd, EEREC_TEMP);
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if( regd != EEREC_TEMP ) VU_MERGE_REGS(regd, EEREC_TEMP);
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}
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else {
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if( regd == EEREC_TEMP ) SSE_MULPS_XMM_to_XMM(regd, EEREC_S);
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@ -1607,7 +1607,7 @@ void recVUMI_MUL_xyzw_toD(VURegs *VU, int xyzw, int regd, int info)
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if( xyzw < 3 ) {
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if (_X_Y_Z_W != 0xf) {
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SSE_XORPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP);
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VU_MERGE_REGS(regd, EEREC_TEMP);
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if( regd != EEREC_TEMP ) VU_MERGE_REGS(regd, EEREC_TEMP);
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}
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else SSE_XORPS_XMM_to_XMM(regd, regd);
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}
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@ -1615,7 +1615,7 @@ void recVUMI_MUL_xyzw_toD(VURegs *VU, int xyzw, int regd, int info)
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assert(xyzw==3);
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if (_X_Y_Z_W != 0xf) {
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SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S);
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VU_MERGE_REGS(regd, EEREC_TEMP);
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if( regd != EEREC_TEMP ) VU_MERGE_REGS(regd, EEREC_TEMP);
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}
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else SSE_MOVAPS_XMM_to_XMM(regd, EEREC_S);
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}
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@ -1648,7 +1648,7 @@ void recVUMI_MUL_xyzw_toD(VURegs *VU, int xyzw, int regd, int info)
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if (_X_Y_Z_W != 0xf) {
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SSE_MULPS_XMM_to_XMM(EEREC_TEMP, EEREC_S);
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VU_MERGE_REGS(regd, EEREC_TEMP);
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if( regd != EEREC_TEMP ) VU_MERGE_REGS(regd, EEREC_TEMP);
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}
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else {
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if( regd == EEREC_TEMP ) SSE_MULPS_XMM_to_XMM(regd, EEREC_S);
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@ -1770,7 +1770,7 @@ void recVUMI_MADD_toD(VURegs *VU, int regd, int info)
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if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, EEREC_TEMP, _X_Y_Z_W ); }
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SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_ACC);
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VU_MERGE_REGS(regd, EEREC_TEMP);
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if( regd != EEREC_TEMP ) VU_MERGE_REGS(regd, EEREC_TEMP);
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}
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else {
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if( regd == EEREC_ACC ) {
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@ -1857,7 +1857,7 @@ void recVUMI_MADD_iq_toD(VURegs *VU, uptr addr, int regd, int info)
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if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, EEREC_TEMP, _X_Y_Z_W ); }
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SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_ACC);
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VU_MERGE_REGS(regd, EEREC_TEMP);
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if( regd != EEREC_TEMP ) VU_MERGE_REGS(regd, EEREC_TEMP);
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}
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else {
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if( regd == EEREC_ACC ) {
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@ -1913,7 +1913,7 @@ void recVUMI_MADD_xyzw_toD(VURegs *VU, int xyzw, int regd, int info)
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SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S);
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SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_ACC);
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VU_MERGE_REGS(regd, EEREC_TEMP);
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if( regd != EEREC_TEMP ) VU_MERGE_REGS(regd, EEREC_TEMP);
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}
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else {
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if( regd == EEREC_S ) SSE_ADDPS_XMM_to_XMM(regd, EEREC_ACC);
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@ -1928,7 +1928,7 @@ void recVUMI_MADD_xyzw_toD(VURegs *VU, int xyzw, int regd, int info)
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// just move acc to regd
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if( _X_Y_Z_W != 0xf ) {
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SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_ACC);
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VU_MERGE_REGS(regd, EEREC_TEMP);
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if( regd != EEREC_TEMP ) VU_MERGE_REGS(regd, EEREC_TEMP);
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}
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else SSE_MOVAPS_XMM_to_XMM(regd, EEREC_ACC);
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}
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@ -1971,7 +1971,7 @@ void recVUMI_MADD_xyzw_toD(VURegs *VU, int xyzw, int regd, int info)
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if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, EEREC_TEMP, _X_Y_Z_W ); }
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SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_ACC);
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VU_MERGE_REGS(regd, EEREC_TEMP);
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if( regd != EEREC_TEMP ) VU_MERGE_REGS(regd, EEREC_TEMP);
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}
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else {
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if( regd == EEREC_ACC ) {
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@ -2116,7 +2116,7 @@ void recVUMI_MSUB_toD(VURegs *VU, int regd, int info)
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else {
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SSE_XORPS_M128_to_XMM(EEREC_TEMP, (uptr)&const_clip[4]);
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SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_ACC);
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VU_MERGE_REGS(regd, EEREC_TEMP);
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if( regd != EEREC_TEMP ) VU_MERGE_REGS(regd, EEREC_TEMP);
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}
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}
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else {
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@ -2173,7 +2173,7 @@ void recVUMI_MSUB_temp_toD(VURegs *VU, int regd, int info)
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else {
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SSE_XORPS_M128_to_XMM(EEREC_TEMP, (uptr)&const_clip[4]);
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SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_ACC);
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VU_MERGE_REGS(regd, EEREC_TEMP);
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if( regd != EEREC_TEMP ) VU_MERGE_REGS(regd, EEREC_TEMP);
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}
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}
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else {
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@ -2832,7 +2832,7 @@ void recVUMI_OPMSUB( VURegs *VU, int info )
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// negate and add
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SSE_XORPS_M128_to_XMM(EEREC_TEMP, (uptr)&const_clip[4]);
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SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_ACC);
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VU_MERGE_REGS_CUSTOM(EEREC_D, EEREC_TEMP, 14);
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if( EEREC_D != EEREC_TEMP ) VU_MERGE_REGS_CUSTOM(EEREC_D, EEREC_TEMP, 14);
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// revert EEREC_T
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if( EEREC_T != EEREC_D ) SSE_SHUFPS_XMM_to_XMM(EEREC_T, EEREC_T, 0xC9);
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