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https://github.com/libretro/pcsx2.git
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pcsx2: print a nice message when SYSCALL 2 is called
This syscall is used to setup the CRTC display. Maybe the information can be useful for GS rendering.
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59be6c8710
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@ -879,42 +879,92 @@ void SYSCALL()
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call = cpuRegs.GPR.n.v1.UC[0];
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BIOS_LOG("Bios call: %s (%x)", R5900::bios[call], call);
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if (call == 13) {
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DevCon.Warning("A tlb refill handler is set. New handler %x", (u32*)PSM(cpuRegs.GPR.n.a1.UL[0]));
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}
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if (call == 0x7c)
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{
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if(cpuRegs.GPR.n.a0.UL[0] == 0x10)
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{
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eeConLog( ShiftJIS_ConvertString((char*)PSM(memRead32(cpuRegs.GPR.n.a1.UL[0]))) );
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}
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else
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__Deci2Call( cpuRegs.GPR.n.a0.UL[0], (u32*)PSM(cpuRegs.GPR.n.a1.UL[0]) );
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}
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switch (call) {
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case 2: {
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const char* inter = (cpuRegs.GPR.n.a0.UL[0] & 1) ? "Interlaced" : "Progressive";
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const char* field = (cpuRegs.GPR.n.a2.UL[0] & 1) ? "FRAME" : "FIELD";
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std::string mode;
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// Warning info might be incorrect!
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switch (cpuRegs.GPR.n.a1.UC[0]) {
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case 0x2: mode = "NTSC 640x448 @ 59.940 (59.82)"; break;
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// The only thing this code is used for is the one log message, so don't execute it if we aren't logging bios messages.
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if (SysTraceActive(EE.Bios) && (call == 0x77))
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{
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t_sif_dma_transfer *dmat;
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//struct t_sif_cmd_header *hdr;
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//struct t_sif_rpc_bind *bind;
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//struct t_rpc_server_data *server;
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int n_transfer;
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u32 addr;
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//int sid;
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case 0x3: mode = "PAL 640x512 @ 50.000 (49.76)"; break;
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n_transfer = cpuRegs.GPR.n.a1.UL[0] - 1;
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if (n_transfer >= 0)
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{
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addr = cpuRegs.GPR.n.a0.UL[0] + n_transfer * sizeof(t_sif_dma_transfer);
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dmat = (t_sif_dma_transfer*)PSM(addr);
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case 0x1A: mode = "VESA 640x480 @ 59.940"; break;
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case 0x1B: mode = "VESA 640x480 @ 72.809"; break;
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case 0x1C: mode = "VESA 640x480 @ 75.000"; break;
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case 0x1D: mode = "VESA 640x480 @ 85.008"; break;
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BIOS_LOG("bios_%s: n_transfer=%d, size=%x, attr=%x, dest=%x, src=%x",
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R5900::bios[cpuRegs.GPR.n.v1.UC[0]], n_transfer,
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dmat->size, dmat->attr,
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dmat->dest, dmat->src);
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}
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case 0x2A: mode = "VESA 800x600 @ 56.250"; break;
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case 0x2B: mode = "VESA 800x600 @ 60.317"; break;
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case 0x2C: mode = "VESA 800x600 @ 72.188"; break;
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case 0x2D: mode = "VESA 800x600 @ 75.000"; break;
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case 0x2E: mode = "VESA 800x600 @ 85.061"; break;
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case 0x3B: mode = "VESA 1024x768 @ 60.004"; break;
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case 0x3C: mode = "VESA 1024x768 @ 70.069"; break;
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case 0x3D: mode = "VESA 1024x768 @ 75.029"; break;
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case 0x3E: mode = "VESA 1024x768 @ 84.997"; break;
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case 0x4A: mode = "VESA 1280x1024 @ 63.981"; break;
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case 0x4B: mode = "VESA 1280x1024 @ 79.976"; break;
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case 0x50: mode = "HDTV 720x480 @ 59.94"; break;
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case 0x51: mode = "HDTV 1920x1080 @ 60.00"; break;
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case 0x52: mode = "HDTV 1280x720 @ ?????"; break;
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case 0x72: mode = "DVD NTSC 640x448 @ ????"; break;
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default: DevCon.Error("Mode %x is not supported. Report me upstream", cpuRegs.GPR.n.a1.UC[0]);
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}
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DevCon.Warning("Set GS CRTC configuration. Interlace %s. Field Type %s. Mode %s", inter, field, mode.c_str());
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}
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break;
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case 13:
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DevCon.Warning("A tlb refill handler is set. New handler %x", (u32*)PSM(cpuRegs.GPR.n.a1.UL[0]));
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break;
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case 0x7c:
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{
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if(cpuRegs.GPR.n.a0.UL[0] == 0x10)
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{
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eeConLog( ShiftJIS_ConvertString((char*)PSM(memRead32(cpuRegs.GPR.n.a1.UL[0]))) );
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}
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else
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__Deci2Call( cpuRegs.GPR.n.a0.UL[0], (u32*)PSM(cpuRegs.GPR.n.a1.UL[0]) );
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}
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break;
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case 0x77:
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// The only thing this code is used for is the one log message, so don't execute it if we aren't logging bios messages.
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if (SysTraceActive(EE.Bios))
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{
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t_sif_dma_transfer *dmat;
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//struct t_sif_cmd_header *hdr;
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//struct t_sif_rpc_bind *bind;
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//struct t_rpc_server_data *server;
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int n_transfer;
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u32 addr;
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//int sid;
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n_transfer = cpuRegs.GPR.n.a1.UL[0] - 1;
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if (n_transfer >= 0)
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{
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addr = cpuRegs.GPR.n.a0.UL[0] + n_transfer * sizeof(t_sif_dma_transfer);
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dmat = (t_sif_dma_transfer*)PSM(addr);
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BIOS_LOG("bios_%s: n_transfer=%d, size=%x, attr=%x, dest=%x, src=%x",
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R5900::bios[cpuRegs.GPR.n.v1.UC[0]], n_transfer,
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dmat->size, dmat->attr,
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dmat->dest, dmat->src);
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}
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}
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break;
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default:
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break;
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}
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cpuRegs.pc -= 4;
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