mirror of
https://github.com/libretro/pcsx2.git
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bfd1bcec69
Add a nop between instruction Dump mips instruction Add pretty print support Note: it would be nicer to plug pretty print in the system command directly
160 lines
5.9 KiB
Perl
Executable File
160 lines
5.9 KiB
Perl
Executable File
#!/usr/bin/perl
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use strict;
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use warnings;
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open(my $in, $ARGV[0]) or die "failed to get first param: $!";
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my @pp_name = (
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# GPR
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"0", "0", "0", "0",
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"at", "at", "at", "at",
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"v0", "v0", "v0", "v0",
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"v1", "v1", "v1", "v1",
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"a0", "a0", "a0", "a0",
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"a1", "a1", "a1", "a1",
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"a2", "a2", "a2", "a2",
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"a3", "a3", "a3", "a3",
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"t0", "t0", "t0", "t0",
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"t1", "t1", "t1", "t1",
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"t2", "t2", "t2", "t2",
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"t3", "t3", "t3", "t3",
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"t4", "t4", "t4", "t4",
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"t5", "t5", "t5", "t5",
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"t6", "t6", "t6", "t6",
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"t7", "t7", "t7", "t7",
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"s0", "s0", "s0", "s0",
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"s1", "s1", "s1", "s1",
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"s2", "s2", "s2", "s2",
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"s3", "s3", "s3", "s3",
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"s4", "s4", "s4", "s4",
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"s5", "s5", "s5", "s5",
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"s6", "s6", "s6", "s6",
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"s7", "s7", "s7", "s7",
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"t8", "t8", "t8", "t8",
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"t9", "t9", "t9", "t9",
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"k0", "k0", "k0", "k0",
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"k1", "k1", "k1", "k1",
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"gp", "gp", "gp", "gp",
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"sp", "sp", "sp", "sp",
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"s8", "s8", "s8", "s8",
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"ra", "ra", "ra", "ra",
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"hi", "hi", "hi", "hi",
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"lo", "lo", "lo", "lo",
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# CP0
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"Index" , "Random" , "EntryLo0" , "EntryLo1" ,
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"Context" , "PageMask" , "Wired" , "Reserved0" ,
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"BadVAddr" , "Count" , "EntryHi" , "Compare" ,
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"Status" , "Cause" , "EPC" , "PRid" ,
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"Config" , "LLAddr" , "WatchLO" , "WatchHI" ,
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"XContext" , "Reserved1" , "Reserved2" , "Debug" ,
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"DEPC" , "PerfCnt" , "ErrCtl" , "CacheErr" ,
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"TagLo" , "TagHi" , "ErrorEPC" , "DESAVE" ,
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"sa",
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"IsDelaySlot",
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"pc",
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"code",
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"PERF", "PERF", "PERF", "PERF",
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"eCycle0" , "eCycle1" , "eCycle2" , "eCycle3" , "eCycle4" , "eCycle5" , "eCycle6" , "eCycle7" ,
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"eCycle8" , "eCycle9" , "eCycle10" , "eCycle11" , "eCycle12" , "eCycle13" , "eCycle14" , "eCycle15" ,
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"eCycle16" , "eCycle17" , "eCycle18" , "eCycle19" , "eCycle20" , "eCycle21" , "eCycle22" , "eCycle23" ,
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"eCycle24" , "eCycle25" , "eCycle26" , "eCycle27" , "eCycle28" , "eCycle29" , "eCycle30" , "eCycle31" ,
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"sCycle0" , "sCycle1" , "sCycle2" , "sCycle3" , "sCycle4" , "sCycle5" , "sCycle6" , "sCycle7" ,
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"sCycle8" , "sCycle9" , "sCycle10" , "sCycle11" , "sCycle12" , "sCycle13" , "sCycle14" , "sCycle15" ,
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"sCycle16" , "sCycle17" , "sCycle18" , "sCycle19" , "sCycle20" , "sCycle21" , "sCycle22" , "sCycle23" ,
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"sCycle24" , "sCycle25" , "sCycle26" , "sCycle27" , "sCycle28" , "sCycle29" , "sCycle30" , "sCycle31" ,
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"cycle", "interrupt", "branch", "opmode", "tempcycles"
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);
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my @pp_iop_name = (
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# GPR
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"0" , "at" , "v0" , "v1" ,
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"a0" , "a1" , "a2" , "a3" ,
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"t0" , "t1" , "t2" , "t3" ,
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"t4" , "t5" , "t6" , "t7" ,
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"s0" , "s1" , "s2" , "s3" ,
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"s4" , "s5" , "s6" , "s7" ,
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"t8" , "t9" , "k0" , "k1" ,
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"gp" , "sp" , "s8" , "ra" ,
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"hi" , "lo" ,
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# CP0
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"Index" , "Random" , "EntryLo0" , "EntryLo1" ,
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"Context" , "PageMask" , "Wired" , "Reserved0" ,
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"BadVAddr" , "Count" , "EntryHi" , "Compare" ,
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"Status" , "Cause" , "EPC" , "PRid" ,
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"Config" , "LLAddr" , "WatchLO" , "WatchHI" ,
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"XContext" , "Reserved1" , "Reserved2" , "Debug" ,
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"DEPC" , "PerfCnt" , "ErrCtl" , "CacheErr" ,
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"TagLo" , "TagHi" , "ErrorEPC" , "DESAVE" ,
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# CP2D
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"CP2D1" , "CP2D2" , "CP2D3" , "CP2D4" , "CP2D5" , "CP2D6" , "CP2D7" , "CP2D8" ,
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"CP2D9" , "CP2D10" , "CP2D11" , "CP2D12" , "CP2D13" , "CP2D14" , "CP2D15" , "CP2D16" ,
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"CP2D17" , "CP2D18" , "CP2D19" , "CP2D20" , "CP2D21" , "CP2D22" , "CP2D23" , "CP2D24" ,
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"CP2D25" , "CP2D26" , "CP2D27" , "CP2D28" , "CP2D29" , "CP2D30" , "CP2D31" , "CP2D32" ,
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# CP2H
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"CP2H1" , "CP2H2" , "CP2H3" , "CP2H4" , "CP2H5" , "CP2H6" , "CP2H7" , "CP2H8" ,
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"CP2H9" , "CP2H10" , "CP2H11" , "CP2H12" , "CP2H13" , "CP2H14" , "CP2H15" , "CP2H16" ,
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"CP2H17" , "CP2H18" , "CP2H19" , "CP2H20" , "CP2H21" , "CP2H22" , "CP2H23" , "CP2H24" ,
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"CP2H25" , "CP2H26" , "CP2H27" , "CP2H28" , "CP2H29" , "CP2H30" , "CP2H31" , "CP2H32" ,
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"pc",
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"code",
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"cycle",
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"int",
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"eCycle0" , "eCycle1" , "eCycle2" , "eCycle3" , "eCycle4" , "eCycle5" , "eCycle6" , "eCycle7" ,
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"eCycle8" , "eCycle9" , "eCycle10" , "eCycle11" , "eCycle12" , "eCycle13" , "eCycle14" , "eCycle15" ,
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"eCycle16" , "eCycle17" , "eCycle18" , "eCycle19" , "eCycle20" , "eCycle21" , "eCycle22" , "eCycle23" ,
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"eCycle24" , "eCycle25" , "eCycle26" , "eCycle27" , "eCycle28" , "eCycle29" , "eCycle30" , "eCycle31" ,
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"sCycle0" , "sCycle1" , "sCycle2" , "sCycle3" , "sCycle4" , "sCycle5" , "sCycle6" , "sCycle7" ,
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"sCycle8" , "sCycle9" , "sCycle10" , "sCycle11" , "sCycle12" , "sCycle13" , "sCycle14" , "sCycle15" ,
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"sCycle16" , "sCycle17" , "sCycle18" , "sCycle19" , "sCycle20" , "sCycle21" , "sCycle22" , "sCycle23" ,
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"sCycle24" , "sCycle25" , "sCycle26" , "sCycle27" , "sCycle28" , "sCycle29" , "sCycle30" , "sCycle31" ,
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);
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my $line;
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my $cpu;
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my $iop = 0;
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while($line = <$in>) {
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if ($line =~ /Dump register data: (0x[0-9a-f]+)/) {
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$cpu = hex($1);
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}
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if ($line =~ /Dump PSX register data: (0x[0-9a-f]+)/) {
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$cpu = hex($1);
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$iop = 1;
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}
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if ($line =~ /ds:(0x[0-9a-f]+)/) {
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my $mem = hex($1);
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my $offset = $mem - $cpu;
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my $pretty;
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# keep only the cpuRegisters structure
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next unless ($offset >= 0 && $offset < 980);
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if ($iop) {
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my $byte = $offset % 4;
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my $dw = $offset / 4;
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$pretty = "&$pp_iop_name[$dw]_B$byte";
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} else {
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my $byte = ($offset >= 544) ? $offset % 4 : $offset % 16;
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my $dw = $offset / 4;
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# FIXME B doesn't work for duplicated register
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$pretty = "&$pp_name[$dw]_B$byte";
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}
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#print "AH $pretty\n";
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$line =~ s/ds:0x[0-9a-f]+/$pretty/;
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}
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print $line;
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}
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