mirror of
https://github.com/libretro/ppsspp.git
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ARM: NEON-optimize software skinning
This commit is contained in:
Henrik Rydgard
parent
87e81f05b4
commit
030e6460cc
@ -1226,6 +1226,17 @@ ARMReg DScalar(ARMReg dreg, int subScalar) {
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return ret;
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}
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// Convert to a DScalar
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ARMReg QScalar(ARMReg qreg, int subScalar) {
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int dr = (int)(SubBase(qreg)) & 0xF;
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if (subScalar & 2) {
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dr++;
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}
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int scalar = (((subScalar & 1) << 4) | dr);
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ARMReg ret = (ARMReg)(D0 + scalar);
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return ret;
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}
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void ARMXEmitter::WriteVFPDataOp(u32 Op, ARMReg Vd, ARMReg Vn, ARMReg Vm)
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{
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bool quad_reg = Vd >= Q0;
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@ -371,6 +371,7 @@ ARMReg SubBase(ARMReg Reg);
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// See A.7.1 in the ARMv7-A
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// VMUL F32 scalars can only be up to D15[0], D15[1] - higher scalars cannot be individually addressed
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ARMReg DScalar(ARMReg dreg, int subScalar);
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ARMReg QScalar(ARMReg qreg, int subScalar);
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enum NEONAlignment {
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ALIGN_NONE = 0,
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@ -15,6 +15,7 @@
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#include "base/logging.h"
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#include "Common/ChunkFile.h"
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#include "Core/Reporting.h"
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#include "Core/Core.h"
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@ -44,13 +45,13 @@ void DisassembleArm(const u8 *data, int size) {
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int reg1 = (next & 0x0000F000) >> 12;
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if (reg0 == reg1) {
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sprintf(temp, "%08x MOV32? %s, %04x%04x", (u32)inst, ArmRegName(reg0), hi, low);
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INFO_LOG(JIT, "A: %s", temp);
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ILOG("A: %s", temp);
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i += 4;
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continue;
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}
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}
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ArmDis((u32)codePtr, inst, temp);
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INFO_LOG(JIT, "A: %s", temp);
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ILOG("A: %s", temp);
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}
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}
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@ -27,8 +27,6 @@
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#include "VertexDecoder.h"
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#include "VertexShaderGenerator.h"
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extern void DisassembleArm(const u8 *data, int size);
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static const u8 tcsize[4] = {0,2,4,8}, tcalign[4] = {0,1,2,4};
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static const u8 colsize[8] = {0,0,0,0,2,2,2,4}, colalign[8] = {0,0,0,0,2,2,2,4};
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static const u8 nrmsize[4] = {0,3,6,12}, nrmalign[4] = {0,1,2,4};
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@ -15,14 +15,20 @@
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#include "base/logging.h"
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#include "Common/CPUDetect.h"
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#include "Core/Config.h"
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#include "GPU/GLES/VertexDecoder.h"
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extern void DisassembleArm(const u8 *data, int size);
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bool NEONSkinning = false;
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// Used only in non-NEON mode.
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static float MEMORY_ALIGNED16(skinMatrix[12]);
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// Will be used only in NEON mode.
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static float MEMORY_ALIGNED16(bones[16 * 6]); // First two are kept in registers.
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static float MEMORY_ALIGNED16(bones[16 * 8]); // First two will be kept in registers later
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// NEON register allocation:
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// Q0: Texture scaling parameters
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@ -74,6 +80,9 @@ static const ARMReg neonScratchRegQ = Q1; // Overlaps with all the scratch regs
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static const ARMReg src[3] = {S8, S9, S10}; // skin source
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static const ARMReg acc[3] = {S11, S12, S13}; // skin accumulator
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static const ARMReg srcNEON = Q2;
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static const ARMReg accNEON = Q3;
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static const JitLookup jitLookup[] = {
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{&VertexDecoder::Step_WeightsU8, &VertexDecoderJitCache::Jit_WeightsU8},
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{&VertexDecoder::Step_WeightsU16, &VertexDecoderJitCache::Jit_WeightsU16},
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@ -129,6 +138,8 @@ JittedVertexDecoder VertexDecoderJitCache::Compile(const VertexDecoder &dec) {
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bool prescaleStep = false;
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bool skinning = false;
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NEONSkinning = cpu_info.bNEON;
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// Look for prescaled texcoord steps
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for (int i = 0; i < dec.numSteps_; i++) {
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if (dec.steps_[i] == &VertexDecoder::Step_TcU8Prescale ||
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@ -166,6 +177,49 @@ JittedVertexDecoder VertexDecoderJitCache::Compile(const VertexDecoder &dec) {
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}
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}
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// Add code to convert matrices to 4x4.
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// Later we might want to do this when the matrices are loaded instead.
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int boneCount = 0;
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if (NEONSkinning && dec.weighttype && g_Config.bSoftwareSkinning) {
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// Copying from R3 to R4
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MOVP2R(R3, gstate.boneMatrix);
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MOVP2R(R4, bones);
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MOVI2F(fpScratchReg, 0.0f, scratchReg);
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for (int i = 0; i < 8; i++) {
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VLD1(F_32, Q4, R3, 2); // Load 128 bits even though we just want 96
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VMOV(S19, fpScratchReg);
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ADD(R3, R3, 12);
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VLD1(F_32, Q5, R3, 2);
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VMOV(S23, fpScratchReg);
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ADD(R3, R3, 12);
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VLD1(F_32, Q6, R3, 2);
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VMOV(S27, fpScratchReg);
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ADD(R3, R3, 12);
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VLD1(F_32, Q7, R3, 2);
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VMOV(S31, fpScratchReg);
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ADD(R3, R3, 12);
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// First two matrices are in registers.
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if (i == 0) {
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VMOV(Q8, Q4);
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VMOV(Q9, Q5);
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VMOV(Q10, Q6);
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VMOV(Q11, Q7);
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ADD(R4, R4, 16 * 4);
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} else if (i == 1) {
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VMOV(Q12, Q4);
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VMOV(Q13, Q5);
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VMOV(Q14, Q6);
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VMOV(Q15, Q7);
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ADD(R4, R4, 16 * 4);
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} else {
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VST1(F_32, Q4, R4, 2, ALIGN_128, REG_UPDATE);
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VST1(F_32, Q5, R4, 2, ALIGN_128, REG_UPDATE);
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VST1(F_32, Q6, R4, 2, ALIGN_128, REG_UPDATE);
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VST1(F_32, Q7, R4, 2, ALIGN_128, REG_UPDATE);
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}
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}
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}
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// TODO: NEON skinning register mapping
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// The matrix will be built in Q12-Q15.
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// The temporary matrix to be added to the built matrix will be in Q8-Q11.
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@ -197,10 +251,13 @@ JittedVertexDecoder VertexDecoderJitCache::Compile(const VertexDecoder &dec) {
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FlushLitPool();
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FlushIcache();
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// DisassembleArm(start, GetCodePtr() - start);
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// char temp[1024] = {0};
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// dec.ToString(temp);
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// INFO_LOG(HLE, "%s", temp);
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/*
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DisassembleArm(start, GetCodePtr() - start);
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char temp[1024] = {0};
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dec.ToString(temp);
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INFO_LOG(HLE, "%s", temp);
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*/
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return (JittedVertexDecoder)start;
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}
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@ -252,82 +309,134 @@ void VertexDecoderJitCache::Jit_WeightsFloat() {
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}
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static const ARMReg weightRegs[8] = { S8, S9, S10, S11, S12, S13, S14, S15 };
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static const ARMReg neonWeightRegs[2] = { Q2, Q3 };
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void VertexDecoderJitCache::Jit_ApplyWeights() {
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MOVI2R(tempReg2, (u32)skinMatrix, scratchReg);
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#if 1
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// This approach saves a few stores but accesses the matrices in a more
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// sparse order.
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const float *bone = &gstate.boneMatrix[0];
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MOVI2R(tempReg1, (u32)bone, scratchReg);
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for (int i = 0; i < 12; i++) {
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VLDR(fpScratchReg3, tempReg1, i * 4);
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VMUL(fpScratchReg3, fpScratchReg3, weightRegs[0]);
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for (int j = 1; j < dec_->nweights; j++) {
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VLDR(fpScratchReg2, tempReg1, i * 4 + j * 4 * 12);
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VMLA(fpScratchReg3, fpScratchReg2, weightRegs[j]);
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if (NEONSkinning) {
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// We construct a matrix in Q4-Q7
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// We can use Q1 as temp.
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MOVP2R(scratchReg, bones);
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for (int i = 0; i < dec_->nweights; i++) {
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switch (i) {
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case 0:
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VMUL_scalar(F_32, Q4, Q8, QScalar(neonWeightRegs[0], 0));
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VMUL_scalar(F_32, Q5, Q9, QScalar(neonWeightRegs[0], 0));
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VMUL_scalar(F_32, Q6, Q10, QScalar(neonWeightRegs[0], 0));
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VMUL_scalar(F_32, Q7, Q11, QScalar(neonWeightRegs[0], 0));
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ADD(scratchReg, scratchReg, 16 * 4);
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break;
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case 1:
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VMLA_scalar(F_32, Q4, Q12, QScalar(neonWeightRegs[0], 1));
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VMLA_scalar(F_32, Q5, Q13, QScalar(neonWeightRegs[0], 1));
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VMLA_scalar(F_32, Q6, Q14, QScalar(neonWeightRegs[0], 1));
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VMLA_scalar(F_32, Q7, Q15, QScalar(neonWeightRegs[0], 1));
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ADD(scratchReg, scratchReg, 16 * 4);
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break;
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default:
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// Matrices 2+ need to be loaded from memory.
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// Wonder if we can free up one more register so we could get some parallelism.
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VLD1(F_32, Q1, scratchReg, 2, ALIGN_128, REG_UPDATE);
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VMLA_scalar(F_32, Q4, Q1, QScalar(neonWeightRegs[i >> 2], i & 3));
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VLD1(F_32, Q1, scratchReg, 2, ALIGN_128, REG_UPDATE);
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VMLA_scalar(F_32, Q5, Q1, QScalar(neonWeightRegs[i >> 2], i & 3));
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VLD1(F_32, Q1, scratchReg, 2, ALIGN_128, REG_UPDATE);
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VMLA_scalar(F_32, Q6, Q1, QScalar(neonWeightRegs[i >> 2], i & 3));
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VLD1(F_32, Q1, scratchReg, 2, ALIGN_128, REG_UPDATE);
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VMLA_scalar(F_32, Q7, Q1, QScalar(neonWeightRegs[i >> 2], i & 3));
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break;
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}
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}
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VSTR(fpScratchReg3, tempReg2, i * 4);
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}
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#else
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// This one does accesses in linear order but wastes time storing, loading, storing.
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for (int j = 0; j < dec_->nweights; j++) {
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const float *bone = &gstate.boneMatrix[j * 12];
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} else {
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MOVI2R(tempReg2, (u32)skinMatrix, scratchReg);
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// This approach saves a few stores but accesses the matrices in a more
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// sparse order.
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const float *bone = &gstate.boneMatrix[0];
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MOVI2R(tempReg1, (u32)bone, scratchReg);
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// Okay, we have the weight.
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if (j == 0) {
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for (int i = 0; i < 12; i++) {
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VLDR(fpScratchReg2, tempReg1, i * 4);
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VMUL(fpScratchReg2, fpScratchReg2, weightRegs[j]);
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VSTR(fpScratchReg2, tempReg2, i * 4);
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}
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} else {
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for (int i = 0; i < 12; i++) {
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VLDR(fpScratchReg2, tempReg1, i * 4);
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VLDR(fpScratchReg3, tempReg2, i * 4);
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for (int i = 0; i < 12; i++) {
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VLDR(fpScratchReg3, tempReg1, i * 4);
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VMUL(fpScratchReg3, fpScratchReg3, weightRegs[0]);
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for (int j = 1; j < dec_->nweights; j++) {
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VLDR(fpScratchReg2, tempReg1, i * 4 + j * 4 * 12);
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VMLA(fpScratchReg3, fpScratchReg2, weightRegs[j]);
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VSTR(fpScratchReg3, tempReg2, i * 4);
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}
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VSTR(fpScratchReg3, tempReg2, i * 4);
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}
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}
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#endif
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}
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void VertexDecoderJitCache::Jit_WeightsU8Skin() {
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// No need to zero skinMatrix, we'll just STR to it in the first lap,
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// then VLDR/VADD/VSTR in subsequent laps.
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for (int j = 0; j < dec_->nweights; j++) {
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LDRB(tempReg1, srcReg, dec_->weightoff + j);
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VMOV(fpScratchReg, tempReg1);
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VCVT(fpScratchReg, fpScratchReg, TO_FLOAT);
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MOVI2F(fpScratchReg2, by128, scratchReg);
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VMUL(weightRegs[j], fpScratchReg, fpScratchReg2);
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if (NEONSkinning && dec_->nweights <= 4) {
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// Most common cases.
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// Weight is first so srcReg is correct.
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switch (dec_->nweights) {
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case 1: LDRB(scratchReg2, srcReg, 0); break;
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case 2: LDRH(scratchReg2, srcReg, 0); break;
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case 3:
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LDR(scratchReg2, srcReg, 0);
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ANDI2R(scratchReg2, scratchReg2, 0xFFFFFF, scratchReg);
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break;
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case 4:
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LDR(scratchReg2, srcReg, 0);
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break;
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}
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VMOV(fpScratchReg, scratchReg2);
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MOVI2F(S12, by128, scratchReg);
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VMOVL(I_8 | I_UNSIGNED, neonScratchRegQ, neonScratchReg);
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VMOVL(I_16 | I_UNSIGNED, neonScratchRegQ, neonScratchReg);
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VCVT(F_32 | I_UNSIGNED, neonScratchRegQ, neonScratchRegQ);
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VMUL_scalar(F_32, neonWeightRegs[0], neonScratchRegQ, DScalar(D6, 0));
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} else {
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// Fallback and non-neon
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for (int j = 0; j < dec_->nweights; j++) {
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LDRB(tempReg1, srcReg, dec_->weightoff + j);
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VMOV(fpScratchReg, tempReg1);
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VCVT(fpScratchReg, fpScratchReg, TO_FLOAT);
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MOVI2F(fpScratchReg2, by128, scratchReg);
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VMUL(weightRegs[j], fpScratchReg, fpScratchReg2);
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}
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}
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Jit_ApplyWeights();
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}
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void VertexDecoderJitCache::Jit_WeightsU16Skin() {
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// No need to zero skinMatrix, we'll just STR to it in the first lap,
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// then VLDR/VADD/VSTR in subsequent laps.
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for (int j = 0; j < dec_->nweights; j++) {
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LDRH(tempReg1, srcReg, dec_->weightoff + j * 2);
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VMOV(fpScratchReg, tempReg1);
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VCVT(fpScratchReg, fpScratchReg, TO_FLOAT);
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MOVI2F(fpScratchReg2, 1.0f / 32768.0f, scratchReg);
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VMUL(weightRegs[j], fpScratchReg, fpScratchReg2);
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if (NEONSkinning && dec_->nweights <= 4) {
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// Most common cases.
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switch (dec_->nweights) {
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case 1: LDRH(scratchReg, srcReg, 0); break;
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case 2: LDR(scratchReg, srcReg, 0); break;
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case 3:
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LDR(scratchReg, srcReg, 0);
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LDRH(scratchReg2, srcReg, 4);
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break;
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case 4:
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LDR(scratchReg, srcReg, 0);
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LDR(scratchReg2, srcReg, 4);
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break;
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}
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VMOV(fpScratchReg, scratchReg);
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VMOV(fpScratchReg2, scratchReg2);
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MOVI2F(S12, by32768, scratchReg);
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VMOVL(I_16 | I_UNSIGNED, neonScratchRegQ, neonScratchReg);
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VCVT(F_32 | I_UNSIGNED, neonScratchRegQ, neonScratchRegQ);
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VMUL_scalar(F_32, neonWeightRegs[0], neonScratchRegQ, DScalar(D6, 0));
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} else {
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// Fallback and non-neon
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for (int j = 0; j < dec_->nweights; j++) {
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LDRH(tempReg1, srcReg, dec_->weightoff + j * 2);
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VMOV(fpScratchReg, tempReg1);
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VCVT(fpScratchReg, fpScratchReg, TO_FLOAT);
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MOVI2F(fpScratchReg2, 1.0f / 32768.0f, scratchReg);
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VMUL(weightRegs[j], fpScratchReg, fpScratchReg2);
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}
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}
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Jit_ApplyWeights();
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}
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void VertexDecoderJitCache::Jit_WeightsFloatSkin() {
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// No need to zero skinMatrix, we'll just STR to it in the first lap,
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// then VLDR/VADD/VSTR in subsequent laps.
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// TODO: NEON-ize (barely worth)
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for (int j = 0; j < dec_->nweights; j++) {
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VLDR(weightRegs[j], srcReg, dec_->weightoff + j * 4);
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}
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Jit_ApplyWeights();
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}
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@ -671,27 +780,39 @@ void VertexDecoderJitCache::Jit_NormalFloatSkin() {
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}
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void VertexDecoderJitCache::Jit_WriteMatrixMul(int outOff, bool pos) {
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MOVI2R(tempReg1, (u32)skinMatrix, scratchReg);
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for (int i = 0; i < 3; i++) {
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VLDR(fpScratchReg, tempReg1, 4 * i);
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VMUL(acc[i], fpScratchReg, src[0]);
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}
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for (int i = 0; i < 3; i++) {
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VLDR(fpScratchReg, tempReg1, 12 + 4 * i);
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VMLA(acc[i], fpScratchReg, src[1]);
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}
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for (int i = 0; i < 3; i++) {
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VLDR(fpScratchReg, tempReg1, 24 + 4 * i);
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VMLA(acc[i], fpScratchReg, src[2]);
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}
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if (pos) {
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for (int i = 0; i < 3; i++) {
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VLDR(fpScratchReg, tempReg1, 36 + 4 * i);
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VADD(acc[i], acc[i], fpScratchReg);
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if (NEONSkinning) {
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||||
// Multiply with the matrix sitting in Q4-Q7.
|
||||
ADD(scratchReg, dstReg, outOff);
|
||||
VMUL_scalar(F_32, accNEON, Q4, QScalar(srcNEON, 0));
|
||||
VMLA_scalar(F_32, accNEON, Q5, QScalar(srcNEON, 1));
|
||||
VMLA_scalar(F_32, accNEON, Q6, QScalar(srcNEON, 2));
|
||||
if (pos) {
|
||||
VADD(F_32, accNEON, accNEON, Q7);
|
||||
}
|
||||
VST1(F_32, accNEON, scratchReg, 2);
|
||||
} else {
|
||||
MOVI2R(tempReg1, (u32)skinMatrix, scratchReg);
|
||||
for (int i = 0; i < 3; i++) {
|
||||
VLDR(fpScratchReg, tempReg1, 4 * i);
|
||||
VMUL(acc[i], fpScratchReg, src[0]);
|
||||
}
|
||||
for (int i = 0; i < 3; i++) {
|
||||
VLDR(fpScratchReg, tempReg1, 12 + 4 * i);
|
||||
VMLA(acc[i], fpScratchReg, src[1]);
|
||||
}
|
||||
for (int i = 0; i < 3; i++) {
|
||||
VLDR(fpScratchReg, tempReg1, 24 + 4 * i);
|
||||
VMLA(acc[i], fpScratchReg, src[2]);
|
||||
}
|
||||
if (pos) {
|
||||
for (int i = 0; i < 3; i++) {
|
||||
VLDR(fpScratchReg, tempReg1, 36 + 4 * i);
|
||||
VADD(acc[i], acc[i], fpScratchReg);
|
||||
}
|
||||
}
|
||||
for (int i = 0; i < 3; i++) {
|
||||
VSTR(acc[i], dstReg, outOff + i * 4);
|
||||
}
|
||||
}
|
||||
for (int i = 0; i < 3; i++) {
|
||||
VSTR(acc[i], dstReg, outOff + i * 4);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user