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ARMEmitter: Make the helper functions private.

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This commit is contained in:
Henrik Rydgard 2013-11-23 13:43:22 +01:00
parent cda4e9cbf3
commit 16509ba3e9
2 changed files with 9 additions and 9 deletions
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12
Common/ArmEmitter.cpp
View File

@ -2384,7 +2384,7 @@ static int RegCountToType(int nRegs, NEONAlignment align) {
}
}
void ARMXEmitter::VLDST1(bool load, u32 Size, ARMReg Vd, ARMReg Rn, int regCount, NEONAlignment align, ARMReg Rm)
void ARMXEmitter::WriteVLDST1(bool load, u32 Size, ARMReg Vd, ARMReg Rn, int regCount, NEONAlignment align, ARMReg Rm)
{
u32 spacing = RegCountToType(regCount, align); // Only support loading to 1 reg
// Gets encoded as a double register
@ -2396,14 +2396,14 @@ void ARMXEmitter::VLDST1(bool load, u32 Size, ARMReg Vd, ARMReg Rn, int regCount
}
void ARMXEmitter::VLD1(u32 Size, ARMReg Vd, ARMReg Rn, int regCount, NEONAlignment align, ARMReg Rm) {
VLDST1(true, Size, Vd, Rn, regCount, align, Rm);
WriteVLDST1(true, Size, Vd, Rn, regCount, align, Rm);
}
void ARMXEmitter::VST1(u32 Size, ARMReg Vd, ARMReg Rn, int regCount, NEONAlignment align, ARMReg Rm) {
VLDST1(false, Size, Vd, Rn, regCount, align, Rm);
WriteVLDST1(false, Size, Vd, Rn, regCount, align, Rm);
}
void ARMXEmitter::VLDST1_lane(bool load, u32 Size, ARMReg Vd, ARMReg Rn, int lane, bool aligned, ARMReg Rm)
void ARMXEmitter::WriteVLDST1_lane(bool load, u32 Size, ARMReg Vd, ARMReg Rn, int lane, bool aligned, ARMReg Rm)
{
bool register_quad = Vd >= Q0;
@ -2429,11 +2429,11 @@ void ARMXEmitter::VLDST1_lane(bool load, u32 Size, ARMReg Vd, ARMReg Rn, int lan
}
void ARMXEmitter::VLD1_lane(u32 Size, ARMReg Vd, ARMReg Rn, int lane, bool aligned, ARMReg Rm) {
VLDST1_lane(true, Size, Vd, Rn, lane, aligned, Rm);
WriteVLDST1_lane(true, Size, Vd, Rn, lane, aligned, Rm);
}
void ARMXEmitter::VST1_lane(u32 Size, ARMReg Vd, ARMReg Rn, int lane, bool aligned, ARMReg Rm) {
VLDST1_lane(false, Size, Vd, Rn, lane, aligned, Rm);
WriteVLDST1_lane(false, Size, Vd, Rn, lane, aligned, Rm);
}
void ARMXEmitter::VLD1_all_lanes(u32 Size, ARMReg Vd, ARMReg Rn, bool aligned, ARMReg Rm) {

6
Common/ArmEmitter.h
View File

@ -405,6 +405,9 @@ private:
// New Ops
void WriteInstruction(u32 op, ARMReg Rd, ARMReg Rn, Operand2 Rm, bool SetFlags = false);
void WriteVLDST1(bool load, u32 Size, ARMReg Vd, ARMReg Rn, int regCount, NEONAlignment align, ARMReg Rm);
void WriteVLDST1_lane(bool load, u32 Size, ARMReg Vd, ARMReg Rn, int lane, bool aligned, ARMReg Rm);
protected:
inline void Write32(u32 value) {*(u32*)code = value; code+=4;}
@ -730,13 +733,10 @@ public:
// Load/store multiple registers full of elements (a register is a D register)
// Specifying alignment when it can be guaranteed is documented to improve load/store performance.
// For example, when loading a set of four 64-bit registers that we know is 32-byte aligned, we should specify ALIGN_256.
void VLDST1(bool load, u32 Size, ARMReg Vd, ARMReg Rn, int regCount, NEONAlignment align, ARMReg Rm);
void VLD1(u32 Size, ARMReg Vd, ARMReg Rn, int regCount, NEONAlignment align = ALIGN_NONE, ARMReg Rm = _PC);
void VST1(u32 Size, ARMReg Vd, ARMReg Rn, int regCount, NEONAlignment align = ALIGN_NONE, ARMReg Rm = _PC);
// Load/store single lanes of D registers
// TODO
void VLDST1_lane(bool load, u32 Size, ARMReg Vd, ARMReg Rn, int lane, bool aligned, ARMReg Rm);
void VLD1_lane(u32 Size, ARMReg Vd, ARMReg Rn, int lane, bool aligned, ARMReg Rm = _PC);
void VST1_lane(u32 Size, ARMReg Vd, ARMReg Rn, int lane, bool aligned, ARMReg Rm = _PC);