libretro/ppsspp
1
0
Fork 0
mirror of https://github.com/libretro/ppsspp.git synced 2025-02-16 23:20:12 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Initial implementation of jit vadd/vsub/vdiv/vmul.

Browse Source
This commit is contained in:
Unknown W. Brackets 2013-02-15 00:29:40 -08:00
parent b9506c9568
commit 2b441f1638
5 changed files with 83 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
Core/MIPS/ARM/ArmCompVFPU.cpp
View File

@ -35,6 +35,11 @@ namespace MIPSComp
DISABLE;
}
void Jit::Comp_VecDo3(u32 op)
{
DISABLE;
}
void Jit::Comp_Mftv(u32 op)
{
DISABLE;

1
Core/MIPS/ARM/ArmJit.h
View File

@ -110,6 +110,7 @@ public:
void Comp_SVQ(u32 op);
void Comp_VPFX(u32 op);
void Comp_VDot(u32 op);
void Comp_VecDo3(u32 op);
void Comp_Mftv(u32 op);
void Comp_Vmtvc(u32 op);

8
Core/MIPS/MIPSTables.cpp
View File

@ -478,17 +478,17 @@ const MIPSInstruction tableCop1BC[32] =
const MIPSInstruction tableVFPU0[8] =
{
INSTR("vadd",&Jit::Comp_Generic, Dis_VectorSet3, Int_VecDo3, IS_VFPU),
INSTR("vsub",&Jit::Comp_Generic, Dis_VectorSet3, Int_VecDo3, IS_VFPU),
INSTR("vadd",&Jit::Comp_VecDo3, Dis_VectorSet3, Int_VecDo3, IS_VFPU),
INSTR("vsub",&Jit::Comp_VecDo3, Dis_VectorSet3, Int_VecDo3, IS_VFPU),
INSTR("vsbn",&Jit::Comp_Generic, Dis_VectorSet3, Int_Vsbn, IS_VFPU),
{-2}, {-2}, {-2}, {-2},
INSTR("vdiv",&Jit::Comp_Generic, Dis_VectorSet3, Int_VecDo3, IS_VFPU),
INSTR("vdiv",&Jit::Comp_VecDo3, Dis_VectorSet3, Int_VecDo3, IS_VFPU),
};
const MIPSInstruction tableVFPU1[8] =
{
INSTR("vmul",&Jit::Comp_Generic, Dis_VectorSet3, Int_VecDo3, IS_VFPU),
INSTR("vmul",&Jit::Comp_VecDo3, Dis_VectorSet3, Int_VecDo3, IS_VFPU),
INSTR("vdot",&Jit::Comp_VDot, Dis_VectorDot, Int_VDot, IS_VFPU),
INSTR("vscl",&Jit::Comp_Generic, Dis_VScl, Int_VScl, IS_VFPU),
{-2},

73
Core/MIPS/x86/CompVFPU.cpp
View File

@ -285,7 +285,6 @@ void Jit::Comp_SVQ(u32 op)
}
}
void Jit::Comp_VDot(u32 op) {
DISABLE;
@ -333,6 +332,78 @@ void Jit::Comp_VDot(u32 op) {
js.EatPrefix();
}
void Jit::Comp_VecDo3(u32 op) {
DISABLE;
// WARNING: No prefix support!
if (js.MayHavePrefix())
{
Comp_Generic(op);
js.EatPrefix();
return;
}
int vd = _VD;
int vs = _VS;
int vt = _VT;
VectorSize sz = GetVecSize(op);
u8 sregs[4], tregs[4], dregs[4];
GetVectorRegs(sregs, sz, vs);
GetVectorRegs(tregs, sz, vt);
GetVectorRegs(dregs, sz, vd);
void (XEmitter::*xmmop)(X64Reg, OpArg) = NULL;
switch (op >> 26)
{
case 24: //VFPU0
switch ((op >> 23)&7)
{
case 0: // d[i] = s[i] + t[i]; break; //vadd
xmmop = &XEmitter::ADDSS;
break;
case 1: // d[i] = s[i] - t[i]; break; //vsub
xmmop = &XEmitter::SUBSS;
break;
case 7: // d[i] = s[i] / t[i]; break; //vdiv
xmmop = &XEmitter::DIVSS;
break;
}
break;
case 25: //VFPU1
switch ((op >> 23)&7)
{
case 0: // d[i] = s[i] * t[i]; break; //vmul
xmmop = &XEmitter::MULSS;
break;
}
break;
}
if (xmmop == NULL)
{
Comp_Generic(op);
js.EatPrefix();
return;
}
int n = GetNumVectorElements(sz);
// We need at least n temporaries...
if (n > 2)
fpr.Flush();
for (int i = 0; i < n; ++i)
MOVSS((X64Reg) (XMM0 + i), fpr.V(sregs[i]));
for (int i = 0; i < n; ++i)
(this->*xmmop)((X64Reg) (XMM0 + i), fpr.V(tregs[i]));
for (int i = 0; i < n; ++i)
MOVSS(fpr.V(dregs[i]), (X64Reg) (XMM0 + i));
fpr.ReleaseSpillLocks();
js.EatPrefix();
}
void Jit::Comp_Mftv(u32 op) {
CONDITIONAL_DISABLE;

1
Core/MIPS/x86/Jit.h
View File

@ -165,6 +165,7 @@ public:
void Comp_SVQ(u32 op);
void Comp_VPFX(u32 op);
void Comp_VDot(u32 op);
void Comp_VecDo3(u32 op);
void Comp_Mftv(u32 op);
void Comp_Vmtvc(u32 op);