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indentation
This commit is contained in:
Ced2911
parent
c4c43655aa
commit
3eb1696e09
@ -38,343 +38,343 @@
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namespace PpcGen
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{
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enum PPCReg
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{
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// GPRs (32)
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// Behaves as zero does in some instructions
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R0 = 0,
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// Stack pointer (SP)
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R1,
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// Reserved
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R2,
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// Used to pass integer function parameters and return values
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R3, R4,
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// Used to pass integer function parameters
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R5, R6, R7, R8, R9, R10,
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// General purpose
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R11,
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// Scratch
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R12,
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// Unused by the compiler reserved
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R13,
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// General purpose
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R14, R15, R16, R17, R18, R19,
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R20, R21, R22, R23, R24, R25,
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R26, R27, R28, R29, R30, R31,
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// CRs (7)
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CR0 = 0,
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// FPRs (32)
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// Scratch
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FPR0,
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// Used to pass double word function parameters and return values
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FPR1, FPR2, FPR3, FPR4,
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FPR5, FPR6, FPR7, FPR8,
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FPR9, FPR10, FPR11, FPR12,
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FPR13,
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// General purpose
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FPR14, FPR15, FPR16, FPR17,
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FPR18, FPR19, FPR20, FPR21,
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FPR22, FPR23, FPR24, FPR25,
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FPR26, FPR27, FPR28, FPR29,
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FPR30, FPR31,
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// Vmx (128)
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VR0,
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// Used to pass vector function parameters and return values
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VR1, VR2, VR3, VR4,
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VR5, VR6, VR7, VR8,
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VR9, VR10, VR11, VR12,
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VR13, // ...
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// Others regs
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LR, CTR, XER, FPSCR,
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// End
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INVALID_REG = 0xFFFFFFFF
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};
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enum IntegerSize
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{
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I_I8 = 0,
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I_I16,
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I_I32,
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I_I64
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};
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enum
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{
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NUMGPRs = 31,
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};
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typedef const u8* JumpTarget;
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enum FixupBranchType {
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_B,
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_BEQ,
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_BNE,
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_BLT,
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_BLE,
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_BGT,
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_BGE,
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// Link register
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_BL
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};
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struct FixupBranch
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{
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u8 *ptr;
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u32 condition; // Remembers our codition at the time
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FixupBranchType type; //0 = B 1 = BL
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};
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class PPCXEmitter
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{
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private:
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u8 *code, *startcode;
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u8 *lastCacheFlushEnd;
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u32 condition;
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protected:
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// Weite opcode
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inline void Write32(u32 value) {*(u32*)code = value; code+=4;}
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public:
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PPCXEmitter() : code(0), startcode(0), lastCacheFlushEnd(0) {
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}
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PPCXEmitter(u8 *code_ptr) {
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code = code_ptr;
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lastCacheFlushEnd = code_ptr;
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startcode = code_ptr;
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}
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virtual ~PPCXEmitter() {}
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void SetCodePtr(u8 *ptr);
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void ReserveCodeSpace(u32 bytes);
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const u8 *AlignCode16();
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const u8 *AlignCodePage();
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const u8 *GetCodePtr() const;
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void FlushIcache();
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void FlushIcacheSection(u8 *start, u8 *end);
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u8 *GetWritableCodePtr();
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// Special purpose instructions
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// Debug Breakpoint
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void BKPT(u16 arg);
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// Hint instruction
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void YIELD();
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// Do nothing
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void NOP(int count = 1); //nop padding - TODO: fast nop slides, for amd and intel (check their manuals)
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// FixupBranch ops
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FixupBranch B();
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FixupBranch BL();
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FixupBranch BNE();
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FixupBranch BLT();
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FixupBranch BLE();
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FixupBranch B_Cond(FixupBranchType type);
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void SetJumpTarget(FixupBranch const &branch);
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// Branch ops
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void B (const void *fnptr);
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void BL(const void *fnptr);
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void BA (const void *fnptr);
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void BLA(const void *fnptr);
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void BEQ(const void *fnptr);
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void BLE(const void *fnptr);
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void BLT(const void *fnptr);
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void BGT(const void *fnptr);
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void BEQ (PPCReg r);
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void BLR();
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void BGTLR(); // ??? used ?
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void BLTCTR();
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void BGTCTR();
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void BLECTR();
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void BGECTR();
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void BCTRL ();
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void BCTR();
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// Link Register
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void MFLR(PPCReg r);
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void MTLR(PPCReg r);
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void MTCTR(PPCReg r);
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// Logical Ops
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void AND (PPCReg Rs, PPCReg Ra, PPCReg Rb);
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void ANDI (PPCReg Rs, PPCReg Ra, unsigned short imm);
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void ANDIS(PPCReg Rs, PPCReg Ra, unsigned short imm);
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void NAND (PPCReg Rs, PPCReg Ra, PPCReg Rb);
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void OR (PPCReg Rs, PPCReg Ra, PPCReg Rb);
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void ORC (PPCReg Rs, PPCReg Ra, PPCReg Rb);
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void NOR (PPCReg Rs, PPCReg Ra, PPCReg Rb);
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void XOR (PPCReg Rs, PPCReg Ra, PPCReg Rb);
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void NEG (PPCReg Rs, PPCReg Ra, PPCReg Rb);
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// Arithmetics ops
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void ADD (PPCReg Rd, PPCReg Ra, PPCReg Rb);
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void ADDI (PPCReg Rd, PPCReg Ra, short imm);
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void ADDIS (PPCReg Rd, PPCReg Ra, short imm);
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void ADDC (PPCReg Rd, PPCReg Ra, PPCReg Rb);
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void SUB (PPCReg Rd, PPCReg Ra, PPCReg Rb) {
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// reverse ?
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SUBF(Rd, Rb, Ra);
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}
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void SUBF (PPCReg Rd, PPCReg Ra, PPCReg Rb, int RCFlags = 0);
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void SUBFC (PPCReg Rd, PPCReg Ra, PPCReg Rb);
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// Floating ops
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void DIVW(PPCReg dest, PPCReg dividend, PPCReg divisor);
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void DIVWU(PPCReg dest, PPCReg dividend, PPCReg divisor);
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void MULLW(PPCReg dest, PPCReg src, PPCReg op2);
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void MULHW (PPCReg dest, PPCReg src, PPCReg op2);
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void MULHWS(PPCReg dest, PPCReg src, PPCReg op2);
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void ORI (PPCReg src, PPCReg dest, unsigned short imm);
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// Memory load/store operations
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void LI (PPCReg dest, unsigned short imm);
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void LIS (PPCReg dest, unsigned short imm);
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// dest = LIS(imm) + ORI(+imm)
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void MOVI2R (PPCReg dest, unsigned int imm);
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// 8bit
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void LBZ (PPCReg dest, PPCReg src, int offset = 0);
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void LBZX (PPCReg dest, PPCReg a, PPCReg b);
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// 16bit
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void LHZ (PPCReg dest, PPCReg src, int offset = 0);
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void LHBRX (PPCReg dest, PPCReg src, PPCReg offset);
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// 32 bit
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void LWZ (PPCReg dest, PPCReg src, int offset = 0);
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void LWBRX (PPCReg dest, PPCReg src, PPCReg offset);
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// 64 bit
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void LD (PPCReg dest, PPCReg src, int offset = 0);
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// 8 bit
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void STB (PPCReg dest, PPCReg src, int offset = 0);
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void STBX (PPCReg dest, PPCReg a, PPCReg b);
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// 16 bit
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void STH (PPCReg dest, PPCReg src, int offset = 0);
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void STHBRX (PPCReg dest, PPCReg src, PPCReg offset);
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// 32 bit
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void STW (PPCReg dest, PPCReg src, int offset = 0);
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void STWU (PPCReg dest, PPCReg src, int offset = 0);
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void STWBRX (PPCReg dest, PPCReg src, PPCReg offset);
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// 64 bit
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void STD (PPCReg dest, PPCReg src, int offset = 0);
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// sign
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void EXTSB (PPCReg dest, PPCReg src);
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void EXTSH (PPCReg dest, PPCReg src);
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void RLWINM (PPCReg dest, PPCReg src, int shift, int start, int end);
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// Compare
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void CMPLI (PPCReg dest, unsigned short imm);
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void CMPI (PPCReg dest, unsigned short imm);
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void CMPL (PPCReg a, PPCReg b);
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void CMP (PPCReg a, PPCReg b);
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void Prologue();
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void Epilogue();
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// Debug !
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void Break() {
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Write32(0x0FE00016);
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}
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void MR (PPCReg to, PPCReg from) {
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OR(to, from, from);
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}
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void QuickCallFunction(void *func);
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protected:
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}; // class PPCXEmitter
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// Everything that needs to generate X86 code should inherit from this.
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// You get memory management for free, plus, you can use all the MOV etc functions without
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// having to prefix them with gen-> or something similar.
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class PPCXCodeBlock : public PPCXEmitter
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{
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protected:
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u8 *region;
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size_t region_size;
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public:
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PPCXCodeBlock() : region(NULL), region_size(0) {}
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virtual ~PPCXCodeBlock() { if (region) FreeCodeSpace(); }
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// Call this before you generate any code.
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void AllocCodeSpace(int size)
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enum PPCReg
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{
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region_size = size;
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region = (u8*)AllocateExecutableMemory(region_size);
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SetCodePtr(region);
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}
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// GPRs (32)
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// Behaves as zero does in some instructions
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R0 = 0,
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// Stack pointer (SP)
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R1,
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// Reserved
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R2,
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// Used to pass integer function parameters and return values
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R3, R4,
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// Used to pass integer function parameters
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R5, R6, R7, R8, R9, R10,
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// General purpose
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R11,
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// Scratch
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R12,
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// Unused by the compiler reserved
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R13,
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// General purpose
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R14, R15, R16, R17, R18, R19,
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R20, R21, R22, R23, R24, R25,
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R26, R27, R28, R29, R30, R31,
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// Always clear code space with breakpoints, so that if someone accidentally executes
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// uninitialized, it just breaks into the debugger.
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void ClearCodeSpace()
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// CRs (7)
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CR0 = 0,
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// FPRs (32)
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// Scratch
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FPR0,
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// Used to pass double word function parameters and return values
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FPR1, FPR2, FPR3, FPR4,
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FPR5, FPR6, FPR7, FPR8,
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FPR9, FPR10, FPR11, FPR12,
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FPR13,
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// General purpose
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FPR14, FPR15, FPR16, FPR17,
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FPR18, FPR19, FPR20, FPR21,
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FPR22, FPR23, FPR24, FPR25,
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FPR26, FPR27, FPR28, FPR29,
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FPR30, FPR31,
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// Vmx (128)
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VR0,
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// Used to pass vector function parameters and return values
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VR1, VR2, VR3, VR4,
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VR5, VR6, VR7, VR8,
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VR9, VR10, VR11, VR12,
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VR13, // ...
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// Others regs
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LR, CTR, XER, FPSCR,
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// End
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INVALID_REG = 0xFFFFFFFF
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};
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enum IntegerSize
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{
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// x86/64: 0xCC = breakpoint
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memset(region, 0xCC, region_size);
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ResetCodePtr();
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}
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I_I8 = 0,
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I_I16,
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I_I32,
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I_I64
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};
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// Call this when shutting down. Don't rely on the destructor, even though it'll do the job.
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void FreeCodeSpace()
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enum
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{
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region = NULL;
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region_size = 0;
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}
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NUMGPRs = 31,
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};
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bool IsInSpace(u8 *ptr)
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typedef const u8* JumpTarget;
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enum FixupBranchType {
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_B,
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_BEQ,
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_BNE,
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_BLT,
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_BLE,
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_BGT,
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_BGE,
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// Link register
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_BL
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};
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struct FixupBranch
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{
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return ptr >= region && ptr < region + region_size;
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}
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u8 *ptr;
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u32 condition; // Remembers our codition at the time
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FixupBranchType type; //0 = B 1 = BL
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};
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// Cannot currently be undone. Will write protect the entire code region.
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// Start over if you need to change the code (call FreeCodeSpace(), AllocCodeSpace()).
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void WriteProtect()
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class PPCXEmitter
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{
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//WriteProtectMemory(region, region_size, true);
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}
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void UnWriteProtect()
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private:
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u8 *code, *startcode;
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u8 *lastCacheFlushEnd;
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u32 condition;
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protected:
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// Weite opcode
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inline void Write32(u32 value) {*(u32*)code = value; code+=4;}
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public:
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PPCXEmitter() : code(0), startcode(0), lastCacheFlushEnd(0) {
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}
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PPCXEmitter(u8 *code_ptr) {
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code = code_ptr;
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lastCacheFlushEnd = code_ptr;
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startcode = code_ptr;
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}
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virtual ~PPCXEmitter() {}
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void SetCodePtr(u8 *ptr);
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void ReserveCodeSpace(u32 bytes);
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const u8 *AlignCode16();
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const u8 *AlignCodePage();
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const u8 *GetCodePtr() const;
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void FlushIcache();
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void FlushIcacheSection(u8 *start, u8 *end);
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u8 *GetWritableCodePtr();
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// Special purpose instructions
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// Debug Breakpoint
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void BKPT(u16 arg);
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// Hint instruction
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void YIELD();
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// Do nothing
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void NOP(int count = 1); //nop padding - TODO: fast nop slides, for amd and intel (check their manuals)
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// FixupBranch ops
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FixupBranch B();
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FixupBranch BL();
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FixupBranch BNE();
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FixupBranch BLT();
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FixupBranch BLE();
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FixupBranch B_Cond(FixupBranchType type);
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void SetJumpTarget(FixupBranch const &branch);
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// Branch ops
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void B (const void *fnptr);
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void BL(const void *fnptr);
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void BA (const void *fnptr);
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void BLA(const void *fnptr);
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void BEQ(const void *fnptr);
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void BLE(const void *fnptr);
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void BLT(const void *fnptr);
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void BGT(const void *fnptr);
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void BEQ (PPCReg r);
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void BLR();
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void BGTLR(); // ??? used ?
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void BLTCTR();
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void BGTCTR();
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void BLECTR();
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void BGECTR();
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void BCTRL ();
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void BCTR();
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// Link Register
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void MFLR(PPCReg r);
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void MTLR(PPCReg r);
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void MTCTR(PPCReg r);
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// Logical Ops
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void AND (PPCReg Rs, PPCReg Ra, PPCReg Rb);
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void ANDI (PPCReg Rs, PPCReg Ra, unsigned short imm);
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void ANDIS(PPCReg Rs, PPCReg Ra, unsigned short imm);
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void NAND (PPCReg Rs, PPCReg Ra, PPCReg Rb);
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void OR (PPCReg Rs, PPCReg Ra, PPCReg Rb);
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void ORC (PPCReg Rs, PPCReg Ra, PPCReg Rb);
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void NOR (PPCReg Rs, PPCReg Ra, PPCReg Rb);
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void XOR (PPCReg Rs, PPCReg Ra, PPCReg Rb);
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void NEG (PPCReg Rs, PPCReg Ra, PPCReg Rb);
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// Arithmetics ops
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void ADD (PPCReg Rd, PPCReg Ra, PPCReg Rb);
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void ADDI (PPCReg Rd, PPCReg Ra, short imm);
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void ADDIS (PPCReg Rd, PPCReg Ra, short imm);
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void ADDC (PPCReg Rd, PPCReg Ra, PPCReg Rb);
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void SUB (PPCReg Rd, PPCReg Ra, PPCReg Rb) {
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// reverse ?
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SUBF(Rd, Rb, Ra);
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}
|
||||
void SUBF (PPCReg Rd, PPCReg Ra, PPCReg Rb, int RCFlags = 0);
|
||||
void SUBFC (PPCReg Rd, PPCReg Ra, PPCReg Rb);
|
||||
|
||||
// Floating ops
|
||||
void DIVW(PPCReg dest, PPCReg dividend, PPCReg divisor);
|
||||
void DIVWU(PPCReg dest, PPCReg dividend, PPCReg divisor);
|
||||
void MULLW(PPCReg dest, PPCReg src, PPCReg op2);
|
||||
void MULHW (PPCReg dest, PPCReg src, PPCReg op2);
|
||||
void MULHWS(PPCReg dest, PPCReg src, PPCReg op2);
|
||||
|
||||
void ORI (PPCReg src, PPCReg dest, unsigned short imm);
|
||||
|
||||
// Memory load/store operations
|
||||
void LI (PPCReg dest, unsigned short imm);
|
||||
void LIS (PPCReg dest, unsigned short imm);
|
||||
// dest = LIS(imm) + ORI(+imm)
|
||||
void MOVI2R (PPCReg dest, unsigned int imm);
|
||||
|
||||
// 8bit
|
||||
void LBZ (PPCReg dest, PPCReg src, int offset = 0);
|
||||
void LBZX (PPCReg dest, PPCReg a, PPCReg b);
|
||||
|
||||
// 16bit
|
||||
void LHZ (PPCReg dest, PPCReg src, int offset = 0);
|
||||
void LHBRX (PPCReg dest, PPCReg src, PPCReg offset);
|
||||
// 32 bit
|
||||
void LWZ (PPCReg dest, PPCReg src, int offset = 0);
|
||||
void LWBRX (PPCReg dest, PPCReg src, PPCReg offset);
|
||||
// 64 bit
|
||||
void LD (PPCReg dest, PPCReg src, int offset = 0);
|
||||
|
||||
// 8 bit
|
||||
void STB (PPCReg dest, PPCReg src, int offset = 0);
|
||||
void STBX (PPCReg dest, PPCReg a, PPCReg b);
|
||||
// 16 bit
|
||||
void STH (PPCReg dest, PPCReg src, int offset = 0);
|
||||
void STHBRX (PPCReg dest, PPCReg src, PPCReg offset);
|
||||
// 32 bit
|
||||
void STW (PPCReg dest, PPCReg src, int offset = 0);
|
||||
void STWU (PPCReg dest, PPCReg src, int offset = 0);
|
||||
void STWBRX (PPCReg dest, PPCReg src, PPCReg offset);
|
||||
// 64 bit
|
||||
void STD (PPCReg dest, PPCReg src, int offset = 0);
|
||||
|
||||
// sign
|
||||
void EXTSB (PPCReg dest, PPCReg src);
|
||||
void EXTSH (PPCReg dest, PPCReg src);
|
||||
|
||||
void RLWINM (PPCReg dest, PPCReg src, int shift, int start, int end);
|
||||
|
||||
// Compare
|
||||
void CMPLI (PPCReg dest, unsigned short imm);
|
||||
void CMPI (PPCReg dest, unsigned short imm);
|
||||
void CMPL (PPCReg a, PPCReg b);
|
||||
void CMP (PPCReg a, PPCReg b);
|
||||
|
||||
void Prologue();
|
||||
void Epilogue();
|
||||
|
||||
// Debug !
|
||||
void Break() {
|
||||
Write32(0x0FE00016);
|
||||
}
|
||||
|
||||
void MR (PPCReg to, PPCReg from) {
|
||||
OR(to, from, from);
|
||||
}
|
||||
|
||||
void QuickCallFunction(void *func);
|
||||
protected:
|
||||
|
||||
}; // class PPCXEmitter
|
||||
|
||||
|
||||
// Everything that needs to generate X86 code should inherit from this.
|
||||
// You get memory management for free, plus, you can use all the MOV etc functions without
|
||||
// having to prefix them with gen-> or something similar.
|
||||
class PPCXCodeBlock : public PPCXEmitter
|
||||
{
|
||||
//UnWriteProtectMemory(region, region_size, false);
|
||||
}
|
||||
protected:
|
||||
u8 *region;
|
||||
size_t region_size;
|
||||
|
||||
void ResetCodePtr()
|
||||
{
|
||||
SetCodePtr(region);
|
||||
}
|
||||
public:
|
||||
PPCXCodeBlock() : region(NULL), region_size(0) {}
|
||||
virtual ~PPCXCodeBlock() { if (region) FreeCodeSpace(); }
|
||||
|
||||
size_t GetSpaceLeft() const
|
||||
{
|
||||
return region_size - (GetCodePtr() - region);
|
||||
}
|
||||
// Call this before you generate any code.
|
||||
void AllocCodeSpace(int size)
|
||||
{
|
||||
region_size = size;
|
||||
region = (u8*)AllocateExecutableMemory(region_size);
|
||||
SetCodePtr(region);
|
||||
}
|
||||
|
||||
u8 *GetBasePtr() {
|
||||
return region;
|
||||
}
|
||||
// Always clear code space with breakpoints, so that if someone accidentally executes
|
||||
// uninitialized, it just breaks into the debugger.
|
||||
void ClearCodeSpace()
|
||||
{
|
||||
// x86/64: 0xCC = breakpoint
|
||||
memset(region, 0xCC, region_size);
|
||||
ResetCodePtr();
|
||||
}
|
||||
|
||||
size_t GetOffset(u8 *ptr) {
|
||||
return ptr - region;
|
||||
}
|
||||
};
|
||||
// Call this when shutting down. Don't rely on the destructor, even though it'll do the job.
|
||||
void FreeCodeSpace()
|
||||
{
|
||||
region = NULL;
|
||||
region_size = 0;
|
||||
}
|
||||
|
||||
bool IsInSpace(u8 *ptr)
|
||||
{
|
||||
return ptr >= region && ptr < region + region_size;
|
||||
}
|
||||
|
||||
// Cannot currently be undone. Will write protect the entire code region.
|
||||
// Start over if you need to change the code (call FreeCodeSpace(), AllocCodeSpace()).
|
||||
void WriteProtect()
|
||||
{
|
||||
//WriteProtectMemory(region, region_size, true);
|
||||
}
|
||||
void UnWriteProtect()
|
||||
{
|
||||
//UnWriteProtectMemory(region, region_size, false);
|
||||
}
|
||||
|
||||
void ResetCodePtr()
|
||||
{
|
||||
SetCodePtr(region);
|
||||
}
|
||||
|
||||
size_t GetSpaceLeft() const
|
||||
{
|
||||
return region_size - (GetCodePtr() - region);
|
||||
}
|
||||
|
||||
u8 *GetBasePtr() {
|
||||
return region;
|
||||
}
|
||||
|
||||
size_t GetOffset(u8 *ptr) {
|
||||
return ptr - region;
|
||||
}
|
||||
};
|
||||
|
||||
} // namespace
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user