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Some minor renames and cleanups
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@ -99,11 +99,11 @@ void Arm64Jit::GenerateFixedCode(const JitOptions &jo) {
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if (jo.useStaticAlloc) {
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saveStaticRegisters = AlignCode16();
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STR(INDEX_UNSIGNED, DOWNCOUNTREG, CTXREG, offsetof(MIPSState, downcount));
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gpr.EmitSaveStaticAllocs();
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gpr.EmitSaveStaticRegisters();
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RET();
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loadStaticRegisters = AlignCode16();
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gpr.EmitLoadStaticAllocs();
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gpr.EmitLoadStaticRegisters();
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LDR(INDEX_UNSIGNED, DOWNCOUNTREG, CTXREG, offsetof(MIPSState, downcount));
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RET();
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@ -172,7 +172,7 @@ void Arm64Jit::GenerateFixedCode(const JitOptions &jo) {
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MOV(W0, DOWNCOUNTREG);
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MOV(X1, MEMBASEREG);
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MOV(X2, JITBASEREG);
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QuickCallFunction(SCRATCH1, (void *)&ShowPC);
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QuickCallFunction(SCRATCH1_64, (void *)&ShowPC);
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}
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LDR(INDEX_UNSIGNED, SCRATCH1, CTXREG, offsetof(MIPSState, pc));
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@ -186,6 +186,7 @@ void Arm64Jit::GenerateFixedCode(const JitOptions &jo) {
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SetJumpTarget(skipJump);
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// No block found, let's jit. I don't think we actually need to save static regs that are in callee-save regs here but whatever.
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// Also, rounding mode gotta be irrelevant here..
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SaveStaticRegisters();
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RestoreRoundingMode(true);
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QuickCallFunction(SCRATCH1_64, (void *)&MIPSComp::JitAt);
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@ -354,7 +354,7 @@ void Arm64Jit::Comp_FPUBranch(MIPSOpcode op) {
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case 2: BranchFPFlag(op, CC_NEQ, true); break; // bc1fl
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case 3: BranchFPFlag(op, CC_EQ, true); break; // bc1tl
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default:
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_dbg_assert_msg_(CPU,0,"Trying to interpret instruction that can't be interpreted");
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_dbg_assert_msg_(CPU, 0, "Trying to interpret instruction that can't be interpreted");
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break;
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}
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}
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@ -585,7 +585,7 @@ void Arm64Jit::Comp_Syscall(MIPSOpcode op)
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// If we're in a delay slot, this is off by one.
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const int offset = js.inDelaySlot ? -1 : 0;
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WriteDownCount(offset);
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WriteDownCount(offset, false);
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RestoreRoundingMode();
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js.downcountAmount = -offset;
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@ -463,7 +463,7 @@ void Arm64Jit::Comp_Generic(MIPSOpcode op) {
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MIPSInterpretFunc func = MIPSGetInterpretFunc(op);
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if (func) {
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SaveStaticRegisters();
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// TODO: Perhaps keep the rounding mode for interp?
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// TODO: Perhaps keep the rounding mode for interp? Should probably, right?
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RestoreRoundingMode();
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MOVI2R(SCRATCH1, GetCompilerPC());
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MovToPC(SCRATCH1);
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@ -507,13 +507,21 @@ void Arm64Jit::LoadStaticRegisters() {
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}
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}
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void Arm64Jit::WriteDownCount(int offset) {
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void Arm64Jit::WriteDownCount(int offset, bool updateFlags) {
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int theDowncount = js.downcountAmount + offset;
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SUBSI2R(DOWNCOUNTREG, DOWNCOUNTREG, theDowncount, SCRATCH1);
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if (updateFlags) {
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SUBSI2R(DOWNCOUNTREG, DOWNCOUNTREG, theDowncount, SCRATCH1);
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} else {
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SUBI2R(DOWNCOUNTREG, DOWNCOUNTREG, theDowncount, SCRATCH1);
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}
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}
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void Arm64Jit::WriteDownCountR(ARM64Reg reg) {
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SUBS(DOWNCOUNTREG, DOWNCOUNTREG, reg);
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void Arm64Jit::WriteDownCountR(ARM64Reg reg, bool updateFlags) {
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if (updateFlags) {
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SUBS(DOWNCOUNTREG, DOWNCOUNTREG, reg);
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} else {
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SUB(DOWNCOUNTREG, DOWNCOUNTREG, reg);
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}
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}
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void Arm64Jit::RestoreRoundingMode(bool force) {
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@ -631,7 +639,7 @@ void Arm64Jit::WriteExit(u32 destination, int exit_num) {
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// Link opportunity!
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int block = blocks.GetBlockNumberFromStartAddress(destination);
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if (block >= 0 && jo.enableBlocklink) {
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// It exists! Joy of joy!
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// The target block exists! Directly link to its checked entrypoint.
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B(blocks.GetBlock(block)->checkedEntry);
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b->linkStatus[exit_num] = true;
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} else {
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@ -187,8 +187,8 @@ private:
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void AddContinuedBlock(u32 dest);
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MIPSOpcode GetOffsetInstruction(int offset);
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void WriteDownCount(int offset = 0);
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void WriteDownCountR(Arm64Gen::ARM64Reg reg);
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void WriteDownCount(int offset = 0, bool updateFlags = true);
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void WriteDownCountR(Arm64Gen::ARM64Reg reg, bool updateFlags = true);
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void RestoreRoundingMode(bool force = false);
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void ApplyRoundingMode(bool force = false);
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void UpdateRoundingMode();
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@ -58,6 +58,7 @@ void Arm64RegCache::Start(MIPSAnalyst::AnalysisResults &stats) {
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mr[statics[i].mr].loc = ML_ARMREG;
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mr[statics[i].mr].reg = statics[i].ar;
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mr[statics[i].mr].isStatic = true;
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mr[statics[i].mr].spillLock = true;
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}
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}
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@ -99,11 +100,10 @@ const Arm64RegCache::StaticAllocation *Arm64RegCache::GetStaticAllocations(int &
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}
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}
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void Arm64RegCache::EmitLoadStaticAllocs() {
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void Arm64RegCache::EmitLoadStaticRegisters() {
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int count;
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const StaticAllocation *allocs = GetStaticAllocations(count);
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// TODO: Use LDP when possible.
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// This only needs to run once (by Asm) so checks don't need to be fast.
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for (int i = 0; i < count; i++) {
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int offset = GetMipsRegOffset(allocs[i].mr);
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emit_->LDR(INDEX_UNSIGNED, allocs[i].ar, CTXREG, offset);
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@ -113,10 +113,10 @@ void Arm64RegCache::EmitLoadStaticAllocs() {
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}
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}
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void Arm64RegCache::EmitSaveStaticAllocs() {
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void Arm64RegCache::EmitSaveStaticRegisters() {
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int count;
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const StaticAllocation *allocs = GetStaticAllocations(count);
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// TODO: Use LDP when possible.
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// TODO: Use STP when possible.
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// This only needs to run once (by Asm) so checks don't need to be fast.
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for (int i = 0; i < count; i++) {
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int offset = GetMipsRegOffset(allocs[i].mr);
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@ -134,9 +134,9 @@ public:
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int GetMipsRegOffset(MIPSGPReg r);
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// Call these when leaving/entering the JIT
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void EmitLoadStaticAllocs();
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void EmitSaveStaticAllocs();
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// These are called once on startup to generate functions, that you should then call.
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void EmitLoadStaticRegisters();
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void EmitSaveStaticRegisters();
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private:
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struct StaticAllocation {
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