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jit: Update rounding mode immediately on ctc1.
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@ -406,23 +406,7 @@ void Jit::Comp_mxc1(MIPSOpcode op)
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} else {
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gpr.MapDirtyIn(MIPS_REG_FPCOND, rt);
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}
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// Hardware rounding method.
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// Left here in case it is faster than conditional method.
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/*
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AND(SCRATCHREG1, gpr.R(rt), Operand2(3));
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// MIPS Rounding Mode <-> ARM Rounding Mode
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// 0, 1, 2, 3 <-> 0, 3, 1, 2
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CMP(SCRATCHREG1, Operand2(1));
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SetCC(CC_EQ); ADD(SCRATCHREG1, SCRATCHREG1, Operand2(2));
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SetCC(CC_GT); SUB(SCRATCHREG1, SCRATCHREG1, Operand2(1));
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SetCC(CC_AL);
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// Load and Store RM to FPSCR
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VMRS(SCRATCHREG2);
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BIC(SCRATCHREG2, SCRATCHREG2, Operand2(0x3 << 22));
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ORR(SCRATCHREG2, SCRATCHREG2, Operand2(SCRATCHREG1, ST_LSL, 22));
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VMSR(SCRATCHREG2);
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*/
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// Update MIPS state
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// TODO: Technically, should mask by 0x0181FFFF. Maybe just put all of FCR31 in the reg?
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STR(gpr.R(rt), CTXREG, offsetof(MIPSState, fcr31));
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@ -433,6 +417,14 @@ void Jit::Comp_mxc1(MIPSOpcode op)
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MOV(SCRATCHREG1, Operand2(gpr.R(rt), ST_LSR, 23));
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AND(gpr.R(MIPS_REG_FPCOND), SCRATCHREG1, Operand2(1));
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#endif
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SetRoundingMode();
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} else {
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if ((gpr.GetImm(rt) & 3) == 0) {
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// Default nearest mode, let's do this the fast way.
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ClearRoundingMode();
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} else {
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SetRoundingMode();
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}
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}
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} else {
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Comp_Generic(op);
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@ -383,6 +383,12 @@ void Jit::Comp_mxc1(MIPSOpcode op)
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if (gpr.IsImm(rt)) {
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gpr.SetImm(MIPS_REG_FPCOND, (gpr.GetImm(rt) >> 23) & 1);
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MOV(32, M(&mips_->fcr31), Imm32(gpr.GetImm(rt) & 0x0181FFFF));
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if ((gpr.GetImm(rt) & 3) == 0) {
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// Default nearest mode, let's do this the fast way.
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ClearRoundingMode();
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} else {
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SetRoundingMode();
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}
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} else {
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gpr.Lock(rt, MIPS_REG_FPCOND);
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gpr.MapReg(rt, true, false);
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@ -393,6 +399,7 @@ void Jit::Comp_mxc1(MIPSOpcode op)
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MOV(32, M(&mips_->fcr31), gpr.R(rt));
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AND(32, M(&mips_->fcr31), Imm32(0x0181FFFF));
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gpr.UnlockAll();
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SetRoundingMode();
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}
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} else {
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Comp_Generic(op);
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