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Use flags instead of bools for VCVT. Fix up some spacing. Only Android has ArmEmitterTest.
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@ -1085,14 +1085,14 @@ void ARMXEmitter::VMOV(ARMReg Dest, ARMReg Src)
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}
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}
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void ARMXEmitter::VCVT(ARMReg Sd, ARMReg Sm, bool to_integer, bool is_signed, bool round_to_zero)
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void ARMXEmitter::VCVT(ARMReg Sd, ARMReg Sm, int flags)
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{
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bool op = to_integer ? round_to_zero : is_signed;
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bool op2 = to_integer ? is_signed : 0;
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bool op = (flags & TO_INT) ? (flags & ROUND_TO_ZERO) : (flags & IS_SIGNED);
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bool op2 = (flags & TO_INT) ? (flags & IS_SIGNED) : 0;
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Sd = SubBase(Sd);
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Sm = SubBase(Sm);
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Write32(NO_COND | (0x1D << 23) | ((Sd & 0x1) << 22) | (0x7 << 19) | (to_integer << 18) | (op2 << 16) \
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Write32(NO_COND | (0x1D << 23) | ((Sd & 0x1) << 22) | (0x7 << 19) | ((flags & TO_INT) << 18) | (op2 << 16) \
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| ((Sd & 0x1E) << 11) | (op << 7) | (0x29 << 6) | ((Sm & 0x1) << 5) | (Sm >> 1));
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}
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@ -32,6 +32,12 @@
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#undef _LR
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#undef _PC
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// VCVT flags
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#define TO_FLOAT 0
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#define TO_INT 1 << 0
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#define IS_SIGNED 1 << 1
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#define ROUND_TO_ZERO 1 << 2
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namespace ArmGen
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{
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enum ARMReg
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@ -466,7 +472,7 @@ public:
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// Using just MSR here messes with our defines on the PPC side of stuff (when this code was in dolphin...)
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// Just need to put an underscore here, bit annoying.
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void _MSR (bool nzcvq, bool g, Operand2 op2);
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void _MSR (bool nzcvq, bool g, ARMReg src );
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void _MSR (bool nzcvq, bool g, ARMReg src);
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void MRS (ARMReg dest);
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// Memory load/store operations
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@ -528,7 +534,7 @@ public:
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void VMUL(ARMReg Vd, ARMReg Vn, ARMReg Vm);
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void VMOV(ARMReg Dest, ARMReg Src, bool high);
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void VMOV(ARMReg Dest, ARMReg Src);
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void VCVT(ARMReg Sd, ARMReg Sm, bool to_integer, bool is_signed, bool round_to_zero = false);
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void VCVT(ARMReg Sd, ARMReg Sm, int flags);
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void QuickCallFunction(ARMReg scratchreg, void *func);
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// Utility functions
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@ -19,14 +19,14 @@
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#include "ArmJit.h"
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#include "ArmRegCache.h"
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#define _RS ((op>>21) & 0x1F)
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#define _RT ((op>>16) & 0x1F)
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#define _RD ((op>>11) & 0x1F)
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#define _FS ((op>>11) & 0x1F)
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#define _FT ((op>>16) & 0x1F)
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#define _FD ((op>>6 ) & 0x1F)
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#define _POS ((op>>6 ) & 0x1F)
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#define _SIZE ((op>>11 ) & 0x1F)
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#define _RS ((op>>21) & 0x1F)
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#define _RT ((op>>16) & 0x1F)
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#define _RD ((op>>11) & 0x1F)
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#define _FS ((op>>11) & 0x1F)
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#define _FT ((op>>16) & 0x1F)
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#define _FD ((op>>6 ) & 0x1F)
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#define _POS ((op>>6 ) & 0x1F)
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#define _SIZE ((op>>11) & 0x1F)
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#define DISABLE Comp_Generic(op); return;
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#define CONDITIONAL_DISABLE ;
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@ -189,33 +189,33 @@ void Jit::Comp_FPU2op(u32 op)
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break;
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case 12: //FsI(fd) = (int)floorf(F(fs)+0.5f); break; //round.w.s
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fpr.MapDirtyIn(fd, fs);
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VCVT(fpr.R(fd), fpr.R(fs), true, true, false);
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VCVT(fpr.R(fd), fpr.R(fs), TO_INT | IS_SIGNED);
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break;
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case 13: //FsI(fd) = Rto0(F(fs))); break; //trunc.w.s
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fpr.MapDirtyIn(fd, fs);
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VCVT(fpr.R(fd), fpr.R(fs), true, true, true);
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VCVT(fpr.R(fd), fpr.R(fs), TO_INT | IS_SIGNED | ROUND_TO_ZERO);
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break;
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case 14: //FsI(fd) = (int)ceilf (F(fs)); break; //ceil.w.s
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fpr.MapDirtyIn(fd, fs);
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MOVI2R(R0, 0x3F000000); // 0.5f
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VMOV(S0, R0);
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VADD(S0,fpr.R(fs),S0);
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VCVT(fpr.R(fd), S0, true, true, false);
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VCVT(fpr.R(fd), S0, TO_INT | IS_SIGNED);
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break;
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case 15: //FsI(fd) = (int)floorf(F(fs)); break; //floor.w.s
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fpr.MapDirtyIn(fd, fs);
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MOVI2R(R0, 0x3F000000); // 0.5f
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VMOV(S0, R0);
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VSUB(S0,fpr.R(fs),S0);
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VCVT(fpr.R(fd), S0, true, true, false);
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VCVT(fpr.R(fd), S0, TO_INT | IS_SIGNED);
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break;
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case 32: //F(fd) = (float)FsI(fs); break; //cvt.s.w
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fpr.MapDirtyIn(fd, fs);
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VCVT(fpr.R(fd), fpr.R(fs), false, true);
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VCVT(fpr.R(fd), fpr.R(fs), TO_FLOAT | IS_SIGNED);
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break;
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case 36: //FsI(fd) = (int) F(fs); break; //cvt.w.s
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fpr.MapDirtyIn(fd, fs);
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VCVT(fpr.R(fd), fpr.R(fs), true, false, true);
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VCVT(fpr.R(fd), fpr.R(fs), TO_INT | ROUND_TO_ZERO);
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break;
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default:
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DISABLE;
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@ -154,7 +154,7 @@ void NativeGetAppInfo(std::string *app_dir_name, std::string *app_nice_name, boo
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*app_dir_name = "ppsspp";
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*landscape = true;
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#if defined(ARM)
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#if defined(ANDROID)
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ArmEmitterTest();
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#endif
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}
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